From 058da32b5b86b33d8cb8fd816c106db17d9b78d3 Mon Sep 17 00:00:00 2001
From: alexmadison <git@mdsn.co.uk>
Date: Wed, 13 Apr 2022 18:53:39 +0200
Subject: [PATCH] made dualrail decoder en use fewer AND gates

---
 dataflow_neuro/coders.act | 37 ++++++++++++++++++++++++++++---------
 1 file changed, 28 insertions(+), 9 deletions(-)

diff --git a/dataflow_neuro/coders.act b/dataflow_neuro/coders.act
index a8aa921..bf077d1 100644
--- a/dataflow_neuro/coders.act
+++ b/dataflow_neuro/coders.act
@@ -167,19 +167,38 @@ defproc decoder_dualrail_x(Mx1of2<Nc> in; bool? out[N]; power supply) {
  */
 export template<pint Nc, N>
 defproc decoder_dualrail_en(Mx1of2<Nc> in; bool? en, out[N]; power supply) {
-	decoder_dualrail_refresh<Nc, N> decoder(.in = in, .supply = supply);
 
-	sigbuf<N> sb_en(.in = en, .supply = supply);
-	AND2_X1 en_ands[N];
-	(i:N:
-		en_ands[i].a = decoder.out[i];
-		en_ands[i].b = sb_en.out[i];
+	decoder_dualrail_refresh<Nc, N> decoder(.out = out, .supply = supply);
 
-		en_ands[i].vdd = supply.vdd;
-		en_ands[i].vss = supply.vss;
+	sigbuf<Nc*2> sb_en(.in = en, .supply = supply);
+	// AND2_X1 en_ands[N];
+	// (i:N:
+	// 	en_ands[i].a = decoder.out[i];
+	// 	en_ands[i].b = sb_en.out[i];
 
-		en_ands[i].y = out[i];
+	// 	en_ands[i].vdd = supply.vdd;
+	// 	en_ands[i].vss = supply.vss;
 
+	// 	en_ands[i].y = out[i];
+
+	// )
+
+	AND2_X1 en_ands_t[Nc];
+	AND2_X1 en_ands_f[Nc];
+	(i:Nc:
+		en_ands_t[i].a = in.d[i].t;
+		en_ands_f[i].a = in.d[i].f;
+
+		en_ands_t[i].b = sb_en.out[i];
+		en_ands_f[i].b = sb_en.out[i+Nc];
+		
+		en_ands_t[i].y = decoder.in.d[i].t;
+		en_ands_f[i].y = decoder.in.d[i].f;
+
+		en_ands_t[i].vdd = supply.vdd;
+		en_ands_t[i].vss = supply.vss;
+		en_ands_f[i].vdd = supply.vdd;
+		en_ands_f[i].vss = supply.vss;
 	)
 
 }