diff --git a/Fixing_Verilog.ipynb b/Fixing_Verilog.ipynb
new file mode 100644
index 0000000..54ebc06
--- /dev/null
+++ b/Fixing_Verilog.ipynb
@@ -0,0 +1,140 @@
+{
+ "cells": [
+  {
+   "cell_type": "code",
+   "execution_count": 26,
+   "metadata": {},
+   "outputs": [],
+   "source": [
+    "import re\n",
+    "\n",
+    "with open('/home/p305119/libraries/xp018/actlib_dataflow_neuro/test/unit_tests/texel_small.v') as f:\n",
+    "    veri = f.read()\n",
+    "    \n",
+    "\"remove all std/acell modules\"\n",
+    "\n",
+    "    \n",
+    "mod = re.findall(r'(?<=\\n)module [^A-Z(]*[A-Z][A-Z0-9_]*\\([\\s\\S]*?endmodule', veri)\n",
+    "\n",
+    "for i in mod: \n",
+    "    \n",
+    "    veri = veri.replace(i, \"\")\n",
+    "    \n",
+    "\n",
+    "std = re.findall(r'((\\S*)(TBUF\\d*|INV|N?AND\\d|N?OR\\d|TIELO|TIEHI|MUX\\d|OAI\\d*|AOI\\d*|(?<!T)BUF\\d*|DLY\\d*|KEEP\\d*)(__X\\d))', veri)\n",
+    "\n",
+    "\"\"\"replace all stdcell names\"\"\"\n",
+    "\n",
+    "for j in list(set(std)):\n",
+    "        veri = veri.replace(j[0], j[2] + j[3][1:])\n",
+    "        \n",
+    "        \n",
+    "keep = re.findall(r'((\\S*)(KEEP\\d*)())', veri)\n",
+    "\n",
+    "\"\"\"Replace all KEEPs\"\"\"\n",
+    "\n",
+    "for j in list(set(keep)):\n",
+    "        veri = veri.replace(j[0], j[2] + j[3][1:])\n",
+    "        \n",
+    "        \n",
+    "acell = re.findall(r'(\\S*)(A_[1234CPNRSUB_]{2,12}(_X\\d)?\\b(?=[^<>]))', veri)\n",
+    "\n",
+    "for j in list(set(acell)):\n",
+    "    veri = veri.replace(j[0] + j[1], j[1].replace('__', '_'))\n",
+    "    \n",
+    "    \n",
+    "arb = re.findall(r'(\\S*)(ARBITER)', veri)\n",
+    "\n",
+    "for j in list(set(arb)):\n",
+    "    veri = veri.replace(j[0] + j[1], 'ARBITER')\n",
+    "    \n",
+    "   \n",
+    "pullu = re.findall(r'(\\S*)(PULLUP__X4)', veri)\n",
+    "\n",
+    "for j in list(set(pullu)):\n",
+    "    veri = veri.replace(j[0] + j[1], 'PULLUP_X4')\n",
+    "    \n",
+    "    \n",
+    "pulld = re.findall(r'(\\S*)(PULLDOWN__X4)', veri)\n",
+    "\n",
+    "for j in list(set(pulld)):\n",
+    "    veri = veri.replace(j[0] + j[1], 'PULLDOWN_X4')\n",
+    "    \n",
+    "veri = veri.replace('));', '), .vdd(vdd), .vss(vss));')\n",
+    "\n",
+    "vddvss = re.findall(r'(?<=\\n)(module [\\([\\s\\S]*?;)', veri)\n",
+    "\n",
+    "for j in list(set(vddvss)):\n",
+    "    veri = veri.replace(j, j[:-2] + \", vdd, vss); \\n   input vdd;\\n   input vss;\")\n",
+    "    \n",
+    "# veri = veri.replace('[', '')\n",
+    "veri = veri.replace('_0_0t', 't')\n",
+    "\n",
+    "hierac = re.findall(r'(\\\\\\S* )', veri)\n",
+    "\n",
+    "for j in list(set(hierac)):\n",
+    "    temp = j.replace(']', '')\n",
+    "    temp = temp.replace('[', '')\n",
+    "    temp = temp.replace('.', '_')\n",
+    "    temp = temp.replace('\\\\', 'I')\n",
+    "    \n",
+    "    veri = veri.replace(j, temp)\n",
+    "    \n",
+    "    \n",
+    "with open('/home/p305119/libraries/xp018/actlib_dataflow_neuro/test/unit_tests/texel_small_clean.v', 'w') as w:\n",
+    "    w.write(veri)\n",
+    "\n",
+    "\n"
+   ]
+  },
+  {
+   "cell_type": "code",
+   "execution_count": null,
+   "metadata": {},
+   "outputs": [],
+   "source": []
+  },
+  {
+   "cell_type": "code",
+   "execution_count": null,
+   "metadata": {},
+   "outputs": [],
+   "source": []
+  },
+  {
+   "cell_type": "code",
+   "execution_count": null,
+   "metadata": {},
+   "outputs": [],
+   "source": []
+  },
+  {
+   "cell_type": "code",
+   "execution_count": null,
+   "metadata": {},
+   "outputs": [],
+   "source": []
+  }
+ ],
+ "metadata": {
+  "kernelspec": {
+   "display_name": "Python 3",
+   "language": "python",
+   "name": "python3"
+  },
+  "language_info": {
+   "codemirror_mode": {
+    "name": "ipython",
+    "version": 3
+   },
+   "file_extension": ".py",
+   "mimetype": "text/x-python",
+   "name": "python",
+   "nbconvert_exporter": "python",
+   "pygments_lexer": "ipython3",
+   "version": "3.7.3"
+  }
+ },
+ "nbformat": 4,
+ "nbformat_minor": 2
+}