From 4216f8808f7f189326a30ba997902e49b8002979 Mon Sep 17 00:00:00 2001
From: alexmadison <git@mdsn.co.uk>
Date: Tue, 12 Apr 2022 16:41:30 +0200
Subject: [PATCH] added sigbuf in chips

---
 dataflow_neuro/chips.act | 39 +++++++++++++++++++++------------------
 1 file changed, 21 insertions(+), 18 deletions(-)

diff --git a/dataflow_neuro/chips.act b/dataflow_neuro/chips.act
index a935784..e068d5a 100644
--- a/dataflow_neuro/chips.act
+++ b/dataflow_neuro/chips.act
@@ -70,69 +70,72 @@ defproc chip_texel (bd<N_IN> in, out;
 	power supply;
 	bool? reset_B){
 
+    bool _reset_BX;
+    BUF_X12 reset_buf(.a = reset_B, .y = _reset_BX, .vdd = supply.vdd, .vss = supply.vss);
+
     pint index = 0; // Just useful
 
 	bd2qdi<N_IN, N_BD_DLY_CFG, N_BD_DLY_CFG2> _bd2qdi(.in = in, .dly_cfg = bd_dly_cfg, .dly_cfg2 = bd_dly_cfg2,
-        .reset_B = reset_B, .supply = supply);
-	fifo<N_IN,N_BUFFERS> fifo_in2fork(.in = _bd2qdi.out, .reset_B = reset_B, .supply = supply);
+        .reset_B = _reset_BX, .supply = supply);
+	fifo<N_IN,N_BUFFERS> fifo_in2fork(.in = _bd2qdi.out, .reset_B = _reset_BX, .supply = supply);
 
-	fork<N_IN> _fork(.in = fifo_in2fork.out, .reset_B = reset_B, .supply = supply);
+	fork<N_IN> _fork(.in = fifo_in2fork.out, .reset_B = _reset_BX, .supply = supply);
 
 	// Loopback
-	fifo<N_IN,N_BUFFERS> fifo_fork2drop(.in = _fork.out1, .reset_B = reset_B, .supply = supply);
+	fifo<N_IN,N_BUFFERS> fifo_fork2drop(.in = _fork.out1, .reset_B = _reset_BX, .supply = supply);
 	dropper_static<N_IN, false> _loopback_dropper(.in = fifo_fork2drop.out, .cond = loopback_en,
 		.supply = supply);
 
 	// Onwards
-	fifo<N_IN,N_BUFFERS> fifo_fork2dmx(.in = _fork.out2, .reset_B = reset_B, .supply = supply);
-	demux_bit_msb<N_IN-1> _demux(.in = fifo_fork2dmx.out, .reset_B = reset_B, .supply = supply);
+	fifo<N_IN,N_BUFFERS> fifo_fork2dmx(.in = _fork.out2, .reset_B = _reset_BX, .supply = supply);
+	demux_bit_msb<N_IN-1> _demux(.in = fifo_fork2dmx.out, .reset_B = _reset_BX, .supply = supply);
 
 	// Register
-	fifo<N_IN-1,N_BUFFERS> fifo_dmx2reg(.in = _demux.out2, .reset_B = reset_B, .supply = supply);
+	fifo<N_IN-1,N_BUFFERS> fifo_dmx2reg(.in = _demux.out2, .reset_B = _reset_BX, .supply = supply);
 	register_wr_array<REG_NCA, REG_NCW, REG_M> register(.in = fifo_dmx2reg.out, .data = reg_data,
-		.supply = supply, .reset_B = reset_B);
-	fifo<N_IN-2,N_BUFFERS> fifo_reg2mrg(.in = register.out, .reset_B = reset_B, .supply = supply);
+		.supply = supply, .reset_B = _reset_BX);
+	fifo<N_IN-2,N_BUFFERS> fifo_reg2mrg(.in = register.out, .reset_B = _reset_BX, .supply = supply);
 
 
 	// Spike Decoder
     pint NC_SYN;
     NC_SYN = NC_SYN_X + NC_SYN_Y;
     slice_data<N_IN-1, 0, NC_SYN> slice_pre_dec(.in = _demux.out1, .supply = supply);
-	fifo<NC_SYN,N_BUFFERS> fifo_dmx2dec(.in = slice_pre_dec.out, .reset_B = reset_B, .supply = supply);
+	fifo<NC_SYN,N_BUFFERS> fifo_dmx2dec(.in = slice_pre_dec.out, .reset_B = _reset_BX, .supply = supply);
 	decoder_2d_hybrid<NC_SYN_X, NC_SYN_Y, N_SYN_X, N_SYN_Y, N_SYN_DLY_CFG> decoder(.in = fifo_dmx2dec.out,
 		.out = synapses,
 		.hs_en = register.data[0].d[0].t, // Defaults to handshake disable
-		.supply = supply, .reset_B = reset_B);
+		.supply = supply, .reset_B = _reset_BX);
 	(i:N_SYN_DLY_CFG: decoder.dly_cfg[i] = register.data[0].d[1 + i].f;) // Defaults to max delay
 
 	// Neurons + encoder
     pint NC_NRN;
     NC_NRN = NC_NRN_X + NC_NRN_Y;
 	nrn_hs_2d_array<N_NRN_X,N_NRN_Y,N_LINE_PD_DLY> nrn_grid(.in = neurons,
-		.supply = supply, .reset_B = reset_B);
+		.supply = supply, .reset_B = _reset_BX);
 	encoder2d_simple<NC_NRN_X, NC_NRN_Y, N_NRN_X, N_NRN_Y> encoder(
 		.inx = nrn_grid.outx,
 		.iny = nrn_grid.outy,
-		.reset_B = reset_B, .supply = supply
+		.reset_B = _reset_BX, .supply = supply
 		);
 	fifo<NC_NRN, N_BUFFERS> fifo_enc2mrg(.in = encoder.out,
-		.reset_B = reset_B, .supply = supply);
+		.reset_B = _reset_BX, .supply = supply);
 
 
     // Merge
     append<NC_NRN, N_IN-NC_NRN, 0> append_enc(.in = fifo_enc2mrg.out, .supply = supply);
     append<N_IN-2, 2, 0> append_reg(.in = fifo_reg2mrg.out, .supply = supply);
     merge<N_IN> merge_enc8reg(.in1 = append_enc.out, .in2 = append_reg.out,
-        .supply = supply, .reset_B = reset_B);
+        .supply = supply, .reset_B = _reset_BX);
 
     merge<N_IN> merge_loop8mrg(.in1 = merge_enc8reg.out, .in2 = _loopback_dropper.out,
-        .reset_B = reset_B, .supply = supply);
+        .reset_B = _reset_BX, .supply = supply);
 
     // qdi2bd
     fifo<N_IN, N_BUFFERS> fifo_mrg2bd(.in = merge_loop8mrg.out,
-        .reset_B = reset_B, .supply = supply);
+        .reset_B = _reset_BX, .supply = supply);
     qdi2bd<N_IN, N_BD_DLY_CFG> _qdi2bd(.in = fifo_mrg2bd.out, .out = out, .dly_cfg = bd_dly_cfg,
-        .reset_B = reset_B, .supply = supply);
+        .reset_B = _reset_BX, .supply = supply);