From 79a96ed511b78bc83b9520a4be4ea95be23921a1 Mon Sep 17 00:00:00 2001 From: alexmadison Date: Tue, 1 Mar 2022 15:28:22 +0100 Subject: [PATCH] added DLY4 cell --- dataflow_neuro/cell_lib_std.act | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/dataflow_neuro/cell_lib_std.act b/dataflow_neuro/cell_lib_std.act index 2ef126d..370a32f 100644 --- a/dataflow_neuro/cell_lib_std.act +++ b/dataflow_neuro/cell_lib_std.act @@ -99,6 +99,18 @@ namespace tmpl { sizing { _y {-6,2}; y {-12,4} } } + /*-- delay cells --*/ + // TODO properly + + export defcell DLY4_X1(bool! y; bool? a, vdd, vss) + { + bool _y; + prs { + a => _y- + _y => y- + } + } + /*-- simple gates --*/