From 7ca41040a323efeb57c0727b5c642df79562e383 Mon Sep 17 00:00:00 2001
From: alexmadison <git@mdsn.co.uk>
Date: Tue, 21 Jun 2022 12:06:15 +0200
Subject: [PATCH] beta idea to have slow falling edge delays on ack from
 arbiter. bad idea, gonna revert lol

---
 dataflow_neuro/coders.act | 66 ++++++++++++++++++++++++++++++++-------
 1 file changed, 55 insertions(+), 11 deletions(-)

diff --git a/dataflow_neuro/coders.act b/dataflow_neuro/coders.act
index 8e90850..645d4fe 100644
--- a/dataflow_neuro/coders.act
+++ b/dataflow_neuro/coders.act
@@ -917,17 +917,59 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; bool! out_req_x[Nx], out_req_y[
 			dualrail_encoder<NxC, Nx> Xenc(.supply = supply);
 			dualrail_encoder<NyC, Ny> Yenc(.supply = supply);
 
+			// Create slow-falling in acks
+			// (so that neurons have time to complete the internal handshakes)
+			OR2_X1 dly_ors_x[Nx];
+			OR2_X1 dly_ors_y[Ny];
+			BUF_X12 sb_inx_a[Nx];
+			BUF_X12 sb_iny_a[Ny];
+			delay_chain<N_dly> dly_x[Nx];
+			delay_chain<N_dly> dly_y[Ny];
+			(i:Nx:
+				dly_x[i].in = Xarb.in[i].a;
+				dly_ors_x[i].a = Xarb.in[i].a;
+				dly_ors_x[i].b = dly_x[i].out;
+				sb_inx_a[i].a = dly_ors_x[i].y;
+				sb_inx_a[i].y = inx[i].a;
+
+				// Power
+				dly_ors_x[i].vdd = supply.vdd;
+				dly_ors_x[i].vss = supply.vss;
+				dly_x[i].supply = supply;
+				sb_inx_a[i].vdd = supply.vdd;
+				sb_inx_a[i].vss = supply.vss;
+			)
+
+			(i:Ny:
+				dly_y[i].in = Yarb.in[i].a;
+				dly_ors_y[i].a = Yarb.in[i].a;
+				dly_ors_y[i].b = dly_y[i].out;
+				sb_iny_a[i].a = dly_ors_y[i].y;
+				sb_iny_a[i].y = iny[i].a;
+
+				// Power
+				dly_ors_y[i].vdd = supply.vdd;
+				dly_ors_y[i].vss = supply.vss;
+				dly_y[i].supply = supply;
+				sb_iny_a[i].vdd = supply.vdd;
+				sb_iny_a[i].vss = supply.vss;
+			)
+
+
 			// Wire up inputs to encoders and arb
 			(i:Nx:
 				Xarb.in[i].r = inx[i].r;
-				Xarb.in[i].a = inx[i].a;
+				// Xarb.in[i].a = inx[i].a;
+				// Not sure here if the Xenc should be connected to the 
+				// inx.a before or after the delay.
+				// But I think before is fine...
 				Xenc.in[i] = inx[i].a;
 			)
 
 			// Wire up inputs to encoders and arb
 			(i:Ny:
 				Yarb.in[i].r = iny[i].r;
-				Yarb.in[i].a = iny[i].a;
+				// Yarb.in[i].a = iny[i].a;
 				Yenc.in[i] = iny[i].a;
 			)
 
@@ -951,17 +993,18 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; bool! out_req_x[Nx], out_req_y[
 			// Create delay fifos to emulate the fact that the line pull downs
 			// are at the end of the line, and thus slow.
 			// Note that if N_dly = 0, delay fifo is just a pipe.
-			delay_chain<N_dly> dly_x[Nx];
-			delay_chain<N_dly> dly_y[Ny];	
+			// delay_chain<N_dly> dly_x[Nx];
+			// delay_chain<N_dly> dly_y[Ny];	
 			
 			// Create x line req pull downs
 			nrn_line_end_pull_down pd_x[Nx];
 			sigbuf<Nx> rsb_pd_x(.in = reset_B, .supply = supply);
 			(i:0..Nx-1:
-				dly_x[i].supply = supply;
-				dly_x[i].in = to_pd_x[i].a;
-				pd_x[i].in = dly_x[i].out;
-				
+				// dly_x[i].supply = supply;
+				// dly_x[i].in = to_pd_x[i].a;
+				// pd_x[i].in = dly_x[i].out;
+				pd_x[i].in = to_pd_x[i].a;
+
 				pd_x[i].out = to_pd_x[i].r;
 				pd_x[i].reset_B = rsb_pd_x.out[i];
 				pd_x[i].supply = supply;
@@ -971,9 +1014,10 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; bool! out_req_x[Nx], out_req_y[
 			nrn_line_end_pull_down pd_y[Ny];
 			sigbuf<Ny> rsb_pd_y(.in = reset_B, .supply = supply);
 			(j:0..Ny-1:
-				dly_y[j].supply = supply;
-				dly_y[j].in = to_pd_y[j].a;
-				pd_y[j].in = dly_y[j].out;
+				// dly_y[j].supply = supply;
+				// dly_y[j].in = to_pd_y[j].a;
+				// pd_y[j].in = dly_y[j].out;
+				pd_y[j].in = to_pd_y[j].a;
 			
 				pd_y[j].out = to_pd_y[j].r;
 				pd_y[j].reset_B = rsb_pd_y.out[j];