diff --git a/test/unit_tests/arbtree_5/run/prsim.out b/test/unit_tests/arbtree_5/run/prsim.out
new file mode 100644
index 0000000..9354b65
--- /dev/null
+++ b/test/unit_tests/arbtree_5/run/prsim.out
@@ -0,0 +1,85 @@
+t.in[0] t.out t.in[2] t.in[3] t.at.tmp[6] t.at.tmp[5] t.at.tmp[8] t.in[4] t.at.arbs[1]._y t.in[1] t.at.arbs[2]._y t.at.arbs[3]._y t.at.arbs[0]._y 
+0
+1
+	         0 t.in[0] : 0
+	         0 t.in[4] : 0
+	         0 t.in[3] : 0
+	         0 t.in[2] : 0
+	         0 t.in[1] : 0
+	         1 t.at.arbs[1]._y : 1  [by t.in[2]:=0]
+	      7092 t.at.arbs[0]._y : 1  [by t.in[1]:=0]
+	      7094 t.at.tmp[5] : 0  [by t.at.arbs[0]._y:=1]
+	     10468 t.at.tmp[6] : 0  [by t.at.arbs[1]._y:=1]
+	     15221 t.at.arbs[2]._y : 1  [by t.at.tmp[6]:=0]
+	     16358 t.at.tmp[8] : 0  [by t.at.arbs[2]._y:=1]
+	     16472 t.at.arbs[3]._y : 1  [by t.at.tmp[8]:=0]
+	     81838 t.out : 0  [by t.at.arbs[3]._y:=1]
+[] setting all low
+[] setting bit 0 high
+	     81838 t.in[0] : 1
+	     83564 t.at.arbs[0]._y : 0  [by t.in[0]:=1]
+	     83603 t.at.tmp[5] : 1  [by t.at.arbs[0]._y:=0]
+	     83618 t.at.arbs[2]._y : 0  [by t.at.tmp[5]:=1]
+	     84109 t.at.tmp[8] : 1  [by t.at.arbs[2]._y:=0]
+	     84122 t.at.arbs[3]._y : 0  [by t.at.tmp[8]:=1]
+	     84162 t.out : 1  [by t.at.arbs[3]._y:=0]
+[] setting all low
+	     84162 t.in[0] : 0
+	     84577 t.at.arbs[0]._y : 1  [by t.in[0]:=0]
+	     84597 t.at.tmp[5] : 0  [by t.at.arbs[0]._y:=1]
+	     90658 t.at.arbs[2]._y : 1  [by t.at.tmp[5]:=0]
+	     90705 t.at.tmp[8] : 0  [by t.at.arbs[2]._y:=1]
+	     90721 t.at.arbs[3]._y : 1  [by t.at.tmp[8]:=0]
+	    134819 t.out : 0  [by t.at.arbs[3]._y:=1]
+[] setting bit 1 high
+	    134819 t.in[1] : 1
+	    148543 t.at.arbs[0]._y : 0  [by t.in[1]:=1]
+	    148547 t.at.tmp[5] : 1  [by t.at.arbs[0]._y:=0]
+	    157676 t.at.arbs[2]._y : 0  [by t.at.tmp[5]:=1]
+	    157691 t.at.tmp[8] : 1  [by t.at.arbs[2]._y:=0]
+	    200939 t.at.arbs[3]._y : 0  [by t.at.tmp[8]:=1]
+	    237870 t.out : 1  [by t.at.arbs[3]._y:=0]
+[] setting all low
+	    237870 t.in[1] : 0
+	    237925 t.at.arbs[0]._y : 1  [by t.in[1]:=0]
+	    289578 t.at.tmp[5] : 0  [by t.at.arbs[0]._y:=1]
+	    319358 t.at.arbs[2]._y : 1  [by t.at.tmp[5]:=0]
+	    333207 t.at.tmp[8] : 0  [by t.at.arbs[2]._y:=1]
+	    358019 t.at.arbs[3]._y : 1  [by t.at.tmp[8]:=0]
+	    372362 t.out : 0  [by t.at.arbs[3]._y:=1]
+[] setting bit 2 high
+	    372362 t.in[2] : 1
+	    372784 t.at.arbs[1]._y : 0  [by t.in[2]:=1]
+	    421498 t.at.tmp[6] : 1  [by t.at.arbs[1]._y:=0]
+	    421499 t.at.arbs[2]._y : 0  [by t.at.tmp[6]:=1]
+	    421500 t.at.tmp[8] : 1  [by t.at.arbs[2]._y:=0]
+	    441705 t.at.arbs[3]._y : 0  [by t.at.tmp[8]:=1]
+	    441987 t.out : 1  [by t.at.arbs[3]._y:=0]
+[] setting all low
+	    441987 t.in[2] : 0
+	    442755 t.at.arbs[1]._y : 1  [by t.in[2]:=0]
+	    442758 t.at.tmp[6] : 0  [by t.at.arbs[1]._y:=1]
+	    465199 t.at.arbs[2]._y : 1  [by t.at.tmp[6]:=0]
+	    465750 t.at.tmp[8] : 0  [by t.at.arbs[2]._y:=1]
+	    466821 t.at.arbs[3]._y : 1  [by t.at.tmp[8]:=0]
+	    467775 t.out : 0  [by t.at.arbs[3]._y:=1]
+[] setting bit 3 high
+	    467775 t.in[3] : 1
+	    468856 t.at.arbs[1]._y : 0  [by t.in[3]:=1]
+	    523326 t.at.tmp[6] : 1  [by t.at.arbs[1]._y:=0]
+	    524308 t.at.arbs[2]._y : 0  [by t.at.tmp[6]:=1]
+	    524326 t.at.tmp[8] : 1  [by t.at.arbs[2]._y:=0]
+	    528339 t.at.arbs[3]._y : 0  [by t.at.tmp[8]:=1]
+	    532342 t.out : 1  [by t.at.arbs[3]._y:=0]
+[] setting all low
+	    532342 t.in[3] : 0
+	    577243 t.at.arbs[1]._y : 1  [by t.in[3]:=0]
+	    598827 t.at.tmp[6] : 0  [by t.at.arbs[1]._y:=1]
+	    603587 t.at.arbs[2]._y : 1  [by t.at.tmp[6]:=0]
+	    604089 t.at.tmp[8] : 0  [by t.at.arbs[2]._y:=1]
+	    604292 t.at.arbs[3]._y : 1  [by t.at.tmp[8]:=0]
+	    606146 t.out : 0  [by t.at.arbs[3]._y:=1]
+[] setting bit 4 high
+	    606146 t.in[4] : 1
+	    606285 t.at.arbs[3]._y : 0  [by t.in[4]:=1]
+	    642631 t.out : 1  [by t.at.arbs[3]._y:=0]
diff --git a/test/unit_tests/arbtree_5/run/prsim.pdf b/test/unit_tests/arbtree_5/run/prsim.pdf
new file mode 100644
index 0000000..d4ea311
Binary files /dev/null and b/test/unit_tests/arbtree_5/run/prsim.pdf differ
diff --git a/test/unit_tests/arbtree_5/run/test.prs b/test/unit_tests/arbtree_5/run/test.prs
new file mode 100644
index 0000000..c107ef2
--- /dev/null
+++ b/test/unit_tests/arbtree_5/run/test.prs
@@ -0,0 +1,55 @@
+= "GND" "GND"
+= "Vdd" "Vdd"
+= "Reset" "Reset"
+"t.at.arbs[0].a"|"t.at.arbs[0].b"->"t.at.arbs[0]._y"-
+~("t.at.arbs[0].a"|"t.at.arbs[0].b")->"t.at.arbs[0]._y"+
+"t.at.arbs[0]._y"->"t.at.arbs[0].y"-
+~("t.at.arbs[0]._y")->"t.at.arbs[0].y"+
+"t.at.arbs[1].a"|"t.at.arbs[1].b"->"t.at.arbs[1]._y"-
+~("t.at.arbs[1].a"|"t.at.arbs[1].b")->"t.at.arbs[1]._y"+
+"t.at.arbs[1]._y"->"t.at.arbs[1].y"-
+~("t.at.arbs[1]._y")->"t.at.arbs[1].y"+
+"t.at.arbs[2].a"|"t.at.arbs[2].b"->"t.at.arbs[2]._y"-
+~("t.at.arbs[2].a"|"t.at.arbs[2].b")->"t.at.arbs[2]._y"+
+"t.at.arbs[2]._y"->"t.at.arbs[2].y"-
+~("t.at.arbs[2]._y")->"t.at.arbs[2].y"+
+"t.at.arbs[3].a"|"t.at.arbs[3].b"->"t.at.arbs[3]._y"-
+~("t.at.arbs[3].a"|"t.at.arbs[3].b")->"t.at.arbs[3]._y"+
+"t.at.arbs[3]._y"->"t.at.arbs[3].y"-
+~("t.at.arbs[3]._y")->"t.at.arbs[3].y"+
+= "t.at.tmp[5]" "t.at.arbs[2].a"
+= "t.at.tmp[5]" "t.at.arbs[0].y"
+= "t.at.tmp[6]" "t.at.arbs[2].b"
+= "t.at.tmp[6]" "t.at.arbs[1].y"
+= "t.at.tmp[8]" "t.at.arbs[3].a"
+= "t.at.tmp[8]" "t.at.arbs[2].y"
+= "t.at.supply.vdd" "t.at.arbs[3].vdd"
+= "t.at.supply.vdd" "t.at.arbs[2].vdd"
+= "t.at.supply.vdd" "t.at.arbs[1].vdd"
+= "t.at.supply.vdd" "t.at.arbs[0].vdd"
+= "t.at.supply.vss" "t.at.arbs[3].vss"
+= "t.at.supply.vss" "t.at.arbs[2].vss"
+= "t.at.supply.vss" "t.at.arbs[1].vss"
+= "t.at.supply.vss" "t.at.arbs[0].vss"
+= "t.at.in[0]" "t.at.arbs[0].a"
+= "t.at.in[0]" "t.at.tmp[0]"
+= "t.at.in[1]" "t.at.arbs[0].b"
+= "t.at.in[1]" "t.at.tmp[1]"
+= "t.at.in[2]" "t.at.arbs[1].a"
+= "t.at.in[2]" "t.at.tmp[2]"
+= "t.at.in[3]" "t.at.arbs[1].b"
+= "t.at.in[3]" "t.at.tmp[3]"
+= "t.at.in[4]" "t.at.arbs[3].b"
+= "t.at.in[4]" "t.at.tmp[9]"
+= "t.at.in[4]" "t.at.tmp[7]"
+= "t.at.in[4]" "t.at.tmp[4]"
+= "t.at.out" "t.at.arbs[3].y"
+= "t.at.out" "t.at.tmp[10]"
+= "Vdd" "t.at.supply.vdd"
+= "GND" "t.at.supply.vss"
+= "t.out" "t.at.out"
+= "t.in[0]" "t.at.in[0]"
+= "t.in[1]" "t.at.in[1]"
+= "t.in[2]" "t.at.in[2]"
+= "t.in[3]" "t.at.in[3]"
+= "t.in[4]" "t.at.in[4]"
diff --git a/test/unit_tests/arbtree_5/test.act b/test/unit_tests/arbtree_5/test.act
new file mode 100644
index 0000000..bb6cbb8
--- /dev/null
+++ b/test/unit_tests/arbtree_5/test.act
@@ -0,0 +1,41 @@
+/*************************************************************************
+ *
+ *  This file is part of ACT dataflow neuro library.
+ * It's the testing facility for cell_lib_std.act
+ *
+ *  Copyright (c) 2022 University of Groningen - Ole Richter  
+ *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
+ *  Copyright (c) 2022 University of Groningen - Michele Mastella
+ *  Copyright (c) 2022 University of Groningen - Madison Cotteret
+ *
+ *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
+ *
+ *  You may redistribute and modify this documentation and make products
+ *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
+ *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
+ *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
+ *  for applicable conditions.
+ *
+ *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
+ *
+ *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
+ *  these sources, You must maintain the Source Location visible in its
+ *  documentation.
+ *
+ **************************************************************************
+ */
+
+import "../../dataflow_neuro/treegates.act";
+import globals;
+
+open tmpl::dataflow_neuro;
+
+defproc arbtree_5 (bool? in[5]; bool! out){
+    arbtree<5> at(.in=in, .out=out);
+    at.supply.vss = GND;
+    at.supply.vdd = Vdd;
+
+}
+
+arbtree_5 t;
\ No newline at end of file
diff --git a/test/unit_tests/arbtree_5/test.prsim b/test/unit_tests/arbtree_5/test.prsim
new file mode 100644
index 0000000..b742486
--- /dev/null
+++ b/test/unit_tests/arbtree_5/test.prsim
@@ -0,0 +1,88 @@
+watchall
+
+system "echo '0'"
+
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+
+system "echo '1'"
+
+cycle
+mode run
+
+# assert t.out 0
+
+
+system "echo '[] setting all low'"
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+cycle
+
+system "echo '[] setting bit 0 high'"
+set t.in[0] 1
+cycle
+
+
+system "echo '[] setting all low'"
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+cycle
+
+
+system "echo '[] setting bit 1 high'"
+set t.in[0] 0
+set t.in[1] 1
+cycle
+
+
+system "echo '[] setting all low'"
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+cycle
+
+
+system "echo '[] setting bit 2 high'"
+set t.in[1] 0
+set t.in[2] 1
+cycle
+
+
+system "echo '[] setting all low'"
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+cycle
+
+
+system "echo '[] setting bit 3 high'"
+set t.in[2] 0
+set t.in[3] 1
+cycle
+
+
+system "echo '[] setting all low'"
+set t.in[0] 0
+set t.in[1] 0
+set t.in[2] 0
+set t.in[3] 0
+set t.in[4] 0
+cycle
+
+system "echo '[] setting bit 4 high'"
+set t.in[3] 0
+set t.in[4] 1
+cycle
\ No newline at end of file