diff --git a/dataflow_neuro/coders.act b/dataflow_neuro/coders.act index df9f658..ae00d55 100644 --- a/dataflow_neuro/coders.act +++ b/dataflow_neuro/coders.act @@ -350,10 +350,10 @@ namespace tmpl { export template defproc encoder2D(a1of1 x[Nx]; a1of1 y[Ny]; avMx1of2<(NxC + NyC)> out; power supply; bool reset_B) { // Reset buffers - pint H = 10; //Reset strength? to be investigated + pint H = 2*(NxC + NyC); //Reset strength? to be investigated bool _reset_BX,_reset_BXX[H]; - BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss); - sigbuf<2*(NxC + NyC)+3> reset_bufarray(.in=_reset_BX, .out=_reset_BXX,.supply=supply); + BUF_X4 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss); + sigbuf<2*(NxC + NyC)> reset_bufarray(.in=_reset_BX, .out=_reset_BXX,.supply=supply); // Arbiters a1of1 _arb_out_x, _arb_out_y; diff --git a/test/unit_tests/buf_15_friendly2.v b/test/unit_tests/buf_15_friendly2.v new file mode 100644 index 0000000..e3ac927 --- /dev/null +++ b/test/unit_tests/buf_15_friendly2.v @@ -0,0 +1,571 @@ +// +// Verilog module for: BUF_X6<> +// + + +// +// Verilog module for: sigbuf<15> +// +module _0_0tmpl_0_0dataflow__neuro_0_0sigbuf_315_4(in, \out[0] , vdd, vss); + input vdd; + input vss; + input in; + output \out[0] ; + +// -- signals --- + wire in; + reg \out[0] ; + +// --- instances +BUF_X6 \buf6 (.y(\out[0] ), .a(in), .vdd(vdd), .vss(vss)); +endmodule + +// +// Verilog module for: A_3C_RB_X4<> +// + + +// +// Verilog module for: BUF_X4<> +// + + +// +// Verilog module for: INV_X1<> +// + + +// +// Verilog module for: A_2C_B_X1<> +// + + +// +// Verilog module for: A_3C_B_X1<> +// + + +// +// Verilog module for: ctree<15> +// +module _0_0tmpl_0_0dataflow__neuro_0_0ctree_315_4(\in[0] , \in[1] , \in[2] , \in[3] , \in[4] , \in[5] , \in[6] , \in[7] , \in[8] , \in[9] , \in[10] , \in[11] , \in[12] , \in[13] , \in[14] , out, vdd, vss); + input vdd; + input vss; + input \in[0] ; + input \in[1] ; + input \in[2] ; + input \in[3] ; + input \in[4] ; + input \in[5] ; + input \in[6] ; + input \in[7] ; + input \in[8] ; + input \in[9] ; + input \in[10] ; + input \in[11] ; + input \in[12] ; + input \in[13] ; + input \in[14] ; + output out; + +// -- signals --- + wire \in[4] ; + wire \in[11] ; + wire \in[12] ; + reg \tmp[21] ; + wire \in[3] ; + reg out; + reg \tmp[23] ; + wire \in[6] ; + wire \in[0] ; + reg \tmp[18] ; + wire \in[10] ; + reg \tmp[15] ; + reg \tmp[16] ; + wire \in[13] ; + wire \in[1] ; + wire \in[9] ; + wire \in[2] ; + wire \in[5] ; + reg \tmp[24] ; + wire \in[14] ; + reg \tmp[19] ; + wire \in[7] ; + reg \tmp[22] ; + reg \tmp[20] ; + wire \in[8] ; + reg \tmp[17] ; + +// --- instances +A_2C_B_X1 \C2Els[0] (.y(\tmp[15] ), .c1(\in[0] ), .c2(\in[1] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[1] (.y(\tmp[16] ), .c1(\in[2] ), .c2(\in[3] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[2] (.y(\tmp[17] ), .c1(\in[4] ), .c2(\in[5] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[3] (.y(\tmp[18] ), .c1(\in[6] ), .c2(\in[7] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[4] (.y(\tmp[19] ), .c1(\in[8] ), .c2(\in[9] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[5] (.y(\tmp[20] ), .c1(\in[10] ), .c2(\in[11] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[6] (.y(\tmp[22] ), .c1(\tmp[15] ), .c2(\tmp[16] ), .vdd(vdd), .vss(vss)); +A_2C_B_X1 \C2Els[7] (.y(\tmp[23] ), .c1(\tmp[17] ), .c2(\tmp[18] ), .vdd(vdd), .vss(vss)); +A_3C_B_X1 \C3Els[0] (.y(\tmp[21] ), .c1(\in[12] ), .c2(\in[13] ), .c3(\in[14] ), .vdd(vdd), .vss(vss)); +A_3C_B_X1 \C3Els[1] (.y(\tmp[24] ), .c1(\tmp[19] ), .c2(\tmp[20] ), .c3(\tmp[21] ), .vdd(vdd), .vss(vss)); +A_3C_B_X1 \C3Els[2] (.y(out), .c1(\tmp[22] ), .c2(\tmp[23] ), .c3(\tmp[24] ), .vdd(vdd), .vss(vss)); +endmodule + +// +// Verilog module for: OR2_X1<> +// + + +// +// Verilog module for: vtree<15> +// +module _0_0tmpl_0_0dataflow__neuro_0_0vtree_315_4(\in.d[0].d[0] , \in.d[0].d[1] , \in.d[1].d[0] , \in.d[1].d[1] , \in.d[2].d[0] , \in.d[2].d[1] , \in.d[3].d[0] , \in.d[3].d[1] , \in.d[4].d[0] , \in.d[4].d[1] , \in.d[5].d[0] , \in.d[5].d[1] , \in.d[6].d[0] , \in.d[6].d[1] , \in.d[7].d[0] , \in.d[7].d[1] , \in.d[8].d[0] , \in.d[8].d[1] , \in.d[9].d[0] , \in.d[9].d[1] , \in.d[10].d[0] , \in.d[10].d[1] , \in.d[11].d[0] , \in.d[11].d[1] , \in.d[12].d[0] , \in.d[12].d[1] , \in.d[13].d[0] , \in.d[13].d[1] , \in.d[14].d[0] , \in.d[14].d[1] , out, vdd, vss); + input vdd; + input vss; + input \in.d[0].d[0] ; + input \in.d[0].d[1] ; + input \in.d[1].d[0] ; + input \in.d[1].d[1] ; + input \in.d[2].d[0] ; + input \in.d[2].d[1] ; + input \in.d[3].d[0] ; + input \in.d[3].d[1] ; + input \in.d[4].d[0] ; + input \in.d[4].d[1] ; + input \in.d[5].d[0] ; + input \in.d[5].d[1] ; + input \in.d[6].d[0] ; + input \in.d[6].d[1] ; + input \in.d[7].d[0] ; + input \in.d[7].d[1] ; + input \in.d[8].d[0] ; + input \in.d[8].d[1] ; + input \in.d[9].d[0] ; + input \in.d[9].d[1] ; + input \in.d[10].d[0] ; + input \in.d[10].d[1] ; + input \in.d[11].d[0] ; + input \in.d[11].d[1] ; + input \in.d[12].d[0] ; + input \in.d[12].d[1] ; + input \in.d[13].d[0] ; + input \in.d[13].d[1] ; + input \in.d[14].d[0] ; + input \in.d[14].d[1] ; + output out; + +// -- signals --- + reg \ct.in[14] ; + reg \ct.in[13] ; + wire \in.d[7].d[0] ; + wire \in.d[1].d[0] ; + wire \in.d[0].d[0] ; + reg \ct.in[4] ; + reg out; + wire \in.d[10].d[0] ; + wire \in.d[4].d[1] ; + reg \ct.in[3] ; + wire \in.d[9].d[1] ; + wire \in.d[1].d[1] ; + wire \in.d[2].d[0] ; + wire \in.d[10].d[1] ; + reg \ct.in[8] ; + wire \in.d[12].d[0] ; + wire \in.d[5].d[0] ; + wire \in.d[4].d[0] ; + reg \ct.in[10] ; + reg \ct.in[0] ; + wire \in.d[11].d[0] ; + wire \in.d[7].d[1] ; + wire \in.d[3].d[1] ; + reg \ct.in[11] ; + reg \ct.in[2] ; + reg \ct.in[9] ; + wire \in.d[13].d[0] ; + wire \in.d[14].d[1] ; + wire \in.d[11].d[1] ; + wire \in.d[13].d[1] ; + wire \in.d[0].d[1] ; + reg \ct.in[1] ; + wire \in.d[14].d[0] ; + wire \in.d[12].d[1] ; + wire \in.d[9].d[0] ; + wire \in.d[2].d[1] ; + reg \ct.in[5] ; + wire \in.d[5].d[1] ; + reg \ct.in[12] ; + reg \ct.in[6] ; + wire \in.d[3].d[0] ; + wire \in.d[8].d[0] ; + wire \in.d[8].d[1] ; + reg \ct.in[7] ; + wire \in.d[6].d[0] ; + wire \in.d[6].d[1] ; + +// --- instances +_0_0tmpl_0_0dataflow__neuro_0_0ctree_315_4 \ct (.\in[0] (\ct.in[0] ), .\in[1] (\ct.in[1] ), .\in[2] (\ct.in[2] ), .\in[3] (\ct.in[3] ), .\in[4] (\ct.in[4] ), .\in[5] (\ct.in[5] ), .\in[6] (\ct.in[6] ), .\in[7] (\ct.in[7] ), .\in[8] (\ct.in[8] ), .\in[9] (\ct.in[9] ), .\in[10] (\ct.in[10] ), .\in[11] (\ct.in[11] ), .\in[12] (\ct.in[12] ), .\in[13] (\ct.in[13] ), .\in[14] (\ct.in[14] ), .out(out), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[0] (.y(\ct.in[0] ), .a(\in.d[0].d[1] ), .b(\in.d[0].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[1] (.y(\ct.in[1] ), .a(\in.d[1].d[1] ), .b(\in.d[1].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[2] (.y(\ct.in[2] ), .a(\in.d[2].d[1] ), .b(\in.d[2].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[3] (.y(\ct.in[3] ), .a(\in.d[3].d[1] ), .b(\in.d[3].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[4] (.y(\ct.in[4] ), .a(\in.d[4].d[1] ), .b(\in.d[4].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[5] (.y(\ct.in[5] ), .a(\in.d[5].d[1] ), .b(\in.d[5].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[6] (.y(\ct.in[6] ), .a(\in.d[6].d[1] ), .b(\in.d[6].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[7] (.y(\ct.in[7] ), .a(\in.d[7].d[1] ), .b(\in.d[7].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[8] (.y(\ct.in[8] ), .a(\in.d[8].d[1] ), .b(\in.d[8].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[9] (.y(\ct.in[9] ), .a(\in.d[9].d[1] ), .b(\in.d[9].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[10] (.y(\ct.in[10] ), .a(\in.d[10].d[1] ), .b(\in.d[10].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[11] (.y(\ct.in[11] ), .a(\in.d[11].d[1] ), .b(\in.d[11].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[12] (.y(\ct.in[12] ), .a(\in.d[12].d[1] ), .b(\in.d[12].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[13] (.y(\ct.in[13] ), .a(\in.d[13].d[1] ), .b(\in.d[13].d[0] ), .vdd(vdd), .vss(vss)); +OR2_X1 \OR2_tf[14] (.y(\ct.in[14] ), .a(\in.d[14].d[1] ), .b(\in.d[14].d[0] ), .vdd(vdd), .vss(vss)); +endmodule + +// +// Verilog module for: A_1C1P_X1<> +// + + +// +// Verilog module for: BUF_X1<> +// + + +// +// Verilog module for: A_2C1N_RB_X4<> +// + + +// +// Verilog module for: buffer<15> +// +module _0_0tmpl_0_0dataflow__neuro_0_0buffer_315_4(\in.d.d[0].d[0] , \in.d.d[0].d[1] , \in.d.d[1].d[0] , \in.d.d[1].d[1] , \in.d.d[2].d[0] , \in.d.d[2].d[1] , \in.d.d[3].d[0] , \in.d.d[3].d[1] , \in.d.d[4].d[0] , \in.d.d[4].d[1] , \in.d.d[5].d[0] , \in.d.d[5].d[1] , \in.d.d[6].d[0] , \in.d.d[6].d[1] , \in.d.d[7].d[0] , \in.d.d[7].d[1] , \in.d.d[8].d[0] , \in.d.d[8].d[1] , \in.d.d[9].d[0] , \in.d.d[9].d[1] , \in.d.d[10].d[0] , \in.d.d[10].d[1] , \in.d.d[11].d[0] , \in.d.d[11].d[1] , \in.d.d[12].d[0] , \in.d.d[12].d[1] , \in.d.d[13].d[0] , \in.d.d[13].d[1] , \in.d.d[14].d[0] , \in.d.d[14].d[1] , \in.a , \in.v , \out.d.d[0].d[0] , \out.d.d[0].d[1] , \out.d.d[1].d[0] , \out.d.d[1].d[1] , \out.d.d[2].d[0] , \out.d.d[2].d[1] , \out.d.d[3].d[0] , \out.d.d[3].d[1] , \out.d.d[4].d[0] , \out.d.d[4].d[1] , \out.d.d[5].d[0] , \out.d.d[5].d[1] , \out.d.d[6].d[0] , \out.d.d[6].d[1] , \out.d.d[7].d[0] , \out.d.d[7].d[1] , \out.d.d[8].d[0] , \out.d.d[8].d[1] , \out.d.d[9].d[0] , \out.d.d[9].d[1] , \out.d.d[10].d[0] , \out.d.d[10].d[1] , \out.d.d[11].d[0] , \out.d.d[11].d[1] , \out.d.d[12].d[0] , \out.d.d[12].d[1] , \out.d.d[13].d[0] , \out.d.d[13].d[1] , \out.d.d[14].d[0] , \out.d.d[14].d[1] , \out.a , \out.v , reset_B, vdd, vss); + input vdd; + input vss; + input \in.d.d[0].d[0] ; + input \in.d.d[0].d[1] ; + input \in.d.d[1].d[0] ; + input \in.d.d[1].d[1] ; + input \in.d.d[2].d[0] ; + input \in.d.d[2].d[1] ; + input \in.d.d[3].d[0] ; + input \in.d.d[3].d[1] ; + input \in.d.d[4].d[0] ; + input \in.d.d[4].d[1] ; + input \in.d.d[5].d[0] ; + input \in.d.d[5].d[1] ; + input \in.d.d[6].d[0] ; + input \in.d.d[6].d[1] ; + input \in.d.d[7].d[0] ; + input \in.d.d[7].d[1] ; + input \in.d.d[8].d[0] ; + input \in.d.d[8].d[1] ; + input \in.d.d[9].d[0] ; + input \in.d.d[9].d[1] ; + input \in.d.d[10].d[0] ; + input \in.d.d[10].d[1] ; + input \in.d.d[11].d[0] ; + input \in.d.d[11].d[1] ; + input \in.d.d[12].d[0] ; + input \in.d.d[12].d[1] ; + input \in.d.d[13].d[0] ; + input \in.d.d[13].d[1] ; + input \in.d.d[14].d[0] ; + input \in.d.d[14].d[1] ; + output \in.a ; + output \in.v ; + output \out.d.d[0].d[0] ; + output \out.d.d[0].d[1] ; + output \out.d.d[1].d[0] ; + output \out.d.d[1].d[1] ; + output \out.d.d[2].d[0] ; + output \out.d.d[2].d[1] ; + output \out.d.d[3].d[0] ; + output \out.d.d[3].d[1] ; + output \out.d.d[4].d[0] ; + output \out.d.d[4].d[1] ; + output \out.d.d[5].d[0] ; + output \out.d.d[5].d[1] ; + output \out.d.d[6].d[0] ; + output \out.d.d[6].d[1] ; + output \out.d.d[7].d[0] ; + output \out.d.d[7].d[1] ; + output \out.d.d[8].d[0] ; + output \out.d.d[8].d[1] ; + output \out.d.d[9].d[0] ; + output \out.d.d[9].d[1] ; + output \out.d.d[10].d[0] ; + output \out.d.d[10].d[1] ; + output \out.d.d[11].d[0] ; + output \out.d.d[11].d[1] ; + output \out.d.d[12].d[0] ; + output \out.d.d[12].d[1] ; + output \out.d.d[13].d[0] ; + output \out.d.d[13].d[1] ; + output \out.d.d[14].d[0] ; + output \out.d.d[14].d[1] ; + input \out.a ; + input \out.v ; + input reset_B; + +// -- signals --- + reg \out.d.d[8].d[0] ; + reg \out.d.d[6].d[1] ; + reg \out.d.d[5].d[1] ; + reg \_en_X_f[0] ; + wire \in.d.d[14].d[0] ; + wire \in.d.d[12].d[1] ; + reg \out.d.d[12].d[1] ; + wire \in.d.d[5].d[0] ; + reg \out.d.d[11].d[0] ; + reg \out.d.d[7].d[0] ; + reg _reset_BX; + reg \_reset_BXX[0] ; + wire \in.d.d[14].d[1] ; + wire \in.d.d[10].d[1] ; + wire \in.d.d[2].d[0] ; + wire \out.a ; + reg \out.d.d[0].d[0] ; + wire \in.d.d[0].d[0] ; + reg \out.d.d[10].d[1] ; + wire \in.d.d[11].d[0] ; + wire \in.d.d[7].d[1] ; + wire \in.d.d[3].d[1] ; + reg _in_v; + reg \in.v ; + reg _out_a_B; + wire \in.d.d[9].d[1] ; + wire \in.d.d[9].d[0] ; + wire \in.d.d[4].d[1] ; + reg \out.d.d[10].d[0] ; + wire \in.d.d[1].d[1] ; + wire \in.d.d[12].d[0] ; + wire \in.d.d[1].d[0] ; + reg \_out_a_BX_f[0] ; + reg \out.d.d[3].d[1] ; + reg \out.d.d[0].d[1] ; + reg \out.d.d[2].d[1] ; + reg \out.d.d[4].d[1] ; + wire reset_B; + wire \in.d.d[8].d[0] ; + reg \out.d.d[12].d[0] ; + wire \in.d.d[5].d[1] ; + reg \out.d.d[9].d[0] ; + reg \out.d.d[7].d[1] ; + reg \_out_a_BX_t[0] ; + wire \in.d.d[10].d[0] ; + reg \out.d.d[1].d[0] ; + wire \in.d.d[6].d[0] ; + wire \in.d.d[7].d[0] ; + wire \in.d.d[13].d[1] ; + wire \out.v ; + reg \out.d.d[2].d[0] ; + wire \in.d.d[13].d[0] ; + wire \in.d.d[11].d[1] ; + wire \in.d.d[6].d[1] ; + reg \out.d.d[3].d[0] ; + reg \out.d.d[11].d[1] ; + reg \out.d.d[9].d[1] ; + wire \in.d.d[3].d[0] ; + reg _en; + reg \out.d.d[13].d[0] ; + reg \out.d.d[5].d[0] ; + reg \in.a ; + reg \out.d.d[14].d[0] ; + reg \out.d.d[4].d[0] ; + wire \in.d.d[8].d[1] ; + reg \out.d.d[13].d[1] ; + reg \out.d.d[8].d[1] ; + reg \out.d.d[14].d[1] ; + wire \in.d.d[2].d[1] ; + reg \out.d.d[6].d[0] ; + wire \in.d.d[4].d[0] ; + reg \out.d.d[1].d[1] ; + reg \_en_X_t[0] ; + wire \in.d.d[0].d[1] ; + +// --- instances +_0_0tmpl_0_0dataflow__neuro_0_0sigbuf_315_4 \out_a_B_buf_t (.in(_out_a_B), .\out[0] (\_out_a_BX_f[0] ), .vdd(vdd), .vss(vss)); +A_3C_RB_X4 \inack_ctl (.y(\in.a ), .c1(_en), .c2(\in.v ), .c3(\out.v ), .pr_B(_reset_BX), .sr_B(_reset_BX), .vdd(vdd), .vss(vss)); +_0_0tmpl_0_0dataflow__neuro_0_0sigbuf_315_4 \reset_bufarray (.in(_reset_BX), .\out[0] (\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +BUF_X4 \in_v_buf (.y(\in.v ), .a(_in_v), .vdd(vdd), .vss(vss)); +INV_X1 \out_a_inv (.y(_out_a_B), .a(\out.a ), .vdd(vdd), .vss(vss)); +_0_0tmpl_0_0dataflow__neuro_0_0vtree_315_4 \vc (.\in.d[0].d[0] (\in.d.d[0].d[0] ), .\in.d[0].d[1] (\in.d.d[0].d[1] ), .\in.d[1].d[0] (\in.d.d[1].d[0] ), .\in.d[1].d[1] (\in.d.d[1].d[1] ), .\in.d[2].d[0] (\in.d.d[2].d[0] ), .\in.d[2].d[1] (\in.d.d[2].d[1] ), .\in.d[3].d[0] (\in.d.d[3].d[0] ), .\in.d[3].d[1] (\in.d.d[3].d[1] ), .\in.d[4].d[0] (\in.d.d[4].d[0] ), .\in.d[4].d[1] (\in.d.d[4].d[1] ), .\in.d[5].d[0] (\in.d.d[5].d[0] ), .\in.d[5].d[1] (\in.d.d[5].d[1] ), .\in.d[6].d[0] (\in.d.d[6].d[0] ), .\in.d[6].d[1] (\in.d.d[6].d[1] ), .\in.d[7].d[0] (\in.d.d[7].d[0] ), .\in.d[7].d[1] (\in.d.d[7].d[1] ), .\in.d[8].d[0] (\in.d.d[8].d[0] ), .\in.d[8].d[1] (\in.d.d[8].d[1] ), .\in.d[9].d[0] (\in.d.d[9].d[0] ), .\in.d[9].d[1] (\in.d.d[9].d[1] ), .\in.d[10].d[0] (\in.d.d[10].d[0] ), .\in.d[10].d[1] (\in.d.d[10].d[1] ), .\in.d[11].d[0] (\in.d.d[11].d[0] ), .\in.d[11].d[1] (\in.d.d[11].d[1] ), .\in.d[12].d[0] (\in.d.d[12].d[0] ), .\in.d[12].d[1] (\in.d.d[12].d[1] ), .\in.d[13].d[0] (\in.d.d[13].d[0] ), .\in.d[13].d[1] (\in.d.d[13].d[1] ), .\in.d[14].d[0] (\in.d.d[14].d[0] ), .\in.d[14].d[1] (\in.d.d[14].d[1] ), .out(_in_v), .vdd(vdd), .vss(vss)); +_0_0tmpl_0_0dataflow__neuro_0_0sigbuf_315_4 \out_a_B_buf_f (.in(_out_a_B), .\out[0] (\_out_a_BX_t[0] ), .vdd(vdd), .vss(vss)); +A_1C1P_X1 \en_ctl (.y(_en), .c1(\in.a ), .p1(\out.v ), .vdd(vdd), .vss(vss)); +BUF_X1 \reset_buf (.y(_reset_BX), .a(reset_B), .vdd(vdd), .vss(vss)); +_0_0tmpl_0_0dataflow__neuro_0_0sigbuf_315_4 \en_buf_f (.in(_en), .\out[0] (\_en_X_f[0] ), .vdd(vdd), .vss(vss)); +_0_0tmpl_0_0dataflow__neuro_0_0sigbuf_315_4 \en_buf_t (.in(_en), .\out[0] (\_en_X_t[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[0] (.y(\out.d.d[0].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[0].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[1] (.y(\out.d.d[1].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[1].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[2] (.y(\out.d.d[2].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[2].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[3] (.y(\out.d.d[3].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[3].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[4] (.y(\out.d.d[4].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[4].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[5] (.y(\out.d.d[5].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[5].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[6] (.y(\out.d.d[6].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[6].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[7] (.y(\out.d.d[7].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[7].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[8] (.y(\out.d.d[8].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[8].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[9] (.y(\out.d.d[9].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[9].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[10] (.y(\out.d.d[10].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[10].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[11] (.y(\out.d.d[11].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[11].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[12] (.y(\out.d.d[12].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[12].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[13] (.y(\out.d.d[13].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[13].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \t_buf_func[14] (.y(\out.d.d[14].d[1] ), .c1(\_en_X_t[0] ), .c2(\_out_a_BX_t[0] ), .n1(\in.d.d[14].d[1] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[0] (.y(\out.d.d[0].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[0].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[1] (.y(\out.d.d[1].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[1].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[2] (.y(\out.d.d[2].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[2].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[3] (.y(\out.d.d[3].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[3].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[4] (.y(\out.d.d[4].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[4].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[5] (.y(\out.d.d[5].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[5].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[6] (.y(\out.d.d[6].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[6].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[7] (.y(\out.d.d[7].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[7].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[8] (.y(\out.d.d[8].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[8].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[9] (.y(\out.d.d[9].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[9].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[10] (.y(\out.d.d[10].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[10].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[11] (.y(\out.d.d[11].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[11].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[12] (.y(\out.d.d[12].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[12].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[13] (.y(\out.d.d[13].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[13].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +A_2C1N_RB_X4 \f_buf_func[14] (.y(\out.d.d[14].d[0] ), .c1(\_en_X_f[0] ), .c2(\_out_a_BX_f[0] ), .n1(\in.d.d[14].d[0] ), .pr_B(\_reset_BXX[0] ), .sr_B(\_reset_BXX[0] ), .vdd(vdd), .vss(vss)); +endmodule + +// +// Verilog module for: buffer_15<> +// +module buffer__15(\in.d.d[0].d[0] , \in.d.d[0].d[1] , \in.d.d[1].d[0] , \in.d.d[1].d[1] , \in.d.d[2].d[0] , \in.d.d[2].d[1] , \in.d.d[3].d[0] , \in.d.d[3].d[1] , \in.d.d[4].d[0] , \in.d.d[4].d[1] , \in.d.d[5].d[0] , \in.d.d[5].d[1] , \in.d.d[6].d[0] , \in.d.d[6].d[1] , \in.d.d[7].d[0] , \in.d.d[7].d[1] , \in.d.d[8].d[0] , \in.d.d[8].d[1] , \in.d.d[9].d[0] , \in.d.d[9].d[1] , \in.d.d[10].d[0] , \in.d.d[10].d[1] , \in.d.d[11].d[0] , \in.d.d[11].d[1] , \in.d.d[12].d[0] , \in.d.d[12].d[1] , \in.d.d[13].d[0] , \in.d.d[13].d[1] , \in.d.d[14].d[0] , \in.d.d[14].d[1] , \in.a , \in.v , \out.d.d[0].d[0] , \out.d.d[0].d[1] , \out.d.d[1].d[0] , \out.d.d[1].d[1] , \out.d.d[2].d[0] , \out.d.d[2].d[1] , \out.d.d[3].d[0] , \out.d.d[3].d[1] , \out.d.d[4].d[0] , \out.d.d[4].d[1] , \out.d.d[5].d[0] , \out.d.d[5].d[1] , \out.d.d[6].d[0] , \out.d.d[6].d[1] , \out.d.d[7].d[0] , \out.d.d[7].d[1] , \out.d.d[8].d[0] , \out.d.d[8].d[1] , \out.d.d[9].d[0] , \out.d.d[9].d[1] , \out.d.d[10].d[0] , \out.d.d[10].d[1] , \out.d.d[11].d[0] , \out.d.d[11].d[1] , \out.d.d[12].d[0] , \out.d.d[12].d[1] , \out.d.d[13].d[0] , \out.d.d[13].d[1] , \out.d.d[14].d[0] , \out.d.d[14].d[1] , \out.a , \out.v , vdd, vss); + input vdd; + input vss; + input \in.d.d[0].d[0] ; + input \in.d.d[0].d[1] ; + input \in.d.d[1].d[0] ; + input \in.d.d[1].d[1] ; + input \in.d.d[2].d[0] ; + input \in.d.d[2].d[1] ; + input \in.d.d[3].d[0] ; + input \in.d.d[3].d[1] ; + input \in.d.d[4].d[0] ; + input \in.d.d[4].d[1] ; + input \in.d.d[5].d[0] ; + input \in.d.d[5].d[1] ; + input \in.d.d[6].d[0] ; + input \in.d.d[6].d[1] ; + input \in.d.d[7].d[0] ; + input \in.d.d[7].d[1] ; + input \in.d.d[8].d[0] ; + input \in.d.d[8].d[1] ; + input \in.d.d[9].d[0] ; + input \in.d.d[9].d[1] ; + input \in.d.d[10].d[0] ; + input \in.d.d[10].d[1] ; + input \in.d.d[11].d[0] ; + input \in.d.d[11].d[1] ; + input \in.d.d[12].d[0] ; + input \in.d.d[12].d[1] ; + input \in.d.d[13].d[0] ; + input \in.d.d[13].d[1] ; + input \in.d.d[14].d[0] ; + input \in.d.d[14].d[1] ; + output \in.a ; + output \in.v ; + output \out.d.d[0].d[0] ; + output \out.d.d[0].d[1] ; + output \out.d.d[1].d[0] ; + output \out.d.d[1].d[1] ; + output \out.d.d[2].d[0] ; + output \out.d.d[2].d[1] ; + output \out.d.d[3].d[0] ; + output \out.d.d[3].d[1] ; + output \out.d.d[4].d[0] ; + output \out.d.d[4].d[1] ; + output \out.d.d[5].d[0] ; + output \out.d.d[5].d[1] ; + output \out.d.d[6].d[0] ; + output \out.d.d[6].d[1] ; + output \out.d.d[7].d[0] ; + output \out.d.d[7].d[1] ; + output \out.d.d[8].d[0] ; + output \out.d.d[8].d[1] ; + output \out.d.d[9].d[0] ; + output \out.d.d[9].d[1] ; + output \out.d.d[10].d[0] ; + output \out.d.d[10].d[1] ; + output \out.d.d[11].d[0] ; + output \out.d.d[11].d[1] ; + output \out.d.d[12].d[0] ; + output \out.d.d[12].d[1] ; + output \out.d.d[13].d[0] ; + output \out.d.d[13].d[1] ; + output \out.d.d[14].d[0] ; + output \out.d.d[14].d[1] ; + input \out.a ; + input \out.v ; + +// -- signals --- + reg \out.d.d[2].d[1] ; + wire \in.d.d[10].d[0] ; + reg \out.d.d[1].d[0] ; + wire \in.d.d[10].d[1] ; + wire \in.d.d[4].d[0] ; + reg \out.d.d[10].d[1] ; + wire \in.d.d[13].d[0] ; + reg \out.d.d[13].d[0] ; + reg \out.d.d[9].d[1] ; + wire \in.d.d[2].d[1] ; + reg \out.d.d[2].d[0] ; + reg \out.d.d[0].d[0] ; + reg \out.d.d[14].d[0] ; + reg \out.d.d[5].d[0] ; + reg \in.a ; + reg _reset_B; + wire \out.v ; + wire \out.a ; + reg \out.d.d[4].d[0] ; + wire \in.d.d[9].d[1] ; + wire \in.d.d[3].d[0] ; + wire \in.d.d[11].d[0] ; + wire \in.d.d[2].d[0] ; + reg \out.d.d[6].d[0] ; + reg \out.d.d[13].d[1] ; + reg \out.d.d[10].d[0] ; + reg \out.d.d[7].d[1] ; + wire \in.d.d[12].d[1] ; + wire \in.d.d[6].d[1] ; + reg \out.d.d[7].d[0] ; + reg \out.d.d[3].d[0] ; + wire \in.d.d[1].d[0] ; + reg \out.d.d[14].d[1] ; + reg \out.d.d[8].d[0] ; + wire \in.d.d[13].d[1] ; + wire \in.d.d[7].d[0] ; + reg \out.d.d[12].d[0] ; + wire \in.d.d[8].d[1] ; + reg \out.d.d[4].d[1] ; + wire \in.d.d[14].d[0] ; + wire \in.d.d[5].d[1] ; + wire \in.d.d[1].d[1] ; + wire \in.d.d[9].d[0] ; + wire \in.d.d[14].d[1] ; + reg \out.d.d[11].d[0] ; + reg \out.d.d[6].d[1] ; + wire \in.d.d[12].d[0] ; + wire \in.d.d[7].d[1] ; + reg \out.d.d[0].d[1] ; + wire \in.d.d[11].d[1] ; + wire \in.d.d[8].d[0] ; + wire \in.d.d[5].d[0] ; + reg \out.d.d[1].d[1] ; + reg \in.v ; + wire \in.d.d[0].d[1] ; + wire \in.d.d[0].d[0] ; + reg \out.d.d[5].d[1] ; + reg \out.d.d[8].d[1] ; + reg \out.d.d[3].d[1] ; + wire \in.d.d[6].d[0] ; + reg \out.d.d[11].d[1] ; + wire \in.d.d[3].d[1] ; + reg \out.d.d[12].d[1] ; + wire \in.d.d[4].d[1] ; + reg \out.d.d[9].d[0] ; + +// --- instances +_0_0tmpl_0_0dataflow__neuro_0_0buffer_315_4 \buffer_test (.\in.d.d[0].d[0] (\in.d.d[0].d[0] ), .\in.d.d[0].d[1] (\in.d.d[0].d[1] ), .\in.d.d[1].d[0] (\in.d.d[1].d[0] ), .\in.d.d[1].d[1] (\in.d.d[1].d[1] ), .\in.d.d[2].d[0] (\in.d.d[2].d[0] ), .\in.d.d[2].d[1] (\in.d.d[2].d[1] ), .\in.d.d[3].d[0] (\in.d.d[3].d[0] ), .\in.d.d[3].d[1] (\in.d.d[3].d[1] ), .\in.d.d[4].d[0] (\in.d.d[4].d[0] ), .\in.d.d[4].d[1] (\in.d.d[4].d[1] ), .\in.d.d[5].d[0] (\in.d.d[5].d[0] ), .\in.d.d[5].d[1] (\in.d.d[5].d[1] ), .\in.d.d[6].d[0] (\in.d.d[6].d[0] ), .\in.d.d[6].d[1] (\in.d.d[6].d[1] ), .\in.d.d[7].d[0] (\in.d.d[7].d[0] ), .\in.d.d[7].d[1] (\in.d.d[7].d[1] ), .\in.d.d[8].d[0] (\in.d.d[8].d[0] ), .\in.d.d[8].d[1] (\in.d.d[8].d[1] ), .\in.d.d[9].d[0] (\in.d.d[9].d[0] ), .\in.d.d[9].d[1] (\in.d.d[9].d[1] ), .\in.d.d[10].d[0] (\in.d.d[10].d[0] ), .\in.d.d[10].d[1] (\in.d.d[10].d[1] ), .\in.d.d[11].d[0] (\in.d.d[11].d[0] ), .\in.d.d[11].d[1] (\in.d.d[11].d[1] ), .\in.d.d[12].d[0] (\in.d.d[12].d[0] ), .\in.d.d[12].d[1] (\in.d.d[12].d[1] ), .\in.d.d[13].d[0] (\in.d.d[13].d[0] ), .\in.d.d[13].d[1] (\in.d.d[13].d[1] ), .\in.d.d[14].d[0] (\in.d.d[14].d[0] ), .\in.d.d[14].d[1] (\in.d.d[14].d[1] ), .\in.a (\in.a ), .\in.v (\in.v ), .\out.d.d[0].d[0] (\out.d.d[0].d[0] ), .\out.d.d[0].d[1] (\out.d.d[0].d[1] ), .\out.d.d[1].d[0] (\out.d.d[1].d[0] ), .\out.d.d[1].d[1] (\out.d.d[1].d[1] ), .\out.d.d[2].d[0] (\out.d.d[2].d[0] ), .\out.d.d[2].d[1] (\out.d.d[2].d[1] ), .\out.d.d[3].d[0] (\out.d.d[3].d[0] ), .\out.d.d[3].d[1] (\out.d.d[3].d[1] ), .\out.d.d[4].d[0] (\out.d.d[4].d[0] ), .\out.d.d[4].d[1] (\out.d.d[4].d[1] ), .\out.d.d[5].d[0] (\out.d.d[5].d[0] ), .\out.d.d[5].d[1] (\out.d.d[5].d[1] ), .\out.d.d[6].d[0] (\out.d.d[6].d[0] ), .\out.d.d[6].d[1] (\out.d.d[6].d[1] ), .\out.d.d[7].d[0] (\out.d.d[7].d[0] ), .\out.d.d[7].d[1] (\out.d.d[7].d[1] ), .\out.d.d[8].d[0] (\out.d.d[8].d[0] ), .\out.d.d[8].d[1] (\out.d.d[8].d[1] ), .\out.d.d[9].d[0] (\out.d.d[9].d[0] ), .\out.d.d[9].d[1] (\out.d.d[9].d[1] ), .\out.d.d[10].d[0] (\out.d.d[10].d[0] ), .\out.d.d[10].d[1] (\out.d.d[10].d[1] ), .\out.d.d[11].d[0] (\out.d.d[11].d[0] ), .\out.d.d[11].d[1] (\out.d.d[11].d[1] ), .\out.d.d[12].d[0] (\out.d.d[12].d[0] ), .\out.d.d[12].d[1] (\out.d.d[12].d[1] ), .\out.d.d[13].d[0] (\out.d.d[13].d[0] ), .\out.d.d[13].d[1] (\out.d.d[13].d[1] ), .\out.d.d[14].d[0] (\out.d.d[14].d[0] ), .\out.d.d[14].d[1] (\out.d.d[14].d[1] ), .\out.a (\out.a ), .\out.v (\out.v ), .reset_B(_reset_B), .vdd(vdd), .vss(vss)); +endmodule + diff --git a/test/unit_tests/encoder2D_7/run/prsim.out b/test/unit_tests/encoder2D_7/run/prsim.out new file mode 100644 index 0000000..f09da3e --- /dev/null +++ b/test/unit_tests/encoder2D_7/run/prsim.out @@ -0,0 +1,143 @@ +e.y[0].r e.e.Yarb.arbs[0].or_cell._y e.e.x_ack_arb[0].buf1._y e.e.vtree_x.OR2_tf[0]._y e.e.buf_s_func._in_vX e.e._arb_out_x.r e.e.buf_s_func._en_X_t[0] e.y[0].a e.out.v e.e.buf_s_func._in_vXX_t[0] e.e.Yarb.arbs[0].ack_cell2._y e.e.y_ack_arb[1].buf1._y e.e._y_temp[1].a e.e.buf_s_func.out_a_B_buf_f.buf1._y e.e.buf_s_func._out_a_B e.e.buf_s_func._out_a_BX_t[0] e.e.x_enc_out.d[0].t e.x[0].r e.y[1].r e.e._x_temp[1].a e.e.Xarb.arbs[0]._y2_arb e.e._arb_out_y.r e.e._in_x_v e.out.a e.x[1].r e.e.y_enc_out.d[0].t e.e.x_enc_out.d[0].f e.e.y_enc_out.d[0].f e.e.y_encoder.ors_f[0].b._y e.e.vtree_y.OR2_tf[0]._y e.e.buf_s_func._in_vXX_f[0] e.e.buf_s_func._en_X_f[0] e.x[0].a e.e._y_temp[0].a e.e._in_xy_v.y e.e._in_y_v e.e.vtree_x.ct.b._y e.e._x_temp[0].a e.e._en e.e.x_encoder.ors_t[0].b._y e.x[1].a e.e.buf_s_func.in_v_buf_f.buf1._y e.e.Yarb.arbs[0].ack_cell1._y e.e._x_v_B e.e.Yarb.arbs[0]._y1_arb e.e.vtree_x.ct.in[0] e.e.buf_s_func._out_a_BX_f[0] e.e.buf_s_func.in_v_prebuf._y e.e.vtree_y.ct.in[0] e.y[1].a e.e._x_v e.e.Xarb.arbs[0].arbiter._y1 e.e.Xarb.arbs[0].or_cell._y e.e._in_xy_v._y e.e.Xarb.arbs[0].ack_cell1._y e.e.Xarb.arbs[0]._y1_arb e.e.x_encoder.ors_f[0].b._y e.e.Yarb.arbs[0].arbiter._y1 e.e.y_encoder.ors_t[0].b._y e.e.vtree_y.ct.b._y e.e.buf_s_func.out_a_B_buf_t.buf1._y e.e.Yarb.arbs[0]._y2_arb e.e.Xarb.arbs[0].arbiter._y2 e.e.Xarb.arbs[0].ack_cell2._y e.e.buf_s_func.in_v_buf_t.buf1._y e.e.y_ack_arb[0].buf1._y e.e.x_ack_arb[1].buf1._y e.e.Yarb.arbs[0].arbiter._y2 e.e.x_req_ortree.or2s[0]._y e.e.buf_s_func.en_buf_f.buf1._y e.e.buf_s_func.en_buf_t.buf1._y + 81590 Reset : 0 + 81605 e._reset_B : 1 [by Reset:=0] + 118536 e.e.buf_s_func.reset_buf._y : 0 [by e._reset_B:=1] + 118591 e.e.buf_s_func._reset_BX : 1 [by e.e.buf_s_func.reset_buf._y:=0] + 124853 e.e.reset_buf._y : 0 [by e._reset_B:=1] + 154633 e.e._reset_BX : 1 [by e.e.reset_buf._y:=0] + 155055 e.e.X_ack_confirm._y : X [by e.e._reset_BX:=1] + 168482 e.e.reset_bufarray.buf1._y : 0 [by e.e._reset_BX:=1] + 168483 e.e._reset_BXX[0] : 1 [by e.e.reset_bufarray.buf1._y:=0] + 168976 e.e.Y_ack_confirm._y : X [by e.e._reset_BX:=1] + 168977 e.e._arb_out_y.a : X [by e.e.Y_ack_confirm._y:=X] + 170244 e.e.buf_s_func.reset_bufarray.buf1._y : 0 [by e.e.buf_s_func._reset_BX:=1] + 179445 e.e._x_a_B : X [by e.e._reset_BX:=1] + 179727 e.e._x_a : X [by e.e._x_a_B:=X] + 190449 e.e.buf_s_func._reset_BXX[0] : 1 [by e.e.buf_s_func.reset_bufarray.buf1._y:=0] + 190452 e.e.buf_s_func.f_buf_func[1]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 191000 e.e.buf_s_func.t_buf_func[1]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 191217 e.e.buf_s_func.f_buf_func[0]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 191523 e.out.d.d[1].f : X [by e.e.buf_s_func.f_buf_func[1]._y:=X] + 191954 e.out.d.d[1].t : X [by e.e.buf_s_func.t_buf_func[1]._y:=X] + 192298 e.out.d.d[0].f : X [by e.e.buf_s_func.f_buf_func[0]._y:=X] + 203769 e.e._arb_out_x.a : X [by e.e.X_ack_confirm._y:=X] + 212890 e.e.buf_s_func.t_buf_func[0]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 267360 e.out.d.d[0].t : X [by e.e.buf_s_func.t_buf_func[0]._y:=X] + 267360 Reset : 1 + 268342 e._reset_B : 0 [by Reset:=1] + 268360 e.e.reset_buf._y : 1 [by e._reset_B:=0] + 272355 e.e.buf_s_func.reset_buf._y : 1 [by e._reset_B:=0] + 272363 e.e._reset_BX : 0 [by e.e.reset_buf._y:=1] + 272566 e.e.X_ack_confirm._y : 1 [by e.e._reset_BX:=0] + 272865 e.e.Y_ack_confirm._y : 1 [by e.e._reset_BX:=0] + 273004 e.e._arb_out_y.a : 0 [by e.e.Y_ack_confirm._y:=1] + 274420 e.e._arb_out_x.a : 0 [by e.e.X_ack_confirm._y:=1] + 277123 e.e._x_a_B : 1 [by e.e._reset_BX:=0] + 293947 e.e.reset_bufarray.buf1._y : 1 [by e.e._reset_BX:=0] + 294016 e.e._reset_BXX[0] : 0 [by e.e.reset_bufarray.buf1._y:=1] + 313469 e.e._x_a : 0 [by e.e._x_a_B:=1] + 317256 e.e.buf_s_func._reset_BX : 0 [by e.e.buf_s_func.reset_buf._y:=1] + 317267 e.e.buf_s_func.reset_bufarray.buf1._y : 1 [by e.e.buf_s_func._reset_BX:=0] + 369053 e.e.buf_s_func._reset_BXX[0] : 0 [by e.e.buf_s_func.reset_bufarray.buf1._y:=1] + 369054 e.e.buf_s_func.t_buf_func[0]._y : 1 [by e.e.buf_s_func._reset_BXX[0]:=0] + 369068 e.e.buf_s_func.f_buf_func[1]._y : 1 [by e.e.buf_s_func._reset_BXX[0]:=0] + 369090 e.e.buf_s_func.t_buf_func[1]._y : 1 [by e.e.buf_s_func._reset_BXX[0]:=0] + 369180 e.out.d.d[1].f : 0 [by e.e.buf_s_func.f_buf_func[1]._y:=1] + 369257 e.e.buf_s_func.f_buf_func[0]._y : 1 [by e.e.buf_s_func._reset_BXX[0]:=0] + 369297 e.out.d.d[0].f : 0 [by e.e.buf_s_func.f_buf_func[0]._y:=1] + 369793 e.out.d.d[0].t : 0 [by e.e.buf_s_func.t_buf_func[0]._y:=1] + 416602 e.out.d.d[1].t : 0 [by e.e.buf_s_func.t_buf_func[1]._y:=1] +[] Setting output ack/val low + 416602 Reset : 0 + 416859 e._reset_B : 1 [by Reset:=0] + 416946 e.e.reset_buf._y : 0 [by e._reset_B:=1] + 416947 e.e._reset_BX : 1 [by e.e.reset_buf._y:=0] + 417153 e.e.buf_s_func.reset_buf._y : 0 [by e._reset_B:=1] + 417331 e.e.buf_s_func._reset_BX : 1 [by e.e.buf_s_func.reset_buf._y:=0] + 417537 e.e.X_ack_confirm._y : X [by e.e._reset_BX:=1] + 417701 e.e._arb_out_x.a : X [by e.e.X_ack_confirm._y:=X] + 418134 e.e.buf_s_func.reset_bufarray.buf1._y : 0 [by e.e.buf_s_func._reset_BX:=1] + 418156 e.e.Y_ack_confirm._y : X [by e.e._reset_BX:=1] + 418178 e.e._arb_out_y.a : X [by e.e.Y_ack_confirm._y:=X] + 418753 e.e.reset_bufarray.buf1._y : 0 [by e.e._reset_BX:=1] + 418954 e.e._x_a_B : X [by e.e._reset_BX:=1] + 419600 e.e._reset_BXX[0] : 1 [by e.e.reset_bufarray.buf1._y:=0] + 420329 e.e.buf_s_func._reset_BXX[0] : 1 [by e.e.buf_s_func.reset_bufarray.buf1._y:=0] + 420462 e.e.buf_s_func.f_buf_func[0]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 420683 e.out.d.d[0].f : X [by e.e.buf_s_func.f_buf_func[0]._y:=X] + 420688 e.e.buf_s_func.t_buf_func[0]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 420695 e.out.d.d[0].t : X [by e.e.buf_s_func.t_buf_func[0]._y:=X] + 434445 e.e.buf_s_func.t_buf_func[1]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 434475 e.out.d.d[1].t : X [by e.e.buf_s_func.t_buf_func[1]._y:=X] + 435991 e.e.buf_s_func.f_buf_func[1]._y : X [by e.e.buf_s_func._reset_BXX[0]:=1] + 442704 e.out.d.d[1].f : X [by e.e.buf_s_func.f_buf_func[1]._y:=X] + 449082 e.e._x_a : X [by e.e._x_a_B:=X] + 449082 e.out.a : 0 + 449082 e.x[1].a : 0 + 449082 e.y[0].r : 0 + 449082 e.x[0].r : 0 + 449082 e.y[1].a : 0 + 449082 e.out.v : 0 + 449082 e.y[0].a : 0 + 449082 e.y[1].r : 0 + 449082 e.x[0].a : 0 + 449082 e.x[1].r : 0 + 449089 e.e.Xarb.arbs[0].arbiter._y1 : 1 [by e.x[0].r:=0] + 449101 e.e.Xarb.arbs[0]._y1_arb : 0 [by e.e.Xarb.arbs[0].arbiter._y1:=1] + 449160 e.e.Yarb.arbs[0].arbiter._y2 : 1 [by e.y[1].r:=0] + 449173 e.e.x_encoder.ors_t[0].b._y : 1 [by e.x[1].a:=0] + 449185 e.e.x_enc_out.d[0].t : 0 [by e.e.x_encoder.ors_t[0].b._y:=1] + 449188 e.e.y_encoder.ors_f[0].b._y : 1 [by e.y[0].a:=0] + 449357 e.e.x_encoder.ors_f[0].b._y : 1 [by e.x[0].a:=0] + 449537 e.e.Xarb.arbs[0].arbiter._y2 : 1 [by e.x[1].r:=0] + 449564 e.e.Yarb.arbs[0]._y2_arb : 0 [by e.e.Yarb.arbs[0].arbiter._y2:=1] + 451271 e.e.Yarb.arbs[0].arbiter._y1 : 1 [by e.y[0].r:=0] + 451869 e.e.y_encoder.ors_t[0].b._y : 1 [by e.y[1].a:=0] + 451871 e.e.y_enc_out.d[0].t : 0 [by e.e.y_encoder.ors_t[0].b._y:=1] + 452436 e.e.Xarb.arbs[0]._y2_arb : 0 [by e.e.Xarb.arbs[0].arbiter._y2:=1] + 453633 e.e.x_enc_out.d[0].f : 0 [by e.e.x_encoder.ors_f[0].b._y:=1] + 454882 e.e.vtree_x.OR2_tf[0]._y : 1 [by e.e.x_enc_out.d[0].f:=0] + 455104 e.e.y_enc_out.d[0].f : 0 [by e.e.y_encoder.ors_f[0].b._y:=1] + 455270 e.e.vtree_y.OR2_tf[0]._y : 1 [by e.e.y_enc_out.d[0].f:=0] + 455345 e.e.vtree_y.ct.in[0] : 0 [by e.e.vtree_y.OR2_tf[0]._y:=1] + 455566 e.e.Yarb.arbs[0]._y1_arb : 0 [by e.e.Yarb.arbs[0].arbiter._y1:=1] + 455690 e.e.vtree_y.ct.b._y : 1 [by e.e.vtree_y.ct.in[0]:=0] + 455704 e.e.Yarb.arbs[0].or_cell._y : 1 [by e.e.Yarb.arbs[0]._y1_arb:=0] + 455706 e.e._arb_out_y.r : 0 [by e.e.Yarb.arbs[0].or_cell._y:=1] + 456971 e.e.Xarb.arbs[0].or_cell._y : 1 [by e.e.Xarb.arbs[0]._y2_arb:=0] + 458381 e.e.vtree_x.ct.in[0] : 0 [by e.e.vtree_x.OR2_tf[0]._y:=1] + 458382 e.e.vtree_x.ct.b._y : 1 [by e.e.vtree_x.ct.in[0]:=0] + 458930 e.e._in_x_v : 0 [by e.e.vtree_x.ct.b._y:=1] + 458941 e.e._in_xy_v._y : 1 [by e.e._in_x_v:=0] + 459311 e.e._in_xy_v.y : 0 [by e.e._in_xy_v._y:=1] + 459378 e.e.buf_s_func.in_v_prebuf._y : 1 [by e.e._in_xy_v.y:=0] + 460953 e.e._in_y_v : 0 [by e.e.vtree_y.ct.b._y:=1] + 462019 e.e.buf_s_func._in_vX : 0 [by e.e.buf_s_func.in_v_prebuf._y:=1] + 462035 e.e.buf_s_func.in_v_buf_f.buf1._y : 1 [by e.e.buf_s_func._in_vX:=0] + 462563 e.e.buf_s_func._in_vXX_f[0] : 0 [by e.e.buf_s_func.in_v_buf_f.buf1._y:=1] + 466581 e.e.buf_s_func.in_v_buf_t.buf1._y : 1 [by e.e.buf_s_func._in_vX:=0] + 468078 e.e.x_req_ortree.or2s[0]._y : 1 [by e.x[1].r:=0] + 469016 e.e.buf_s_func._in_vXX_t[0] : 0 [by e.e.buf_s_func.in_v_buf_t.buf1._y:=1] + 494958 e.e._x_v : 0 [by e.e.x_req_ortree.or2s[0]._y:=1] + 500888 e.e._arb_out_x.r : 0 [by e.e.Xarb.arbs[0].or_cell._y:=1] + 506543 e.e.buf_s_func._out_a_B : 1 [by e.out.a:=0] + 506545 e.e.buf_s_func.out_a_B_buf_f.buf1._y : 0 [by e.e.buf_s_func._out_a_B:=1] + 518883 e.e._x_v_B : 1 [by e.e._x_v:=0] + 519584 e.e.buf_s_func.out_a_B_buf_t.buf1._y : 0 [by e.e.buf_s_func._out_a_B:=1] + 519587 e.e.buf_s_func._out_a_BX_f[0] : 1 [by e.e.buf_s_func.out_a_B_buf_t.buf1._y:=0] + 567503 e.e.buf_s_func._out_a_BX_t[0] : 1 [by e.e.buf_s_func.out_a_B_buf_f.buf1._y:=0] + 567503 e.y[0].r : 1 + 567503 e.y[1].r : 1 + 567532 e.e.Yarb.arbs[0].arbiter._y1 : 0 [by e.y[0].r:=1] + 569133 e.e.Yarb.arbs[0]._y1_arb : X [by e.e.Yarb.arbs[0].arbiter._y1:=0] + 569286 e.e.Yarb.arbs[0].or_cell._y : X [by e.e.Yarb.arbs[0]._y1_arb:=X] + 569330 e.e._arb_out_y.r : X [by e.e.Yarb.arbs[0].or_cell._y:=X] + 569330 e.x[0].r : 1 + 569330 e.x[1].r : 1 + 572091 e.e.Xarb.arbs[0].arbiter._y1 : 0 [by e.x[0].r:=1] + 572308 e.e.Xarb.arbs[0]._y1_arb : X [by e.e.Xarb.arbs[0].arbiter._y1:=0] + 572330 e.e.Xarb.arbs[0].or_cell._y : X [by e.e.Xarb.arbs[0]._y1_arb:=X] + 572331 e.e._arb_out_x.r : X [by e.e.Xarb.arbs[0].or_cell._y:=X] + 583013 e.e.x_req_ortree.or2s[0]._y : 0 [by e.x[0].r:=1] + 584594 e.e._x_v : 1 [by e.e.x_req_ortree.or2s[0]._y:=0] + 593939 e.e._x_v_B : 0 [by e.e._x_v:=1] diff --git a/test/unit_tests/encoder2D_7/run/prsim.pdf b/test/unit_tests/encoder2D_7/run/prsim.pdf new file mode 100644 index 0000000..10016d9 Binary files /dev/null and b/test/unit_tests/encoder2D_7/run/prsim.pdf differ diff --git a/test/unit_tests/encoder2D_7/run/test.prs b/test/unit_tests/encoder2D_7/run/test.prs new file mode 100644 index 0000000..ebabc05 --- /dev/null +++ b/test/unit_tests/encoder2D_7/run/test.prs @@ -0,0 +1,852 @@ += "GND" "GND" += "Vdd" "Vdd" += "Reset" "Reset" +"Reset"->"e._reset_B"- +~("Reset")->"e._reset_B"+ += "e._reset_B" "e.e.reset_B" += "e.e.y_encoder.tielo.y" "e.e.y_encoder.tielo.vss" +"e.e.y_encoder.ors_t[0].b.a"->"e.e.y_encoder.ors_t[0].b._y"- +~("e.e.y_encoder.ors_t[0].b.a")->"e.e.y_encoder.ors_t[0].b._y"+ +"e.e.y_encoder.ors_t[0].b._y"->"e.e.y_encoder.ors_t[0].b.y"- +~("e.e.y_encoder.ors_t[0].b._y")->"e.e.y_encoder.ors_t[0].b.y"+ += "e.e.y_encoder.ors_t[0].supply.vdd" "e.e.y_encoder.ors_t[0].b.vdd" += "e.e.y_encoder.ors_t[0].supply.vss" "e.e.y_encoder.ors_t[0].b.vss" += "e.e.y_encoder.ors_t[0].out" "e.e.y_encoder.ors_t[0].b.y" += "e.e.y_encoder.ors_t[0].in[0]" "e.e.y_encoder.ors_t[0].b.a" +"e.e.y_encoder.ors_f[0].b.a"->"e.e.y_encoder.ors_f[0].b._y"- +~("e.e.y_encoder.ors_f[0].b.a")->"e.e.y_encoder.ors_f[0].b._y"+ +"e.e.y_encoder.ors_f[0].b._y"->"e.e.y_encoder.ors_f[0].b.y"- +~("e.e.y_encoder.ors_f[0].b._y")->"e.e.y_encoder.ors_f[0].b.y"+ += "e.e.y_encoder.ors_f[0].supply.vdd" "e.e.y_encoder.ors_f[0].b.vdd" += "e.e.y_encoder.ors_f[0].supply.vss" "e.e.y_encoder.ors_f[0].b.vss" += "e.e.y_encoder.ors_f[0].out" "e.e.y_encoder.ors_f[0].b.y" += "e.e.y_encoder.ors_f[0].in[0]" "e.e.y_encoder.ors_f[0].b.a" += "e.e.y_encoder.supply.vss" "e.e.y_encoder.ors_f[0].supply.vss" += "e.e.y_encoder.supply.vdd" "e.e.y_encoder.ors_f[0].supply.vdd" += "e.e.y_encoder.supply.vss" "e.e.y_encoder.ors_t[0].supply.vss" += "e.e.y_encoder.supply.vdd" "e.e.y_encoder.ors_t[0].supply.vdd" += "e.e.y_encoder.supply.vdd" "e.e.y_encoder.tielo.vdd" += "e.e.y_encoder.supply.vss" "e.e.y_encoder.tielo.vss" += "e.e.y_encoder.supply.vss" "e.e.y_encoder.tielo.y" += "e.e.y_encoder.in[0]" "e.e.y_encoder.ors_f[0].in[0]" += "e.e.y_encoder.in[1]" "e.e.y_encoder.ors_t[0].in[0]" += "e.e.y_encoder.out.d[0].d[0]" "e.e.y_encoder.out.d[0].f" += "e.e.y_encoder.out.d[0].d[1]" "e.e.y_encoder.out.d[0].t" += "e.e.y_encoder.out.d[0].d[0]" "e.e.y_encoder.out.d[0].f" += "e.e.y_encoder.out.d[0].d[1]" "e.e.y_encoder.out.d[0].t" += "e.e.y_encoder.out.d[0].d[0]" "e.e.y_encoder.ors_f[0].out" += "e.e.y_encoder.out.d[0].d[0]" "e.e.y_encoder.out.d[0].f" += "e.e.y_encoder.out.d[0].d[1]" "e.e.y_encoder.ors_t[0].out" += "e.e.y_encoder.out.d[0].d[1]" "e.e.y_encoder.out.d[0].t" += "e.e.x_encoder.tielo.y" "e.e.x_encoder.tielo.vss" +"e.e.x_encoder.ors_t[0].b.a"->"e.e.x_encoder.ors_t[0].b._y"- +~("e.e.x_encoder.ors_t[0].b.a")->"e.e.x_encoder.ors_t[0].b._y"+ +"e.e.x_encoder.ors_t[0].b._y"->"e.e.x_encoder.ors_t[0].b.y"- +~("e.e.x_encoder.ors_t[0].b._y")->"e.e.x_encoder.ors_t[0].b.y"+ += "e.e.x_encoder.ors_t[0].supply.vdd" "e.e.x_encoder.ors_t[0].b.vdd" += "e.e.x_encoder.ors_t[0].supply.vss" "e.e.x_encoder.ors_t[0].b.vss" += "e.e.x_encoder.ors_t[0].out" "e.e.x_encoder.ors_t[0].b.y" += "e.e.x_encoder.ors_t[0].in[0]" "e.e.x_encoder.ors_t[0].b.a" +"e.e.x_encoder.ors_f[0].b.a"->"e.e.x_encoder.ors_f[0].b._y"- +~("e.e.x_encoder.ors_f[0].b.a")->"e.e.x_encoder.ors_f[0].b._y"+ +"e.e.x_encoder.ors_f[0].b._y"->"e.e.x_encoder.ors_f[0].b.y"- +~("e.e.x_encoder.ors_f[0].b._y")->"e.e.x_encoder.ors_f[0].b.y"+ += "e.e.x_encoder.ors_f[0].supply.vdd" "e.e.x_encoder.ors_f[0].b.vdd" += "e.e.x_encoder.ors_f[0].supply.vss" "e.e.x_encoder.ors_f[0].b.vss" += "e.e.x_encoder.ors_f[0].out" "e.e.x_encoder.ors_f[0].b.y" += "e.e.x_encoder.ors_f[0].in[0]" "e.e.x_encoder.ors_f[0].b.a" += "e.e.x_encoder.supply.vss" "e.e.x_encoder.ors_f[0].supply.vss" += "e.e.x_encoder.supply.vdd" "e.e.x_encoder.ors_f[0].supply.vdd" += "e.e.x_encoder.supply.vss" "e.e.x_encoder.ors_t[0].supply.vss" += "e.e.x_encoder.supply.vdd" "e.e.x_encoder.ors_t[0].supply.vdd" += "e.e.x_encoder.supply.vdd" "e.e.x_encoder.tielo.vdd" += "e.e.x_encoder.supply.vss" "e.e.x_encoder.tielo.vss" += "e.e.x_encoder.supply.vss" "e.e.x_encoder.tielo.y" += "e.e.x_encoder.in[0]" "e.e.x_encoder.ors_f[0].in[0]" += "e.e.x_encoder.in[1]" "e.e.x_encoder.ors_t[0].in[0]" += "e.e.x_encoder.out.d[0].d[0]" "e.e.x_encoder.out.d[0].f" += "e.e.x_encoder.out.d[0].d[1]" "e.e.x_encoder.out.d[0].t" += "e.e.x_encoder.out.d[0].d[0]" "e.e.x_encoder.out.d[0].f" += "e.e.x_encoder.out.d[0].d[1]" "e.e.x_encoder.out.d[0].t" += "e.e.x_encoder.out.d[0].d[0]" "e.e.x_encoder.ors_f[0].out" += "e.e.x_encoder.out.d[0].d[0]" "e.e.x_encoder.out.d[0].f" += "e.e.x_encoder.out.d[0].d[1]" "e.e.x_encoder.ors_t[0].out" += "e.e.x_encoder.out.d[0].d[1]" "e.e.x_encoder.out.d[0].t" +"e.e.reset_bufarray.buf1.a"->"e.e.reset_bufarray.buf1._y"- +~("e.e.reset_bufarray.buf1.a")->"e.e.reset_bufarray.buf1._y"+ +"e.e.reset_bufarray.buf1._y"->"e.e.reset_bufarray.buf1.y"- +~("e.e.reset_bufarray.buf1._y")->"e.e.reset_bufarray.buf1.y"+ += "e.e.reset_bufarray.supply.vdd" "e.e.reset_bufarray.buf1.vdd" += "e.e.reset_bufarray.supply.vss" "e.e.reset_bufarray.buf1.vss" += "e.e.reset_bufarray.out[0]" "e.e.reset_bufarray.out[3]" += "e.e.reset_bufarray.out[0]" "e.e.reset_bufarray.out[2]" += "e.e.reset_bufarray.out[0]" "e.e.reset_bufarray.out[1]" += "e.e.reset_bufarray.out[0]" "e.e.reset_bufarray.buf1.y" += "e.e.reset_bufarray.in" "e.e.reset_bufarray.buf1.a" += "e.e.x[0].d.d[0]" "e.e.x[0].r" += "e.e.x[1].d.d[0]" "e.e.x[1].r" += "e.e.x[1].a" "e.e.x_acks[1]" += "e.e.x[1].a" "e.e.x_ack_arb[1].out" += "e.e.x[1].d.d[0]" "e.e._x_req_array[1]" += "e.e.x[1].d.d[0]" "e.e._x_temp[1].r" += "e.e.x[1].d.d[0]" "e.e._x_temp[1].d.d[0]" += "e.e.x[1].d.d[0]" "e.e.x[1].r" += "e.e.x[0].a" "e.e.x_acks[0]" += "e.e.x[0].a" "e.e.x_ack_arb[0].out" += "e.e.x[0].d.d[0]" "e.e._x_req_array[0]" += "e.e.x[0].d.d[0]" "e.e._x_temp[0].r" += "e.e.x[0].d.d[0]" "e.e._x_temp[0].d.d[0]" += "e.e.x[0].d.d[0]" "e.e.x[0].r" += "e.e.Xarb.arbs[0].in1.d.d[0]" "e.e.Xarb.arbs[0].in1.r" += "e.e.Xarb.arbs[0].in1.a" "e.e.Xarb.arbs[0].arbiter.d" += "e.e.Xarb.arbs[0].in1.a" "e.e.Xarb.arbs[0].ack_cell1.y" += "e.e.Xarb.arbs[0].in1.d.d[0]" "e.e.Xarb.arbs[0].arbiter.a" += "e.e.Xarb.arbs[0].in1.d.d[0]" "e.e.Xarb.arbs[0].in1.r" +~"e.e.Xarb.arbs[0].ack_cell1.c1"&~"e.e.Xarb.arbs[0].ack_cell1.c2"->"e.e.Xarb.arbs[0].ack_cell1._y"+ +"e.e.Xarb.arbs[0].ack_cell1.c1"&"e.e.Xarb.arbs[0].ack_cell1.c2"->"e.e.Xarb.arbs[0].ack_cell1._y"- +"e.e.Xarb.arbs[0].ack_cell1._y"->"e.e.Xarb.arbs[0].ack_cell1.y"- +~("e.e.Xarb.arbs[0].ack_cell1._y")->"e.e.Xarb.arbs[0].ack_cell1.y"+ += "e.e.Xarb.arbs[0].in2.d.d[0]" "e.e.Xarb.arbs[0].in2.r" += "e.e.Xarb.arbs[0].in2.a" "e.e.Xarb.arbs[0].arbiter.c" += "e.e.Xarb.arbs[0].in2.a" "e.e.Xarb.arbs[0].ack_cell2.y" += "e.e.Xarb.arbs[0].in2.d.d[0]" "e.e.Xarb.arbs[0].arbiter.b" += "e.e.Xarb.arbs[0].in2.d.d[0]" "e.e.Xarb.arbs[0].in2.r" += "e.e.Xarb.arbs[0].supply.vdd" "e.e.Xarb.arbs[0].arbiter.vdd" += "e.e.Xarb.arbs[0].supply.vdd" "e.e.Xarb.arbs[0].or_cell.vdd" += "e.e.Xarb.arbs[0].supply.vdd" "e.e.Xarb.arbs[0].ack_cell2.vdd" += "e.e.Xarb.arbs[0].supply.vdd" "e.e.Xarb.arbs[0].ack_cell1.vdd" += "e.e.Xarb.arbs[0].supply.vss" "e.e.Xarb.arbs[0].arbiter.vss" += "e.e.Xarb.arbs[0].supply.vss" "e.e.Xarb.arbs[0].or_cell.vss" += "e.e.Xarb.arbs[0].supply.vss" "e.e.Xarb.arbs[0].ack_cell2.vss" += "e.e.Xarb.arbs[0].supply.vss" "e.e.Xarb.arbs[0].ack_cell1.vss" +"e.e.Xarb.arbs[0].arbiter.a"&"e.e.Xarb.arbs[0].arbiter._y2"->"e.e.Xarb.arbs[0].arbiter._y1"- +~"e.e.Xarb.arbs[0].arbiter.a"|~"e.e.Xarb.arbs[0].arbiter._y2"->"e.e.Xarb.arbs[0].arbiter._y1"+ +"e.e.Xarb.arbs[0].arbiter.b"&"e.e.Xarb.arbs[0].arbiter._y1"->"e.e.Xarb.arbs[0].arbiter._y2"- +~"e.e.Xarb.arbs[0].arbiter.b"|~"e.e.Xarb.arbs[0].arbiter._y1"->"e.e.Xarb.arbs[0].arbiter._y2"+ +"e.e.Xarb.arbs[0].arbiter._y1"|"e.e.Xarb.arbs[0].arbiter.c"->"e.e.Xarb.arbs[0].arbiter.y1"- +~("e.e.Xarb.arbs[0].arbiter._y1"|"e.e.Xarb.arbs[0].arbiter.c")->"e.e.Xarb.arbs[0].arbiter.y1"+ +"e.e.Xarb.arbs[0].arbiter._y2"|"e.e.Xarb.arbs[0].arbiter.d"->"e.e.Xarb.arbs[0].arbiter.y2"- +~("e.e.Xarb.arbs[0].arbiter._y2"|"e.e.Xarb.arbs[0].arbiter.d")->"e.e.Xarb.arbs[0].arbiter.y2"+ +mk_excllo("e.e.Xarb.arbs[0].arbiter._y1","e.e.Xarb.arbs[0].arbiter._y2") += "e.e.Xarb.arbs[0]._y1_arb" "e.e.Xarb.arbs[0].arbiter.y1" += "e.e.Xarb.arbs[0]._y1_arb" "e.e.Xarb.arbs[0].or_cell.a" += "e.e.Xarb.arbs[0]._y1_arb" "e.e.Xarb.arbs[0].ack_cell1.c2" +~"e.e.Xarb.arbs[0].ack_cell2.c1"&~"e.e.Xarb.arbs[0].ack_cell2.c2"->"e.e.Xarb.arbs[0].ack_cell2._y"+ +"e.e.Xarb.arbs[0].ack_cell2.c1"&"e.e.Xarb.arbs[0].ack_cell2.c2"->"e.e.Xarb.arbs[0].ack_cell2._y"- +"e.e.Xarb.arbs[0].ack_cell2._y"->"e.e.Xarb.arbs[0].ack_cell2.y"- +~("e.e.Xarb.arbs[0].ack_cell2._y")->"e.e.Xarb.arbs[0].ack_cell2.y"+ +"e.e.Xarb.arbs[0].or_cell.a"|"e.e.Xarb.arbs[0].or_cell.b"->"e.e.Xarb.arbs[0].or_cell._y"- +~("e.e.Xarb.arbs[0].or_cell.a"|"e.e.Xarb.arbs[0].or_cell.b")->"e.e.Xarb.arbs[0].or_cell._y"+ +"e.e.Xarb.arbs[0].or_cell._y"->"e.e.Xarb.arbs[0].or_cell.y"- +~("e.e.Xarb.arbs[0].or_cell._y")->"e.e.Xarb.arbs[0].or_cell.y"+ += "e.e.Xarb.arbs[0].out.d.d[0]" "e.e.Xarb.arbs[0].out.r" += "e.e.Xarb.arbs[0].out.a" "e.e.Xarb.arbs[0].ack_cell2.c1" += "e.e.Xarb.arbs[0].out.a" "e.e.Xarb.arbs[0].ack_cell1.c1" += "e.e.Xarb.arbs[0].out.d.d[0]" "e.e.Xarb.arbs[0].or_cell.y" += "e.e.Xarb.arbs[0].out.d.d[0]" "e.e.Xarb.arbs[0].out.r" += "e.e.Xarb.arbs[0]._y2_arb" "e.e.Xarb.arbs[0].arbiter.y2" += "e.e.Xarb.arbs[0]._y2_arb" "e.e.Xarb.arbs[0].or_cell.b" += "e.e.Xarb.arbs[0]._y2_arb" "e.e.Xarb.arbs[0].ack_cell2.c2" += "e.e.Xarb.supply.vss" "e.e.Xarb.arbs[0].supply.vss" += "e.e.Xarb.supply.vdd" "e.e.Xarb.arbs[0].supply.vdd" += "e.e.Xarb.in[0].d.d[0]" "e.e.Xarb.in[0].r" += "e.e.Xarb.in[1].d.d[0]" "e.e.Xarb.in[1].r" += "e.e.Xarb.in[0].r" "e.e.Xarb.arbs[0].in1.r" += "e.e.Xarb.in[0].a" "e.e.Xarb.arbs[0].in1.a" += "e.e.Xarb.in[0].d.d[0]" "e.e.Xarb.arbs[0].in1.d.d[0]" += "e.e.Xarb.in[0].r" "e.e.Xarb.tmp[0].r" += "e.e.Xarb.in[0].a" "e.e.Xarb.tmp[0].a" += "e.e.Xarb.in[0].d.d[0]" "e.e.Xarb.tmp[0].d.d[0]" += "e.e.Xarb.in[1].r" "e.e.Xarb.arbs[0].in2.r" += "e.e.Xarb.in[1].a" "e.e.Xarb.arbs[0].in2.a" += "e.e.Xarb.in[1].d.d[0]" "e.e.Xarb.arbs[0].in2.d.d[0]" += "e.e.Xarb.in[1].r" "e.e.Xarb.tmp[1].r" += "e.e.Xarb.in[1].a" "e.e.Xarb.tmp[1].a" += "e.e.Xarb.in[1].d.d[0]" "e.e.Xarb.tmp[1].d.d[0]" += "e.e.Xarb.in[1].d.d[0]" "e.e.Xarb.in[1].r" += "e.e.Xarb.in[0].d.d[0]" "e.e.Xarb.in[0].r" += "e.e.Xarb.out.d.d[0]" "e.e.Xarb.out.r" += "e.e.Xarb.out.r" "e.e.Xarb.arbs[0].out.r" += "e.e.Xarb.out.a" "e.e.Xarb.arbs[0].out.a" += "e.e.Xarb.out.d.d[0]" "e.e.Xarb.arbs[0].out.d.d[0]" += "e.e.Xarb.out.r" "e.e.Xarb.tmp[2].r" += "e.e.Xarb.out.a" "e.e.Xarb.tmp[2].a" += "e.e.Xarb.out.d.d[0]" "e.e.Xarb.tmp[2].d.d[0]" += "e.e.Xarb.out.d.d[0]" "e.e.Xarb.out.r" +"e.e.y_ack_arb[0].buf1.a"->"e.e.y_ack_arb[0].buf1._y"- +~("e.e.y_ack_arb[0].buf1.a")->"e.e.y_ack_arb[0].buf1._y"+ +"e.e.y_ack_arb[0].buf1._y"->"e.e.y_ack_arb[0].buf1.y"- +~("e.e.y_ack_arb[0].buf1._y")->"e.e.y_ack_arb[0].buf1.y"+ += "e.e.y_ack_arb[0].supply.vdd" "e.e.y_ack_arb[0].buf1.vdd" += "e.e.y_ack_arb[0].supply.vss" "e.e.y_ack_arb[0].buf1.vss" += "e.e.y_ack_arb[0].out" "e.e.y_ack_arb[0].buf1.y" += "e.e.y_ack_arb[0].in" "e.e.y_ack_arb[0].buf1.a" +"e.e.y_ack_arb[1].buf1.a"->"e.e.y_ack_arb[1].buf1._y"- +~("e.e.y_ack_arb[1].buf1.a")->"e.e.y_ack_arb[1].buf1._y"+ +"e.e.y_ack_arb[1].buf1._y"->"e.e.y_ack_arb[1].buf1.y"- +~("e.e.y_ack_arb[1].buf1._y")->"e.e.y_ack_arb[1].buf1.y"+ += "e.e.y_ack_arb[1].supply.vdd" "e.e.y_ack_arb[1].buf1.vdd" += "e.e.y_ack_arb[1].supply.vss" "e.e.y_ack_arb[1].buf1.vss" += "e.e.y_ack_arb[1].out" "e.e.y_ack_arb[1].buf1.y" += "e.e.y_ack_arb[1].in" "e.e.y_ack_arb[1].buf1.a" +~"e.e.enabling.p1"&~"e.e.enabling.p2"&~"e.e.enabling.c1"->"e.e.enabling.y"+ +"e.e.enabling.c1"->"e.e.enabling.y"- += "e.e.into_buffer.d[0].d[0]" "e.e.into_buffer.d[0].f" += "e.e.into_buffer.d[0].d[1]" "e.e.into_buffer.d[0].t" += "e.e.into_buffer.d[1].d[0]" "e.e.into_buffer.d[1].f" += "e.e.into_buffer.d[1].d[1]" "e.e.into_buffer.d[1].t" += "e.e.into_buffer.d[1].d[0]" "e.e.into_buffer.d[1].f" += "e.e.into_buffer.d[1].d[1]" "e.e.into_buffer.d[1].t" += "e.e.into_buffer.d[0].d[0]" "e.e.into_buffer.d[0].f" += "e.e.into_buffer.d[0].d[1]" "e.e.into_buffer.d[0].t" += "e.e.into_buffer.d[0].f" "e.e.buf_s_func.in.d[0].f" += "e.e.into_buffer.d[0].t" "e.e.buf_s_func.in.d[0].t" += "e.e.into_buffer.d[0].d[0]" "e.e.buf_s_func.in.d[0].d[0]" += "e.e.into_buffer.d[0].d[1]" "e.e.buf_s_func.in.d[0].d[1]" += "e.e.into_buffer.d[1].f" "e.e.buf_s_func.in.d[1].f" += "e.e.into_buffer.d[1].t" "e.e.buf_s_func.in.d[1].t" += "e.e.into_buffer.d[1].d[0]" "e.e.buf_s_func.in.d[1].d[0]" += "e.e.into_buffer.d[1].d[1]" "e.e.buf_s_func.in.d[1].d[1]" += "e.e._en" "e.e.buf_s_func.en" += "e.e._en" "e.e.enabling.y" += "e.e._en" "e.e.x_ack.c1" +"e.e.vtree_y.ct.b.a"->"e.e.vtree_y.ct.b._y"- +~("e.e.vtree_y.ct.b.a")->"e.e.vtree_y.ct.b._y"+ +"e.e.vtree_y.ct.b._y"->"e.e.vtree_y.ct.b.y"- +~("e.e.vtree_y.ct.b._y")->"e.e.vtree_y.ct.b.y"+ += "e.e.vtree_y.ct.supply.vdd" "e.e.vtree_y.ct.b.vdd" += "e.e.vtree_y.ct.supply.vss" "e.e.vtree_y.ct.b.vss" += "e.e.vtree_y.ct.out" "e.e.vtree_y.ct.b.y" += "e.e.vtree_y.ct.in[0]" "e.e.vtree_y.ct.b.a" += "e.e.vtree_y.ct.in[0]" "e.e.vtree_y.OR2_tf[0].y" +"e.e.vtree_y.OR2_tf[0].a"|"e.e.vtree_y.OR2_tf[0].b"->"e.e.vtree_y.OR2_tf[0]._y"- +~("e.e.vtree_y.OR2_tf[0].a"|"e.e.vtree_y.OR2_tf[0].b")->"e.e.vtree_y.OR2_tf[0]._y"+ +"e.e.vtree_y.OR2_tf[0]._y"->"e.e.vtree_y.OR2_tf[0].y"- +~("e.e.vtree_y.OR2_tf[0]._y")->"e.e.vtree_y.OR2_tf[0].y"+ += "e.e.vtree_y.supply.vss" "e.e.vtree_y.ct.supply.vss" += "e.e.vtree_y.supply.vdd" "e.e.vtree_y.ct.supply.vdd" += "e.e.vtree_y.supply.vdd" "e.e.vtree_y.OR2_tf[0].vdd" += "e.e.vtree_y.supply.vss" "e.e.vtree_y.OR2_tf[0].vss" += "e.e.vtree_y.out" "e.e.vtree_y.ct.out" += "e.e.vtree_y.in.d[0].d[0]" "e.e.vtree_y.in.d[0].f" += "e.e.vtree_y.in.d[0].d[1]" "e.e.vtree_y.in.d[0].t" += "e.e.vtree_y.in.d[0].d[0]" "e.e.vtree_y.in.d[0].f" += "e.e.vtree_y.in.d[0].d[1]" "e.e.vtree_y.in.d[0].t" += "e.e.vtree_y.in.d[0].d[0]" "e.e.vtree_y.OR2_tf[0].b" += "e.e.vtree_y.in.d[0].d[0]" "e.e.vtree_y.in.d[0].f" += "e.e.vtree_y.in.d[0].d[1]" "e.e.vtree_y.OR2_tf[0].a" += "e.e.vtree_y.in.d[0].d[1]" "e.e.vtree_y.in.d[0].t" += "e.e._in_y_v" "e.e._in_xy_v.b" += "e.e._in_y_v" "e.e.vtree_y.out" += "e.e._in_y_v" "e.e.x_ack.p4" += "e.e._arb_out_x.d.d[0]" "e.e._arb_out_x.r" += "e.e._arb_out_x.r" "e.e.Xarb.out.r" += "e.e._arb_out_x.a" "e.e.Xarb.out.a" += "e.e._arb_out_x.d.d[0]" "e.e.Xarb.out.d.d[0]" += "e.e._arb_out_x.a" "e.e.X_ack_confirm.y" +"e.e.reset_buf.a"->"e.e.reset_buf._y"- +~("e.e.reset_buf.a")->"e.e.reset_buf._y"+ +"e.e.reset_buf._y"->"e.e.reset_buf.y"- +~("e.e.reset_buf._y")->"e.e.reset_buf.y"+ +"e.e.x_ack_arb[0].buf1.a"->"e.e.x_ack_arb[0].buf1._y"- +~("e.e.x_ack_arb[0].buf1.a")->"e.e.x_ack_arb[0].buf1._y"+ +"e.e.x_ack_arb[0].buf1._y"->"e.e.x_ack_arb[0].buf1.y"- +~("e.e.x_ack_arb[0].buf1._y")->"e.e.x_ack_arb[0].buf1.y"+ += "e.e.x_ack_arb[0].supply.vdd" "e.e.x_ack_arb[0].buf1.vdd" += "e.e.x_ack_arb[0].supply.vss" "e.e.x_ack_arb[0].buf1.vss" += "e.e.x_ack_arb[0].out" "e.e.x_ack_arb[0].buf1.y" += "e.e.x_ack_arb[0].in" "e.e.x_ack_arb[0].buf1.a" +"e.e.x_ack_arb[1].buf1.a"->"e.e.x_ack_arb[1].buf1._y"- +~("e.e.x_ack_arb[1].buf1.a")->"e.e.x_ack_arb[1].buf1._y"+ +"e.e.x_ack_arb[1].buf1._y"->"e.e.x_ack_arb[1].buf1.y"- +~("e.e.x_ack_arb[1].buf1._y")->"e.e.x_ack_arb[1].buf1.y"+ += "e.e.x_ack_arb[1].supply.vdd" "e.e.x_ack_arb[1].buf1.vdd" += "e.e.x_ack_arb[1].supply.vss" "e.e.x_ack_arb[1].buf1.vss" += "e.e.x_ack_arb[1].out" "e.e.x_ack_arb[1].buf1.y" += "e.e.x_ack_arb[1].in" "e.e.x_ack_arb[1].buf1.a" += "e.e._x_v_B" "e.e.x_ack.p2" += "e.e._x_v_B" "e.e.not_x_req_ortree.y" +"e.e.x_req_ortree.or2s[0].a"|"e.e.x_req_ortree.or2s[0].b"->"e.e.x_req_ortree.or2s[0]._y"- +~("e.e.x_req_ortree.or2s[0].a"|"e.e.x_req_ortree.or2s[0].b")->"e.e.x_req_ortree.or2s[0]._y"+ +"e.e.x_req_ortree.or2s[0]._y"->"e.e.x_req_ortree.or2s[0].y"- +~("e.e.x_req_ortree.or2s[0]._y")->"e.e.x_req_ortree.or2s[0].y"+ += "e.e.x_req_ortree.supply.vdd" "e.e.x_req_ortree.or2s[0].vdd" += "e.e.x_req_ortree.supply.vss" "e.e.x_req_ortree.or2s[0].vss" += "e.e.x_req_ortree.in[0]" "e.e.x_req_ortree.or2s[0].a" += "e.e.x_req_ortree.in[0]" "e.e.x_req_ortree.tmp[0]" += "e.e.x_req_ortree.in[1]" "e.e.x_req_ortree.or2s[0].b" += "e.e.x_req_ortree.in[1]" "e.e.x_req_ortree.tmp[1]" += "e.e.x_req_ortree.out" "e.e.x_req_ortree.or2s[0].y" += "e.e.x_req_ortree.out" "e.e.x_req_ortree.tmp[2]" += "e.e._arb_out_y.d.d[0]" "e.e._arb_out_y.r" += "e.e._arb_out_y.r" "e.e.Yarb.out.r" += "e.e._arb_out_y.a" "e.e.Yarb.out.a" += "e.e._arb_out_y.d.d[0]" "e.e.Yarb.out.d.d[0]" += "e.e._arb_out_y.a" "e.e.Y_ack_confirm.y" += "e.e._reset_BX" "e.e.x_ack.sr_B" += "e.e._reset_BX" "e.e.x_ack.pr_B" += "e.e._reset_BX" "e.e.X_ack_confirm.sr_B" += "e.e._reset_BX" "e.e.X_ack_confirm.pr_B" += "e.e._reset_BX" "e.e.Y_ack_confirm.reset_B" += "e.e._reset_BX" "e.e.reset_bufarray.in" += "e.e._reset_BX" "e.e.reset_buf.y" += "e.e.reset_B" "e.e.buf_s_func.reset_B" += "e.e.reset_B" "e.e.reset_buf.a" +"e.e.not_x_ack.a"->"e.e.not_x_ack.y"- +~("e.e.not_x_ack.a")->"e.e.not_x_ack.y"+ += "e.e._reset_BXX[0]" "e.e.reset_bufarray.out[0]" += "e.e._reset_BXX[1]" "e.e.reset_bufarray.out[1]" += "e.e._reset_BXX[2]" "e.e.reset_bufarray.out[2]" += "e.e._reset_BXX[3]" "e.e.reset_bufarray.out[3]" += "e.e._reset_BXX[0]" "e.e._reset_BXX[3]" += "e.e._reset_BXX[0]" "e.e._reset_BXX[2]" += "e.e._reset_BXX[0]" "e.e._reset_BXX[1]" += "e.e._x_v" "e.e.x_ack.p5" += "e.e._x_v" "e.e.not_x_req_ortree.a" += "e.e._x_v" "e.e.x_req_ortree.out" += "e.e._x_v" "e.e.Y_ack_confirm.p1" +"e.e.vtree_x.ct.b.a"->"e.e.vtree_x.ct.b._y"- +~("e.e.vtree_x.ct.b.a")->"e.e.vtree_x.ct.b._y"+ +"e.e.vtree_x.ct.b._y"->"e.e.vtree_x.ct.b.y"- +~("e.e.vtree_x.ct.b._y")->"e.e.vtree_x.ct.b.y"+ += "e.e.vtree_x.ct.supply.vdd" "e.e.vtree_x.ct.b.vdd" += "e.e.vtree_x.ct.supply.vss" "e.e.vtree_x.ct.b.vss" += "e.e.vtree_x.ct.out" "e.e.vtree_x.ct.b.y" += "e.e.vtree_x.ct.in[0]" "e.e.vtree_x.ct.b.a" += "e.e.vtree_x.ct.in[0]" "e.e.vtree_x.OR2_tf[0].y" +"e.e.vtree_x.OR2_tf[0].a"|"e.e.vtree_x.OR2_tf[0].b"->"e.e.vtree_x.OR2_tf[0]._y"- +~("e.e.vtree_x.OR2_tf[0].a"|"e.e.vtree_x.OR2_tf[0].b")->"e.e.vtree_x.OR2_tf[0]._y"+ +"e.e.vtree_x.OR2_tf[0]._y"->"e.e.vtree_x.OR2_tf[0].y"- +~("e.e.vtree_x.OR2_tf[0]._y")->"e.e.vtree_x.OR2_tf[0].y"+ += "e.e.vtree_x.supply.vss" "e.e.vtree_x.ct.supply.vss" += "e.e.vtree_x.supply.vdd" "e.e.vtree_x.ct.supply.vdd" += "e.e.vtree_x.supply.vdd" "e.e.vtree_x.OR2_tf[0].vdd" += "e.e.vtree_x.supply.vss" "e.e.vtree_x.OR2_tf[0].vss" += "e.e.vtree_x.out" "e.e.vtree_x.ct.out" += "e.e.vtree_x.in.d[0].d[0]" "e.e.vtree_x.in.d[0].f" += "e.e.vtree_x.in.d[0].d[1]" "e.e.vtree_x.in.d[0].t" += "e.e.vtree_x.in.d[0].d[0]" "e.e.vtree_x.in.d[0].f" += "e.e.vtree_x.in.d[0].d[1]" "e.e.vtree_x.in.d[0].t" += "e.e.vtree_x.in.d[0].d[0]" "e.e.vtree_x.OR2_tf[0].b" += "e.e.vtree_x.in.d[0].d[0]" "e.e.vtree_x.in.d[0].f" += "e.e.vtree_x.in.d[0].d[1]" "e.e.vtree_x.OR2_tf[0].a" += "e.e.vtree_x.in.d[0].d[1]" "e.e.vtree_x.in.d[0].t" += "e.e.y_acks[0]" "e.e.y_encoder.in[0]" += "e.e.y_acks[1]" "e.e.y_encoder.in[1]" +~"e.e.x_ack.p1"&~"e.e.x_ack.p2"&~"e.e.x_ack.p3"&~"e.e.x_ack.c1"|~"e.e.x_ack.p4"&~"e.e.x_ack.p5"&~"e.e.x_ack.c1"|~"e.e.x_ack.pr_B"->"e.e.x_ack.y"+ +"e.e.x_ack.c1"&"e.e.x_ack.n1"&"e.e.x_ack.n2"&"e.e.x_ack.sr_B"->"e.e.x_ack.y"- +"e.e.buf_s_func.out_a_B_buf_t.buf1.a"->"e.e.buf_s_func.out_a_B_buf_t.buf1._y"- +~("e.e.buf_s_func.out_a_B_buf_t.buf1.a")->"e.e.buf_s_func.out_a_B_buf_t.buf1._y"+ +"e.e.buf_s_func.out_a_B_buf_t.buf1._y"->"e.e.buf_s_func.out_a_B_buf_t.buf1.y"- +~("e.e.buf_s_func.out_a_B_buf_t.buf1._y")->"e.e.buf_s_func.out_a_B_buf_t.buf1.y"+ += "e.e.buf_s_func.out_a_B_buf_t.supply.vdd" "e.e.buf_s_func.out_a_B_buf_t.buf1.vdd" += "e.e.buf_s_func.out_a_B_buf_t.supply.vss" "e.e.buf_s_func.out_a_B_buf_t.buf1.vss" += "e.e.buf_s_func.out_a_B_buf_t.out[0]" "e.e.buf_s_func.out_a_B_buf_t.out[1]" += "e.e.buf_s_func.out_a_B_buf_t.out[0]" "e.e.buf_s_func.out_a_B_buf_t.buf1.y" += "e.e.buf_s_func.out_a_B_buf_t.in" "e.e.buf_s_func.out_a_B_buf_t.buf1.a" +"e.e.buf_s_func.reset_bufarray.buf1.a"->"e.e.buf_s_func.reset_bufarray.buf1._y"- +~("e.e.buf_s_func.reset_bufarray.buf1.a")->"e.e.buf_s_func.reset_bufarray.buf1._y"+ +"e.e.buf_s_func.reset_bufarray.buf1._y"->"e.e.buf_s_func.reset_bufarray.buf1.y"- +~("e.e.buf_s_func.reset_bufarray.buf1._y")->"e.e.buf_s_func.reset_bufarray.buf1.y"+ += "e.e.buf_s_func.reset_bufarray.supply.vdd" "e.e.buf_s_func.reset_bufarray.buf1.vdd" += "e.e.buf_s_func.reset_bufarray.supply.vss" "e.e.buf_s_func.reset_bufarray.buf1.vss" += "e.e.buf_s_func.reset_bufarray.out[0]" "e.e.buf_s_func.reset_bufarray.out[1]" += "e.e.buf_s_func.reset_bufarray.out[0]" "e.e.buf_s_func.reset_bufarray.buf1.y" += "e.e.buf_s_func.reset_bufarray.in" "e.e.buf_s_func.reset_bufarray.buf1.a" += "e.e.buf_s_func._en_X_f[0]" "e.e.buf_s_func.en_buf_f.out[0]" += "e.e.buf_s_func._en_X_f[1]" "e.e.buf_s_func.en_buf_f.out[1]" += "e.e.buf_s_func._en_X_f[0]" "e.e.buf_s_func.f_buf_func[1].c1" += "e.e.buf_s_func._en_X_f[0]" "e.e.buf_s_func.f_buf_func[0].c1" += "e.e.buf_s_func._en_X_f[0]" "e.e.buf_s_func._en_X_f[1]" +"e.e.buf_s_func.out_a_inv.a"->"e.e.buf_s_func.out_a_inv.y"- +~("e.e.buf_s_func.out_a_inv.a")->"e.e.buf_s_func.out_a_inv.y"+ += "e.e.buf_s_func._out_a_BX_f[0]" "e.e.buf_s_func.out_a_B_buf_t.out[0]" += "e.e.buf_s_func._out_a_BX_f[1]" "e.e.buf_s_func.out_a_B_buf_t.out[1]" += "e.e.buf_s_func._out_a_BX_f[0]" "e.e.buf_s_func.f_buf_func[1].c2" += "e.e.buf_s_func._out_a_BX_f[0]" "e.e.buf_s_func.f_buf_func[0].c2" += "e.e.buf_s_func._out_a_BX_f[0]" "e.e.buf_s_func._out_a_BX_f[1]" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.in_v_buf_f.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.in_v_buf_f.supply.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.in_v_buf_t.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.in_v_buf_t.supply.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.out_a_B_buf_t.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.out_a_B_buf_t.supply.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.out_a_B_buf_f.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.out_a_B_buf_f.supply.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.en_buf_f.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.en_buf_f.supply.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.en_buf_t.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.en_buf_t.supply.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.reset_bufarray.supply.vss" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.reset_bufarray.supply.vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.t_buf_func[1].vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.f_buf_func[1].vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.t_buf_func[0].vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.f_buf_func[0].vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.in_v_prebuf.vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.out_a_inv.vdd" += "e.e.buf_s_func.supply.vdd" "e.e.buf_s_func.reset_buf.vdd" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.t_buf_func[1].vss" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.f_buf_func[1].vss" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.t_buf_func[0].vss" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.f_buf_func[0].vss" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.in_v_prebuf.vss" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.out_a_inv.vss" += "e.e.buf_s_func.supply.vss" "e.e.buf_s_func.reset_buf.vss" +"e.e.buf_s_func.in_v_prebuf.a"->"e.e.buf_s_func.in_v_prebuf._y"- +~("e.e.buf_s_func.in_v_prebuf.a")->"e.e.buf_s_func.in_v_prebuf._y"+ +"e.e.buf_s_func.in_v_prebuf._y"->"e.e.buf_s_func.in_v_prebuf.y"- +~("e.e.buf_s_func.in_v_prebuf._y")->"e.e.buf_s_func.in_v_prebuf.y"+ +"e.e.buf_s_func.out_a_B_buf_f.buf1.a"->"e.e.buf_s_func.out_a_B_buf_f.buf1._y"- +~("e.e.buf_s_func.out_a_B_buf_f.buf1.a")->"e.e.buf_s_func.out_a_B_buf_f.buf1._y"+ +"e.e.buf_s_func.out_a_B_buf_f.buf1._y"->"e.e.buf_s_func.out_a_B_buf_f.buf1.y"- +~("e.e.buf_s_func.out_a_B_buf_f.buf1._y")->"e.e.buf_s_func.out_a_B_buf_f.buf1.y"+ += "e.e.buf_s_func.out_a_B_buf_f.supply.vdd" "e.e.buf_s_func.out_a_B_buf_f.buf1.vdd" += "e.e.buf_s_func.out_a_B_buf_f.supply.vss" "e.e.buf_s_func.out_a_B_buf_f.buf1.vss" += "e.e.buf_s_func.out_a_B_buf_f.out[0]" "e.e.buf_s_func.out_a_B_buf_f.out[1]" += "e.e.buf_s_func.out_a_B_buf_f.out[0]" "e.e.buf_s_func.out_a_B_buf_f.buf1.y" += "e.e.buf_s_func.out_a_B_buf_f.in" "e.e.buf_s_func.out_a_B_buf_f.buf1.a" += "e.e.buf_s_func.in_v" "e.e.buf_s_func.in_v_prebuf.a" += "e.e.buf_s_func.out.d.d[0].d[0]" "e.e.buf_s_func.out.d.d[0].f" += "e.e.buf_s_func.out.d.d[0].d[1]" "e.e.buf_s_func.out.d.d[0].t" += "e.e.buf_s_func.out.d.d[1].d[0]" "e.e.buf_s_func.out.d.d[1].f" += "e.e.buf_s_func.out.d.d[1].d[1]" "e.e.buf_s_func.out.d.d[1].t" += "e.e.buf_s_func.out.d.d[1].d[0]" "e.e.buf_s_func.out.d.d[1].f" += "e.e.buf_s_func.out.d.d[1].d[1]" "e.e.buf_s_func.out.d.d[1].t" += "e.e.buf_s_func.out.d.d[0].d[0]" "e.e.buf_s_func.out.d.d[0].f" += "e.e.buf_s_func.out.d.d[0].d[1]" "e.e.buf_s_func.out.d.d[0].t" += "e.e.buf_s_func.out.d.d[1].d[0]" "e.e.buf_s_func.out.d.d[1].f" += "e.e.buf_s_func.out.d.d[1].d[1]" "e.e.buf_s_func.out.d.d[1].t" += "e.e.buf_s_func.out.d.d[0].d[0]" "e.e.buf_s_func.out.d.d[0].f" += "e.e.buf_s_func.out.d.d[0].d[1]" "e.e.buf_s_func.out.d.d[0].t" += "e.e.buf_s_func.out.a" "e.e.buf_s_func.out_a_inv.a" += "e.e.buf_s_func.out.d.d[1].d[0]" "e.e.buf_s_func.f_buf_func[1].y" += "e.e.buf_s_func.out.d.d[1].d[0]" "e.e.buf_s_func.out.d.d[1].f" += "e.e.buf_s_func.out.d.d[1].d[1]" "e.e.buf_s_func.t_buf_func[1].y" += "e.e.buf_s_func.out.d.d[1].d[1]" "e.e.buf_s_func.out.d.d[1].t" += "e.e.buf_s_func.out.d.d[0].d[0]" "e.e.buf_s_func.f_buf_func[0].y" += "e.e.buf_s_func.out.d.d[0].d[0]" "e.e.buf_s_func.out.d.d[0].f" += "e.e.buf_s_func.out.d.d[0].d[1]" "e.e.buf_s_func.t_buf_func[0].y" += "e.e.buf_s_func.out.d.d[0].d[1]" "e.e.buf_s_func.out.d.d[0].t" += "e.e.buf_s_func.in.d[0].d[0]" "e.e.buf_s_func.in.d[0].f" += "e.e.buf_s_func.in.d[0].d[1]" "e.e.buf_s_func.in.d[0].t" += "e.e.buf_s_func.in.d[1].d[0]" "e.e.buf_s_func.in.d[1].f" += "e.e.buf_s_func.in.d[1].d[1]" "e.e.buf_s_func.in.d[1].t" += "e.e.buf_s_func.in.d[1].d[0]" "e.e.buf_s_func.in.d[1].f" += "e.e.buf_s_func.in.d[1].d[1]" "e.e.buf_s_func.in.d[1].t" += "e.e.buf_s_func.in.d[0].d[0]" "e.e.buf_s_func.in.d[0].f" += "e.e.buf_s_func.in.d[0].d[1]" "e.e.buf_s_func.in.d[0].t" += "e.e.buf_s_func.in.d[1].d[0]" "e.e.buf_s_func.f_buf_func[1].n1" += "e.e.buf_s_func.in.d[1].d[0]" "e.e.buf_s_func.in.d[1].f" += "e.e.buf_s_func.in.d[1].d[1]" "e.e.buf_s_func.t_buf_func[1].n1" += "e.e.buf_s_func.in.d[1].d[1]" "e.e.buf_s_func.in.d[1].t" += "e.e.buf_s_func.in.d[0].d[0]" "e.e.buf_s_func.f_buf_func[0].n1" += "e.e.buf_s_func.in.d[0].d[0]" "e.e.buf_s_func.in.d[0].f" += "e.e.buf_s_func.in.d[0].d[1]" "e.e.buf_s_func.t_buf_func[0].n1" += "e.e.buf_s_func.in.d[0].d[1]" "e.e.buf_s_func.in.d[0].t" +"e.e.buf_s_func.in_v_buf_f.buf1.a"->"e.e.buf_s_func.in_v_buf_f.buf1._y"- +~("e.e.buf_s_func.in_v_buf_f.buf1.a")->"e.e.buf_s_func.in_v_buf_f.buf1._y"+ +"e.e.buf_s_func.in_v_buf_f.buf1._y"->"e.e.buf_s_func.in_v_buf_f.buf1.y"- +~("e.e.buf_s_func.in_v_buf_f.buf1._y")->"e.e.buf_s_func.in_v_buf_f.buf1.y"+ += "e.e.buf_s_func.in_v_buf_f.supply.vdd" "e.e.buf_s_func.in_v_buf_f.buf1.vdd" += "e.e.buf_s_func.in_v_buf_f.supply.vss" "e.e.buf_s_func.in_v_buf_f.buf1.vss" += "e.e.buf_s_func.in_v_buf_f.out[0]" "e.e.buf_s_func.in_v_buf_f.out[1]" += "e.e.buf_s_func.in_v_buf_f.out[0]" "e.e.buf_s_func.in_v_buf_f.buf1.y" += "e.e.buf_s_func.in_v_buf_f.in" "e.e.buf_s_func.in_v_buf_f.buf1.a" +"e.e.buf_s_func.reset_buf.a"->"e.e.buf_s_func.reset_buf._y"- +~("e.e.buf_s_func.reset_buf.a")->"e.e.buf_s_func.reset_buf._y"+ +"e.e.buf_s_func.reset_buf._y"->"e.e.buf_s_func.reset_buf.y"- +~("e.e.buf_s_func.reset_buf._y")->"e.e.buf_s_func.reset_buf.y"+ += "e.e.buf_s_func.en" "e.e.buf_s_func.en_buf_f.in" += "e.e.buf_s_func.en" "e.e.buf_s_func.en_buf_t.in" +"e.e.buf_s_func.in_v_buf_t.buf1.a"->"e.e.buf_s_func.in_v_buf_t.buf1._y"- +~("e.e.buf_s_func.in_v_buf_t.buf1.a")->"e.e.buf_s_func.in_v_buf_t.buf1._y"+ +"e.e.buf_s_func.in_v_buf_t.buf1._y"->"e.e.buf_s_func.in_v_buf_t.buf1.y"- +~("e.e.buf_s_func.in_v_buf_t.buf1._y")->"e.e.buf_s_func.in_v_buf_t.buf1.y"+ += "e.e.buf_s_func.in_v_buf_t.supply.vdd" "e.e.buf_s_func.in_v_buf_t.buf1.vdd" += "e.e.buf_s_func.in_v_buf_t.supply.vss" "e.e.buf_s_func.in_v_buf_t.buf1.vss" += "e.e.buf_s_func.in_v_buf_t.out[0]" "e.e.buf_s_func.in_v_buf_t.out[1]" += "e.e.buf_s_func.in_v_buf_t.out[0]" "e.e.buf_s_func.in_v_buf_t.buf1.y" += "e.e.buf_s_func.in_v_buf_t.in" "e.e.buf_s_func.in_v_buf_t.buf1.a" += "e.e.buf_s_func._reset_BX" "e.e.buf_s_func.reset_bufarray.in" += "e.e.buf_s_func._reset_BX" "e.e.buf_s_func.reset_buf.y" += "e.e.buf_s_func._out_a_BX_t[0]" "e.e.buf_s_func.out_a_B_buf_f.out[0]" += "e.e.buf_s_func._out_a_BX_t[1]" "e.e.buf_s_func.out_a_B_buf_f.out[1]" += "e.e.buf_s_func._out_a_BX_t[0]" "e.e.buf_s_func.t_buf_func[1].c2" += "e.e.buf_s_func._out_a_BX_t[0]" "e.e.buf_s_func.t_buf_func[0].c2" += "e.e.buf_s_func._out_a_BX_t[0]" "e.e.buf_s_func._out_a_BX_t[1]" += "e.e.buf_s_func.reset_B" "e.e.buf_s_func.reset_buf.a" +"e.e.buf_s_func.en_buf_f.buf1.a"->"e.e.buf_s_func.en_buf_f.buf1._y"- +~("e.e.buf_s_func.en_buf_f.buf1.a")->"e.e.buf_s_func.en_buf_f.buf1._y"+ +"e.e.buf_s_func.en_buf_f.buf1._y"->"e.e.buf_s_func.en_buf_f.buf1.y"- +~("e.e.buf_s_func.en_buf_f.buf1._y")->"e.e.buf_s_func.en_buf_f.buf1.y"+ += "e.e.buf_s_func.en_buf_f.supply.vdd" "e.e.buf_s_func.en_buf_f.buf1.vdd" += "e.e.buf_s_func.en_buf_f.supply.vss" "e.e.buf_s_func.en_buf_f.buf1.vss" += "e.e.buf_s_func.en_buf_f.out[0]" "e.e.buf_s_func.en_buf_f.out[1]" += "e.e.buf_s_func.en_buf_f.out[0]" "e.e.buf_s_func.en_buf_f.buf1.y" += "e.e.buf_s_func.en_buf_f.in" "e.e.buf_s_func.en_buf_f.buf1.a" +"e.e.buf_s_func.en_buf_t.buf1.a"->"e.e.buf_s_func.en_buf_t.buf1._y"- +~("e.e.buf_s_func.en_buf_t.buf1.a")->"e.e.buf_s_func.en_buf_t.buf1._y"+ +"e.e.buf_s_func.en_buf_t.buf1._y"->"e.e.buf_s_func.en_buf_t.buf1.y"- +~("e.e.buf_s_func.en_buf_t.buf1._y")->"e.e.buf_s_func.en_buf_t.buf1.y"+ += "e.e.buf_s_func.en_buf_t.supply.vdd" "e.e.buf_s_func.en_buf_t.buf1.vdd" += "e.e.buf_s_func.en_buf_t.supply.vss" "e.e.buf_s_func.en_buf_t.buf1.vss" += "e.e.buf_s_func.en_buf_t.out[0]" "e.e.buf_s_func.en_buf_t.out[1]" += "e.e.buf_s_func.en_buf_t.out[0]" "e.e.buf_s_func.en_buf_t.buf1.y" += "e.e.buf_s_func.en_buf_t.in" "e.e.buf_s_func.en_buf_t.buf1.a" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.reset_bufarray.out[0]" += "e.e.buf_s_func._reset_BXX[1]" "e.e.buf_s_func.reset_bufarray.out[1]" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.f_buf_func[1].sr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.f_buf_func[1].pr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.t_buf_func[1].sr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.t_buf_func[1].pr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.f_buf_func[0].sr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.f_buf_func[0].pr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.t_buf_func[0].sr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func.t_buf_func[0].pr_B" += "e.e.buf_s_func._reset_BXX[0]" "e.e.buf_s_func._reset_BXX[1]" += "e.e.buf_s_func._out_a_B" "e.e.buf_s_func.out_a_B_buf_t.in" += "e.e.buf_s_func._out_a_B" "e.e.buf_s_func.out_a_B_buf_f.in" += "e.e.buf_s_func._out_a_B" "e.e.buf_s_func.out_a_inv.y" += "e.e.buf_s_func._in_vX" "e.e.buf_s_func.in_v_buf_f.in" += "e.e.buf_s_func._in_vX" "e.e.buf_s_func.in_v_buf_t.in" += "e.e.buf_s_func._in_vX" "e.e.buf_s_func.in_v_prebuf.y" += "e.e.buf_s_func._in_vXX_t[0]" "e.e.buf_s_func.in_v_buf_t.out[0]" += "e.e.buf_s_func._in_vXX_t[1]" "e.e.buf_s_func.in_v_buf_t.out[1]" += "e.e.buf_s_func._in_vXX_t[0]" "e.e.buf_s_func.t_buf_func[1].n2" += "e.e.buf_s_func._in_vXX_t[0]" "e.e.buf_s_func.t_buf_func[0].n2" += "e.e.buf_s_func._in_vXX_t[0]" "e.e.buf_s_func._in_vXX_t[1]" += "e.e.buf_s_func._in_vXX_f[0]" "e.e.buf_s_func.in_v_buf_f.out[0]" += "e.e.buf_s_func._in_vXX_f[1]" "e.e.buf_s_func.in_v_buf_f.out[1]" += "e.e.buf_s_func._in_vXX_f[0]" "e.e.buf_s_func.f_buf_func[1].n2" += "e.e.buf_s_func._in_vXX_f[0]" "e.e.buf_s_func.f_buf_func[0].n2" += "e.e.buf_s_func._in_vXX_f[0]" "e.e.buf_s_func._in_vXX_f[1]" += "e.e.buf_s_func._en_X_t[0]" "e.e.buf_s_func.en_buf_t.out[0]" += "e.e.buf_s_func._en_X_t[1]" "e.e.buf_s_func.en_buf_t.out[1]" += "e.e.buf_s_func._en_X_t[0]" "e.e.buf_s_func.t_buf_func[1].c1" += "e.e.buf_s_func._en_X_t[0]" "e.e.buf_s_func.t_buf_func[0].c1" += "e.e.buf_s_func._en_X_t[0]" "e.e.buf_s_func._en_X_t[1]" +~"e.e.buf_s_func.f_buf_func[0].c1"&~"e.e.buf_s_func.f_buf_func[0].c2"|~"e.e.buf_s_func.f_buf_func[0].pr_B"->"e.e.buf_s_func.f_buf_func[0]._y"+ +"e.e.buf_s_func.f_buf_func[0].c1"&"e.e.buf_s_func.f_buf_func[0].c2"&"e.e.buf_s_func.f_buf_func[0].n1"&"e.e.buf_s_func.f_buf_func[0].n2"&"e.e.buf_s_func.f_buf_func[0].sr_B"->"e.e.buf_s_func.f_buf_func[0]._y"- +"e.e.buf_s_func.f_buf_func[0]._y"->"e.e.buf_s_func.f_buf_func[0].y"- +~("e.e.buf_s_func.f_buf_func[0]._y")->"e.e.buf_s_func.f_buf_func[0].y"+ +~"e.e.buf_s_func.f_buf_func[1].c1"&~"e.e.buf_s_func.f_buf_func[1].c2"|~"e.e.buf_s_func.f_buf_func[1].pr_B"->"e.e.buf_s_func.f_buf_func[1]._y"+ +"e.e.buf_s_func.f_buf_func[1].c1"&"e.e.buf_s_func.f_buf_func[1].c2"&"e.e.buf_s_func.f_buf_func[1].n1"&"e.e.buf_s_func.f_buf_func[1].n2"&"e.e.buf_s_func.f_buf_func[1].sr_B"->"e.e.buf_s_func.f_buf_func[1]._y"- +"e.e.buf_s_func.f_buf_func[1]._y"->"e.e.buf_s_func.f_buf_func[1].y"- +~("e.e.buf_s_func.f_buf_func[1]._y")->"e.e.buf_s_func.f_buf_func[1].y"+ +~"e.e.buf_s_func.t_buf_func[0].c1"&~"e.e.buf_s_func.t_buf_func[0].c2"|~"e.e.buf_s_func.t_buf_func[0].pr_B"->"e.e.buf_s_func.t_buf_func[0]._y"+ +"e.e.buf_s_func.t_buf_func[0].c1"&"e.e.buf_s_func.t_buf_func[0].c2"&"e.e.buf_s_func.t_buf_func[0].n1"&"e.e.buf_s_func.t_buf_func[0].n2"&"e.e.buf_s_func.t_buf_func[0].sr_B"->"e.e.buf_s_func.t_buf_func[0]._y"- +"e.e.buf_s_func.t_buf_func[0]._y"->"e.e.buf_s_func.t_buf_func[0].y"- +~("e.e.buf_s_func.t_buf_func[0]._y")->"e.e.buf_s_func.t_buf_func[0].y"+ +~"e.e.buf_s_func.t_buf_func[1].c1"&~"e.e.buf_s_func.t_buf_func[1].c2"|~"e.e.buf_s_func.t_buf_func[1].pr_B"->"e.e.buf_s_func.t_buf_func[1]._y"+ +"e.e.buf_s_func.t_buf_func[1].c1"&"e.e.buf_s_func.t_buf_func[1].c2"&"e.e.buf_s_func.t_buf_func[1].n1"&"e.e.buf_s_func.t_buf_func[1].n2"&"e.e.buf_s_func.t_buf_func[1].sr_B"->"e.e.buf_s_func.t_buf_func[1]._y"- +"e.e.buf_s_func.t_buf_func[1]._y"->"e.e.buf_s_func.t_buf_func[1].y"- +~("e.e.buf_s_func.t_buf_func[1]._y")->"e.e.buf_s_func.t_buf_func[1].y"+ += "e.e._in_x.d.d[0].d[0]" "e.e._in_x.d.d[0].f" += "e.e._in_x.d.d[0].d[1]" "e.e._in_x.d.d[0].t" += "e.e._in_x.d.d[1].d[0]" "e.e._in_x.d.d[1].f" += "e.e._in_x.d.d[1].d[1]" "e.e._in_x.d.d[1].t" += "e.e._in_x.d.d[1].d[0]" "e.e._in_x.d.d[1].f" += "e.e._in_x.d.d[1].d[1]" "e.e._in_x.d.d[1].t" += "e.e._in_x.d.d[0].d[0]" "e.e._in_x.d.d[0].f" += "e.e._in_x.d.d[0].d[1]" "e.e._in_x.d.d[0].t" += "e.e._in_x.d.d[1].d[0]" "e.e._in_x.d.d[1].f" += "e.e._in_x.d.d[1].d[1]" "e.e._in_x.d.d[1].t" += "e.e._in_x.d.d[0].d[0]" "e.e._in_x.d.d[0].f" += "e.e._in_x.d.d[0].d[1]" "e.e._in_x.d.d[0].t" += "e.e.supply.vss" "e.e.buf_s_func.supply.vss" += "e.e.supply.vdd" "e.e.buf_s_func.supply.vdd" += "e.e.supply.vss" "e.e.vtree_y.supply.vss" += "e.e.supply.vdd" "e.e.vtree_y.supply.vdd" += "e.e.supply.vss" "e.e.vtree_x.supply.vss" += "e.e.supply.vdd" "e.e.vtree_x.supply.vdd" += "e.e.supply.vss" "e.e.y_encoder.supply.vss" += "e.e.supply.vdd" "e.e.y_encoder.supply.vdd" += "e.e.supply.vss" "e.e.x_encoder.supply.vss" += "e.e.supply.vdd" "e.e.x_encoder.supply.vdd" += "e.e.supply.vss" "e.e.x_req_ortree.supply.vss" += "e.e.supply.vdd" "e.e.x_req_ortree.supply.vdd" += "e.e.supply.vss" "e.e.y_ack_arb[1].supply.vss" += "e.e.supply.vdd" "e.e.y_ack_arb[1].supply.vdd" += "e.e.supply.vss" "e.e.y_ack_arb[0].supply.vss" += "e.e.supply.vdd" "e.e.y_ack_arb[0].supply.vdd" += "e.e.supply.vss" "e.e.x_ack_arb[1].supply.vss" += "e.e.supply.vdd" "e.e.x_ack_arb[1].supply.vdd" += "e.e.supply.vss" "e.e.x_ack_arb[0].supply.vss" += "e.e.supply.vdd" "e.e.x_ack_arb[0].supply.vdd" += "e.e.supply.vss" "e.e.Yarb.supply.vss" += "e.e.supply.vdd" "e.e.Yarb.supply.vdd" += "e.e.supply.vss" "e.e.Xarb.supply.vss" += "e.e.supply.vdd" "e.e.Xarb.supply.vdd" += "e.e.supply.vss" "e.e.reset_bufarray.supply.vss" += "e.e.supply.vdd" "e.e.reset_bufarray.supply.vdd" += "e.e.supply.vdd" "e.e._in_xy_v.vdd" += "e.e.supply.vdd" "e.e.enabling.vdd" += "e.e.supply.vdd" "e.e.not_x_ack.vdd" += "e.e.supply.vdd" "e.e.x_ack.vdd" += "e.e.supply.vdd" "e.e.X_ack_confirm.vdd" += "e.e.supply.vdd" "e.e.Y_ack_confirm.vdd" += "e.e.supply.vdd" "e.e.reset_buf.vdd" += "e.e.supply.vss" "e.e._in_xy_v.vss" += "e.e.supply.vss" "e.e.enabling.vss" += "e.e.supply.vss" "e.e.not_x_ack.vss" += "e.e.supply.vss" "e.e.x_ack.vss" += "e.e.supply.vss" "e.e.X_ack_confirm.vss" += "e.e.supply.vss" "e.e.Y_ack_confirm.vss" += "e.e.supply.vss" "e.e.reset_buf.vss" += "e.e._in_x_v" "e.e._in_xy_v.a" += "e.e._in_x_v" "e.e.vtree_x.out" += "e.e._in_x_v" "e.e.x_ack.n2" += "e.e._in_x_v" "e.e.x_ack.p3" += "e.e._in_x_v" "e.e.x_ack.p1" += "e.e._in_x_v" "e.e.Y_ack_confirm.p2" += "e.e.out.d.d[0].d[0]" "e.e.out.d.d[0].f" += "e.e.out.d.d[0].d[1]" "e.e.out.d.d[0].t" += "e.e.out.d.d[1].d[0]" "e.e.out.d.d[1].f" += "e.e.out.d.d[1].d[1]" "e.e.out.d.d[1].t" += "e.e.out.d.d[1].d[0]" "e.e.out.d.d[1].f" += "e.e.out.d.d[1].d[1]" "e.e.out.d.d[1].t" += "e.e.out.d.d[0].d[0]" "e.e.out.d.d[0].f" += "e.e.out.d.d[0].d[1]" "e.e.out.d.d[0].t" += "e.e.out.d.d[1].d[0]" "e.e.out.d.d[1].f" += "e.e.out.d.d[1].d[1]" "e.e.out.d.d[1].t" += "e.e.out.d.d[0].d[0]" "e.e.out.d.d[0].f" += "e.e.out.d.d[0].d[1]" "e.e.out.d.d[0].t" += "e.e.out.v" "e.e.buf_s_func.out.v" += "e.e.out.a" "e.e.buf_s_func.out.a" += "e.e.out.d.d[0].f" "e.e.buf_s_func.out.d.d[0].f" += "e.e.out.d.d[0].t" "e.e.buf_s_func.out.d.d[0].t" += "e.e.out.d.d[0].d[0]" "e.e.buf_s_func.out.d.d[0].d[0]" += "e.e.out.d.d[0].d[1]" "e.e.buf_s_func.out.d.d[0].d[1]" += "e.e.out.d.d[1].f" "e.e.buf_s_func.out.d.d[1].f" += "e.e.out.d.d[1].t" "e.e.buf_s_func.out.d.d[1].t" += "e.e.out.d.d[1].d[0]" "e.e.buf_s_func.out.d.d[1].d[0]" += "e.e.out.d.d[1].d[1]" "e.e.buf_s_func.out.d.d[1].d[1]" += "e.e.out.a" "e.e.enabling.p1" += "e.e.out.v" "e.e.enabling.p2" += "e.e.out.v" "e.e.x_ack.n1" += "e.e.out.d.d[1].d[0]" "e.e.out.d.d[1].f" += "e.e.out.d.d[1].d[1]" "e.e.out.d.d[1].t" += "e.e.out.d.d[0].d[0]" "e.e.out.d.d[0].f" += "e.e.out.d.d[0].d[1]" "e.e.out.d.d[0].t" += "e.e.Yarb.arbs[0].in1.d.d[0]" "e.e.Yarb.arbs[0].in1.r" += "e.e.Yarb.arbs[0].in1.a" "e.e.Yarb.arbs[0].arbiter.d" += "e.e.Yarb.arbs[0].in1.a" "e.e.Yarb.arbs[0].ack_cell1.y" += "e.e.Yarb.arbs[0].in1.d.d[0]" "e.e.Yarb.arbs[0].arbiter.a" += "e.e.Yarb.arbs[0].in1.d.d[0]" "e.e.Yarb.arbs[0].in1.r" +~"e.e.Yarb.arbs[0].ack_cell1.c1"&~"e.e.Yarb.arbs[0].ack_cell1.c2"->"e.e.Yarb.arbs[0].ack_cell1._y"+ +"e.e.Yarb.arbs[0].ack_cell1.c1"&"e.e.Yarb.arbs[0].ack_cell1.c2"->"e.e.Yarb.arbs[0].ack_cell1._y"- +"e.e.Yarb.arbs[0].ack_cell1._y"->"e.e.Yarb.arbs[0].ack_cell1.y"- +~("e.e.Yarb.arbs[0].ack_cell1._y")->"e.e.Yarb.arbs[0].ack_cell1.y"+ += "e.e.Yarb.arbs[0].in2.d.d[0]" "e.e.Yarb.arbs[0].in2.r" += "e.e.Yarb.arbs[0].in2.a" "e.e.Yarb.arbs[0].arbiter.c" += "e.e.Yarb.arbs[0].in2.a" "e.e.Yarb.arbs[0].ack_cell2.y" += "e.e.Yarb.arbs[0].in2.d.d[0]" "e.e.Yarb.arbs[0].arbiter.b" += "e.e.Yarb.arbs[0].in2.d.d[0]" "e.e.Yarb.arbs[0].in2.r" += "e.e.Yarb.arbs[0].supply.vdd" "e.e.Yarb.arbs[0].arbiter.vdd" += "e.e.Yarb.arbs[0].supply.vdd" "e.e.Yarb.arbs[0].or_cell.vdd" += "e.e.Yarb.arbs[0].supply.vdd" "e.e.Yarb.arbs[0].ack_cell2.vdd" += "e.e.Yarb.arbs[0].supply.vdd" "e.e.Yarb.arbs[0].ack_cell1.vdd" += "e.e.Yarb.arbs[0].supply.vss" "e.e.Yarb.arbs[0].arbiter.vss" += "e.e.Yarb.arbs[0].supply.vss" "e.e.Yarb.arbs[0].or_cell.vss" += "e.e.Yarb.arbs[0].supply.vss" "e.e.Yarb.arbs[0].ack_cell2.vss" += "e.e.Yarb.arbs[0].supply.vss" "e.e.Yarb.arbs[0].ack_cell1.vss" +"e.e.Yarb.arbs[0].arbiter.a"&"e.e.Yarb.arbs[0].arbiter._y2"->"e.e.Yarb.arbs[0].arbiter._y1"- +~"e.e.Yarb.arbs[0].arbiter.a"|~"e.e.Yarb.arbs[0].arbiter._y2"->"e.e.Yarb.arbs[0].arbiter._y1"+ +"e.e.Yarb.arbs[0].arbiter.b"&"e.e.Yarb.arbs[0].arbiter._y1"->"e.e.Yarb.arbs[0].arbiter._y2"- +~"e.e.Yarb.arbs[0].arbiter.b"|~"e.e.Yarb.arbs[0].arbiter._y1"->"e.e.Yarb.arbs[0].arbiter._y2"+ +"e.e.Yarb.arbs[0].arbiter._y1"|"e.e.Yarb.arbs[0].arbiter.c"->"e.e.Yarb.arbs[0].arbiter.y1"- +~("e.e.Yarb.arbs[0].arbiter._y1"|"e.e.Yarb.arbs[0].arbiter.c")->"e.e.Yarb.arbs[0].arbiter.y1"+ +"e.e.Yarb.arbs[0].arbiter._y2"|"e.e.Yarb.arbs[0].arbiter.d"->"e.e.Yarb.arbs[0].arbiter.y2"- +~("e.e.Yarb.arbs[0].arbiter._y2"|"e.e.Yarb.arbs[0].arbiter.d")->"e.e.Yarb.arbs[0].arbiter.y2"+ +mk_excllo("e.e.Yarb.arbs[0].arbiter._y1","e.e.Yarb.arbs[0].arbiter._y2") += "e.e.Yarb.arbs[0]._y1_arb" "e.e.Yarb.arbs[0].arbiter.y1" += "e.e.Yarb.arbs[0]._y1_arb" "e.e.Yarb.arbs[0].or_cell.a" += "e.e.Yarb.arbs[0]._y1_arb" "e.e.Yarb.arbs[0].ack_cell1.c2" +~"e.e.Yarb.arbs[0].ack_cell2.c1"&~"e.e.Yarb.arbs[0].ack_cell2.c2"->"e.e.Yarb.arbs[0].ack_cell2._y"+ +"e.e.Yarb.arbs[0].ack_cell2.c1"&"e.e.Yarb.arbs[0].ack_cell2.c2"->"e.e.Yarb.arbs[0].ack_cell2._y"- +"e.e.Yarb.arbs[0].ack_cell2._y"->"e.e.Yarb.arbs[0].ack_cell2.y"- +~("e.e.Yarb.arbs[0].ack_cell2._y")->"e.e.Yarb.arbs[0].ack_cell2.y"+ +"e.e.Yarb.arbs[0].or_cell.a"|"e.e.Yarb.arbs[0].or_cell.b"->"e.e.Yarb.arbs[0].or_cell._y"- +~("e.e.Yarb.arbs[0].or_cell.a"|"e.e.Yarb.arbs[0].or_cell.b")->"e.e.Yarb.arbs[0].or_cell._y"+ +"e.e.Yarb.arbs[0].or_cell._y"->"e.e.Yarb.arbs[0].or_cell.y"- +~("e.e.Yarb.arbs[0].or_cell._y")->"e.e.Yarb.arbs[0].or_cell.y"+ += "e.e.Yarb.arbs[0].out.d.d[0]" "e.e.Yarb.arbs[0].out.r" += "e.e.Yarb.arbs[0].out.a" "e.e.Yarb.arbs[0].ack_cell2.c1" += "e.e.Yarb.arbs[0].out.a" "e.e.Yarb.arbs[0].ack_cell1.c1" += "e.e.Yarb.arbs[0].out.d.d[0]" "e.e.Yarb.arbs[0].or_cell.y" += "e.e.Yarb.arbs[0].out.d.d[0]" "e.e.Yarb.arbs[0].out.r" += "e.e.Yarb.arbs[0]._y2_arb" "e.e.Yarb.arbs[0].arbiter.y2" += "e.e.Yarb.arbs[0]._y2_arb" "e.e.Yarb.arbs[0].or_cell.b" += "e.e.Yarb.arbs[0]._y2_arb" "e.e.Yarb.arbs[0].ack_cell2.c2" += "e.e.Yarb.supply.vss" "e.e.Yarb.arbs[0].supply.vss" += "e.e.Yarb.supply.vdd" "e.e.Yarb.arbs[0].supply.vdd" += "e.e.Yarb.in[0].d.d[0]" "e.e.Yarb.in[0].r" += "e.e.Yarb.in[1].d.d[0]" "e.e.Yarb.in[1].r" += "e.e.Yarb.in[0].r" "e.e.Yarb.arbs[0].in1.r" += "e.e.Yarb.in[0].a" "e.e.Yarb.arbs[0].in1.a" += "e.e.Yarb.in[0].d.d[0]" "e.e.Yarb.arbs[0].in1.d.d[0]" += "e.e.Yarb.in[0].r" "e.e.Yarb.tmp[0].r" += "e.e.Yarb.in[0].a" "e.e.Yarb.tmp[0].a" += "e.e.Yarb.in[0].d.d[0]" "e.e.Yarb.tmp[0].d.d[0]" += "e.e.Yarb.in[1].r" "e.e.Yarb.arbs[0].in2.r" += "e.e.Yarb.in[1].a" "e.e.Yarb.arbs[0].in2.a" += "e.e.Yarb.in[1].d.d[0]" "e.e.Yarb.arbs[0].in2.d.d[0]" += "e.e.Yarb.in[1].r" "e.e.Yarb.tmp[1].r" += "e.e.Yarb.in[1].a" "e.e.Yarb.tmp[1].a" += "e.e.Yarb.in[1].d.d[0]" "e.e.Yarb.tmp[1].d.d[0]" += "e.e.Yarb.in[1].d.d[0]" "e.e.Yarb.in[1].r" += "e.e.Yarb.in[0].d.d[0]" "e.e.Yarb.in[0].r" += "e.e.Yarb.out.d.d[0]" "e.e.Yarb.out.r" += "e.e.Yarb.out.r" "e.e.Yarb.arbs[0].out.r" += "e.e.Yarb.out.a" "e.e.Yarb.arbs[0].out.a" += "e.e.Yarb.out.d.d[0]" "e.e.Yarb.arbs[0].out.d.d[0]" += "e.e.Yarb.out.r" "e.e.Yarb.tmp[2].r" += "e.e.Yarb.out.a" "e.e.Yarb.tmp[2].a" += "e.e.Yarb.out.d.d[0]" "e.e.Yarb.tmp[2].d.d[0]" += "e.e.Yarb.out.d.d[0]" "e.e.Yarb.out.r" += "e.e._x_req_array[0]" "e.e.x_req_ortree.in[0]" += "e.e._x_req_array[1]" "e.e.x_req_ortree.in[1]" +"e.e._in_xy_v.a"&"e.e._in_xy_v.b"->"e.e._in_xy_v._y"- +~("e.e._in_xy_v.a"&"e.e._in_xy_v.b")->"e.e._in_xy_v._y"+ +"e.e._in_xy_v._y"->"e.e._in_xy_v.y"- +~("e.e._in_xy_v._y")->"e.e._in_xy_v.y"+ += "e.e._in_xy_v.y" "e.e.buf_s_func.in_v" += "e.e._y_temp[0].d.d[0]" "e.e._y_temp[0].r" += "e.e._y_temp[1].d.d[0]" "e.e._y_temp[1].r" += "e.e._y_temp[0].r" "e.e.Yarb.in[0].r" += "e.e._y_temp[1].r" "e.e.Yarb.in[1].r" += "e.e._y_temp[0].a" "e.e.Yarb.in[0].a" += "e.e._y_temp[1].a" "e.e.Yarb.in[1].a" += "e.e._y_temp[0].d.d[0]" "e.e.Yarb.in[0].d.d[0]" += "e.e._y_temp[1].d.d[0]" "e.e.Yarb.in[1].d.d[0]" += "e.e._y_temp[1].a" "e.e.y_ack_arb[1].in" += "e.e._y_temp[0].a" "e.e.y_ack_arb[0].in" +~"e.e.Y_ack_confirm.p1"&~"e.e.Y_ack_confirm.p2"&~"e.e.Y_ack_confirm.c1"&~"e.e.Y_ack_confirm.c2"|~"e.e.Y_ack_confirm.reset_B"->"e.e.Y_ack_confirm._y"+ +"e.e.Y_ack_confirm.c1"&"e.e.Y_ack_confirm.c2"&"e.e.Y_ack_confirm.reset_B"->"e.e.Y_ack_confirm._y"- +"e.e.Y_ack_confirm._y"->"e.e.Y_ack_confirm.y"- +~("e.e.Y_ack_confirm._y")->"e.e.Y_ack_confirm.y"+ += "e.e.Y_ack_confirm.c1" "e.e._arb_out_y.r" += "e.e.Y_ack_confirm.c1" "e.e._arb_out_y.d.d[0]" += "e.e.y_enc_out.d[0].d[0]" "e.e.y_enc_out.d[0].f" += "e.e.y_enc_out.d[0].d[1]" "e.e.y_enc_out.d[0].t" += "e.e.y_enc_out.d[0].d[0]" "e.e.y_enc_out.d[0].f" += "e.e.y_enc_out.d[0].d[1]" "e.e.y_enc_out.d[0].t" += "e.e.y_enc_out.d[0].f" "e.e.vtree_y.in.d[0].f" += "e.e.y_enc_out.d[0].t" "e.e.vtree_y.in.d[0].t" += "e.e.y_enc_out.d[0].d[0]" "e.e.vtree_y.in.d[0].d[0]" += "e.e.y_enc_out.d[0].d[1]" "e.e.vtree_y.in.d[0].d[1]" += "e.e.y_enc_out.d[0].f" "e.e.y_encoder.out.d[0].f" += "e.e.y_enc_out.d[0].t" "e.e.y_encoder.out.d[0].t" += "e.e.y_enc_out.d[0].d[0]" "e.e.y_encoder.out.d[0].d[0]" += "e.e.y_enc_out.d[0].d[1]" "e.e.y_encoder.out.d[0].d[1]" += "e.e.y_enc_out.d[0].f" "e.e.into_buffer.d[1].f" += "e.e.y_enc_out.d[0].t" "e.e.into_buffer.d[1].t" += "e.e.y_enc_out.d[0].d[0]" "e.e.into_buffer.d[1].d[0]" += "e.e.y_enc_out.d[0].d[1]" "e.e.into_buffer.d[1].d[1]" += "e.e.y_enc_out.d[0].d[0]" "e.e.y_enc_out.d[0].f" += "e.e.y_enc_out.d[0].d[1]" "e.e.y_enc_out.d[0].t" += "e.e.x_acks[0]" "e.e.x_encoder.in[0]" += "e.e.x_acks[1]" "e.e.x_encoder.in[1]" +"e.e.not_x_req_ortree.a"->"e.e.not_x_req_ortree.y"- +~("e.e.not_x_req_ortree.a")->"e.e.not_x_req_ortree.y"+ += "e.e.y[0].d.d[0]" "e.e.y[0].r" += "e.e.y[1].d.d[0]" "e.e.y[1].r" += "e.e.y[1].a" "e.e.y_acks[1]" += "e.e.y[1].a" "e.e.y_ack_arb[1].out" += "e.e.y[1].d.d[0]" "e.e._y_temp[1].r" += "e.e.y[1].d.d[0]" "e.e._y_temp[1].d.d[0]" += "e.e.y[1].d.d[0]" "e.e.y[1].r" += "e.e.y[0].a" "e.e.y_acks[0]" += "e.e.y[0].a" "e.e.y_ack_arb[0].out" += "e.e.y[0].d.d[0]" "e.e._y_temp[0].r" += "e.e.y[0].d.d[0]" "e.e._y_temp[0].d.d[0]" += "e.e.y[0].d.d[0]" "e.e.y[0].r" += "e.e._x_a_B" "e.e.not_x_ack.a" += "e.e._x_a_B" "e.e.x_ack.y" += "e.e._x_a_B" "e.e.X_ack_confirm.c2" += "e.e._x_a_B" "e.e.Y_ack_confirm.c2" += "e.e._x_a" "e.e.enabling.c1" += "e.e._x_a" "e.e.not_x_ack.y" += "e.e.x_enc_out.d[0].d[0]" "e.e.x_enc_out.d[0].f" += "e.e.x_enc_out.d[0].d[1]" "e.e.x_enc_out.d[0].t" += "e.e.x_enc_out.d[0].d[0]" "e.e.x_enc_out.d[0].f" += "e.e.x_enc_out.d[0].d[1]" "e.e.x_enc_out.d[0].t" += "e.e.x_enc_out.d[0].f" "e.e.vtree_x.in.d[0].f" += "e.e.x_enc_out.d[0].t" "e.e.vtree_x.in.d[0].t" += "e.e.x_enc_out.d[0].d[0]" "e.e.vtree_x.in.d[0].d[0]" += "e.e.x_enc_out.d[0].d[1]" "e.e.vtree_x.in.d[0].d[1]" += "e.e.x_enc_out.d[0].f" "e.e.x_encoder.out.d[0].f" += "e.e.x_enc_out.d[0].t" "e.e.x_encoder.out.d[0].t" += "e.e.x_enc_out.d[0].d[0]" "e.e.x_encoder.out.d[0].d[0]" += "e.e.x_enc_out.d[0].d[1]" "e.e.x_encoder.out.d[0].d[1]" += "e.e.x_enc_out.d[0].f" "e.e.into_buffer.d[0].f" += "e.e.x_enc_out.d[0].t" "e.e.into_buffer.d[0].t" += "e.e.x_enc_out.d[0].d[0]" "e.e.into_buffer.d[0].d[0]" += "e.e.x_enc_out.d[0].d[1]" "e.e.into_buffer.d[0].d[1]" += "e.e.x_enc_out.d[0].d[0]" "e.e.x_enc_out.d[0].f" += "e.e.x_enc_out.d[0].d[1]" "e.e.x_enc_out.d[0].t" += "e.e._x_temp[0].d.d[0]" "e.e._x_temp[0].r" += "e.e._x_temp[1].d.d[0]" "e.e._x_temp[1].r" += "e.e._x_temp[0].r" "e.e.Xarb.in[0].r" += "e.e._x_temp[1].r" "e.e.Xarb.in[1].r" += "e.e._x_temp[0].a" "e.e.Xarb.in[0].a" += "e.e._x_temp[1].a" "e.e.Xarb.in[1].a" += "e.e._x_temp[0].d.d[0]" "e.e.Xarb.in[0].d.d[0]" += "e.e._x_temp[1].d.d[0]" "e.e.Xarb.in[1].d.d[0]" += "e.e._x_temp[1].a" "e.e.x_ack_arb[1].in" += "e.e._x_temp[0].a" "e.e.x_ack_arb[0].in" +~"e.e.X_ack_confirm.c1"&~"e.e.X_ack_confirm.c2"|~"e.e.X_ack_confirm.pr_B"->"e.e.X_ack_confirm._y"+ +"e.e.X_ack_confirm.c1"&"e.e.X_ack_confirm.c2"&"e.e.X_ack_confirm.sr_B"->"e.e.X_ack_confirm._y"- +"e.e.X_ack_confirm._y"->"e.e.X_ack_confirm.y"- +~("e.e.X_ack_confirm._y")->"e.e.X_ack_confirm.y"+ += "e.e.X_ack_confirm.c1" "e.e._arb_out_x.r" += "e.e.X_ack_confirm.c1" "e.e._arb_out_x.d.d[0]" += "Vdd" "e.e.supply.vdd" += "GND" "e.e.supply.vss" += "e.y[0].d.d[0]" "e.y[0].r" += "e.y[1].d.d[0]" "e.y[1].r" += "e.y[0].r" "e.e.y[0].r" += "e.y[1].r" "e.e.y[1].r" += "e.y[0].a" "e.e.y[0].a" += "e.y[1].a" "e.e.y[1].a" += "e.y[0].d.d[0]" "e.e.y[0].d.d[0]" += "e.y[1].d.d[0]" "e.e.y[1].d.d[0]" += "e.y[1].d.d[0]" "e.y[1].r" += "e.y[0].d.d[0]" "e.y[0].r" += "e.x[0].d.d[0]" "e.x[0].r" += "e.x[1].d.d[0]" "e.x[1].r" += "e.x[0].r" "e.e.x[0].r" += "e.x[1].r" "e.e.x[1].r" += "e.x[0].a" "e.e.x[0].a" += "e.x[1].a" "e.e.x[1].a" += "e.x[0].d.d[0]" "e.e.x[0].d.d[0]" += "e.x[1].d.d[0]" "e.e.x[1].d.d[0]" += "e.x[1].d.d[0]" "e.x[1].r" += "e.x[0].d.d[0]" "e.x[0].r" += "e.out.d.d[0].d[0]" "e.out.d.d[0].f" += "e.out.d.d[0].d[1]" "e.out.d.d[0].t" += "e.out.d.d[1].d[0]" "e.out.d.d[1].f" += "e.out.d.d[1].d[1]" "e.out.d.d[1].t" += "e.out.d.d[1].d[0]" "e.out.d.d[1].f" += "e.out.d.d[1].d[1]" "e.out.d.d[1].t" += "e.out.d.d[0].d[0]" "e.out.d.d[0].f" += "e.out.d.d[0].d[1]" "e.out.d.d[0].t" += "e.out.d.d[1].d[0]" "e.out.d.d[1].f" += "e.out.d.d[1].d[1]" "e.out.d.d[1].t" += "e.out.d.d[0].d[0]" "e.out.d.d[0].f" += "e.out.d.d[0].d[1]" "e.out.d.d[0].t" += "e.out.v" "e.e.out.v" += "e.out.a" "e.e.out.a" += "e.out.d.d[0].f" "e.e.out.d.d[0].f" += "e.out.d.d[0].t" "e.e.out.d.d[0].t" += "e.out.d.d[0].d[0]" "e.e.out.d.d[0].d[0]" += "e.out.d.d[0].d[1]" "e.e.out.d.d[0].d[1]" += "e.out.d.d[1].f" "e.e.out.d.d[1].f" += "e.out.d.d[1].t" "e.e.out.d.d[1].t" += "e.out.d.d[1].d[0]" "e.e.out.d.d[1].d[0]" += "e.out.d.d[1].d[1]" "e.e.out.d.d[1].d[1]" += "e.out.d.d[1].d[0]" "e.out.d.d[1].f" += "e.out.d.d[1].d[1]" "e.out.d.d[1].t" += "e.out.d.d[0].d[0]" "e.out.d.d[0].f" += "e.out.d.d[0].d[1]" "e.out.d.d[0].t" diff --git a/test/unit_tests/encoder2D_7/test.act b/test/unit_tests/encoder2D_7/test.act new file mode 100644 index 0000000..9d5a2b5 --- /dev/null +++ b/test/unit_tests/encoder2D_7/test.act @@ -0,0 +1,49 @@ +/************************************************************************* + * + * This file is part of ACT dataflow neuro library. + * It's the testing facility for cell_lib_std.act + * + * Copyright (c) 2022 University of Groningen - Ole Richter + * Copyright (c) 2022 University of Groningen - Hugh Greatorex + * Copyright (c) 2022 University of Groningen - Michele Mastella + * Copyright (c) 2022 University of Groningen - Madison Cotteret + * + * This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later + * + * You may redistribute and modify this documentation and make products + * using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl). + * This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED + * WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY + * AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2 + * for applicable conditions. + * + * Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro + * + * As per CERN-OHL-W v2 section 4.1, should You produce hardware based on + * these sources, You must maintain the Source Location visible in its + * documentation. + * + ************************************************************************** + */ + +import "../../dataflow_neuro/coders.act"; +import globals; +import std::data; + +open std::data; + +open tmpl::dataflow_neuro; + +defproc encoder2D_2x2 (a1of1 x[2]; a1of1 y[2]; avMx1of2<2> out){ + encoder2D<1, 1, 2, 2, 1> e(.x=x, .y=y, .out=out); + bool _reset_B; + prs { + Reset => _reset_B- + } + e.supply.vss = GND; + e.supply.vdd = Vdd; + e.reset_B = _reset_B; + +} + +encoder2D_2x2 e; \ No newline at end of file diff --git a/test/unit_tests/encoder2D_7/test.prsim b/test/unit_tests/encoder2D_7/test.prsim new file mode 100644 index 0000000..2ecdacf --- /dev/null +++ b/test/unit_tests/encoder2D_7/test.prsim @@ -0,0 +1,74 @@ +watchall + +cycle +set Reset 1 +cycle +set Reset 0 +cycle +set Reset 1 +cycle +set Reset 0 + +# mode run + +# assert e.e.Yarb.out.a 0 + + +system "echo '[] Setting output ack/val low'" + +set e.e.Yarb.out.a 0 +set e.e.Xarb.out.a 0 +cycle + +set e.out.a 0 +set e.out.v 0 + +set e.y[0].r 0 +set e.y[1].r 0 +set e.y[0].a 0 +set e.y[1].a 0 + +set e.x[0].r 0 +set e.x[1].r 0 +set e.x[0].a 0 +set e.x[1].a 0 +cycle + + +set e.y[0].r 1 +set e.y[1].r 1 +cycle + +set e.x[0].r 1 +set e.x[1].r 1 +cycle + + +# system "echo '[] Setting input low'" + + +# # set e.e.Yarb.arbs[0].arbiter._y1 0 +# # set e.e.Yarb.arbs[0].arbiter._y2 0 + + +# set e.y[0].r 0 +# set e.y[1].r 0 +# set e.y[0].a 0 +# set e.y[1].a 0 + +# set e.x[0].r 0 +# set e.x[1].r 0 +# set e.x[0].a 0 +# set e.x[1].a 0 + +# cycle + +# system "echo '[] Setting y[0,1] req high'" +# # assert e.e.Yarb.out.a 0 +# # assert e.e.Y_ack_confirm.y 0 + +# # set e.y[0].r 1 +# # set e.y[1].r 1 + +# cycle +