From c336e373774e8f5dcd0db21278a8bd3cd11ddd89 Mon Sep 17 00:00:00 2001
From: alexmadison <git@mdsn.co.uk>
Date: Tue, 21 Nov 2023 15:59:00 +0100
Subject: [PATCH] fixed unit tests

---
 test/unit_tests/registerA_w_array/test.act   |  4 +-
 test/unit_tests/registerA_w_array/test.prsim | 42 ++++++++++----------
 2 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/test/unit_tests/registerA_w_array/test.act b/test/unit_tests/registerA_w_array/test.act
index 44dd862..9231151 100644
--- a/test/unit_tests/registerA_w_array/test.act
+++ b/test/unit_tests/registerA_w_array/test.act
@@ -35,7 +35,7 @@ open std::data;
 
 open tmpl::dataflow_neuro;
 
-defproc registerA_w_array_3x5x8 (avMx1of2<3+5+1> in; Mx1of2<5> data[8]){
+defproc registerA_w_array_3x5x8 (avMx1of2<3+5> in; Mx1of2<5> data[8]){
     bool _reset_B; 
     prs {
         Reset => _reset_B-
@@ -46,7 +46,7 @@ defproc registerA_w_array_3x5x8 (avMx1of2<3+5+1> in; Mx1of2<5> data[8]){
 
     // Make a register array with 3 bit address (-> 8 registers), 
     // each register holding 5 bits.
-    registerA_w_array<3,5,8> b(.in = in, .data = data, .reset_B = _reset_B, .supply = supply);
+    register_w_array<3,5,8> b(.in = in, .data = data, .reset_B = _reset_B, .supply = supply);
 }
 
 
diff --git a/test/unit_tests/registerA_w_array/test.prsim b/test/unit_tests/registerA_w_array/test.prsim
index 0cf1f6b..af44f7e 100644
--- a/test/unit_tests/registerA_w_array/test.prsim
+++ b/test/unit_tests/registerA_w_array/test.prsim
@@ -1,6 +1,6 @@
 watchall
 
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 
 
@@ -13,42 +13,42 @@ assert b.in.a 0
 assert b.in.v 0
 
 system "echo '[] Sending packet write 0s to reg0'"
-set-qdi-channel-valid "b.in" 9 256
+set-qdi-channel-valid "b.in" 8 256
 cycle
 assert b.in.a 1
 assert b.in.v 1
 assert-var-int "b.data[0]" 5 0
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 assert-var-int "b.data[0]" 5 0
 
 system "echo '[] Sending packet write 0s to reg0'"
-set-qdi-channel-valid "b.in" 9 256
+set-qdi-channel-valid "b.in" 8 256
 cycle
 assert b.in.a 1
 assert b.in.v 1
 assert-var-int "b.data[0]" 5 0
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 assert-var-int "b.data[0]" 5 0
 
 system "echo '[] Sending packet write 01100 to reg0'"
-set-qdi-channel-valid "b.in" 9 352
+set-qdi-channel-valid "b.in" 8 352
 cycle
 assert b.in.a 1
 assert b.in.v 1
 assert-var-int "b.data[0]" 5 12
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
@@ -56,88 +56,88 @@ assert-var-int "b.data[0]" 5 12
 
 
 system "echo '[] Sending packet write 0s to reg1'"
-set-qdi-channel-valid "b.in" 9 257
+set-qdi-channel-valid "b.in" 8 257
 cycle
 assert b.in.a 1
 assert b.in.v 1
 assert-var-int "b.data[1]" 5 0
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 
 system "echo '[] Sending packet write 0s to reg2'"
-set-qdi-channel-valid "b.in" 9 258
+set-qdi-channel-valid "b.in" 8 258
 cycle
 assert b.in.a 1
 assert b.in.v 1
 assert-var-int "b.data[2]" 5 0
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 assert-var-int "b.data[2]" 5 0
 
 system "echo '[] Sending packet write 0s to reg3'"
-set-qdi-channel-valid "b.in" 9 259
+set-qdi-channel-valid "b.in" 8 259
 cycle
 assert b.in.a 1
 assert b.in.v 1
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 
 system "echo '[] Sending packet write 0s to reg4'"
-set-qdi-channel-valid "b.in" 9 260
+set-qdi-channel-valid "b.in" 8 260
 cycle
 assert b.in.a 1
 assert b.in.v 1
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 
 system "echo '[] Sending packet write 0s to reg5'"
-set-qdi-channel-valid "b.in" 9 261
+set-qdi-channel-valid "b.in" 8 261
 cycle
 assert b.in.a 1
 assert b.in.v 1
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 
 system "echo '[] Sending packet write 0s to reg6'"
-set-qdi-channel-valid "b.in" 9 262
+set-qdi-channel-valid "b.in" 8 262
 cycle
 assert b.in.a 1
 assert b.in.v 1
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0
 
 system "echo '[] Sending packet write 0s to reg7'"
-set-qdi-channel-valid "b.in" 9 263
+set-qdi-channel-valid "b.in" 8 263
 cycle
 assert b.in.a 1
 assert b.in.v 1
 
 system "echo '[] Removing input'"
-set-qdi-channel-neutral "b.in" 9
+set-qdi-channel-neutral "b.in" 8
 cycle
 assert b.in.a 0
 assert b.in.v 0