From c8ac3cf37d64b1fc8bd1b4ac7ebe6e86a0768873 Mon Sep 17 00:00:00 2001 From: Michele Date: Wed, 9 Mar 2022 13:05:08 +0100 Subject: [PATCH] started register_v2 with reading and writing abilities --- dataflow_neuro/primitives.act | 9 + dataflow_neuro/registers.act | 88 +- test/unit_tests/arbiter_tree_test/test.prsim | 1 - test/unit_tests/register_write/run/prsim.out | 440 ++--- test/unit_tests/register_write/run/test.prs | 1666 ++++++++++-------- test/unit_tests/register_write/test.act | 2 +- test/unit_tests/register_write/test.prsim | 11 +- 7 files changed, 1172 insertions(+), 1045 deletions(-) diff --git a/dataflow_neuro/primitives.act b/dataflow_neuro/primitives.act index 4d1f034..540fa88 100644 --- a/dataflow_neuro/primitives.act +++ b/dataflow_neuro/primitives.act @@ -624,6 +624,15 @@ namespace tmpl { // Programmable delay line. // N is the number of layers, // the longest layer having 2**N DLY elements + // Circuit for creating delays, there are N delay layers. + // The block has the parameters: + // N -> the number is the number of layers with the longest being 2**N elements + // wl -> word length, length of each word + // N_dly_cfg -> the number of config bits in the ACK delay line + // The block has the pins: + // in -> input data + // out -> output data + // s -> bit word with size N that sets delay configuration. int(s) = number of delays export template defproc delayprog (bool! out; bool? in, s[N]; power supply) { diff --git a/dataflow_neuro/registers.act b/dataflow_neuro/registers.act index d9f7129..c169dad 100644 --- a/dataflow_neuro/registers.act +++ b/dataflow_neuro/registers.act @@ -59,7 +59,7 @@ defproc register_rw (avMx1of2<1+lognw+wl> in; d1of data[1< val_input(.in = _in_temp,.out = _in_v_temp, .supply = supply); sigbuf_1output<4> val_input_X(.in = _in_v_temp,.out = in.v,.supply = supply); - // Generation of the fake clock pulse + // Generation of the fake clock pulse (inverted because the ff clocks are low_active) delayprog clk_dly(.in = _in_v_temp, .out = _clock_temp,.s = dly_cfg, .supply = supply); INV_X1 inv_clk(.a = _clock_temp,.y = _clock_temp_inv,.vdd = supply.vdd,.vss = supply.vss); sigbuf_1output<4> clk_X(.in = _clock_temp_inv,.out = _clock,.supply = supply); @@ -109,6 +109,90 @@ defproc register_rw (avMx1of2<1+lognw+wl> in; d1of data[1< +defproc register_rw_v2 (avMx1of2<1+lognw+wl> in; d1of data[1< _in_temp2,_in_read,_in_write; + avMx1of2<1>_in_flag; + // bool _in_stable; + // (i:1+lognw+wl:_in_temp.d[i] = in.d.d[i];) + // vtree<1+lognw+wl> val_input(.in = _in_temp,.out = _in_v_temp, .supply = supply); + // sigbuf_1output<4> val_input_X(.in = _in_v_temp,.out = in.v,.supply = supply); + // Read or write? + AND2_X1 ack_and(.a = _in_temp2.a,.b = _in_flag.a,.y = in.a,.vdd = supply.vdd,.vss = supply.vss); + in.v = _in_temp2.v; + _in_flag.d.d[0] = in.d.d[lognw+wl]; + (i:lognw+wl:_in_temp2.d.d[i] = in.d.d[i];) + demux read_write_demux(.in = _in_temp2,.out1 = _in_write, .out2 = _in_read, .cond = _in_flag,.reset_B = reset_B); + read_write_demux.supply= supply; + //WRITE PATH + // Validation + vtree val_input(.in = _in_write,.out = _in_write.v, .supply = supply); + vtree + // Generation of the fake clock pulse (inverted because the ff clocks are low_active) + delayprog clk_dly(.in = _in_write.v, .out = _clock_temp,.s = dly_cfg, .supply = supply); + INV_X1 inv_clk(.a = _clock_temp,.y = _clock_temp_inv,.vdd = supply.vdd,.vss = supply.vss); + sigbuf_1output<4> clk_X(.in = _clock_temp_inv,.out = _clock,.supply = supply); + //READ PATH + //Validation + vtree val_input(.in = _in_read,.out = _in_read.v, .supply = supply); + // Sending signal to the output + + + //Reset Buffers + bool _reset_BX,_reset_mem_BX,_reset_mem_BXX[nw*wl]; + BUF_X1 reset_buf_BX(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss); + BUF_X1 reset_buf_BXX(.a=reset_mem_B, .y=_reset_mem_BX,.vdd=supply.vdd,.vss=supply.vss); + sigbuf reset_bufarray(.in=_reset_mem_BX, .out=_reset_mem_BXX,.supply=supply); + // Creating the different flip flop arrays + bool _out_encoder[nw],_clock_word_temp[nw],_clock_word[nw],_clock_buffer_out[nw*wl]; + andtree atree[nw]; + d1of _data_f; + AND2_X1 and_encoder[nw]; + sigbuf clock_buffer[nw]; + DFFQ_R_X1 ff_t[2*nw*wl],ff_f[2*nw*wl]; + pint bitval; + (k:nw:atree[k].supply = supply;) + (word_idx:nw: + // Decoding the bit pattern to understand which word we are looking at + (pin_idx:lognw: + bitval = (word_idx & ( 1 << pin_idx )) >> pin_idx; // Get binary digit of integer i, column j + [bitval = 1 -> + atree[word_idx].in[pin_idx] = in.d.d[pin_idx+wl].t; + [] bitval = 0 -> + atree[word_idx].in[pin_idx] = in.d.d[pin_idx+wl].f; + []bitval >= 2 -> {false : "fuck"}; + ] + ) + // Activating the fake clock for the right word + atree[word_idx].out = _out_encoder[word_idx]; + and_encoder[word_idx].a = _out_encoder[word_idx]; + and_encoder[word_idx].b = _clock; + and_encoder[word_idx].y = _clock_word_temp[word_idx]; + and_encoder[word_idx].vdd = supply.vdd; + and_encoder[word_idx].vss = supply.vss; + clock_buffer[word_idx].in = _clock_word_temp[word_idx]; + clock_buffer[word_idx].supply = supply; + // Describing all the FF and their connection + (bit_idx:wl: + ff_t[bit_idx+word_idx*(wl)].clk_B = clock_buffer[word_idx].out[bit_idx]; + ff_t[bit_idx+word_idx*(wl)].d = in.d.d[bit_idx].t; + ff_t[bit_idx+word_idx*(wl)].q = data[word_idx].d[bit_idx]; + ff_t[bit_idx+word_idx*(wl)].reset_B = _reset_mem_BXX[bit_idx+word_idx*(wl)]; + ff_t[bit_idx+word_idx*(wl)].vdd = supply.vdd; + ff_t[bit_idx+word_idx*(wl)].vss = supply.vss; + ff_f[bit_idx+word_idx*(wl)].clk_B = clock_buffer[word_idx+nw-1].out[bit_idx]; + ff_f[bit_idx+word_idx*(wl)].d = in.d.d[bit_idx].f; + ff_f[bit_idx+word_idx*(wl)].q = data[word_idx].d[bit_idx]; + ff_f[bit_idx+word_idx*(wl)].reset_B = _reset_mem_BXX[bit_idx+word_idx*(wl)+nw-1]; + ff_f[bit_idx+word_idx*(wl)].vdd = supply.vdd; + ff_f[bit_idx+word_idx*(wl)].vss = supply.vss; + ) + ) + } + }} diff --git a/test/unit_tests/arbiter_tree_test/test.prsim b/test/unit_tests/arbiter_tree_test/test.prsim index 8a79d01..38f295d 100644 --- a/test/unit_tests/arbiter_tree_test/test.prsim +++ b/test/unit_tests/arbiter_tree_test/test.prsim @@ -1,6 +1,5 @@ watchall -set Reset 1 set my_tree.in[0].r 0 set my_tree.in[1].r 0 set my_tree.in[2].r 0 diff --git a/test/unit_tests/register_write/run/prsim.out b/test/unit_tests/register_write/run/prsim.out index 59ef79d..7076c93 100644 --- a/test/unit_tests/register_write/run/prsim.out +++ b/test/unit_tests/register_write/run/prsim.out @@ -1,299 +1,149 @@ -t.registers.ff[4].clk_B t.registers._clock_word_temp[0] t.in.d.d[1].f t.registers._clock_temp t.registers.ack_dly._a[1] t.registers.ff[0].clk_B t.registers._clock_temp_inv t.registers._clock t.dly_cfg[1] t.registers.ack_dly.dly[1].__y t.registers.ff[0].d t.registers.clk_dly.and2[0]._y t.registers.val_input.ct.in[1] t.in.d.d[4].f t.registers._clock_word_temp[2] t.registers.clk_dly.dly[2]._y t.registers.ff[5].__clk_B t.registers.ack_dly.dly[1].___y t.registers.ff[4]._clk_B t.registers._out_encoder[3] t.registers.clock_buffer[1].buf1._y t.registers.ff[6].clk_B t.registers.atree[2].in[1] t.dly_cfg[0] t.registers._in_v_temp t.registers._out_encoder[2] t.registers._out_encoder[1] t.registers.clk_dly.and2[1]._y t.registers.atree[0].in[0] t.registers.ack_dly.dly[2]._y t.registers.val_input.ct.in[0] t.registers._in_a_temp t.in.d.d[0].f t.registers.clk_dly.dly[1].y t.in.v t.registers.ff[3]._clk_B t.registers.clk_dly.dly[2].y t.in.d.d[4].t t.registers.clk_dly.dly[1].a t.registers._clock_word_temp[3] t.registers.ack_dly.dly[0].___y t.registers.val_input.ct.in[3] t.registers.ff[1].d t.registers.clock_buffer[0].buf1._y t.registers._out_encoder[0] t.registers.atree[1].in[0] t.registers.ack_dly.dly[2].___y t.registers.ack_dly.mu2[0]._y t.registers.atree[1].and2s[0]._y t.registers.clk_dly._a[1] t.registers.atree[0].in[1] t.registers.ff[2].__clk_B t.registers.val_input.ct.in[4] t.registers.val_input.OR2_tf[3]._y t.registers.clk_X.buf1._y t.registers.ff[7].__clk_B t.registers.clk_dly.dly[0].___y t.registers._clock_word_temp[1] t.registers.and_encoder[2]._y t.registers.clk_dly.dly[1].___y t.registers.ff[7]._clk_B t.in.a t.registers.clk_dly.mu2[1]._s t.registers.ff[1]._clk_B t.registers.clk_dly.dly[0]._y t.registers.val_input.ct.in[2] t.registers.val_input.OR2_tf[2]._y t.registers.val_input.ct.tmp[6] t.registers.clk_dly.dly[1]._y t.registers.ack_dly.dly[2].y t.registers.atree[0].and2s[0]._y t.registers.clk_dly.mu2[1]._y t.registers.clk_dly.mu2[0]._s t.registers.ack_dly.dly[0]._y t.registers.clk_dly.dly[0].a t.registers.ack_dly.dly[0].a t.registers.ff[0]._clk_B t.registers.clock_buffer[2].buf1._y t.registers.clk_dly.dly[1].__y t.registers.ff[2].clk_B t.registers.ff[6]._clk_B t.registers.clk_dly.dly[0].y t.registers.clk_dly.mu2[0]._y t.registers.clock_buffer[3].buf1._y t.registers.val_input.ct.tmp[5] t.registers.ack_dly.dly[1]._y t.registers.and_encoder[0]._y t.registers.val_input.ct.C2Els[1]._y t.registers.ack_dly.dly[1].y t.registers.ack_dly.and2[1]._y t.registers.val_input.OR2_tf[1]._y t.registers.clk_dly.dly[0].__y t.registers.ff[3].__clk_B t.registers.ack_dly.dly[0].y t.registers.clk_dly.dly[2].__y t.registers.atree[3].and2s[0]._y t.registers.ff[6].__clk_B t.registers.ack_dly.dly[1].a t.registers.ff[4].__clk_B t.registers.atree[2].and2s[0]._y t.registers.ff[1].__clk_B t.registers.val_input_X.buf1._y t.registers.ack_dly.dly[2].__y t.registers.val_input.OR2_tf[0]._y t.registers.ff[0].__clk_B t.registers.ff[5]._clk_B t.registers.and_encoder[1]._y t.registers.ack_dly.and2[0]._y t.registers.ack_dly.mu2[1]._s t.registers.clk_dly.dly[2].___y t.registers.val_input.OR2_tf[4]._y t.registers.ack_input_X.buf1._y t.registers.val_input.ct.C2Els[0]._y t.registers.ack_dly.mu2[1]._y t.registers.val_input.ct.C3Els[0]._y t.registers.ack_dly.dly[0].__y t.registers.and_encoder[3]._y t.registers.ff[2]._clk_B t.registers.ack_dly.mu2[0]._s +t.registers.read_write_demux.vc.ct.in[0] t.registers.read_write_demux._en2_X_t[0] t.in.d.d[1].f t.registers.read_write_demux._c_f_buf[0] t.registers.read_write_demux.out2_a_B_buf_t.buf1._y t.registers.read_write_demux._out1_a_BX_f[0] t.in.d.d[3].t t.registers._in_read.v t.registers.read_write_demux._in_v t.in.d.d[1].t t.registers.read_write_demux._c_v t.in.d.d[0].t t.registers.read_write_demux._en1_X_f[0] t.in.d.d[4].f t.registers.read_write_demux.out1_en_buf_f.buf1._y t.in.d.d[0].f t.registers.read_write_demux.vc.ct.tmp[5] t.in.d.d[2].f t.registers.read_write_demux._out2_a_BX_t[0] t.in.d.d[3].f t.registers.read_write_demux._c_t_buf[0] t.registers.read_write_demux.vc.ct.C2Els[0]._y t.registers.read_write_demux._out1_a_BX_t[0] t.in.v t.registers.read_write_demux._en t.registers.read_write_demux._out1_a_B t.registers.read_write_demux._out2_a_BX_f[0] t.in.d.d[4].t t.registers.read_write_demux.c_buf_f.buf1._y t.registers.read_write_demux._en2_X_f[0] t.registers.read_write_demux._en1_X_t[0] t.registers.read_write_demux.out1_a_B_buf_t.buf1._y t.registers.read_write_demux.out2_en_buf_f.buf1._y t.registers.read_write_demux._out2_a_B t.registers.read_write_demux.vc.ct.tmp[4] t.registers.read_write_demux.vc.ct.in[2] t.registers.read_write_demux._in_c_v_ t.registers.read_write_demux.out2_en_buf_t.buf1._y t.registers._in_read.a t.in.d.d[2].t t.registers.read_write_demux.out2_a_B_buf_f.buf1._y t.registers.read_write_demux.vc.ct.in[1] t.registers.read_write_demux.c_buf_t.buf1._y t.registers.read_write_demux.c_f_c_t_or._y t.registers.read_write_demux._out_v t.registers._in_write.a t.registers._in_write.v t.registers.read_write_demux.in_v_buf._y t.registers.read_write_demux.out1_a_B_buf_f.buf1._y t.registers.read_write_demux.out1_en_buf_t.buf1._y t.registers.read_write_demux.vc.ct.in[3] t.registers.read_write_demux.vc.OR2_tf[1]._y t.registers.read_write_demux.c_el._y t.registers.read_write_demux.out_or._y t.registers.read_write_demux.vc.OR2_tf[2]._y t.registers.read_write_demux.vc.ct.C2Els[1]._y t.registers.read_write_demux.vc.OR2_tf[0]._y t.registers.read_write_demux.vc.ct.C2Els[2]._y t.registers.read_write_demux.vc.OR2_tf[3]._y [0] start test - 115040 t.in.d.d[0].f : 0 - 115040 Reset : 0 - 115040 t.in.d.d[4].t : 0 - 115040 t.in.d.d[1].f : 0 - 115040 t.in.d.d[4].f : 0 - 115040 t.registers.atree[2].in[1] : 0 - 115040 t.registers.atree[0].in[1] : 0 - 115040 t.registers.atree[1].in[0] : 0 - 115040 t.registers.ff[0].d : 0 - 115040 t.registers.atree[0].in[0] : 0 - 115040 t.registers.ff[1].d : 0 - 115058 t._reset_B : 1 [by Reset:=0] - 115127 t.registers.reset_buf_BXX._y : 0 [by t._reset_B:=1] - 115138 t.registers._reset_mem_BX : 1 [by t.registers.reset_buf_BXX._y:=0] - 115179 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.ff[1].d:=0] - 115243 t.registers.val_input.OR2_tf[0]._y : 1 [by t.registers.ff[0].d:=0] - 115258 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1] - 115383 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1] - 115384 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[1]:=0] - 115421 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1] - 115542 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0] - 116281 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1] - 116894 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0] - 117006 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1] - 119043 t.registers.atree[2].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0] - 119053 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0] - 119093 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1] - 119350 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[4]:=0] - 119437 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1] - 119731 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0] - 119732 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1] - 119800 t.registers.atree[1].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0] - 121009 t.registers._out_encoder[1] : 0 [by t.registers.atree[1].and2s[0]._y:=1] - 121538 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0] - 121599 t.registers.and_encoder[1]._y : 1 [by t.registers._out_encoder[1]:=0] - 121716 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1] - 121739 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0] - 121880 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0] - 121902 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1] - 122402 t.registers._clock_word_temp[1] : 0 [by t.registers.and_encoder[1]._y:=1] - 122749 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0] - 122882 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1] - 123934 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1] - 136624 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0] - 151404 t.registers.reset_buf_BX._y : 0 [by t._reset_B:=1] - 151763 t.registers._reset_BX : 1 [by t.registers.reset_buf_BX._y:=0] - 152286 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1] - 152530 t.registers.clock_buffer[1].buf1._y : 1 [by t.registers._clock_word_temp[1]:=0] - 152751 t.registers.ff[2].clk_B : 0 [by t.registers.clock_buffer[1].buf1._y:=1] - 152758 t.registers.ff[2]._clk_B : 1 [by t.registers.ff[2].clk_B:=0] - 152781 t.registers.ff[3]._clk_B : 1 [by t.registers.ff[2].clk_B:=0] - 159471 t.registers.ff[2].__clk_B : 0 [by t.registers.ff[2]._clk_B:=1] - 159941 t.registers.atree[3].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0] - 160032 t.registers._out_encoder[3] : 0 [by t.registers.atree[3].and2s[0]._y:=1] - 162221 t.registers.and_encoder[3]._y : 1 [by t.registers._out_encoder[3]:=0] - 162228 t.registers._clock_word_temp[3] : 0 [by t.registers.and_encoder[3]._y:=1] - 165015 t.registers.clock_buffer[3].buf1._y : 1 [by t.registers._clock_word_temp[3]:=0] - 165121 t.registers.ff[6].clk_B : 0 [by t.registers.clock_buffer[3].buf1._y:=1] - 165199 t.registers.ff[6]._clk_B : 1 [by t.registers.ff[6].clk_B:=0] - 165396 t.registers.ff[7]._clk_B : 1 [by t.registers.ff[6].clk_B:=0] - 165851 t.registers.ff[7].__clk_B : 0 [by t.registers.ff[7]._clk_B:=1] - 166402 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0] - 166414 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1] - 166555 t.registers._out_encoder[2] : 0 [by t.registers.atree[2].and2s[0]._y:=1] - 166567 t.registers.and_encoder[2]._y : 1 [by t.registers._out_encoder[2]:=0] - 166818 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0] - 166924 t.registers.reset_bufarray.buf3._y : 0 [by t.registers._reset_mem_BX:=1] - 169823 t.registers._reset_mem_BXX[0] : 1 [by t.registers.reset_bufarray.buf3._y:=0] - 171094 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1] - 171096 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] - 172483 t.registers._clock_word_temp[2] : 0 [by t.registers.and_encoder[2]._y:=1] - 173732 t.registers.clock_buffer[2].buf1._y : 1 [by t.registers._clock_word_temp[2]:=0] - 175389 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] - 175555 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1] - 175631 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1] - 177231 t.registers.ff[4].clk_B : 0 [by t.registers.clock_buffer[2].buf1._y:=1] - 177306 t.registers.ff[4]._clk_B : 1 [by t.registers.ff[4].clk_B:=0] - 177444 t.registers.ff[4].__clk_B : 0 [by t.registers.ff[4]._clk_B:=1] - 177576 t.registers.ff[5]._clk_B : 1 [by t.registers.ff[4].clk_B:=0] - 182839 t.registers.ff[5].__clk_B : 0 [by t.registers.ff[5]._clk_B:=1] - 184195 t.registers.ff[6].__clk_B : 0 [by t.registers.ff[6]._clk_B:=1] - 210242 t.registers.ff[3].__clk_B : 0 [by t.registers.ff[3]._clk_B:=1] -t.registers._clock_temp t.registers.ack_dly._a[1] t.registers._clock_temp_inv t.registers._clock t.dly_cfg[1] t.registers.ack_dly.dly[1].__y t.registers.clk_dly.dly[2]._y t.registers.ack_dly.dly[1].___y t.dly_cfg[0] t.registers.clk_dly.and2[1]._y t.registers.ack_dly.dly[2]._y t.registers._in_a_temp t.registers.clk_dly.dly[1].y t.registers.clk_dly.dly[2].y t.registers.clk_dly.dly[1].a t.registers.ack_dly.dly[0].___y t.registers.ack_dly.dly[2].___y t.registers.ack_dly.mu2[0]._y t.registers.clk_dly._a[1] t.registers.clk_X.buf1._y t.registers.clk_dly.dly[1].___y t.in.a t.registers.clk_dly.mu2[1]._s t.registers.clk_dly.dly[1]._y t.registers.ack_dly.dly[2].y t.registers.clk_dly.mu2[1]._y t.registers.clk_dly.mu2[0]._s t.registers.ack_dly.dly[0]._y t.registers.ack_dly.dly[0].a t.registers.clk_dly.dly[1].__y t.registers.clk_dly.mu2[0]._y t.registers.ack_dly.dly[1]._y t.registers.ack_dly.dly[1].y t.registers.ack_dly.and2[1]._y t.registers.ack_dly.dly[0].y t.registers.clk_dly.dly[2].__y t.registers.ack_dly.dly[1].a t.registers.ack_dly.dly[2].__y t.registers.ack_dly.and2[0]._y t.registers.ack_dly.mu2[1]._s t.registers.clk_dly.dly[2].___y t.registers.ack_input_X.buf1._y t.registers.ack_dly.mu2[1]._y t.registers.ack_dly.dly[0].__y t.registers.ack_dly.mu2[0]._s +Node `t._in_write.d.d[0].f' not found +Node `t._in_read.d.d[0].f' not found + 106506 t.in.d.d[0].f : 0 + 106506 Reset : 0 + 106506 t.registers._in_read.v : 0 + 106506 t.in.d.d[1].f : 0 + 106506 t.registers._in_write.v : 0 + 106506 t.registers._in_read.a : 0 + 106506 t.in.d.d[3].f : 0 + 106506 t.registers._in_write.a : 0 + 106506 t.data[1].d[1] : 0 + 106506 t.in.d.d[2].t : 0 + 106506 t.data[1].d[0] : 0 + 106506 t.data[0].d[1] : 0 + 106506 t.in.d.d[0].t : 0 + 106506 t.in.d.d[2].f : 0 + 106506 t.data[0].d[0] : 0 + 106506 t.in.d.d[4].t : 0 + 106506 t.in.d.d[1].t : 0 + 106506 t.in.d.d[4].f : 0 + 106506 t.in.d.d[3].t : 0 + 106524 t.registers.read_write_demux.c_buf_t.buf1._y : 1 [by t.in.d.d[4].t:=0] + 107057 t._reset_B : 1 [by Reset:=0] + 107460 t.registers.read_write_demux._out2_a_B : 1 [by t.registers._in_read.a:=0] + 107488 t.registers.read_write_demux.vc.OR2_tf[2]._y : 1 [by t.in.d.d[2].f:=0] + 107559 t.registers.read_write_demux.reset_buf._y : 0 [by t._reset_B:=1] + 107577 t.registers.read_write_demux.out_or._y : 1 [by t.registers._in_write.v:=0] + 107587 t.registers.read_write_demux._out1_a_B : 1 [by t.registers._in_write.a:=0] + 107598 t.registers.read_write_demux.out1_a_B_buf_f.buf1._y : 0 [by t.registers.read_write_demux._out1_a_B:=1] + 107627 t.registers.read_write_demux.vc.ct.in[2] : 0 [by t.registers.read_write_demux.vc.OR2_tf[2]._y:=1] + 107646 t.registers.read_write_demux._out_v : 0 [by t.registers.read_write_demux.out_or._y:=1] + 107661 t.registers.read_write_demux._en : 1 [by t.registers.read_write_demux._out_v:=0] + 107662 t.registers.read_write_demux.out2_en_buf_f.buf1._y : 0 [by t.registers.read_write_demux._en:=1] + 107663 t.registers.read_write_demux.out2_a_B_buf_t.buf1._y : 0 [by t.registers.read_write_demux._out2_a_B:=1] + 107698 t.registers.read_write_demux.out1_en_buf_t.buf1._y : 0 [by t.registers.read_write_demux._en:=1] + 107703 t.registers.read_write_demux._out2_a_BX_f[0] : 1 [by t.registers.read_write_demux.out2_a_B_buf_t.buf1._y:=0] + 107773 t.registers.read_write_demux.out1_en_buf_f.buf1._y : 0 [by t.registers.read_write_demux._en:=1] + 107802 t.registers.read_write_demux._out1_a_BX_t[0] : 1 [by t.registers.read_write_demux.out1_a_B_buf_f.buf1._y:=0] + 107860 t.registers.read_write_demux._en1_X_f[0] : 1 [by t.registers.read_write_demux.out1_en_buf_f.buf1._y:=0] + 107955 t.registers.read_write_demux._en1_X_t[0] : 1 [by t.registers.read_write_demux.out1_en_buf_t.buf1._y:=0] + 108400 t.registers.read_write_demux.out2_en_buf_t.buf1._y : 0 [by t.registers.read_write_demux._en:=1] + 108694 t.registers.read_write_demux._en2_X_t[0] : 1 [by t.registers.read_write_demux.out2_en_buf_t.buf1._y:=0] + 109314 t.registers.read_write_demux.out2_a_B_buf_f.buf1._y : 0 [by t.registers.read_write_demux._out2_a_B:=1] + 109315 t.registers.read_write_demux._out2_a_BX_t[0] : 1 [by t.registers.read_write_demux.out2_a_B_buf_f.buf1._y:=0] + 110509 t.registers.read_write_demux.c_f_c_t_or._y : 1 [by t.in.d.d[4].f:=0] + 110519 t.registers.read_write_demux.vc.OR2_tf[1]._y : 1 [by t.in.d.d[1].t:=0] + 111284 t.registers.read_write_demux._c_t_buf[0] : 0 [by t.registers.read_write_demux.c_buf_t.buf1._y:=1] + 112315 t.registers.read_write_demux._c_v : 0 [by t.registers.read_write_demux.c_f_c_t_or._y:=1] + 112526 t.registers.read_write_demux.vc.ct.in[1] : 0 [by t.registers.read_write_demux.vc.OR2_tf[1]._y:=1] + 128090 t.registers.read_write_demux.vc.OR2_tf[3]._y : 1 [by t.in.d.d[3].t:=0] + 129299 t.registers.read_write_demux.vc.ct.in[3] : 0 [by t.registers.read_write_demux.vc.OR2_tf[3]._y:=1] + 129889 t.registers.read_write_demux.vc.ct.C2Els[1]._y : 1 [by t.registers.read_write_demux.vc.ct.in[3]:=0] + 130067 t.registers.read_write_demux.vc.ct.tmp[5] : 0 [by t.registers.read_write_demux.vc.ct.C2Els[1]._y:=1] + 143905 t.registers.read_write_demux._reset_BX : 1 [by t.registers.read_write_demux.reset_buf._y:=0] + 144708 t.registers.read_write_demux.reset_bufarray.buf3._y : 0 [by t.registers.read_write_demux._reset_BX:=1] + 144872 t.registers.read_write_demux._reset_BXX[0] : 1 [by t.registers.read_write_demux.reset_bufarray.buf3._y:=0] + 151407 t.registers.read_write_demux.c_buf_f.buf1._y : 1 [by t.in.d.d[4].f:=0] + 153602 t.registers.read_write_demux._c_f_buf[0] : 0 [by t.registers.read_write_demux.c_buf_f.buf1._y:=1] + 155174 t.registers.read_write_demux._en2_X_f[0] : 1 [by t.registers.read_write_demux.out2_en_buf_f.buf1._y:=0] + 159373 t.registers.read_write_demux.out1_a_B_buf_t.buf1._y : 0 [by t.registers.read_write_demux._out1_a_B:=1] + 159395 t.registers.read_write_demux._out1_a_BX_f[0] : 1 [by t.registers.read_write_demux.out1_a_B_buf_t.buf1._y:=0] + 160976 t.registers.read_write_demux.vc.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0] + 161823 t.registers.read_write_demux.vc.ct.in[0] : 0 [by t.registers.read_write_demux.vc.OR2_tf[0]._y:=1] + 191951 t.registers.read_write_demux.vc.ct.C2Els[0]._y : 1 [by t.registers.read_write_demux.vc.ct.in[0]:=0] + 192084 t.registers.read_write_demux.vc.ct.tmp[4] : 0 [by t.registers.read_write_demux.vc.ct.C2Els[0]._y:=1] + 207746 t.registers.read_write_demux.vc.ct.C2Els[2]._y : 1 [by t.registers.read_write_demux.vc.ct.tmp[4]:=0] + 208105 t.registers.read_write_demux._in_v : 0 [by t.registers.read_write_demux.vc.ct.C2Els[2]._y:=1] + 208326 t.registers.read_write_demux.c_el._y : 1 [by t.registers.read_write_demux._in_v:=0] + 208333 t.registers.read_write_demux._in_c_v_ : 0 [by t.registers.read_write_demux.c_el._y:=1] + 222221 t.registers.read_write_demux.in_v_buf._y : 1 [by t.registers.read_write_demux._in_v:=0] + 222251 t.in.v : 0 [by t.registers.read_write_demux.in_v_buf._y:=1] + [1] reset completed - 210242 t.dly_cfg[0] : 1 - 210242 t.dly_cfg[1] : 1 - 210243 t.registers.ack_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1] - 210244 t.registers.ack_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1] - 210790 t.registers.clk_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1] - 254159 t.registers.clk_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1] - 254170 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.mu2[0]._s:=0] - 254540 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1] - 254607 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0] - 257248 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1] - 257264 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0] - 261826 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1] - 262354 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0] - 264789 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1] - 291669 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0] - 315594 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1] - 328635 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0] - 328637 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1] - 389595 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0] - 389598 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1] - 389627 t.registers._clock_temp_inv : 1 [by t.registers._clock_temp:=0] - 389944 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp_inv:=1] - 391545 t.registers._clock : 1 [by t.registers.clk_X.buf1._y:=0] - 391698 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock:=1] - 391742 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0] - 394503 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1] - 408186 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0] - 408187 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1] - 408404 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0] - 408426 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1] - 408427 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0] - 410008 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1] - 419353 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0] - 419512 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1] - 439188 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0] - 440475 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1] - 442707 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0] - 442852 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1] - 445684 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0] - 452038 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1] - 452039 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0] - 491323 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1] - 491485 t.registers._in_a_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0] - 498854 t.registers.ack_input_X.buf1._y : 0 [by t.registers._in_a_temp:=1] - 498868 t.in.a : 1 [by t.registers.ack_input_X.buf1._y:=0] + 222251 t.dly_cfg[0] : 1 + 222251 t.dly_cfg[1] : 1 [2] delay line set - 498868 t.registers.ff[0].d : 1 - 498868 t.in.d.d[4].f : 1 - 498868 t.registers.atree[0].in[0] : 1 - 498868 t.registers.ff[1].d : 1 - 498868 t.registers.atree[0].in[1] : 1 - 498869 t.registers.val_input.OR2_tf[1]._y : 0 [by t.registers.ff[1].d:=1] - 498869 t.registers.val_input.OR2_tf[3]._y : 0 [by t.registers.atree[0].in[1]:=1] - 498869 t.registers.atree[0].and2s[0]._y : 0 [by t.registers.atree[0].in[1]:=1] - 498870 t.registers._out_encoder[0] : 1 [by t.registers.atree[0].and2s[0]._y:=0] - 498875 t.registers.val_input.OR2_tf[0]._y : 0 [by t.registers.ff[0].d:=1] - 499028 t.registers.val_input.OR2_tf[4]._y : 0 [by t.in.d.d[4].f:=1] - 499029 t.registers.val_input.ct.in[4] : 1 [by t.registers.val_input.OR2_tf[4]._y:=0] - 499056 t.registers.val_input.ct.in[3] : 1 [by t.registers.val_input.OR2_tf[3]._y:=0] - 501112 t.registers.val_input.ct.in[1] : 1 [by t.registers.val_input.OR2_tf[1]._y:=0] - 503052 t.registers.and_encoder[0]._y : 0 [by t.registers._out_encoder[0]:=1] - 503905 t.registers._clock_word_temp[0] : 1 [by t.registers.and_encoder[0]._y:=0] - 503910 t.registers.clock_buffer[0].buf1._y : 0 [by t.registers._clock_word_temp[0]:=1] - 504801 t.registers.ff[0].clk_B : 1 [by t.registers.clock_buffer[0].buf1._y:=0] - 504802 t.registers.ff[0]._clk_B : 0 [by t.registers.ff[0].clk_B:=1] - 504818 t.registers.ff[1]._clk_B : 0 [by t.registers.ff[0].clk_B:=1] - 507375 t.registers.ff[0].__clk_B : 1 [by t.registers.ff[0]._clk_B:=0] - 507378 t.registers.ff[0]._mqib : 0 [by t.registers.ff[0].__clk_B:=1] - 508319 t.registers.ff[0]._mqi : 1 [by t.registers.ff[0]._mqib:=0] - 513179 t.registers.ff[1].__clk_B : 1 [by t.registers.ff[1]._clk_B:=0] - 520425 t.registers.val_input.OR2_tf[2]._y : 0 [by t.registers.atree[0].in[0]:=1] - 520426 t.registers.val_input.ct.in[2] : 1 [by t.registers.val_input.OR2_tf[2]._y:=0] - 520468 t.registers.val_input.ct.C3Els[0]._y : 0 [by t.registers.val_input.ct.in[2]:=1] - 523285 t.registers.val_input.ct.tmp[6] : 1 [by t.registers.val_input.ct.C3Els[0]._y:=0] - 533657 t.registers.val_input.ct.in[0] : 1 [by t.registers.val_input.OR2_tf[0]._y:=0] - 547390 t.registers.val_input.ct.C2Els[0]._y : 0 [by t.registers.val_input.ct.in[0]:=1] - 547485 t.registers.val_input.ct.tmp[5] : 1 [by t.registers.val_input.ct.C2Els[0]._y:=0] - 547820 t.registers.val_input.ct.C2Els[1]._y : 0 [by t.registers.val_input.ct.tmp[5]:=1] - 547828 t.registers._in_v_temp : 1 [by t.registers.val_input.ct.C2Els[1]._y:=0] - 547862 t.registers.clk_dly.and2[0]._y : 0 [by t.registers._in_v_temp:=1] - 548780 t.registers.clk_dly.dly[0].a : 1 [by t.registers.clk_dly.and2[0]._y:=0] - 548784 t.registers.clk_dly.dly[0]._y : 0 [by t.registers.clk_dly.dly[0].a:=1] - 561715 t.registers.val_input_X.buf1._y : 0 [by t.registers._in_v_temp:=1] - 564113 t.in.v : 1 [by t.registers.val_input_X.buf1._y:=0] - 572141 t.registers.ff[1]._mqib : 0 [by t.registers.ff[1].__clk_B:=1] - 575356 t.registers.ff[1]._mqi : 1 [by t.registers.ff[1]._mqib:=0] - 595162 t.registers.clk_dly.dly[0].__y : 1 [by t.registers.clk_dly.dly[0]._y:=0] - 642281 t.registers.clk_dly.dly[0].___y : 0 [by t.registers.clk_dly.dly[0].__y:=1] - 642329 t.registers.clk_dly.dly[0].y : 1 [by t.registers.clk_dly.dly[0].___y:=0] - 642332 t.registers.clk_dly.mu2[0]._y : 0 [by t.registers.clk_dly.dly[0].y:=1] - 642510 t.registers.clk_dly._a[1] : 1 [by t.registers.clk_dly.mu2[0]._y:=0] - 663487 t.registers.clk_dly.and2[1]._y : 0 [by t.registers.clk_dly._a[1]:=1] - 675386 t.registers.clk_dly.dly[1].a : 1 [by t.registers.clk_dly.and2[1]._y:=0] - 681337 t.registers.clk_dly.dly[1]._y : 0 [by t.registers.clk_dly.dly[1].a:=1] - 720822 t.registers.clk_dly.dly[1].__y : 1 [by t.registers.clk_dly.dly[1]._y:=0] - 721649 t.registers.clk_dly.dly[1].___y : 0 [by t.registers.clk_dly.dly[1].__y:=1] - 721822 t.registers.clk_dly.dly[1].y : 1 [by t.registers.clk_dly.dly[1].___y:=0] - 722006 t.registers.clk_dly.dly[2]._y : 0 [by t.registers.clk_dly.dly[1].y:=1] - 722007 t.registers.clk_dly.dly[2].__y : 1 [by t.registers.clk_dly.dly[2]._y:=0] - 722080 t.registers.clk_dly.dly[2].___y : 0 [by t.registers.clk_dly.dly[2].__y:=1] - 722084 t.registers.clk_dly.dly[2].y : 1 [by t.registers.clk_dly.dly[2].___y:=0] - 759372 t.registers.clk_dly.mu2[1]._y : 0 [by t.registers.clk_dly.dly[2].y:=1] - 759468 t.registers._clock_temp : 1 [by t.registers.clk_dly.mu2[1]._y:=0] - 759604 t.registers._clock_temp_inv : 0 [by t.registers._clock_temp:=1] - 759605 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp_inv:=0] - 778651 t.registers._clock : 0 [by t.registers.clk_X.buf1._y:=1] - 778892 t.registers.and_encoder[0]._y : 1 [by t.registers._clock:=0] - 778904 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1] - 782610 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock:=0] - 782804 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0] - 782805 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1] - 782861 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] - 782862 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1] - 782898 t.registers.ff[0]._sqib : 0 [by t.registers.ff[0]._clk_B:=1] - 782899 t.data[0].d[0] : 1 [by t.registers.ff[0]._sqib:=0] - 783639 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1] - 787203 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0] - 788895 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1] - 788908 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0] - 805892 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1] - 806249 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0] - 806273 t.registers.ff[0]._sqi : 1 [by t.registers.ff[0]._sqib:=0] - 806274 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1] - 806295 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0] - 806296 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1] - 815944 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0] - 815945 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1] - 815946 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0] - 816107 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1] - 817144 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0] - 817149 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1] - 817730 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0] - 818138 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1] - 818149 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0] - 819196 t.registers._in_a_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1] - 819210 t.registers.ack_input_X.buf1._y : 1 [by t.registers._in_a_temp:=0] - 819228 t.in.a : 0 [by t.registers.ack_input_X.buf1._y:=1] - 827811 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] - 827815 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1] - 827915 t.registers.ff[1]._sqib : 0 [by t.registers.ff[1]._clk_B:=1] - 829119 t.data[0].d[1] : 1 [by t.registers.ff[1]._sqib:=0] - 859359 t.registers.ff[1]._sqi : 1 [by t.registers.ff[1]._sqib:=0] - 859359 t.registers.ff[0].d : 0 - 859359 t.in.d.d[4].f : 0 - 859359 t.registers.atree[0].in[0] : 0 - 859359 t.registers.ff[1].d : 0 - 859359 t.registers.atree[0].in[1] : 0 - 859429 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.ff[1].d:=0] - 859440 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1] - 859587 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0] - 859590 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1] - 860202 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0] - 860256 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1] - 860818 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0] - 861966 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1] - 867814 t.registers.val_input.OR2_tf[0]._y : 1 [by t.registers.ff[0].d:=0] - 868975 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1] - 877627 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[0]:=0] - 877708 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1] - 909781 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0] - 920858 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1] - 938841 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[3]:=0] - 938933 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1] - 947244 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0] - 948988 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1] - 949601 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0] - 949646 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1] - 950643 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0] - 952292 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1] - 952817 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0] - 953717 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1] - 953769 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.dly[0].y:=0] - 953776 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1] - 963010 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0] - 969388 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0] - 969390 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1] - 969477 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1] - 969744 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0] - 969877 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1] - 969878 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0] - 969882 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1] - 970428 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0] - 1015991 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1] - 1015992 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0] - 1028370 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1] - 1028449 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0] - 1030882 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1] - 1030970 t.registers._clock_temp_inv : 1 [by t.registers._clock_temp:=0] - 1038752 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp_inv:=1] - 1067079 t.registers._clock : 1 [by t.registers.clk_X.buf1._y:=0] - 1067138 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock:=1] - 1067168 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0] - 1068635 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1] - 1128139 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0] - 1147523 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1] - 1148208 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0] - 1164923 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1] - 1165050 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0] - 1165219 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1] - 1165262 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0] - 1165274 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1] - 1166553 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0] - 1166786 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1] - 1166789 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0] - 1166827 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1] - 1166828 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0] - 1179580 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1] - 1179672 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0] - 1182399 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1] - 1182401 t.registers._in_a_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0] - 1182402 t.registers.ack_input_X.buf1._y : 0 [by t.registers._in_a_temp:=1] - 1183903 t.in.a : 1 [by t.registers.ack_input_X.buf1._y:=0] + 222251 t.in.d.d[0].t : 1 + 222251 t.in.d.d[4].t : 1 + 222251 t.in.d.d[2].f : 1 + 222251 t.in.d.d[1].t : 1 + 222251 t.in.d.d[3].f : 1 + 222258 t.registers.read_write_demux.vc.OR2_tf[1]._y : 0 [by t.in.d.d[1].t:=1] + 222342 t.registers.read_write_demux.c_f_c_t_or._y : 0 [by t.in.d.d[4].t:=1] + 222364 t.registers.read_write_demux.vc.ct.in[1] : 1 [by t.registers.read_write_demux.vc.OR2_tf[1]._y:=0] + 222420 t.registers.read_write_demux._c_v : 1 [by t.registers.read_write_demux.c_f_c_t_or._y:=0] + 224440 t.registers.read_write_demux.vc.OR2_tf[2]._y : 0 [by t.in.d.d[2].f:=1] + 224715 t.registers.read_write_demux.vc.ct.in[2] : 1 [by t.registers.read_write_demux.vc.OR2_tf[2]._y:=0] + 225038 t.registers.read_write_demux.vc.OR2_tf[3]._y : 0 [by t.in.d.d[3].f:=1] + 228964 t.registers.read_write_demux.vc.OR2_tf[0]._y : 0 [by t.in.d.d[0].t:=1] + 229419 t.registers.read_write_demux.vc.ct.in[0] : 1 [by t.registers.read_write_demux.vc.OR2_tf[0]._y:=0] + 229431 t.registers.read_write_demux.vc.ct.C2Els[0]._y : 0 [by t.registers.read_write_demux.vc.ct.in[0]:=1] + 229835 t.registers.read_write_demux.vc.ct.tmp[4] : 1 [by t.registers.read_write_demux.vc.ct.C2Els[0]._y:=0] + 244034 t.registers.read_write_demux.vc.ct.in[3] : 1 [by t.registers.read_write_demux.vc.OR2_tf[3]._y:=0] + 244046 t.registers.read_write_demux.vc.ct.C2Els[1]._y : 0 [by t.registers.read_write_demux.vc.ct.in[3]:=1] + 249962 t.registers.read_write_demux.vc.ct.tmp[5] : 1 [by t.registers.read_write_demux.vc.ct.C2Els[1]._y:=0] + 254238 t.registers.read_write_demux.vc.ct.C2Els[2]._y : 0 [by t.registers.read_write_demux.vc.ct.tmp[5]:=1] + 257137 t.registers.read_write_demux._in_v : 1 [by t.registers.read_write_demux.vc.ct.C2Els[2]._y:=0] + 257139 t.registers.read_write_demux.c_el._y : 0 [by t.registers.read_write_demux._in_v:=1] + 261432 t.registers.read_write_demux.in_v_buf._y : 0 [by t.registers.read_write_demux._in_v:=1] + 261674 t.registers.read_write_demux._in_c_v_ : 1 [by t.registers.read_write_demux.c_el._y:=0] + 262681 t.in.v : 1 [by t.registers.read_write_demux.in_v_buf._y:=0] + 279712 t.registers.read_write_demux.c_buf_t.buf1._y : 0 [by t.in.d.d[4].t:=1] + 283211 t.registers.read_write_demux._c_t_buf[0] : 1 [by t.registers.read_write_demux.c_buf_t.buf1._y:=0] + 283286 t.registers.read_write_demux.out1_f_buf_func[3]._y : 0 [by t.registers.read_write_demux._c_t_buf[0]:=1] + 283349 t.registers.read_write_demux.out1_t_buf_func[1]._y : 0 [by t.registers.read_write_demux._c_t_buf[0]:=1] + 283351 t.registers.read_write_demux.out1_t_buf_func[1].y : 1 [by t.registers.read_write_demux.out1_t_buf_func[1]._y:=0] + 283377 t.registers.read_write_demux.out1_f_buf_func[2]._y : 0 [by t.registers.read_write_demux._c_t_buf[0]:=1] + 283556 t.registers.read_write_demux.out1_t_buf_func[0]._y : 0 [by t.registers.read_write_demux._c_t_buf[0]:=1] + 283557 t.registers.read_write_demux.out1_t_buf_func[0].y : 1 [by t.registers.read_write_demux.out1_t_buf_func[0]._y:=0] + 288549 t.registers.read_write_demux.out1_f_buf_func[3].y : 1 [by t.registers.read_write_demux.out1_f_buf_func[3]._y:=0] + 327294 t.registers.read_write_demux.out1_f_buf_func[2].y : 1 [by t.registers.read_write_demux.out1_f_buf_func[2]._y:=0] +Node `t.registers._clock' not found +Node `t.registers._out_encoder[0]' not found +Node `t.registers._out_encoder[1]' not found +Node `t.registers._out_encoder[2]' not found +Node `t.registers._out_encoder[3]' not found + 327294 t.in.d.d[0].t : 0 + 327294 t.in.d.d[4].t : 0 + 327294 t.in.d.d[2].f : 0 + 327294 t.in.d.d[1].t : 0 + 327294 t.in.d.d[3].f : 0 + 327305 t.registers.read_write_demux.c_buf_t.buf1._y : 1 [by t.in.d.d[4].t:=0] + 327310 t.registers.read_write_demux.vc.OR2_tf[3]._y : 1 [by t.in.d.d[3].f:=0] + 327361 t.registers.read_write_demux.vc.OR2_tf[2]._y : 1 [by t.in.d.d[2].f:=0] + 327664 t.registers.read_write_demux.c_f_c_t_or._y : 1 [by t.in.d.d[4].t:=0] + 327838 t.registers.read_write_demux.vc.ct.in[3] : 0 [by t.registers.read_write_demux.vc.OR2_tf[3]._y:=1] + 327842 t.registers.read_write_demux.vc.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0] + 329796 t.registers.read_write_demux.vc.ct.in[2] : 0 [by t.registers.read_write_demux.vc.OR2_tf[2]._y:=1] + 329935 t.registers.read_write_demux.vc.OR2_tf[1]._y : 1 [by t.in.d.d[1].t:=0] + 329937 t.registers.read_write_demux.vc.ct.in[1] : 0 [by t.registers.read_write_demux.vc.OR2_tf[1]._y:=1] + 331867 t.registers.read_write_demux._c_t_buf[0] : 0 [by t.registers.read_write_demux.c_buf_t.buf1._y:=1] + 342837 t.registers.read_write_demux.vc.ct.C2Els[1]._y : 1 [by t.registers.read_write_demux.vc.ct.in[2]:=0] + 351767 t.registers.read_write_demux.vc.ct.in[0] : 0 [by t.registers.read_write_demux.vc.OR2_tf[0]._y:=1] + 351770 t.registers.read_write_demux.vc.ct.C2Els[0]._y : 1 [by t.registers.read_write_demux.vc.ct.in[0]:=0] + 351799 t.registers.read_write_demux.vc.ct.tmp[4] : 0 [by t.registers.read_write_demux.vc.ct.C2Els[0]._y:=1] + 354544 t.registers.read_write_demux._c_v : 0 [by t.registers.read_write_demux.c_f_c_t_or._y:=1] + 403795 t.registers.read_write_demux.vc.ct.tmp[5] : 0 [by t.registers.read_write_demux.vc.ct.C2Els[1]._y:=1] + 404112 t.registers.read_write_demux.vc.ct.C2Els[2]._y : 1 [by t.registers.read_write_demux.vc.ct.tmp[5]:=0] + 405713 t.registers.read_write_demux._in_v : 0 [by t.registers.read_write_demux.vc.ct.C2Els[2]._y:=1] + 405757 t.registers.read_write_demux.c_el._y : 1 [by t.registers.read_write_demux._in_v:=0] + 405866 t.registers.read_write_demux.in_v_buf._y : 1 [by t.registers.read_write_demux._in_v:=0] + 408518 t.registers.read_write_demux._in_c_v_ : 0 [by t.registers.read_write_demux.c_el._y:=1] + 419549 t.in.v : 0 [by t.registers.read_write_demux.in_v_buf._y:=1] [3] clock checked +Node `t.registers._clock' not found +Node `t.registers.ff[0].q' not found +Node `t.registers.ff[1].q' not found diff --git a/test/unit_tests/register_write/run/test.prs b/test/unit_tests/register_write/run/test.prs index 34a2845..223be58 100644 --- a/test/unit_tests/register_write/run/test.prs +++ b/test/unit_tests/register_write/run/test.prs @@ -17,158 +17,29 @@ = "t.data[1].d[1]" "t.registers.data[1].d[1]" = "t.data[2].d[1]" "t.registers.data[2].d[1]" = "t.data[3].d[1]" "t.registers.data[3].d[1]" -= "t.registers._clock_temp" "t.registers.inv_clk.a" -= "t.registers._clock_temp" "t.registers.clk_dly.out" -"t.registers.reset_bufarray.buf3.a"->"t.registers.reset_bufarray.buf3._y"- -~("t.registers.reset_bufarray.buf3.a")->"t.registers.reset_bufarray.buf3._y"+ -"t.registers.reset_bufarray.buf3._y"->"t.registers.reset_bufarray.buf3.y"- -~("t.registers.reset_bufarray.buf3._y")->"t.registers.reset_bufarray.buf3.y"+ -= "t.registers.reset_bufarray.supply.vdd" "t.registers.reset_bufarray.buf3.vdd" -= "t.registers.reset_bufarray.supply.vss" "t.registers.reset_bufarray.buf3.vss" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[7]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[6]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[5]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[4]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[3]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[2]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[1]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.buf3.y" -= "t.registers.reset_bufarray.in" "t.registers.reset_bufarray.buf3.a" -"t.registers.ff[0].clk_B"->"t.registers.ff[0]._clk_B"- -~("t.registers.ff[0].clk_B")->"t.registers.ff[0]._clk_B"+ -"t.registers.ff[0]._clk_B"->"t.registers.ff[0].__clk_B"- -~("t.registers.ff[0]._clk_B")->"t.registers.ff[0].__clk_B"+ -~"t.registers.ff[0].d"&~"t.registers.ff[0]._clk_B"|~"t.registers.ff[0].reset_B"|~"t.registers.ff[0].__clk_B"&~"t.registers.ff[0]._mqi"->"t.registers.ff[0]._mqib"+ -("t.registers.ff[0].d"&"t.registers.ff[0].__clk_B"|"t.registers.ff[0]._mqi"&"t.registers.ff[0]._clk_B")&"t.registers.ff[0].reset_B"->"t.registers.ff[0]._mqib"- -"t.registers.ff[0]._mqib"->"t.registers.ff[0]._mqi"- -~("t.registers.ff[0]._mqib")->"t.registers.ff[0]._mqi"+ -~"t.registers.ff[0]._mqi"&~"t.registers.ff[0].__clk_B"|~"t.registers.ff[0].reset_B"|~"t.registers.ff[0]._sqi"&~"t.registers.ff[0]._clk_B"->"t.registers.ff[0]._sqib"+ -("t.registers.ff[0]._mqi"&"t.registers.ff[0]._clk_B"|"t.registers.ff[0]._sqi"&"t.registers.ff[0].__clk_B")&"t.registers.ff[0].reset_B"->"t.registers.ff[0]._sqib"- -"t.registers.ff[0]._sqib"->"t.registers.ff[0]._sqi"- -~("t.registers.ff[0]._sqib")->"t.registers.ff[0]._sqi"+ -"t.registers.ff[0]._sqib"->"t.registers.ff[0].q"- -~("t.registers.ff[0]._sqib")->"t.registers.ff[0].q"+ -"t.registers.ff[1].clk_B"->"t.registers.ff[1]._clk_B"- -~("t.registers.ff[1].clk_B")->"t.registers.ff[1]._clk_B"+ -"t.registers.ff[1]._clk_B"->"t.registers.ff[1].__clk_B"- -~("t.registers.ff[1]._clk_B")->"t.registers.ff[1].__clk_B"+ -~"t.registers.ff[1].d"&~"t.registers.ff[1]._clk_B"|~"t.registers.ff[1].reset_B"|~"t.registers.ff[1].__clk_B"&~"t.registers.ff[1]._mqi"->"t.registers.ff[1]._mqib"+ -("t.registers.ff[1].d"&"t.registers.ff[1].__clk_B"|"t.registers.ff[1]._mqi"&"t.registers.ff[1]._clk_B")&"t.registers.ff[1].reset_B"->"t.registers.ff[1]._mqib"- -"t.registers.ff[1]._mqib"->"t.registers.ff[1]._mqi"- -~("t.registers.ff[1]._mqib")->"t.registers.ff[1]._mqi"+ -~"t.registers.ff[1]._mqi"&~"t.registers.ff[1].__clk_B"|~"t.registers.ff[1].reset_B"|~"t.registers.ff[1]._sqi"&~"t.registers.ff[1]._clk_B"->"t.registers.ff[1]._sqib"+ -("t.registers.ff[1]._mqi"&"t.registers.ff[1]._clk_B"|"t.registers.ff[1]._sqi"&"t.registers.ff[1].__clk_B")&"t.registers.ff[1].reset_B"->"t.registers.ff[1]._sqib"- -"t.registers.ff[1]._sqib"->"t.registers.ff[1]._sqi"- -~("t.registers.ff[1]._sqib")->"t.registers.ff[1]._sqi"+ -"t.registers.ff[1]._sqib"->"t.registers.ff[1].q"- -~("t.registers.ff[1]._sqib")->"t.registers.ff[1].q"+ -"t.registers.ff[2].clk_B"->"t.registers.ff[2]._clk_B"- -~("t.registers.ff[2].clk_B")->"t.registers.ff[2]._clk_B"+ -"t.registers.ff[2]._clk_B"->"t.registers.ff[2].__clk_B"- -~("t.registers.ff[2]._clk_B")->"t.registers.ff[2].__clk_B"+ -~"t.registers.ff[2].d"&~"t.registers.ff[2]._clk_B"|~"t.registers.ff[2].reset_B"|~"t.registers.ff[2].__clk_B"&~"t.registers.ff[2]._mqi"->"t.registers.ff[2]._mqib"+ -("t.registers.ff[2].d"&"t.registers.ff[2].__clk_B"|"t.registers.ff[2]._mqi"&"t.registers.ff[2]._clk_B")&"t.registers.ff[2].reset_B"->"t.registers.ff[2]._mqib"- -"t.registers.ff[2]._mqib"->"t.registers.ff[2]._mqi"- -~("t.registers.ff[2]._mqib")->"t.registers.ff[2]._mqi"+ -~"t.registers.ff[2]._mqi"&~"t.registers.ff[2].__clk_B"|~"t.registers.ff[2].reset_B"|~"t.registers.ff[2]._sqi"&~"t.registers.ff[2]._clk_B"->"t.registers.ff[2]._sqib"+ -("t.registers.ff[2]._mqi"&"t.registers.ff[2]._clk_B"|"t.registers.ff[2]._sqi"&"t.registers.ff[2].__clk_B")&"t.registers.ff[2].reset_B"->"t.registers.ff[2]._sqib"- -"t.registers.ff[2]._sqib"->"t.registers.ff[2]._sqi"- -~("t.registers.ff[2]._sqib")->"t.registers.ff[2]._sqi"+ -"t.registers.ff[2]._sqib"->"t.registers.ff[2].q"- -~("t.registers.ff[2]._sqib")->"t.registers.ff[2].q"+ -"t.registers.ff[3].clk_B"->"t.registers.ff[3]._clk_B"- -~("t.registers.ff[3].clk_B")->"t.registers.ff[3]._clk_B"+ -"t.registers.ff[3]._clk_B"->"t.registers.ff[3].__clk_B"- -~("t.registers.ff[3]._clk_B")->"t.registers.ff[3].__clk_B"+ -~"t.registers.ff[3].d"&~"t.registers.ff[3]._clk_B"|~"t.registers.ff[3].reset_B"|~"t.registers.ff[3].__clk_B"&~"t.registers.ff[3]._mqi"->"t.registers.ff[3]._mqib"+ -("t.registers.ff[3].d"&"t.registers.ff[3].__clk_B"|"t.registers.ff[3]._mqi"&"t.registers.ff[3]._clk_B")&"t.registers.ff[3].reset_B"->"t.registers.ff[3]._mqib"- -"t.registers.ff[3]._mqib"->"t.registers.ff[3]._mqi"- -~("t.registers.ff[3]._mqib")->"t.registers.ff[3]._mqi"+ -~"t.registers.ff[3]._mqi"&~"t.registers.ff[3].__clk_B"|~"t.registers.ff[3].reset_B"|~"t.registers.ff[3]._sqi"&~"t.registers.ff[3]._clk_B"->"t.registers.ff[3]._sqib"+ -("t.registers.ff[3]._mqi"&"t.registers.ff[3]._clk_B"|"t.registers.ff[3]._sqi"&"t.registers.ff[3].__clk_B")&"t.registers.ff[3].reset_B"->"t.registers.ff[3]._sqib"- -"t.registers.ff[3]._sqib"->"t.registers.ff[3]._sqi"- -~("t.registers.ff[3]._sqib")->"t.registers.ff[3]._sqi"+ -"t.registers.ff[3]._sqib"->"t.registers.ff[3].q"- -~("t.registers.ff[3]._sqib")->"t.registers.ff[3].q"+ -"t.registers.ff[4].clk_B"->"t.registers.ff[4]._clk_B"- -~("t.registers.ff[4].clk_B")->"t.registers.ff[4]._clk_B"+ -"t.registers.ff[4]._clk_B"->"t.registers.ff[4].__clk_B"- -~("t.registers.ff[4]._clk_B")->"t.registers.ff[4].__clk_B"+ -~"t.registers.ff[4].d"&~"t.registers.ff[4]._clk_B"|~"t.registers.ff[4].reset_B"|~"t.registers.ff[4].__clk_B"&~"t.registers.ff[4]._mqi"->"t.registers.ff[4]._mqib"+ -("t.registers.ff[4].d"&"t.registers.ff[4].__clk_B"|"t.registers.ff[4]._mqi"&"t.registers.ff[4]._clk_B")&"t.registers.ff[4].reset_B"->"t.registers.ff[4]._mqib"- -"t.registers.ff[4]._mqib"->"t.registers.ff[4]._mqi"- -~("t.registers.ff[4]._mqib")->"t.registers.ff[4]._mqi"+ -~"t.registers.ff[4]._mqi"&~"t.registers.ff[4].__clk_B"|~"t.registers.ff[4].reset_B"|~"t.registers.ff[4]._sqi"&~"t.registers.ff[4]._clk_B"->"t.registers.ff[4]._sqib"+ -("t.registers.ff[4]._mqi"&"t.registers.ff[4]._clk_B"|"t.registers.ff[4]._sqi"&"t.registers.ff[4].__clk_B")&"t.registers.ff[4].reset_B"->"t.registers.ff[4]._sqib"- -"t.registers.ff[4]._sqib"->"t.registers.ff[4]._sqi"- -~("t.registers.ff[4]._sqib")->"t.registers.ff[4]._sqi"+ -"t.registers.ff[4]._sqib"->"t.registers.ff[4].q"- -~("t.registers.ff[4]._sqib")->"t.registers.ff[4].q"+ -"t.registers.ff[5].clk_B"->"t.registers.ff[5]._clk_B"- -~("t.registers.ff[5].clk_B")->"t.registers.ff[5]._clk_B"+ -"t.registers.ff[5]._clk_B"->"t.registers.ff[5].__clk_B"- -~("t.registers.ff[5]._clk_B")->"t.registers.ff[5].__clk_B"+ -~"t.registers.ff[5].d"&~"t.registers.ff[5]._clk_B"|~"t.registers.ff[5].reset_B"|~"t.registers.ff[5].__clk_B"&~"t.registers.ff[5]._mqi"->"t.registers.ff[5]._mqib"+ -("t.registers.ff[5].d"&"t.registers.ff[5].__clk_B"|"t.registers.ff[5]._mqi"&"t.registers.ff[5]._clk_B")&"t.registers.ff[5].reset_B"->"t.registers.ff[5]._mqib"- -"t.registers.ff[5]._mqib"->"t.registers.ff[5]._mqi"- -~("t.registers.ff[5]._mqib")->"t.registers.ff[5]._mqi"+ -~"t.registers.ff[5]._mqi"&~"t.registers.ff[5].__clk_B"|~"t.registers.ff[5].reset_B"|~"t.registers.ff[5]._sqi"&~"t.registers.ff[5]._clk_B"->"t.registers.ff[5]._sqib"+ -("t.registers.ff[5]._mqi"&"t.registers.ff[5]._clk_B"|"t.registers.ff[5]._sqi"&"t.registers.ff[5].__clk_B")&"t.registers.ff[5].reset_B"->"t.registers.ff[5]._sqib"- -"t.registers.ff[5]._sqib"->"t.registers.ff[5]._sqi"- -~("t.registers.ff[5]._sqib")->"t.registers.ff[5]._sqi"+ -"t.registers.ff[5]._sqib"->"t.registers.ff[5].q"- -~("t.registers.ff[5]._sqib")->"t.registers.ff[5].q"+ -"t.registers.ff[6].clk_B"->"t.registers.ff[6]._clk_B"- -~("t.registers.ff[6].clk_B")->"t.registers.ff[6]._clk_B"+ -"t.registers.ff[6]._clk_B"->"t.registers.ff[6].__clk_B"- -~("t.registers.ff[6]._clk_B")->"t.registers.ff[6].__clk_B"+ -~"t.registers.ff[6].d"&~"t.registers.ff[6]._clk_B"|~"t.registers.ff[6].reset_B"|~"t.registers.ff[6].__clk_B"&~"t.registers.ff[6]._mqi"->"t.registers.ff[6]._mqib"+ -("t.registers.ff[6].d"&"t.registers.ff[6].__clk_B"|"t.registers.ff[6]._mqi"&"t.registers.ff[6]._clk_B")&"t.registers.ff[6].reset_B"->"t.registers.ff[6]._mqib"- -"t.registers.ff[6]._mqib"->"t.registers.ff[6]._mqi"- -~("t.registers.ff[6]._mqib")->"t.registers.ff[6]._mqi"+ -~"t.registers.ff[6]._mqi"&~"t.registers.ff[6].__clk_B"|~"t.registers.ff[6].reset_B"|~"t.registers.ff[6]._sqi"&~"t.registers.ff[6]._clk_B"->"t.registers.ff[6]._sqib"+ -("t.registers.ff[6]._mqi"&"t.registers.ff[6]._clk_B"|"t.registers.ff[6]._sqi"&"t.registers.ff[6].__clk_B")&"t.registers.ff[6].reset_B"->"t.registers.ff[6]._sqib"- -"t.registers.ff[6]._sqib"->"t.registers.ff[6]._sqi"- -~("t.registers.ff[6]._sqib")->"t.registers.ff[6]._sqi"+ -"t.registers.ff[6]._sqib"->"t.registers.ff[6].q"- -~("t.registers.ff[6]._sqib")->"t.registers.ff[6].q"+ -"t.registers.ff[7].clk_B"->"t.registers.ff[7]._clk_B"- -~("t.registers.ff[7].clk_B")->"t.registers.ff[7]._clk_B"+ -"t.registers.ff[7]._clk_B"->"t.registers.ff[7].__clk_B"- -~("t.registers.ff[7]._clk_B")->"t.registers.ff[7].__clk_B"+ -~"t.registers.ff[7].d"&~"t.registers.ff[7]._clk_B"|~"t.registers.ff[7].reset_B"|~"t.registers.ff[7].__clk_B"&~"t.registers.ff[7]._mqi"->"t.registers.ff[7]._mqib"+ -("t.registers.ff[7].d"&"t.registers.ff[7].__clk_B"|"t.registers.ff[7]._mqi"&"t.registers.ff[7]._clk_B")&"t.registers.ff[7].reset_B"->"t.registers.ff[7]._mqib"- -"t.registers.ff[7]._mqib"->"t.registers.ff[7]._mqi"- -~("t.registers.ff[7]._mqib")->"t.registers.ff[7]._mqi"+ -~"t.registers.ff[7]._mqi"&~"t.registers.ff[7].__clk_B"|~"t.registers.ff[7].reset_B"|~"t.registers.ff[7]._sqi"&~"t.registers.ff[7]._clk_B"->"t.registers.ff[7]._sqib"+ -("t.registers.ff[7]._mqi"&"t.registers.ff[7]._clk_B"|"t.registers.ff[7]._sqi"&"t.registers.ff[7].__clk_B")&"t.registers.ff[7].reset_B"->"t.registers.ff[7]._sqib"- -"t.registers.ff[7]._sqib"->"t.registers.ff[7]._sqi"- -~("t.registers.ff[7]._sqib")->"t.registers.ff[7]._sqi"+ -"t.registers.ff[7]._sqib"->"t.registers.ff[7].q"- -~("t.registers.ff[7]._sqib")->"t.registers.ff[7].q"+ -= "t.registers.ff[7].clk_B" "t.registers.clock_buffer[3].out[1]" -= "t.registers.ff[7].clk_B" "t.registers.clock_buffer[3].out[0]" -= "t.registers.ff[7].clk_B" "t.registers.ff[6].clk_B" -= "t.registers.ff[5].clk_B" "t.registers.clock_buffer[2].out[1]" -= "t.registers.ff[5].clk_B" "t.registers.clock_buffer[2].out[0]" -= "t.registers.ff[5].clk_B" "t.registers.ff[4].clk_B" -= "t.registers.ff[3].clk_B" "t.registers.clock_buffer[1].out[1]" -= "t.registers.ff[3].clk_B" "t.registers.clock_buffer[1].out[0]" -= "t.registers.ff[3].clk_B" "t.registers.ff[2].clk_B" -= "t.registers.ff[1].clk_B" "t.registers.clock_buffer[0].out[1]" -= "t.registers.ff[1].clk_B" "t.registers.clock_buffer[0].out[0]" -= "t.registers.ff[1].clk_B" "t.registers.ff[0].clk_B" -= "t.registers._clock_temp_inv" "t.registers.clk_X.in" -= "t.registers._clock_temp_inv" "t.registers.inv_clk.y" -= "t.registers.reset_mem_B" "t.registers.reset_buf_BXX.a" -"t.registers.clk_X.buf1.a"->"t.registers.clk_X.buf1._y"- -~("t.registers.clk_X.buf1.a")->"t.registers.clk_X.buf1._y"+ -"t.registers.clk_X.buf1._y"->"t.registers.clk_X.buf1.y"- -~("t.registers.clk_X.buf1._y")->"t.registers.clk_X.buf1.y"+ -= "t.registers.clk_X.supply.vdd" "t.registers.clk_X.buf1.vdd" -= "t.registers.clk_X.supply.vss" "t.registers.clk_X.buf1.vss" -= "t.registers.clk_X.out" "t.registers.clk_X.buf1.y" -= "t.registers.clk_X.in" "t.registers.clk_X.buf1.a" +"t.registers.ack_and.a"&"t.registers.ack_and.b"->"t.registers.ack_and._y"- +~("t.registers.ack_and.a"&"t.registers.ack_and.b")->"t.registers.ack_and._y"+ +"t.registers.ack_and._y"->"t.registers.ack_and.y"- +~("t.registers.ack_and._y")->"t.registers.ack_and.y"+ += "t.registers.ack_and.b" "t.registers._in_flag.a" += "t.registers.ack_and.b" "t.registers.ack_and.a" += "t.registers.ack_and.b" "t.registers._in_temp2.a" += "t.registers._in_flag.d.d[0].d[0]" "t.registers._in_flag.d.d[0].f" += "t.registers._in_flag.d.d[0].d[1]" "t.registers._in_flag.d.d[0].t" += "t.registers._in_flag.d.d[0].d[0]" "t.registers._in_flag.d.d[0].f" += "t.registers._in_flag.d.d[0].d[1]" "t.registers._in_flag.d.d[0].t" += "t.registers._in_flag.d.d[0].d[0]" "t.registers._in_flag.d.d[0].f" += "t.registers._in_flag.d.d[0].d[1]" "t.registers._in_flag.d.d[0].t" += "t.registers._in_flag.v" "t.registers.read_write_demux.cond.v" += "t.registers._in_flag.a" "t.registers.read_write_demux.cond.a" += "t.registers._in_flag.d.d[0].f" "t.registers.read_write_demux.cond.d.d[0].f" += "t.registers._in_flag.d.d[0].t" "t.registers.read_write_demux.cond.d.d[0].t" += "t.registers._in_flag.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].d[0]" += "t.registers._in_flag.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].d[1]" += "t.registers.supply.vss" "t.registers.read_write_demux.supply.vss" += "t.registers.supply.vdd" "t.registers.read_write_demux.supply.vdd" += "t.registers.supply.vdd" "t.registers.ack_and.vdd" += "t.registers.supply.vss" "t.registers.ack_and.vss" = "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f" = "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t" = "t.registers.in.d.d[1].d[0]" "t.registers.in.d.d[1].f" @@ -199,608 +70,915 @@ = "t.registers.in.d.d[1].d[1]" "t.registers.in.d.d[1].t" = "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f" = "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t" -= "t.registers.in.a" "t.registers.ack_input_X.out" -= "t.registers.in.v" "t.registers.val_input_X.out" -= "t.registers.in.d.d[0].f" "t.registers._in_temp.d[0].f" -= "t.registers.in.d.d[0].t" "t.registers._in_temp.d[0].t" -= "t.registers.in.d.d[0].d[0]" "t.registers._in_temp.d[0].d[0]" -= "t.registers.in.d.d[0].d[1]" "t.registers._in_temp.d[0].d[1]" -= "t.registers.in.d.d[1].f" "t.registers._in_temp.d[1].f" -= "t.registers.in.d.d[1].t" "t.registers._in_temp.d[1].t" -= "t.registers.in.d.d[1].d[0]" "t.registers._in_temp.d[1].d[0]" -= "t.registers.in.d.d[1].d[1]" "t.registers._in_temp.d[1].d[1]" -= "t.registers.in.d.d[2].f" "t.registers._in_temp.d[2].f" -= "t.registers.in.d.d[2].t" "t.registers._in_temp.d[2].t" -= "t.registers.in.d.d[2].d[0]" "t.registers._in_temp.d[2].d[0]" -= "t.registers.in.d.d[2].d[1]" "t.registers._in_temp.d[2].d[1]" -= "t.registers.in.d.d[3].f" "t.registers._in_temp.d[3].f" -= "t.registers.in.d.d[3].t" "t.registers._in_temp.d[3].t" -= "t.registers.in.d.d[3].d[0]" "t.registers._in_temp.d[3].d[0]" -= "t.registers.in.d.d[3].d[1]" "t.registers._in_temp.d[3].d[1]" -= "t.registers.in.d.d[4].f" "t.registers._in_temp.d[4].f" -= "t.registers.in.d.d[4].t" "t.registers._in_temp.d[4].t" -= "t.registers.in.d.d[4].d[0]" "t.registers._in_temp.d[4].d[0]" -= "t.registers.in.d.d[4].d[1]" "t.registers._in_temp.d[4].d[1]" += "t.registers.in.a" "t.registers.ack_and.y" += "t.registers.in.v" "t.registers._in_temp2.v" += "t.registers.in.d.d[0].f" "t.registers._in_temp2.d.d[0].f" += "t.registers.in.d.d[0].t" "t.registers._in_temp2.d.d[0].t" += "t.registers.in.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].d[0]" += "t.registers.in.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].d[1]" += "t.registers.in.d.d[1].f" "t.registers._in_temp2.d.d[1].f" += "t.registers.in.d.d[1].t" "t.registers._in_temp2.d.d[1].t" += "t.registers.in.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].d[0]" += "t.registers.in.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].d[1]" += "t.registers.in.d.d[2].f" "t.registers._in_temp2.d.d[2].f" += "t.registers.in.d.d[2].t" "t.registers._in_temp2.d.d[2].t" += "t.registers.in.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].d[0]" += "t.registers.in.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].d[1]" += "t.registers.in.d.d[3].f" "t.registers._in_temp2.d.d[3].f" += "t.registers.in.d.d[3].t" "t.registers._in_temp2.d.d[3].t" += "t.registers.in.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].d[0]" += "t.registers.in.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].d[1]" += "t.registers.in.d.d[4].f" "t.registers._in_flag.d.d[0].f" += "t.registers.in.d.d[4].t" "t.registers._in_flag.d.d[0].t" += "t.registers.in.d.d[4].d[0]" "t.registers._in_flag.d.d[0].d[0]" += "t.registers.in.d.d[4].d[1]" "t.registers._in_flag.d.d[0].d[1]" = "t.registers.in.d.d[4].d[0]" "t.registers.in.d.d[4].f" = "t.registers.in.d.d[4].d[1]" "t.registers.in.d.d[4].t" -= "t.registers.in.d.d[3].d[0]" "t.registers.atree[1].in[1]" -= "t.registers.in.d.d[3].d[0]" "t.registers.atree[0].in[1]" = "t.registers.in.d.d[3].d[0]" "t.registers.in.d.d[3].f" -= "t.registers.in.d.d[3].d[1]" "t.registers.atree[3].in[1]" -= "t.registers.in.d.d[3].d[1]" "t.registers.atree[2].in[1]" = "t.registers.in.d.d[3].d[1]" "t.registers.in.d.d[3].t" -= "t.registers.in.d.d[2].d[0]" "t.registers.atree[2].in[0]" -= "t.registers.in.d.d[2].d[0]" "t.registers.atree[0].in[0]" = "t.registers.in.d.d[2].d[0]" "t.registers.in.d.d[2].f" -= "t.registers.in.d.d[2].d[1]" "t.registers.atree[3].in[0]" -= "t.registers.in.d.d[2].d[1]" "t.registers.atree[1].in[0]" = "t.registers.in.d.d[2].d[1]" "t.registers.in.d.d[2].t" = "t.registers.in.d.d[1].d[0]" "t.registers.in.d.d[1].f" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff[7].d" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff[5].d" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff[3].d" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff[1].d" = "t.registers.in.d.d[1].d[1]" "t.registers.in.d.d[1].t" = "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff[6].d" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff[4].d" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff[2].d" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff[0].d" = "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t" -"t.registers.reset_buf_BX.a"->"t.registers.reset_buf_BX._y"- -~("t.registers.reset_buf_BX.a")->"t.registers.reset_buf_BX._y"+ -"t.registers.reset_buf_BX._y"->"t.registers.reset_buf_BX.y"- -~("t.registers.reset_buf_BX._y")->"t.registers.reset_buf_BX.y"+ -"t.registers.ack_dly.and2[0].a"&"t.registers.ack_dly.and2[0].b"->"t.registers.ack_dly.and2[0]._y"- -~("t.registers.ack_dly.and2[0].a"&"t.registers.ack_dly.and2[0].b")->"t.registers.ack_dly.and2[0]._y"+ -"t.registers.ack_dly.and2[0]._y"->"t.registers.ack_dly.and2[0].y"- -~("t.registers.ack_dly.and2[0]._y")->"t.registers.ack_dly.and2[0].y"+ -"t.registers.ack_dly.and2[1].a"&"t.registers.ack_dly.and2[1].b"->"t.registers.ack_dly.and2[1]._y"- -~("t.registers.ack_dly.and2[1].a"&"t.registers.ack_dly.and2[1].b")->"t.registers.ack_dly.and2[1]._y"+ -"t.registers.ack_dly.and2[1]._y"->"t.registers.ack_dly.and2[1].y"- -~("t.registers.ack_dly.and2[1]._y")->"t.registers.ack_dly.and2[1].y"+ -= "t.registers.ack_dly.s[0]" "t.registers.ack_dly.mu2[0].s" -= "t.registers.ack_dly.s[0]" "t.registers.ack_dly.and2[0].b" -= "t.registers.ack_dly.s[1]" "t.registers.ack_dly.mu2[1].s" -= "t.registers.ack_dly.s[1]" "t.registers.ack_dly.and2[1].b" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.dly[2].vdd" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.dly[1].vdd" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.dly[0].vdd" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.mu2[1].vdd" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.mu2[0].vdd" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.and2[1].vdd" -= "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.and2[0].vdd" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.dly[2].vss" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.dly[1].vss" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.dly[0].vss" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.mu2[1].vss" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.mu2[0].vss" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.and2[1].vss" -= "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.and2[0].vss" -"t.registers.ack_dly.mu2[0].s"->"t.registers.ack_dly.mu2[0]._s"- -~("t.registers.ack_dly.mu2[0].s")->"t.registers.ack_dly.mu2[0]._s"+ -~"t.registers.ack_dly.mu2[0].a"&~"t.registers.ack_dly.mu2[0].s"|~"t.registers.ack_dly.mu2[0].b"&~"t.registers.ack_dly.mu2[0]._s"->"t.registers.ack_dly.mu2[0]._y"+ -"t.registers.ack_dly.mu2[0].a"&"t.registers.ack_dly.mu2[0]._s"|"t.registers.ack_dly.mu2[0].b"&"t.registers.ack_dly.mu2[0].s"->"t.registers.ack_dly.mu2[0]._y"- -"t.registers.ack_dly.mu2[0]._y"->"t.registers.ack_dly.mu2[0].y"- -~("t.registers.ack_dly.mu2[0]._y")->"t.registers.ack_dly.mu2[0].y"+ -"t.registers.ack_dly.mu2[1].s"->"t.registers.ack_dly.mu2[1]._s"- -~("t.registers.ack_dly.mu2[1].s")->"t.registers.ack_dly.mu2[1]._s"+ -~"t.registers.ack_dly.mu2[1].a"&~"t.registers.ack_dly.mu2[1].s"|~"t.registers.ack_dly.mu2[1].b"&~"t.registers.ack_dly.mu2[1]._s"->"t.registers.ack_dly.mu2[1]._y"+ -"t.registers.ack_dly.mu2[1].a"&"t.registers.ack_dly.mu2[1]._s"|"t.registers.ack_dly.mu2[1].b"&"t.registers.ack_dly.mu2[1].s"->"t.registers.ack_dly.mu2[1]._y"- -"t.registers.ack_dly.mu2[1]._y"->"t.registers.ack_dly.mu2[1].y"- -~("t.registers.ack_dly.mu2[1]._y")->"t.registers.ack_dly.mu2[1].y"+ -"t.registers.ack_dly.dly[0].a"->"t.registers.ack_dly.dly[0]._y"- -~("t.registers.ack_dly.dly[0].a")->"t.registers.ack_dly.dly[0]._y"+ -"t.registers.ack_dly.dly[0]._y"->"t.registers.ack_dly.dly[0].__y"- -~("t.registers.ack_dly.dly[0]._y")->"t.registers.ack_dly.dly[0].__y"+ -"t.registers.ack_dly.dly[0].__y"->"t.registers.ack_dly.dly[0].___y"- -~("t.registers.ack_dly.dly[0].__y")->"t.registers.ack_dly.dly[0].___y"+ -"t.registers.ack_dly.dly[0].___y"->"t.registers.ack_dly.dly[0].y"- -~("t.registers.ack_dly.dly[0].___y")->"t.registers.ack_dly.dly[0].y"+ -"t.registers.ack_dly.dly[1].a"->"t.registers.ack_dly.dly[1]._y"- -~("t.registers.ack_dly.dly[1].a")->"t.registers.ack_dly.dly[1]._y"+ -"t.registers.ack_dly.dly[1]._y"->"t.registers.ack_dly.dly[1].__y"- -~("t.registers.ack_dly.dly[1]._y")->"t.registers.ack_dly.dly[1].__y"+ -"t.registers.ack_dly.dly[1].__y"->"t.registers.ack_dly.dly[1].___y"- -~("t.registers.ack_dly.dly[1].__y")->"t.registers.ack_dly.dly[1].___y"+ -"t.registers.ack_dly.dly[1].___y"->"t.registers.ack_dly.dly[1].y"- -~("t.registers.ack_dly.dly[1].___y")->"t.registers.ack_dly.dly[1].y"+ -"t.registers.ack_dly.dly[2].a"->"t.registers.ack_dly.dly[2]._y"- -~("t.registers.ack_dly.dly[2].a")->"t.registers.ack_dly.dly[2]._y"+ -"t.registers.ack_dly.dly[2]._y"->"t.registers.ack_dly.dly[2].__y"- -~("t.registers.ack_dly.dly[2]._y")->"t.registers.ack_dly.dly[2].__y"+ -"t.registers.ack_dly.dly[2].__y"->"t.registers.ack_dly.dly[2].___y"- -~("t.registers.ack_dly.dly[2].__y")->"t.registers.ack_dly.dly[2].___y"+ -"t.registers.ack_dly.dly[2].___y"->"t.registers.ack_dly.dly[2].y"- -~("t.registers.ack_dly.dly[2].___y")->"t.registers.ack_dly.dly[2].y"+ -= "t.registers.ack_dly.dly[2].y" "t.registers.ack_dly.mu2[1].b" -= "t.registers.ack_dly.dly[2].a" "t.registers.ack_dly.dly[1].y" -= "t.registers.ack_dly.dly[1].a" "t.registers.ack_dly.and2[1].y" -= "t.registers.ack_dly.dly[0].y" "t.registers.ack_dly.mu2[0].b" -= "t.registers.ack_dly.dly[0].a" "t.registers.ack_dly.and2[0].y" -= "t.registers.ack_dly._a[1]" "t.registers.ack_dly.mu2[1].a" -= "t.registers.ack_dly._a[1]" "t.registers.ack_dly.and2[1].a" -= "t.registers.ack_dly._a[1]" "t.registers.ack_dly.mu2[0].y" -= "t.registers.ack_dly.out" "t.registers.ack_dly.mu2[1].y" -= "t.registers.ack_dly.out" "t.registers.ack_dly._a[2]" -= "t.registers.ack_dly.in" "t.registers.ack_dly.mu2[0].a" -= "t.registers.ack_dly.in" "t.registers.ack_dly.and2[0].a" -= "t.registers.ack_dly.in" "t.registers.ack_dly._a[0]" -= "t.registers.reset_B" "t.registers.reset_buf_BX.a" -= "t.registers._reset_BX" "t.registers.reset_buf_BX.y" -= "t.registers._reset_mem_BXX[0]" "t.registers.reset_bufarray.out[0]" -= "t.registers._reset_mem_BXX[1]" "t.registers.reset_bufarray.out[1]" -= "t.registers._reset_mem_BXX[2]" "t.registers.reset_bufarray.out[2]" -= "t.registers._reset_mem_BXX[3]" "t.registers.reset_bufarray.out[3]" -= "t.registers._reset_mem_BXX[4]" "t.registers.reset_bufarray.out[4]" -= "t.registers._reset_mem_BXX[5]" "t.registers.reset_bufarray.out[5]" -= "t.registers._reset_mem_BXX[6]" "t.registers.reset_bufarray.out[6]" -= "t.registers._reset_mem_BXX[7]" "t.registers.reset_bufarray.out[7]" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[7].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[6].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[5].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[4].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[3].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[2].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[1].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff[0].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[7]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[6]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[5]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[4]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[3]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[2]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[1]" -= "t.registers._out_encoder[0]" "t.registers.and_encoder[0].a" -= "t.registers._out_encoder[0]" "t.registers.atree[0].out" -= "t.registers._out_encoder[1]" "t.registers.and_encoder[1].a" -= "t.registers._out_encoder[1]" "t.registers.atree[1].out" -= "t.registers._out_encoder[2]" "t.registers.and_encoder[2].a" -= "t.registers._out_encoder[2]" "t.registers.atree[2].out" -= "t.registers._out_encoder[3]" "t.registers.and_encoder[3].a" -= "t.registers._out_encoder[3]" "t.registers.atree[3].out" -= "t.registers._clock_word_temp[0]" "t.registers.clock_buffer[0].in" -= "t.registers._clock_word_temp[0]" "t.registers.and_encoder[0].y" -= "t.registers._clock_word_temp[1]" "t.registers.clock_buffer[1].in" -= "t.registers._clock_word_temp[1]" "t.registers.and_encoder[1].y" -= "t.registers._clock_word_temp[2]" "t.registers.clock_buffer[2].in" -= "t.registers._clock_word_temp[2]" "t.registers.and_encoder[2].y" -= "t.registers._clock_word_temp[3]" "t.registers.clock_buffer[3].in" -= "t.registers._clock_word_temp[3]" "t.registers.and_encoder[3].y" -"t.registers.and_encoder[0].a"&"t.registers.and_encoder[0].b"->"t.registers.and_encoder[0]._y"- -~("t.registers.and_encoder[0].a"&"t.registers.and_encoder[0].b")->"t.registers.and_encoder[0]._y"+ -"t.registers.and_encoder[0]._y"->"t.registers.and_encoder[0].y"- -~("t.registers.and_encoder[0]._y")->"t.registers.and_encoder[0].y"+ -"t.registers.and_encoder[1].a"&"t.registers.and_encoder[1].b"->"t.registers.and_encoder[1]._y"- -~("t.registers.and_encoder[1].a"&"t.registers.and_encoder[1].b")->"t.registers.and_encoder[1]._y"+ -"t.registers.and_encoder[1]._y"->"t.registers.and_encoder[1].y"- -~("t.registers.and_encoder[1]._y")->"t.registers.and_encoder[1].y"+ -"t.registers.and_encoder[2].a"&"t.registers.and_encoder[2].b"->"t.registers.and_encoder[2]._y"- -~("t.registers.and_encoder[2].a"&"t.registers.and_encoder[2].b")->"t.registers.and_encoder[2]._y"+ -"t.registers.and_encoder[2]._y"->"t.registers.and_encoder[2].y"- -~("t.registers.and_encoder[2]._y")->"t.registers.and_encoder[2].y"+ -"t.registers.and_encoder[3].a"&"t.registers.and_encoder[3].b"->"t.registers.and_encoder[3]._y"- -~("t.registers.and_encoder[3].a"&"t.registers.and_encoder[3].b")->"t.registers.and_encoder[3]._y"+ -"t.registers.and_encoder[3]._y"->"t.registers.and_encoder[3].y"- -~("t.registers.and_encoder[3]._y")->"t.registers.and_encoder[3].y"+ -= "t.registers._in_temp.d[0].d[0]" "t.registers._in_temp.d[0].f" -= "t.registers._in_temp.d[0].d[1]" "t.registers._in_temp.d[0].t" -= "t.registers._in_temp.d[1].d[0]" "t.registers._in_temp.d[1].f" -= "t.registers._in_temp.d[1].d[1]" "t.registers._in_temp.d[1].t" -= "t.registers._in_temp.d[2].d[0]" "t.registers._in_temp.d[2].f" -= "t.registers._in_temp.d[2].d[1]" "t.registers._in_temp.d[2].t" -= "t.registers._in_temp.d[3].d[0]" "t.registers._in_temp.d[3].f" -= "t.registers._in_temp.d[3].d[1]" "t.registers._in_temp.d[3].t" -= "t.registers._in_temp.d[4].d[0]" "t.registers._in_temp.d[4].f" -= "t.registers._in_temp.d[4].d[1]" "t.registers._in_temp.d[4].t" -= "t.registers._in_temp.d[4].d[0]" "t.registers._in_temp.d[4].f" -= "t.registers._in_temp.d[4].d[1]" "t.registers._in_temp.d[4].t" -= "t.registers._in_temp.d[3].d[0]" "t.registers._in_temp.d[3].f" -= "t.registers._in_temp.d[3].d[1]" "t.registers._in_temp.d[3].t" -= "t.registers._in_temp.d[2].d[0]" "t.registers._in_temp.d[2].f" -= "t.registers._in_temp.d[2].d[1]" "t.registers._in_temp.d[2].t" -= "t.registers._in_temp.d[1].d[0]" "t.registers._in_temp.d[1].f" -= "t.registers._in_temp.d[1].d[1]" "t.registers._in_temp.d[1].t" -= "t.registers._in_temp.d[0].d[0]" "t.registers._in_temp.d[0].f" -= "t.registers._in_temp.d[0].d[1]" "t.registers._in_temp.d[0].t" -= "t.registers._in_temp.d[0].f" "t.registers.val_input.in.d[0].f" -= "t.registers._in_temp.d[0].t" "t.registers.val_input.in.d[0].t" -= "t.registers._in_temp.d[0].d[0]" "t.registers.val_input.in.d[0].d[0]" -= "t.registers._in_temp.d[0].d[1]" "t.registers.val_input.in.d[0].d[1]" -= "t.registers._in_temp.d[1].f" "t.registers.val_input.in.d[1].f" -= "t.registers._in_temp.d[1].t" "t.registers.val_input.in.d[1].t" -= "t.registers._in_temp.d[1].d[0]" "t.registers.val_input.in.d[1].d[0]" -= "t.registers._in_temp.d[1].d[1]" "t.registers.val_input.in.d[1].d[1]" -= "t.registers._in_temp.d[2].f" "t.registers.val_input.in.d[2].f" -= "t.registers._in_temp.d[2].t" "t.registers.val_input.in.d[2].t" -= "t.registers._in_temp.d[2].d[0]" "t.registers.val_input.in.d[2].d[0]" -= "t.registers._in_temp.d[2].d[1]" "t.registers.val_input.in.d[2].d[1]" -= "t.registers._in_temp.d[3].f" "t.registers.val_input.in.d[3].f" -= "t.registers._in_temp.d[3].t" "t.registers.val_input.in.d[3].t" -= "t.registers._in_temp.d[3].d[0]" "t.registers.val_input.in.d[3].d[0]" -= "t.registers._in_temp.d[3].d[1]" "t.registers.val_input.in.d[3].d[1]" -= "t.registers._in_temp.d[4].f" "t.registers.val_input.in.d[4].f" -= "t.registers._in_temp.d[4].t" "t.registers.val_input.in.d[4].t" -= "t.registers._in_temp.d[4].d[0]" "t.registers.val_input.in.d[4].d[0]" -= "t.registers._in_temp.d[4].d[1]" "t.registers.val_input.in.d[4].d[1]" -= "t.registers._reset_mem_BX" "t.registers.reset_bufarray.in" -= "t.registers._reset_mem_BX" "t.registers.reset_buf_BXX.y" -= "t.registers._in_a_temp" "t.registers.ack_input_X.in" -= "t.registers._in_a_temp" "t.registers.ack_dly.out" -= "t.registers.supply.vss" "t.registers.clock_buffer[3].supply.vss" -= "t.registers.supply.vdd" "t.registers.clock_buffer[3].supply.vdd" -= "t.registers.supply.vss" "t.registers.clock_buffer[2].supply.vss" -= "t.registers.supply.vdd" "t.registers.clock_buffer[2].supply.vdd" -= "t.registers.supply.vss" "t.registers.clock_buffer[1].supply.vss" -= "t.registers.supply.vdd" "t.registers.clock_buffer[1].supply.vdd" -= "t.registers.supply.vss" "t.registers.clock_buffer[0].supply.vss" -= "t.registers.supply.vdd" "t.registers.clock_buffer[0].supply.vdd" -= "t.registers.supply.vss" "t.registers.atree[3].supply.vss" -= "t.registers.supply.vdd" "t.registers.atree[3].supply.vdd" -= "t.registers.supply.vss" "t.registers.atree[2].supply.vss" -= "t.registers.supply.vdd" "t.registers.atree[2].supply.vdd" -= "t.registers.supply.vss" "t.registers.atree[1].supply.vss" -= "t.registers.supply.vdd" "t.registers.atree[1].supply.vdd" -= "t.registers.supply.vss" "t.registers.atree[0].supply.vss" -= "t.registers.supply.vdd" "t.registers.atree[0].supply.vdd" -= "t.registers.supply.vss" "t.registers.reset_bufarray.supply.vss" -= "t.registers.supply.vdd" "t.registers.reset_bufarray.supply.vdd" -= "t.registers.supply.vss" "t.registers.ack_input_X.supply.vss" -= "t.registers.supply.vdd" "t.registers.ack_input_X.supply.vdd" -= "t.registers.supply.vss" "t.registers.ack_dly.supply.vss" -= "t.registers.supply.vdd" "t.registers.ack_dly.supply.vdd" -= "t.registers.supply.vss" "t.registers.clk_X.supply.vss" -= "t.registers.supply.vdd" "t.registers.clk_X.supply.vdd" -= "t.registers.supply.vss" "t.registers.clk_dly.supply.vss" -= "t.registers.supply.vdd" "t.registers.clk_dly.supply.vdd" -= "t.registers.supply.vss" "t.registers.val_input_X.supply.vss" -= "t.registers.supply.vdd" "t.registers.val_input_X.supply.vdd" -= "t.registers.supply.vss" "t.registers.val_input.supply.vss" -= "t.registers.supply.vdd" "t.registers.val_input.supply.vdd" -= "t.registers.supply.vdd" "t.registers.ff[7].vdd" -= "t.registers.supply.vdd" "t.registers.ff[6].vdd" -= "t.registers.supply.vdd" "t.registers.and_encoder[3].vdd" -= "t.registers.supply.vdd" "t.registers.ff[5].vdd" -= "t.registers.supply.vdd" "t.registers.ff[4].vdd" -= "t.registers.supply.vdd" "t.registers.and_encoder[2].vdd" -= "t.registers.supply.vdd" "t.registers.ff[3].vdd" -= "t.registers.supply.vdd" "t.registers.ff[2].vdd" -= "t.registers.supply.vdd" "t.registers.and_encoder[1].vdd" -= "t.registers.supply.vdd" "t.registers.ff[1].vdd" -= "t.registers.supply.vdd" "t.registers.ff[0].vdd" -= "t.registers.supply.vdd" "t.registers.and_encoder[0].vdd" -= "t.registers.supply.vdd" "t.registers.reset_buf_BXX.vdd" -= "t.registers.supply.vdd" "t.registers.reset_buf_BX.vdd" -= "t.registers.supply.vdd" "t.registers.inv_clk.vdd" -= "t.registers.supply.vss" "t.registers.ff[7].vss" -= "t.registers.supply.vss" "t.registers.ff[6].vss" -= "t.registers.supply.vss" "t.registers.and_encoder[3].vss" -= "t.registers.supply.vss" "t.registers.ff[5].vss" -= "t.registers.supply.vss" "t.registers.ff[4].vss" -= "t.registers.supply.vss" "t.registers.and_encoder[2].vss" -= "t.registers.supply.vss" "t.registers.ff[3].vss" -= "t.registers.supply.vss" "t.registers.ff[2].vss" -= "t.registers.supply.vss" "t.registers.and_encoder[1].vss" -= "t.registers.supply.vss" "t.registers.ff[1].vss" -= "t.registers.supply.vss" "t.registers.ff[0].vss" -= "t.registers.supply.vss" "t.registers.and_encoder[0].vss" -= "t.registers.supply.vss" "t.registers.reset_buf_BXX.vss" -= "t.registers.supply.vss" "t.registers.reset_buf_BX.vss" -= "t.registers.supply.vss" "t.registers.inv_clk.vss" -= "t.registers.dly_cfg[0]" "t.registers.ack_dly.s[0]" -= "t.registers.dly_cfg[1]" "t.registers.ack_dly.s[1]" -= "t.registers.dly_cfg[0]" "t.registers.clk_dly.s[0]" -= "t.registers.dly_cfg[1]" "t.registers.clk_dly.s[1]" -"t.registers.inv_clk.a"->"t.registers.inv_clk.y"- -~("t.registers.inv_clk.a")->"t.registers.inv_clk.y"+ -= "t.registers.data[3].d[0]" "t.registers.ff[6].q" -= "t.registers.data[3].d[1]" "t.registers.ff[7].q" -= "t.registers.data[2].d[0]" "t.registers.ff[4].q" -= "t.registers.data[2].d[1]" "t.registers.ff[5].q" -= "t.registers.data[1].d[0]" "t.registers.ff[2].q" -= "t.registers.data[1].d[1]" "t.registers.ff[3].q" -= "t.registers.data[0].d[0]" "t.registers.ff[0].q" -= "t.registers.data[0].d[1]" "t.registers.ff[1].q" -"t.registers.val_input_X.buf1.a"->"t.registers.val_input_X.buf1._y"- -~("t.registers.val_input_X.buf1.a")->"t.registers.val_input_X.buf1._y"+ -"t.registers.val_input_X.buf1._y"->"t.registers.val_input_X.buf1.y"- -~("t.registers.val_input_X.buf1._y")->"t.registers.val_input_X.buf1.y"+ -= "t.registers.val_input_X.supply.vdd" "t.registers.val_input_X.buf1.vdd" -= "t.registers.val_input_X.supply.vss" "t.registers.val_input_X.buf1.vss" -= "t.registers.val_input_X.out" "t.registers.val_input_X.buf1.y" -= "t.registers.val_input_X.in" "t.registers.val_input_X.buf1.a" -"t.registers.ack_input_X.buf1.a"->"t.registers.ack_input_X.buf1._y"- -~("t.registers.ack_input_X.buf1.a")->"t.registers.ack_input_X.buf1._y"+ -"t.registers.ack_input_X.buf1._y"->"t.registers.ack_input_X.buf1.y"- -~("t.registers.ack_input_X.buf1._y")->"t.registers.ack_input_X.buf1.y"+ -= "t.registers.ack_input_X.supply.vdd" "t.registers.ack_input_X.buf1.vdd" -= "t.registers.ack_input_X.supply.vss" "t.registers.ack_input_X.buf1.vss" -= "t.registers.ack_input_X.out" "t.registers.ack_input_X.buf1.y" -= "t.registers.ack_input_X.in" "t.registers.ack_input_X.buf1.a" -= "t.registers.atree[0].supply.vdd" "t.registers.atree[0].and2s[0].vdd" -= "t.registers.atree[0].supply.vss" "t.registers.atree[0].and2s[0].vss" -"t.registers.atree[0].and2s[0].a"&"t.registers.atree[0].and2s[0].b"->"t.registers.atree[0].and2s[0]._y"- -~("t.registers.atree[0].and2s[0].a"&"t.registers.atree[0].and2s[0].b")->"t.registers.atree[0].and2s[0]._y"+ -"t.registers.atree[0].and2s[0]._y"->"t.registers.atree[0].and2s[0].y"- -~("t.registers.atree[0].and2s[0]._y")->"t.registers.atree[0].and2s[0].y"+ -= "t.registers.atree[0].in[0]" "t.registers.atree[0].and2s[0].a" -= "t.registers.atree[0].in[0]" "t.registers.atree[0].tmp[0]" -= "t.registers.atree[0].in[1]" "t.registers.atree[0].and2s[0].b" -= "t.registers.atree[0].in[1]" "t.registers.atree[0].tmp[1]" -= "t.registers.atree[0].out" "t.registers.atree[0].and2s[0].y" -= "t.registers.atree[0].out" "t.registers.atree[0].tmp[2]" -= "t.registers.atree[1].supply.vdd" "t.registers.atree[1].and2s[0].vdd" -= "t.registers.atree[1].supply.vss" "t.registers.atree[1].and2s[0].vss" -"t.registers.atree[1].and2s[0].a"&"t.registers.atree[1].and2s[0].b"->"t.registers.atree[1].and2s[0]._y"- -~("t.registers.atree[1].and2s[0].a"&"t.registers.atree[1].and2s[0].b")->"t.registers.atree[1].and2s[0]._y"+ -"t.registers.atree[1].and2s[0]._y"->"t.registers.atree[1].and2s[0].y"- -~("t.registers.atree[1].and2s[0]._y")->"t.registers.atree[1].and2s[0].y"+ -= "t.registers.atree[1].in[0]" "t.registers.atree[1].and2s[0].a" -= "t.registers.atree[1].in[0]" "t.registers.atree[1].tmp[0]" -= "t.registers.atree[1].in[1]" "t.registers.atree[1].and2s[0].b" -= "t.registers.atree[1].in[1]" "t.registers.atree[1].tmp[1]" -= "t.registers.atree[1].out" "t.registers.atree[1].and2s[0].y" -= "t.registers.atree[1].out" "t.registers.atree[1].tmp[2]" -= "t.registers.atree[2].supply.vdd" "t.registers.atree[2].and2s[0].vdd" -= "t.registers.atree[2].supply.vss" "t.registers.atree[2].and2s[0].vss" -"t.registers.atree[2].and2s[0].a"&"t.registers.atree[2].and2s[0].b"->"t.registers.atree[2].and2s[0]._y"- -~("t.registers.atree[2].and2s[0].a"&"t.registers.atree[2].and2s[0].b")->"t.registers.atree[2].and2s[0]._y"+ -"t.registers.atree[2].and2s[0]._y"->"t.registers.atree[2].and2s[0].y"- -~("t.registers.atree[2].and2s[0]._y")->"t.registers.atree[2].and2s[0].y"+ -= "t.registers.atree[2].in[0]" "t.registers.atree[2].and2s[0].a" -= "t.registers.atree[2].in[0]" "t.registers.atree[2].tmp[0]" -= "t.registers.atree[2].in[1]" "t.registers.atree[2].and2s[0].b" -= "t.registers.atree[2].in[1]" "t.registers.atree[2].tmp[1]" -= "t.registers.atree[2].out" "t.registers.atree[2].and2s[0].y" -= "t.registers.atree[2].out" "t.registers.atree[2].tmp[2]" -= "t.registers.atree[3].supply.vdd" "t.registers.atree[3].and2s[0].vdd" -= "t.registers.atree[3].supply.vss" "t.registers.atree[3].and2s[0].vss" -"t.registers.atree[3].and2s[0].a"&"t.registers.atree[3].and2s[0].b"->"t.registers.atree[3].and2s[0]._y"- -~("t.registers.atree[3].and2s[0].a"&"t.registers.atree[3].and2s[0].b")->"t.registers.atree[3].and2s[0]._y"+ -"t.registers.atree[3].and2s[0]._y"->"t.registers.atree[3].and2s[0].y"- -~("t.registers.atree[3].and2s[0]._y")->"t.registers.atree[3].and2s[0].y"+ -= "t.registers.atree[3].in[0]" "t.registers.atree[3].and2s[0].a" -= "t.registers.atree[3].in[0]" "t.registers.atree[3].tmp[0]" -= "t.registers.atree[3].in[1]" "t.registers.atree[3].and2s[0].b" -= "t.registers.atree[3].in[1]" "t.registers.atree[3].tmp[1]" -= "t.registers.atree[3].out" "t.registers.atree[3].and2s[0].y" -= "t.registers.atree[3].out" "t.registers.atree[3].tmp[2]" -~"t.registers.val_input.ct.C2Els[0].c1"&~"t.registers.val_input.ct.C2Els[0].c2"->"t.registers.val_input.ct.C2Els[0]._y"+ -"t.registers.val_input.ct.C2Els[0].c1"&"t.registers.val_input.ct.C2Els[0].c2"->"t.registers.val_input.ct.C2Els[0]._y"- -"t.registers.val_input.ct.C2Els[0]._y"->"t.registers.val_input.ct.C2Els[0].y"- -~("t.registers.val_input.ct.C2Els[0]._y")->"t.registers.val_input.ct.C2Els[0].y"+ -~"t.registers.val_input.ct.C2Els[1].c1"&~"t.registers.val_input.ct.C2Els[1].c2"->"t.registers.val_input.ct.C2Els[1]._y"+ -"t.registers.val_input.ct.C2Els[1].c1"&"t.registers.val_input.ct.C2Els[1].c2"->"t.registers.val_input.ct.C2Els[1]._y"- -"t.registers.val_input.ct.C2Els[1]._y"->"t.registers.val_input.ct.C2Els[1].y"- -~("t.registers.val_input.ct.C2Els[1]._y")->"t.registers.val_input.ct.C2Els[1].y"+ -~"t.registers.val_input.ct.C3Els[0].c1"&~"t.registers.val_input.ct.C3Els[0].c2"&~"t.registers.val_input.ct.C3Els[0].c3"->"t.registers.val_input.ct.C3Els[0]._y"+ -"t.registers.val_input.ct.C3Els[0].c1"&"t.registers.val_input.ct.C3Els[0].c2"&"t.registers.val_input.ct.C3Els[0].c3"->"t.registers.val_input.ct.C3Els[0]._y"- -"t.registers.val_input.ct.C3Els[0]._y"->"t.registers.val_input.ct.C3Els[0].y"- -~("t.registers.val_input.ct.C3Els[0]._y")->"t.registers.val_input.ct.C3Els[0].y"+ -= "t.registers.val_input.ct.tmp[5]" "t.registers.val_input.ct.C2Els[1].c1" -= "t.registers.val_input.ct.tmp[5]" "t.registers.val_input.ct.C2Els[0].y" -= "t.registers.val_input.ct.tmp[6]" "t.registers.val_input.ct.C2Els[1].c2" -= "t.registers.val_input.ct.tmp[6]" "t.registers.val_input.ct.C3Els[0].y" -= "t.registers.val_input.ct.supply.vdd" "t.registers.val_input.ct.C3Els[0].vdd" -= "t.registers.val_input.ct.supply.vdd" "t.registers.val_input.ct.C2Els[1].vdd" -= "t.registers.val_input.ct.supply.vdd" "t.registers.val_input.ct.C2Els[0].vdd" -= "t.registers.val_input.ct.supply.vss" "t.registers.val_input.ct.C3Els[0].vss" -= "t.registers.val_input.ct.supply.vss" "t.registers.val_input.ct.C2Els[1].vss" -= "t.registers.val_input.ct.supply.vss" "t.registers.val_input.ct.C2Els[0].vss" -= "t.registers.val_input.ct.in[0]" "t.registers.val_input.ct.C2Els[0].c1" -= "t.registers.val_input.ct.in[0]" "t.registers.val_input.ct.tmp[0]" -= "t.registers.val_input.ct.in[1]" "t.registers.val_input.ct.C2Els[0].c2" -= "t.registers.val_input.ct.in[1]" "t.registers.val_input.ct.tmp[1]" -= "t.registers.val_input.ct.in[2]" "t.registers.val_input.ct.C3Els[0].c1" -= "t.registers.val_input.ct.in[2]" "t.registers.val_input.ct.tmp[2]" -= "t.registers.val_input.ct.in[3]" "t.registers.val_input.ct.C3Els[0].c2" -= "t.registers.val_input.ct.in[3]" "t.registers.val_input.ct.tmp[3]" -= "t.registers.val_input.ct.in[4]" "t.registers.val_input.ct.C3Els[0].c3" -= "t.registers.val_input.ct.in[4]" "t.registers.val_input.ct.tmp[4]" -= "t.registers.val_input.ct.out" "t.registers.val_input.ct.C2Els[1].y" -= "t.registers.val_input.ct.out" "t.registers.val_input.ct.tmp[7]" -= "t.registers.val_input.ct.in[0]" "t.registers.val_input.OR2_tf[0].y" -= "t.registers.val_input.ct.in[1]" "t.registers.val_input.OR2_tf[1].y" -= "t.registers.val_input.ct.in[2]" "t.registers.val_input.OR2_tf[2].y" -= "t.registers.val_input.ct.in[3]" "t.registers.val_input.OR2_tf[3].y" -= "t.registers.val_input.ct.in[4]" "t.registers.val_input.OR2_tf[4].y" -"t.registers.val_input.OR2_tf[0].a"|"t.registers.val_input.OR2_tf[0].b"->"t.registers.val_input.OR2_tf[0]._y"- -~("t.registers.val_input.OR2_tf[0].a"|"t.registers.val_input.OR2_tf[0].b")->"t.registers.val_input.OR2_tf[0]._y"+ -"t.registers.val_input.OR2_tf[0]._y"->"t.registers.val_input.OR2_tf[0].y"- -~("t.registers.val_input.OR2_tf[0]._y")->"t.registers.val_input.OR2_tf[0].y"+ -"t.registers.val_input.OR2_tf[1].a"|"t.registers.val_input.OR2_tf[1].b"->"t.registers.val_input.OR2_tf[1]._y"- -~("t.registers.val_input.OR2_tf[1].a"|"t.registers.val_input.OR2_tf[1].b")->"t.registers.val_input.OR2_tf[1]._y"+ -"t.registers.val_input.OR2_tf[1]._y"->"t.registers.val_input.OR2_tf[1].y"- -~("t.registers.val_input.OR2_tf[1]._y")->"t.registers.val_input.OR2_tf[1].y"+ -"t.registers.val_input.OR2_tf[2].a"|"t.registers.val_input.OR2_tf[2].b"->"t.registers.val_input.OR2_tf[2]._y"- -~("t.registers.val_input.OR2_tf[2].a"|"t.registers.val_input.OR2_tf[2].b")->"t.registers.val_input.OR2_tf[2]._y"+ -"t.registers.val_input.OR2_tf[2]._y"->"t.registers.val_input.OR2_tf[2].y"- -~("t.registers.val_input.OR2_tf[2]._y")->"t.registers.val_input.OR2_tf[2].y"+ -"t.registers.val_input.OR2_tf[3].a"|"t.registers.val_input.OR2_tf[3].b"->"t.registers.val_input.OR2_tf[3]._y"- -~("t.registers.val_input.OR2_tf[3].a"|"t.registers.val_input.OR2_tf[3].b")->"t.registers.val_input.OR2_tf[3]._y"+ -"t.registers.val_input.OR2_tf[3]._y"->"t.registers.val_input.OR2_tf[3].y"- -~("t.registers.val_input.OR2_tf[3]._y")->"t.registers.val_input.OR2_tf[3].y"+ -"t.registers.val_input.OR2_tf[4].a"|"t.registers.val_input.OR2_tf[4].b"->"t.registers.val_input.OR2_tf[4]._y"- -~("t.registers.val_input.OR2_tf[4].a"|"t.registers.val_input.OR2_tf[4].b")->"t.registers.val_input.OR2_tf[4]._y"+ -"t.registers.val_input.OR2_tf[4]._y"->"t.registers.val_input.OR2_tf[4].y"- -~("t.registers.val_input.OR2_tf[4]._y")->"t.registers.val_input.OR2_tf[4].y"+ -= "t.registers.val_input.supply.vss" "t.registers.val_input.ct.supply.vss" -= "t.registers.val_input.supply.vdd" "t.registers.val_input.ct.supply.vdd" -= "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[4].vdd" -= "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[3].vdd" -= "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[2].vdd" -= "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[1].vdd" -= "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[0].vdd" -= "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[4].vss" -= "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[3].vss" -= "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[2].vss" -= "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[1].vss" -= "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[0].vss" -= "t.registers.val_input.out" "t.registers.val_input.ct.out" -= "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.in.d[0].f" -= "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.in.d[0].t" -= "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.in.d[1].f" -= "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.in.d[1].t" -= "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.in.d[2].f" -= "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.in.d[2].t" -= "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.in.d[3].f" -= "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.in.d[3].t" -= "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.in.d[4].f" -= "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.in.d[4].t" -= "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.in.d[4].f" -= "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.in.d[4].t" -= "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.in.d[3].f" -= "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.in.d[3].t" -= "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.in.d[2].f" -= "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.in.d[2].t" -= "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.in.d[1].f" -= "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.in.d[1].t" -= "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.in.d[0].f" -= "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.in.d[0].t" -= "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.OR2_tf[4].b" -= "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.in.d[4].f" -= "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.OR2_tf[4].a" -= "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.in.d[4].t" -= "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.OR2_tf[3].b" -= "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.in.d[3].f" -= "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.OR2_tf[3].a" -= "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.in.d[3].t" -= "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.OR2_tf[2].b" -= "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.in.d[2].f" -= "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.OR2_tf[2].a" -= "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.in.d[2].t" -= "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.OR2_tf[1].b" -= "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.in.d[1].f" -= "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.OR2_tf[1].a" -= "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.in.d[1].t" -= "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.OR2_tf[0].b" -= "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.in.d[0].f" -= "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.OR2_tf[0].a" -= "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.in.d[0].t" -"t.registers.clk_dly.and2[0].a"&"t.registers.clk_dly.and2[0].b"->"t.registers.clk_dly.and2[0]._y"- -~("t.registers.clk_dly.and2[0].a"&"t.registers.clk_dly.and2[0].b")->"t.registers.clk_dly.and2[0]._y"+ -"t.registers.clk_dly.and2[0]._y"->"t.registers.clk_dly.and2[0].y"- -~("t.registers.clk_dly.and2[0]._y")->"t.registers.clk_dly.and2[0].y"+ -"t.registers.clk_dly.and2[1].a"&"t.registers.clk_dly.and2[1].b"->"t.registers.clk_dly.and2[1]._y"- -~("t.registers.clk_dly.and2[1].a"&"t.registers.clk_dly.and2[1].b")->"t.registers.clk_dly.and2[1]._y"+ -"t.registers.clk_dly.and2[1]._y"->"t.registers.clk_dly.and2[1].y"- -~("t.registers.clk_dly.and2[1]._y")->"t.registers.clk_dly.and2[1].y"+ -= "t.registers.clk_dly.s[0]" "t.registers.clk_dly.mu2[0].s" -= "t.registers.clk_dly.s[0]" "t.registers.clk_dly.and2[0].b" -= "t.registers.clk_dly.s[1]" "t.registers.clk_dly.mu2[1].s" -= "t.registers.clk_dly.s[1]" "t.registers.clk_dly.and2[1].b" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.dly[2].vdd" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.dly[1].vdd" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.dly[0].vdd" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.mu2[1].vdd" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.mu2[0].vdd" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.and2[1].vdd" -= "t.registers.clk_dly.supply.vdd" "t.registers.clk_dly.and2[0].vdd" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.dly[2].vss" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.dly[1].vss" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.dly[0].vss" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.mu2[1].vss" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.mu2[0].vss" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.and2[1].vss" -= "t.registers.clk_dly.supply.vss" "t.registers.clk_dly.and2[0].vss" -"t.registers.clk_dly.mu2[0].s"->"t.registers.clk_dly.mu2[0]._s"- -~("t.registers.clk_dly.mu2[0].s")->"t.registers.clk_dly.mu2[0]._s"+ -~"t.registers.clk_dly.mu2[0].a"&~"t.registers.clk_dly.mu2[0].s"|~"t.registers.clk_dly.mu2[0].b"&~"t.registers.clk_dly.mu2[0]._s"->"t.registers.clk_dly.mu2[0]._y"+ -"t.registers.clk_dly.mu2[0].a"&"t.registers.clk_dly.mu2[0]._s"|"t.registers.clk_dly.mu2[0].b"&"t.registers.clk_dly.mu2[0].s"->"t.registers.clk_dly.mu2[0]._y"- -"t.registers.clk_dly.mu2[0]._y"->"t.registers.clk_dly.mu2[0].y"- -~("t.registers.clk_dly.mu2[0]._y")->"t.registers.clk_dly.mu2[0].y"+ -"t.registers.clk_dly.mu2[1].s"->"t.registers.clk_dly.mu2[1]._s"- -~("t.registers.clk_dly.mu2[1].s")->"t.registers.clk_dly.mu2[1]._s"+ -~"t.registers.clk_dly.mu2[1].a"&~"t.registers.clk_dly.mu2[1].s"|~"t.registers.clk_dly.mu2[1].b"&~"t.registers.clk_dly.mu2[1]._s"->"t.registers.clk_dly.mu2[1]._y"+ -"t.registers.clk_dly.mu2[1].a"&"t.registers.clk_dly.mu2[1]._s"|"t.registers.clk_dly.mu2[1].b"&"t.registers.clk_dly.mu2[1].s"->"t.registers.clk_dly.mu2[1]._y"- -"t.registers.clk_dly.mu2[1]._y"->"t.registers.clk_dly.mu2[1].y"- -~("t.registers.clk_dly.mu2[1]._y")->"t.registers.clk_dly.mu2[1].y"+ -"t.registers.clk_dly.dly[0].a"->"t.registers.clk_dly.dly[0]._y"- -~("t.registers.clk_dly.dly[0].a")->"t.registers.clk_dly.dly[0]._y"+ -"t.registers.clk_dly.dly[0]._y"->"t.registers.clk_dly.dly[0].__y"- -~("t.registers.clk_dly.dly[0]._y")->"t.registers.clk_dly.dly[0].__y"+ -"t.registers.clk_dly.dly[0].__y"->"t.registers.clk_dly.dly[0].___y"- -~("t.registers.clk_dly.dly[0].__y")->"t.registers.clk_dly.dly[0].___y"+ -"t.registers.clk_dly.dly[0].___y"->"t.registers.clk_dly.dly[0].y"- -~("t.registers.clk_dly.dly[0].___y")->"t.registers.clk_dly.dly[0].y"+ -"t.registers.clk_dly.dly[1].a"->"t.registers.clk_dly.dly[1]._y"- -~("t.registers.clk_dly.dly[1].a")->"t.registers.clk_dly.dly[1]._y"+ -"t.registers.clk_dly.dly[1]._y"->"t.registers.clk_dly.dly[1].__y"- -~("t.registers.clk_dly.dly[1]._y")->"t.registers.clk_dly.dly[1].__y"+ -"t.registers.clk_dly.dly[1].__y"->"t.registers.clk_dly.dly[1].___y"- -~("t.registers.clk_dly.dly[1].__y")->"t.registers.clk_dly.dly[1].___y"+ -"t.registers.clk_dly.dly[1].___y"->"t.registers.clk_dly.dly[1].y"- -~("t.registers.clk_dly.dly[1].___y")->"t.registers.clk_dly.dly[1].y"+ -"t.registers.clk_dly.dly[2].a"->"t.registers.clk_dly.dly[2]._y"- -~("t.registers.clk_dly.dly[2].a")->"t.registers.clk_dly.dly[2]._y"+ -"t.registers.clk_dly.dly[2]._y"->"t.registers.clk_dly.dly[2].__y"- -~("t.registers.clk_dly.dly[2]._y")->"t.registers.clk_dly.dly[2].__y"+ -"t.registers.clk_dly.dly[2].__y"->"t.registers.clk_dly.dly[2].___y"- -~("t.registers.clk_dly.dly[2].__y")->"t.registers.clk_dly.dly[2].___y"+ -"t.registers.clk_dly.dly[2].___y"->"t.registers.clk_dly.dly[2].y"- -~("t.registers.clk_dly.dly[2].___y")->"t.registers.clk_dly.dly[2].y"+ -= "t.registers.clk_dly.dly[2].y" "t.registers.clk_dly.mu2[1].b" -= "t.registers.clk_dly.dly[2].a" "t.registers.clk_dly.dly[1].y" -= "t.registers.clk_dly.dly[1].a" "t.registers.clk_dly.and2[1].y" -= "t.registers.clk_dly.dly[0].y" "t.registers.clk_dly.mu2[0].b" -= "t.registers.clk_dly.dly[0].a" "t.registers.clk_dly.and2[0].y" -= "t.registers.clk_dly._a[1]" "t.registers.clk_dly.mu2[1].a" -= "t.registers.clk_dly._a[1]" "t.registers.clk_dly.and2[1].a" -= "t.registers.clk_dly._a[1]" "t.registers.clk_dly.mu2[0].y" -= "t.registers.clk_dly.out" "t.registers.clk_dly.mu2[1].y" -= "t.registers.clk_dly.out" "t.registers.clk_dly._a[2]" -= "t.registers.clk_dly.in" "t.registers.clk_dly.mu2[0].a" -= "t.registers.clk_dly.in" "t.registers.clk_dly.and2[0].a" -= "t.registers.clk_dly.in" "t.registers.clk_dly._a[0]" -"t.registers.reset_buf_BXX.a"->"t.registers.reset_buf_BXX._y"- -~("t.registers.reset_buf_BXX.a")->"t.registers.reset_buf_BXX._y"+ -"t.registers.reset_buf_BXX._y"->"t.registers.reset_buf_BXX.y"- -~("t.registers.reset_buf_BXX._y")->"t.registers.reset_buf_BXX.y"+ -"t.registers.clock_buffer[0].buf1.a"->"t.registers.clock_buffer[0].buf1._y"- -~("t.registers.clock_buffer[0].buf1.a")->"t.registers.clock_buffer[0].buf1._y"+ -"t.registers.clock_buffer[0].buf1._y"->"t.registers.clock_buffer[0].buf1.y"- -~("t.registers.clock_buffer[0].buf1._y")->"t.registers.clock_buffer[0].buf1.y"+ -= "t.registers.clock_buffer[0].supply.vdd" "t.registers.clock_buffer[0].buf1.vdd" -= "t.registers.clock_buffer[0].supply.vss" "t.registers.clock_buffer[0].buf1.vss" -= "t.registers.clock_buffer[0].out[0]" "t.registers.clock_buffer[0].out[1]" -= "t.registers.clock_buffer[0].out[0]" "t.registers.clock_buffer[0].buf1.y" -= "t.registers.clock_buffer[0].in" "t.registers.clock_buffer[0].buf1.a" -"t.registers.clock_buffer[1].buf1.a"->"t.registers.clock_buffer[1].buf1._y"- -~("t.registers.clock_buffer[1].buf1.a")->"t.registers.clock_buffer[1].buf1._y"+ -"t.registers.clock_buffer[1].buf1._y"->"t.registers.clock_buffer[1].buf1.y"- -~("t.registers.clock_buffer[1].buf1._y")->"t.registers.clock_buffer[1].buf1.y"+ -= "t.registers.clock_buffer[1].supply.vdd" "t.registers.clock_buffer[1].buf1.vdd" -= "t.registers.clock_buffer[1].supply.vss" "t.registers.clock_buffer[1].buf1.vss" -= "t.registers.clock_buffer[1].out[0]" "t.registers.clock_buffer[1].out[1]" -= "t.registers.clock_buffer[1].out[0]" "t.registers.clock_buffer[1].buf1.y" -= "t.registers.clock_buffer[1].in" "t.registers.clock_buffer[1].buf1.a" -"t.registers.clock_buffer[2].buf1.a"->"t.registers.clock_buffer[2].buf1._y"- -~("t.registers.clock_buffer[2].buf1.a")->"t.registers.clock_buffer[2].buf1._y"+ -"t.registers.clock_buffer[2].buf1._y"->"t.registers.clock_buffer[2].buf1.y"- -~("t.registers.clock_buffer[2].buf1._y")->"t.registers.clock_buffer[2].buf1.y"+ -= "t.registers.clock_buffer[2].supply.vdd" "t.registers.clock_buffer[2].buf1.vdd" -= "t.registers.clock_buffer[2].supply.vss" "t.registers.clock_buffer[2].buf1.vss" -= "t.registers.clock_buffer[2].out[0]" "t.registers.clock_buffer[2].out[1]" -= "t.registers.clock_buffer[2].out[0]" "t.registers.clock_buffer[2].buf1.y" -= "t.registers.clock_buffer[2].in" "t.registers.clock_buffer[2].buf1.a" -"t.registers.clock_buffer[3].buf1.a"->"t.registers.clock_buffer[3].buf1._y"- -~("t.registers.clock_buffer[3].buf1.a")->"t.registers.clock_buffer[3].buf1._y"+ -"t.registers.clock_buffer[3].buf1._y"->"t.registers.clock_buffer[3].buf1.y"- -~("t.registers.clock_buffer[3].buf1._y")->"t.registers.clock_buffer[3].buf1.y"+ -= "t.registers.clock_buffer[3].supply.vdd" "t.registers.clock_buffer[3].buf1.vdd" -= "t.registers.clock_buffer[3].supply.vss" "t.registers.clock_buffer[3].buf1.vss" -= "t.registers.clock_buffer[3].out[0]" "t.registers.clock_buffer[3].out[1]" -= "t.registers.clock_buffer[3].out[0]" "t.registers.clock_buffer[3].buf1.y" -= "t.registers.clock_buffer[3].in" "t.registers.clock_buffer[3].buf1.a" -= "t.registers._in_v_temp" "t.registers.clk_dly.in" -= "t.registers._in_v_temp" "t.registers.val_input_X.in" -= "t.registers._in_v_temp" "t.registers.val_input.out" -= "t.registers._clock" "t.registers.and_encoder[3].b" -= "t.registers._clock" "t.registers.and_encoder[2].b" -= "t.registers._clock" "t.registers.and_encoder[1].b" -= "t.registers._clock" "t.registers.and_encoder[0].b" -= "t.registers._clock" "t.registers.ack_dly.in" -= "t.registers._clock" "t.registers.clk_X.out" += "t.registers._in_temp2.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].f" += "t.registers._in_temp2.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].t" += "t.registers._in_temp2.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].f" += "t.registers._in_temp2.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].t" += "t.registers._in_temp2.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].f" += "t.registers._in_temp2.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].t" += "t.registers._in_temp2.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].f" += "t.registers._in_temp2.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].t" += "t.registers._in_temp2.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].f" += "t.registers._in_temp2.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].t" += "t.registers._in_temp2.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].f" += "t.registers._in_temp2.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].t" += "t.registers._in_temp2.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].f" += "t.registers._in_temp2.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].t" += "t.registers._in_temp2.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].f" += "t.registers._in_temp2.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].t" += "t.registers._in_temp2.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].f" += "t.registers._in_temp2.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].t" += "t.registers._in_temp2.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].f" += "t.registers._in_temp2.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].t" += "t.registers._in_temp2.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].f" += "t.registers._in_temp2.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].t" += "t.registers._in_temp2.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].f" += "t.registers._in_temp2.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].t" += "t.registers._in_temp2.v" "t.registers.read_write_demux.in.v" += "t.registers._in_temp2.a" "t.registers.read_write_demux.in.a" += "t.registers._in_temp2.d.d[0].f" "t.registers.read_write_demux.in.d.d[0].f" += "t.registers._in_temp2.d.d[0].t" "t.registers.read_write_demux.in.d.d[0].t" += "t.registers._in_temp2.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].d[0]" += "t.registers._in_temp2.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].d[1]" += "t.registers._in_temp2.d.d[1].f" "t.registers.read_write_demux.in.d.d[1].f" += "t.registers._in_temp2.d.d[1].t" "t.registers.read_write_demux.in.d.d[1].t" += "t.registers._in_temp2.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].d[0]" += "t.registers._in_temp2.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].d[1]" += "t.registers._in_temp2.d.d[2].f" "t.registers.read_write_demux.in.d.d[2].f" += "t.registers._in_temp2.d.d[2].t" "t.registers.read_write_demux.in.d.d[2].t" += "t.registers._in_temp2.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].d[0]" += "t.registers._in_temp2.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].d[1]" += "t.registers._in_temp2.d.d[3].f" "t.registers.read_write_demux.in.d.d[3].f" += "t.registers._in_temp2.d.d[3].t" "t.registers.read_write_demux.in.d.d[3].t" += "t.registers._in_temp2.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].d[0]" += "t.registers._in_temp2.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].d[1]" += "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" += "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" += "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" += "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" += "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" += "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" += "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" += "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" += "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" += "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" += "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" += "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" += "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" += "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" += "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" += "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" += "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" += "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" += "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" += "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" += "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" += "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" += "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" += "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" += "t.registers._in_read.v" "t.registers.read_write_demux.out2.v" += "t.registers._in_read.a" "t.registers.read_write_demux.out2.a" += "t.registers._in_read.d.d[0].f" "t.registers.read_write_demux.out2.d.d[0].f" += "t.registers._in_read.d.d[0].t" "t.registers.read_write_demux.out2.d.d[0].t" += "t.registers._in_read.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].d[0]" += "t.registers._in_read.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].d[1]" += "t.registers._in_read.d.d[1].f" "t.registers.read_write_demux.out2.d.d[1].f" += "t.registers._in_read.d.d[1].t" "t.registers.read_write_demux.out2.d.d[1].t" += "t.registers._in_read.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].d[0]" += "t.registers._in_read.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].d[1]" += "t.registers._in_read.d.d[2].f" "t.registers.read_write_demux.out2.d.d[2].f" += "t.registers._in_read.d.d[2].t" "t.registers.read_write_demux.out2.d.d[2].t" += "t.registers._in_read.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].d[0]" += "t.registers._in_read.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].d[1]" += "t.registers._in_read.d.d[3].f" "t.registers.read_write_demux.out2.d.d[3].f" += "t.registers._in_read.d.d[3].t" "t.registers.read_write_demux.out2.d.d[3].t" += "t.registers._in_read.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].d[0]" += "t.registers._in_read.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].d[1]" += "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" += "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" += "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" += "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" += "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" += "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" += "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" += "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" += "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" += "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" += "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" += "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" += "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" += "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" += "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" += "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" += "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" += "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" += "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" += "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" += "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" += "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" += "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" += "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" += "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" += "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" += "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" += "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" += "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" += "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" += "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" += "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" += "t.registers._in_write.v" "t.registers.read_write_demux.out1.v" += "t.registers._in_write.a" "t.registers.read_write_demux.out1.a" += "t.registers._in_write.d.d[0].f" "t.registers.read_write_demux.out1.d.d[0].f" += "t.registers._in_write.d.d[0].t" "t.registers.read_write_demux.out1.d.d[0].t" += "t.registers._in_write.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].d[0]" += "t.registers._in_write.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].d[1]" += "t.registers._in_write.d.d[1].f" "t.registers.read_write_demux.out1.d.d[1].f" += "t.registers._in_write.d.d[1].t" "t.registers.read_write_demux.out1.d.d[1].t" += "t.registers._in_write.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].d[0]" += "t.registers._in_write.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].d[1]" += "t.registers._in_write.d.d[2].f" "t.registers.read_write_demux.out1.d.d[2].f" += "t.registers._in_write.d.d[2].t" "t.registers.read_write_demux.out1.d.d[2].t" += "t.registers._in_write.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].d[0]" += "t.registers._in_write.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].d[1]" += "t.registers._in_write.d.d[3].f" "t.registers.read_write_demux.out1.d.d[3].f" += "t.registers._in_write.d.d[3].t" "t.registers.read_write_demux.out1.d.d[3].t" += "t.registers._in_write.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].d[0]" += "t.registers._in_write.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].d[1]" += "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" += "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" += "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" += "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" += "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" += "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" += "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" += "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" += "t.registers.reset_B" "t.registers.read_write_demux.reset_B" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" += "t.registers.read_write_demux._out2_a_BX_t[1]" "t.registers.read_write_demux.out2_a_B_buf_f.out[1]" += "t.registers.read_write_demux._out2_a_BX_t[2]" "t.registers.read_write_demux.out2_a_B_buf_f.out[2]" += "t.registers.read_write_demux._out2_a_BX_t[3]" "t.registers.read_write_demux.out2_a_B_buf_f.out[3]" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[3].c2" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[2].c2" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[1].c2" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[0].c2" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux._out2_a_BX_t[3]" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux._out2_a_BX_t[2]" += "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux._out2_a_BX_t[1]" +"t.registers.read_write_demux.out1_a_B_buf_f.buf1.a"->"t.registers.read_write_demux.out1_a_B_buf_f.buf1._y"- +~("t.registers.read_write_demux.out1_a_B_buf_f.buf1.a")->"t.registers.read_write_demux.out1_a_B_buf_f.buf1._y"+ +"t.registers.read_write_demux.out1_a_B_buf_f.buf1._y"->"t.registers.read_write_demux.out1_a_B_buf_f.buf1.y"- +~("t.registers.read_write_demux.out1_a_B_buf_f.buf1._y")->"t.registers.read_write_demux.out1_a_B_buf_f.buf1.y"+ += "t.registers.read_write_demux.out1_a_B_buf_f.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.vdd" += "t.registers.read_write_demux.out1_a_B_buf_f.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.vss" += "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[3]" += "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[2]" += "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[1]" += "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.y" += "t.registers.read_write_demux.out1_a_B_buf_f.in" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.a" +"t.registers.read_write_demux.reset_bufarray.buf3.a"->"t.registers.read_write_demux.reset_bufarray.buf3._y"- +~("t.registers.read_write_demux.reset_bufarray.buf3.a")->"t.registers.read_write_demux.reset_bufarray.buf3._y"+ +"t.registers.read_write_demux.reset_bufarray.buf3._y"->"t.registers.read_write_demux.reset_bufarray.buf3.y"- +~("t.registers.read_write_demux.reset_bufarray.buf3._y")->"t.registers.read_write_demux.reset_bufarray.buf3.y"+ += "t.registers.read_write_demux.reset_bufarray.supply.vdd" "t.registers.read_write_demux.reset_bufarray.buf3.vdd" += "t.registers.read_write_demux.reset_bufarray.supply.vss" "t.registers.read_write_demux.reset_bufarray.buf3.vss" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[7]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[6]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[5]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[4]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[3]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[2]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[1]" += "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.buf3.y" += "t.registers.read_write_demux.reset_bufarray.in" "t.registers.read_write_demux.reset_bufarray.buf3.a" +~"t.registers.read_write_demux.inack_ctl.c1"&~"t.registers.read_write_demux.inack_ctl.c2"&~"t.registers.read_write_demux.inack_ctl.c3"|~"t.registers.read_write_demux.inack_ctl.pr_B"->"t.registers.read_write_demux.inack_ctl._y"+ +"t.registers.read_write_demux.inack_ctl.c1"&"t.registers.read_write_demux.inack_ctl.c2"&"t.registers.read_write_demux.inack_ctl.c3"&"t.registers.read_write_demux.inack_ctl.sr_B"->"t.registers.read_write_demux.inack_ctl._y"- +"t.registers.read_write_demux.inack_ctl._y"->"t.registers.read_write_demux.inack_ctl.y"- +~("t.registers.read_write_demux.inack_ctl._y")->"t.registers.read_write_demux.inack_ctl.y"+ += "t.registers.read_write_demux._c_v" "t.registers.read_write_demux.c_el.c1" += "t.registers.read_write_demux._c_v" "t.registers.read_write_demux.c_f_c_t_or.y" +"t.registers.read_write_demux.out2_en_buf_f.buf1.a"->"t.registers.read_write_demux.out2_en_buf_f.buf1._y"- +~("t.registers.read_write_demux.out2_en_buf_f.buf1.a")->"t.registers.read_write_demux.out2_en_buf_f.buf1._y"+ +"t.registers.read_write_demux.out2_en_buf_f.buf1._y"->"t.registers.read_write_demux.out2_en_buf_f.buf1.y"- +~("t.registers.read_write_demux.out2_en_buf_f.buf1._y")->"t.registers.read_write_demux.out2_en_buf_f.buf1.y"+ += "t.registers.read_write_demux.out2_en_buf_f.supply.vdd" "t.registers.read_write_demux.out2_en_buf_f.buf1.vdd" += "t.registers.read_write_demux.out2_en_buf_f.supply.vss" "t.registers.read_write_demux.out2_en_buf_f.buf1.vss" += "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.out[3]" += "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.out[2]" += "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.out[1]" += "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.buf1.y" += "t.registers.read_write_demux.out2_en_buf_f.in" "t.registers.read_write_demux.out2_en_buf_f.buf1.a" += "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" += "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" += "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" += "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" += "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" += "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" += "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" += "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" += "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" += "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" += "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" += "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" += "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" += "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" += "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" += "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" += "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" += "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" += "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" += "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" += "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" += "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" += "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" += "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" += "t.registers.read_write_demux.out2.a" "t.registers.read_write_demux.out2_a_inv.a" += "t.registers.read_write_demux.out2.v" "t.registers.read_write_demux.out_or.b" += "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2_f_buf_func[3].y" += "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" += "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2_t_buf_func[3].y" += "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" += "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2_f_buf_func[2].y" += "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" += "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2_t_buf_func[2].y" += "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" += "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2_f_buf_func[1].y" += "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" += "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2_t_buf_func[1].y" += "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" += "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2_f_buf_func[0].y" += "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" += "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2_t_buf_func[0].y" += "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" += "t.registers.read_write_demux._en" "t.registers.read_write_demux.out2_en_buf_f.in" += "t.registers.read_write_demux._en" "t.registers.read_write_demux.out2_en_buf_t.in" += "t.registers.read_write_demux._en" "t.registers.read_write_demux.out1_en_buf_f.in" += "t.registers.read_write_demux._en" "t.registers.read_write_demux.out1_en_buf_t.in" += "t.registers.read_write_demux._en" "t.registers.read_write_demux.en_ctl.y" += "t.registers.read_write_demux._en" "t.registers.read_write_demux.inack_ctl.c1" +"t.registers.read_write_demux.out2_a_inv.a"->"t.registers.read_write_demux.out2_a_inv.y"- +~("t.registers.read_write_demux.out2_a_inv.a")->"t.registers.read_write_demux.out2_a_inv.y"+ += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" += "t.registers.read_write_demux.in.d.d[0].f" "t.registers.read_write_demux.vc.in.d[0].f" += "t.registers.read_write_demux.in.d.d[0].t" "t.registers.read_write_demux.vc.in.d[0].t" += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].d[0]" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].d[1]" += "t.registers.read_write_demux.in.d.d[1].f" "t.registers.read_write_demux.vc.in.d[1].f" += "t.registers.read_write_demux.in.d.d[1].t" "t.registers.read_write_demux.vc.in.d[1].t" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].d[0]" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].d[1]" += "t.registers.read_write_demux.in.d.d[2].f" "t.registers.read_write_demux.vc.in.d[2].f" += "t.registers.read_write_demux.in.d.d[2].t" "t.registers.read_write_demux.vc.in.d[2].t" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].d[0]" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].d[1]" += "t.registers.read_write_demux.in.d.d[3].f" "t.registers.read_write_demux.vc.in.d[3].f" += "t.registers.read_write_demux.in.d.d[3].t" "t.registers.read_write_demux.vc.in.d[3].t" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].d[0]" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].d[1]" += "t.registers.read_write_demux.in.a" "t.registers.read_write_demux.en_ctl.c1" += "t.registers.read_write_demux.in.a" "t.registers.read_write_demux.cond.a" += "t.registers.read_write_demux.in.a" "t.registers.read_write_demux.inack_ctl.y" += "t.registers.read_write_demux.in.v" "t.registers.read_write_demux.in_v_buf.y" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.out2_f_buf_func[3].n1" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.out1_f_buf_func[3].n1" += "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.out2_t_buf_func[3].n1" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.out1_t_buf_func[3].n1" += "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.out2_f_buf_func[2].n1" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.out1_f_buf_func[2].n1" += "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.out2_t_buf_func[2].n1" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.out1_t_buf_func[2].n1" += "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.out2_f_buf_func[1].n1" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.out1_f_buf_func[1].n1" += "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.out2_t_buf_func[1].n1" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.out1_t_buf_func[1].n1" += "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.out2_f_buf_func[0].n1" += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.out1_f_buf_func[0].n1" += "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.out2_t_buf_func[0].n1" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.out1_t_buf_func[0].n1" += "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.c_buf_f.out[0]" += "t.registers.read_write_demux._c_f_buf[1]" "t.registers.read_write_demux.c_buf_f.out[1]" += "t.registers.read_write_demux._c_f_buf[2]" "t.registers.read_write_demux.c_buf_f.out[2]" += "t.registers.read_write_demux._c_f_buf[3]" "t.registers.read_write_demux.c_buf_f.out[3]" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[3].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[3].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[2].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[2].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[1].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[1].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[0].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[0].n2" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux._c_f_buf[3]" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux._c_f_buf[2]" += "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux._c_f_buf[1]" += "t.registers.read_write_demux._out1_a_B" "t.registers.read_write_demux.out1_a_B_buf_t.in" += "t.registers.read_write_demux._out1_a_B" "t.registers.read_write_demux.out1_a_B_buf_f.in" += "t.registers.read_write_demux._out1_a_B" "t.registers.read_write_demux.out1_a_inv.y" +"t.registers.read_write_demux.out1_en_buf_t.buf1.a"->"t.registers.read_write_demux.out1_en_buf_t.buf1._y"- +~("t.registers.read_write_demux.out1_en_buf_t.buf1.a")->"t.registers.read_write_demux.out1_en_buf_t.buf1._y"+ +"t.registers.read_write_demux.out1_en_buf_t.buf1._y"->"t.registers.read_write_demux.out1_en_buf_t.buf1.y"- +~("t.registers.read_write_demux.out1_en_buf_t.buf1._y")->"t.registers.read_write_demux.out1_en_buf_t.buf1.y"+ += "t.registers.read_write_demux.out1_en_buf_t.supply.vdd" "t.registers.read_write_demux.out1_en_buf_t.buf1.vdd" += "t.registers.read_write_demux.out1_en_buf_t.supply.vss" "t.registers.read_write_demux.out1_en_buf_t.buf1.vss" += "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.out[3]" += "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.out[2]" += "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.out[1]" += "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.buf1.y" += "t.registers.read_write_demux.out1_en_buf_t.in" "t.registers.read_write_demux.out1_en_buf_t.buf1.a" +"t.registers.read_write_demux.reset_buf.a"->"t.registers.read_write_demux.reset_buf._y"- +~("t.registers.read_write_demux.reset_buf.a")->"t.registers.read_write_demux.reset_buf._y"+ +"t.registers.read_write_demux.reset_buf._y"->"t.registers.read_write_demux.reset_buf.y"- +~("t.registers.read_write_demux.reset_buf._y")->"t.registers.read_write_demux.reset_buf.y"+ +"t.registers.read_write_demux.out_or.a"|"t.registers.read_write_demux.out_or.b"->"t.registers.read_write_demux.out_or._y"- +~("t.registers.read_write_demux.out_or.a"|"t.registers.read_write_demux.out_or.b")->"t.registers.read_write_demux.out_or._y"+ +"t.registers.read_write_demux.out_or._y"->"t.registers.read_write_demux.out_or.y"- +~("t.registers.read_write_demux.out_or._y")->"t.registers.read_write_demux.out_or.y"+ += "t.registers.read_write_demux._in_c_v_" "t.registers.read_write_demux.c_el.y" += "t.registers.read_write_demux._in_c_v_" "t.registers.read_write_demux.inack_ctl.c2" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" += "t.registers.read_write_demux._out1_a_BX_t[1]" "t.registers.read_write_demux.out1_a_B_buf_f.out[1]" += "t.registers.read_write_demux._out1_a_BX_t[2]" "t.registers.read_write_demux.out1_a_B_buf_f.out[2]" += "t.registers.read_write_demux._out1_a_BX_t[3]" "t.registers.read_write_demux.out1_a_B_buf_f.out[3]" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[3].c2" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[2].c2" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[1].c2" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[0].c2" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux._out1_a_BX_t[3]" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux._out1_a_BX_t[2]" += "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux._out1_a_BX_t[1]" +"t.registers.read_write_demux.out2_en_buf_t.buf1.a"->"t.registers.read_write_demux.out2_en_buf_t.buf1._y"- +~("t.registers.read_write_demux.out2_en_buf_t.buf1.a")->"t.registers.read_write_demux.out2_en_buf_t.buf1._y"+ +"t.registers.read_write_demux.out2_en_buf_t.buf1._y"->"t.registers.read_write_demux.out2_en_buf_t.buf1.y"- +~("t.registers.read_write_demux.out2_en_buf_t.buf1._y")->"t.registers.read_write_demux.out2_en_buf_t.buf1.y"+ += "t.registers.read_write_demux.out2_en_buf_t.supply.vdd" "t.registers.read_write_demux.out2_en_buf_t.buf1.vdd" += "t.registers.read_write_demux.out2_en_buf_t.supply.vss" "t.registers.read_write_demux.out2_en_buf_t.buf1.vss" += "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.out[3]" += "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.out[2]" += "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.out[1]" += "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.buf1.y" += "t.registers.read_write_demux.out2_en_buf_t.in" "t.registers.read_write_demux.out2_en_buf_t.buf1.a" += "t.registers.read_write_demux.reset_B" "t.registers.read_write_demux.reset_buf.a" += "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.reset_bufarray.in" += "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.reset_buf.y" += "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.inack_ctl.sr_B" += "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.inack_ctl.pr_B" +"t.registers.read_write_demux.c_buf_t.buf1.a"->"t.registers.read_write_demux.c_buf_t.buf1._y"- +~("t.registers.read_write_demux.c_buf_t.buf1.a")->"t.registers.read_write_demux.c_buf_t.buf1._y"+ +"t.registers.read_write_demux.c_buf_t.buf1._y"->"t.registers.read_write_demux.c_buf_t.buf1.y"- +~("t.registers.read_write_demux.c_buf_t.buf1._y")->"t.registers.read_write_demux.c_buf_t.buf1.y"+ += "t.registers.read_write_demux.c_buf_t.supply.vdd" "t.registers.read_write_demux.c_buf_t.buf1.vdd" += "t.registers.read_write_demux.c_buf_t.supply.vss" "t.registers.read_write_demux.c_buf_t.buf1.vss" += "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.out[3]" += "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.out[2]" += "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.out[1]" += "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.buf1.y" += "t.registers.read_write_demux.c_buf_t.in" "t.registers.read_write_demux.c_buf_t.buf1.a" +~"t.registers.read_write_demux.out2_t_buf_func[0].c1"&~"t.registers.read_write_demux.out2_t_buf_func[0].c2"|~"t.registers.read_write_demux.out2_t_buf_func[0].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[0]._y"+ +"t.registers.read_write_demux.out2_t_buf_func[0].c1"&"t.registers.read_write_demux.out2_t_buf_func[0].c2"&"t.registers.read_write_demux.out2_t_buf_func[0].n1"&"t.registers.read_write_demux.out2_t_buf_func[0].n2"&"t.registers.read_write_demux.out2_t_buf_func[0].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[0]._y"- +"t.registers.read_write_demux.out2_t_buf_func[0]._y"->"t.registers.read_write_demux.out2_t_buf_func[0].y"- +~("t.registers.read_write_demux.out2_t_buf_func[0]._y")->"t.registers.read_write_demux.out2_t_buf_func[0].y"+ +~"t.registers.read_write_demux.out2_t_buf_func[1].c1"&~"t.registers.read_write_demux.out2_t_buf_func[1].c2"|~"t.registers.read_write_demux.out2_t_buf_func[1].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[1]._y"+ +"t.registers.read_write_demux.out2_t_buf_func[1].c1"&"t.registers.read_write_demux.out2_t_buf_func[1].c2"&"t.registers.read_write_demux.out2_t_buf_func[1].n1"&"t.registers.read_write_demux.out2_t_buf_func[1].n2"&"t.registers.read_write_demux.out2_t_buf_func[1].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[1]._y"- +"t.registers.read_write_demux.out2_t_buf_func[1]._y"->"t.registers.read_write_demux.out2_t_buf_func[1].y"- +~("t.registers.read_write_demux.out2_t_buf_func[1]._y")->"t.registers.read_write_demux.out2_t_buf_func[1].y"+ +~"t.registers.read_write_demux.out2_t_buf_func[2].c1"&~"t.registers.read_write_demux.out2_t_buf_func[2].c2"|~"t.registers.read_write_demux.out2_t_buf_func[2].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[2]._y"+ +"t.registers.read_write_demux.out2_t_buf_func[2].c1"&"t.registers.read_write_demux.out2_t_buf_func[2].c2"&"t.registers.read_write_demux.out2_t_buf_func[2].n1"&"t.registers.read_write_demux.out2_t_buf_func[2].n2"&"t.registers.read_write_demux.out2_t_buf_func[2].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[2]._y"- +"t.registers.read_write_demux.out2_t_buf_func[2]._y"->"t.registers.read_write_demux.out2_t_buf_func[2].y"- +~("t.registers.read_write_demux.out2_t_buf_func[2]._y")->"t.registers.read_write_demux.out2_t_buf_func[2].y"+ +~"t.registers.read_write_demux.out2_t_buf_func[3].c1"&~"t.registers.read_write_demux.out2_t_buf_func[3].c2"|~"t.registers.read_write_demux.out2_t_buf_func[3].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[3]._y"+ +"t.registers.read_write_demux.out2_t_buf_func[3].c1"&"t.registers.read_write_demux.out2_t_buf_func[3].c2"&"t.registers.read_write_demux.out2_t_buf_func[3].n1"&"t.registers.read_write_demux.out2_t_buf_func[3].n2"&"t.registers.read_write_demux.out2_t_buf_func[3].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[3]._y"- +"t.registers.read_write_demux.out2_t_buf_func[3]._y"->"t.registers.read_write_demux.out2_t_buf_func[3].y"- +~("t.registers.read_write_demux.out2_t_buf_func[3]._y")->"t.registers.read_write_demux.out2_t_buf_func[3].y"+ += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_en_buf_t.out[0]" += "t.registers.read_write_demux._en2_X_t[1]" "t.registers.read_write_demux.out2_en_buf_t.out[1]" += "t.registers.read_write_demux._en2_X_t[2]" "t.registers.read_write_demux.out2_en_buf_t.out[2]" += "t.registers.read_write_demux._en2_X_t[3]" "t.registers.read_write_demux.out2_en_buf_t.out[3]" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[3].c1" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[2].c1" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[1].c1" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[0].c1" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux._en2_X_t[3]" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux._en2_X_t[2]" += "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux._en2_X_t[1]" += "t.registers.read_write_demux._out_v" "t.registers.read_write_demux.en_ctl.p1" += "t.registers.read_write_demux._out_v" "t.registers.read_write_demux.inack_ctl.c3" += "t.registers.read_write_demux._out_v" "t.registers.read_write_demux.out_or.y" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.reset_bufarray.out[0]" += "t.registers.read_write_demux._reset_BXX[1]" "t.registers.read_write_demux.reset_bufarray.out[1]" += "t.registers.read_write_demux._reset_BXX[2]" "t.registers.read_write_demux.reset_bufarray.out[2]" += "t.registers.read_write_demux._reset_BXX[3]" "t.registers.read_write_demux.reset_bufarray.out[3]" += "t.registers.read_write_demux._reset_BXX[4]" "t.registers.read_write_demux.reset_bufarray.out[4]" += "t.registers.read_write_demux._reset_BXX[5]" "t.registers.read_write_demux.reset_bufarray.out[5]" += "t.registers.read_write_demux._reset_BXX[6]" "t.registers.read_write_demux.reset_bufarray.out[6]" += "t.registers.read_write_demux._reset_BXX[7]" "t.registers.read_write_demux.reset_bufarray.out[7]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[3].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[3].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[3].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[3].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[2].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[2].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[2].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[2].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[1].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[1].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[1].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[1].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[0].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[0].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[0].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[0].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[3].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[3].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[3].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[3].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[2].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[2].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[2].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[2].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[1].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[1].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[1].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[1].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[0].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[0].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[0].sr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[0].pr_B" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[7]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[6]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[5]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[4]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[3]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[2]" += "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[1]" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.c_buf_t.out[0]" += "t.registers.read_write_demux._c_t_buf[1]" "t.registers.read_write_demux.c_buf_t.out[1]" += "t.registers.read_write_demux._c_t_buf[2]" "t.registers.read_write_demux.c_buf_t.out[2]" += "t.registers.read_write_demux._c_t_buf[3]" "t.registers.read_write_demux.c_buf_t.out[3]" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[3].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[3].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[2].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[2].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[1].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[1].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[0].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[0].n2" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux._c_t_buf[3]" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux._c_t_buf[2]" += "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux._c_t_buf[1]" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_en_buf_f.out[0]" += "t.registers.read_write_demux._en1_X_f[1]" "t.registers.read_write_demux.out1_en_buf_f.out[1]" += "t.registers.read_write_demux._en1_X_f[2]" "t.registers.read_write_demux.out1_en_buf_f.out[2]" += "t.registers.read_write_demux._en1_X_f[3]" "t.registers.read_write_demux.out1_en_buf_f.out[3]" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[3].c1" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[2].c1" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[1].c1" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[0].c1" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux._en1_X_f[3]" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux._en1_X_f[2]" += "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux._en1_X_f[1]" +~"t.registers.read_write_demux.out2_f_buf_func[0].c1"&~"t.registers.read_write_demux.out2_f_buf_func[0].c2"|~"t.registers.read_write_demux.out2_f_buf_func[0].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[0]._y"+ +"t.registers.read_write_demux.out2_f_buf_func[0].c1"&"t.registers.read_write_demux.out2_f_buf_func[0].c2"&"t.registers.read_write_demux.out2_f_buf_func[0].n1"&"t.registers.read_write_demux.out2_f_buf_func[0].n2"&"t.registers.read_write_demux.out2_f_buf_func[0].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[0]._y"- +"t.registers.read_write_demux.out2_f_buf_func[0]._y"->"t.registers.read_write_demux.out2_f_buf_func[0].y"- +~("t.registers.read_write_demux.out2_f_buf_func[0]._y")->"t.registers.read_write_demux.out2_f_buf_func[0].y"+ +~"t.registers.read_write_demux.out2_f_buf_func[1].c1"&~"t.registers.read_write_demux.out2_f_buf_func[1].c2"|~"t.registers.read_write_demux.out2_f_buf_func[1].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[1]._y"+ +"t.registers.read_write_demux.out2_f_buf_func[1].c1"&"t.registers.read_write_demux.out2_f_buf_func[1].c2"&"t.registers.read_write_demux.out2_f_buf_func[1].n1"&"t.registers.read_write_demux.out2_f_buf_func[1].n2"&"t.registers.read_write_demux.out2_f_buf_func[1].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[1]._y"- +"t.registers.read_write_demux.out2_f_buf_func[1]._y"->"t.registers.read_write_demux.out2_f_buf_func[1].y"- +~("t.registers.read_write_demux.out2_f_buf_func[1]._y")->"t.registers.read_write_demux.out2_f_buf_func[1].y"+ +~"t.registers.read_write_demux.out2_f_buf_func[2].c1"&~"t.registers.read_write_demux.out2_f_buf_func[2].c2"|~"t.registers.read_write_demux.out2_f_buf_func[2].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[2]._y"+ +"t.registers.read_write_demux.out2_f_buf_func[2].c1"&"t.registers.read_write_demux.out2_f_buf_func[2].c2"&"t.registers.read_write_demux.out2_f_buf_func[2].n1"&"t.registers.read_write_demux.out2_f_buf_func[2].n2"&"t.registers.read_write_demux.out2_f_buf_func[2].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[2]._y"- +"t.registers.read_write_demux.out2_f_buf_func[2]._y"->"t.registers.read_write_demux.out2_f_buf_func[2].y"- +~("t.registers.read_write_demux.out2_f_buf_func[2]._y")->"t.registers.read_write_demux.out2_f_buf_func[2].y"+ +~"t.registers.read_write_demux.out2_f_buf_func[3].c1"&~"t.registers.read_write_demux.out2_f_buf_func[3].c2"|~"t.registers.read_write_demux.out2_f_buf_func[3].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[3]._y"+ +"t.registers.read_write_demux.out2_f_buf_func[3].c1"&"t.registers.read_write_demux.out2_f_buf_func[3].c2"&"t.registers.read_write_demux.out2_f_buf_func[3].n1"&"t.registers.read_write_demux.out2_f_buf_func[3].n2"&"t.registers.read_write_demux.out2_f_buf_func[3].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[3]._y"- +"t.registers.read_write_demux.out2_f_buf_func[3]._y"->"t.registers.read_write_demux.out2_f_buf_func[3].y"- +~("t.registers.read_write_demux.out2_f_buf_func[3]._y")->"t.registers.read_write_demux.out2_f_buf_func[3].y"+ +"t.registers.read_write_demux.out1_en_buf_f.buf1.a"->"t.registers.read_write_demux.out1_en_buf_f.buf1._y"- +~("t.registers.read_write_demux.out1_en_buf_f.buf1.a")->"t.registers.read_write_demux.out1_en_buf_f.buf1._y"+ +"t.registers.read_write_demux.out1_en_buf_f.buf1._y"->"t.registers.read_write_demux.out1_en_buf_f.buf1.y"- +~("t.registers.read_write_demux.out1_en_buf_f.buf1._y")->"t.registers.read_write_demux.out1_en_buf_f.buf1.y"+ += "t.registers.read_write_demux.out1_en_buf_f.supply.vdd" "t.registers.read_write_demux.out1_en_buf_f.buf1.vdd" += "t.registers.read_write_demux.out1_en_buf_f.supply.vss" "t.registers.read_write_demux.out1_en_buf_f.buf1.vss" += "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.out[3]" += "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.out[2]" += "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.out[1]" += "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.buf1.y" += "t.registers.read_write_demux.out1_en_buf_f.in" "t.registers.read_write_demux.out1_en_buf_f.buf1.a" +~"t.registers.read_write_demux.c_el.c1"&~"t.registers.read_write_demux.c_el.c2"->"t.registers.read_write_demux.c_el._y"+ +"t.registers.read_write_demux.c_el.c1"&"t.registers.read_write_demux.c_el.c2"->"t.registers.read_write_demux.c_el._y"- +"t.registers.read_write_demux.c_el._y"->"t.registers.read_write_demux.c_el.y"- +~("t.registers.read_write_demux.c_el._y")->"t.registers.read_write_demux.c_el.y"+ += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" += "t.registers.read_write_demux._out1_a_BX_f[1]" "t.registers.read_write_demux.out1_a_B_buf_t.out[1]" += "t.registers.read_write_demux._out1_a_BX_f[2]" "t.registers.read_write_demux.out1_a_B_buf_t.out[2]" += "t.registers.read_write_demux._out1_a_BX_f[3]" "t.registers.read_write_demux.out1_a_B_buf_t.out[3]" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[3].c2" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[2].c2" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[1].c2" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[0].c2" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux._out1_a_BX_f[3]" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux._out1_a_BX_f[2]" += "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux._out1_a_BX_f[1]" += "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" += "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" += "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" += "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" += "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" += "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" += "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" += "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" += "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" += "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" += "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" += "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" += "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" += "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" += "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" += "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" += "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" += "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" += "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" += "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" += "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" += "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" += "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" += "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" += "t.registers.read_write_demux.out1.a" "t.registers.read_write_demux.out1_a_inv.a" += "t.registers.read_write_demux.out1.v" "t.registers.read_write_demux.out_or.a" += "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1_f_buf_func[3].y" += "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" += "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1_t_buf_func[3].y" += "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" += "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1_f_buf_func[2].y" += "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" += "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1_t_buf_func[2].y" += "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" += "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1_f_buf_func[1].y" += "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" += "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1_t_buf_func[1].y" += "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" += "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1_f_buf_func[0].y" += "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" += "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1_t_buf_func[0].y" += "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" +"t.registers.read_write_demux.c_f_c_t_or.a"|"t.registers.read_write_demux.c_f_c_t_or.b"->"t.registers.read_write_demux.c_f_c_t_or._y"- +~("t.registers.read_write_demux.c_f_c_t_or.a"|"t.registers.read_write_demux.c_f_c_t_or.b")->"t.registers.read_write_demux.c_f_c_t_or._y"+ +"t.registers.read_write_demux.c_f_c_t_or._y"->"t.registers.read_write_demux.c_f_c_t_or.y"- +~("t.registers.read_write_demux.c_f_c_t_or._y")->"t.registers.read_write_demux.c_f_c_t_or.y"+ +"t.registers.read_write_demux.in_v_buf.a"->"t.registers.read_write_demux.in_v_buf._y"- +~("t.registers.read_write_demux.in_v_buf.a")->"t.registers.read_write_demux.in_v_buf._y"+ +"t.registers.read_write_demux.in_v_buf._y"->"t.registers.read_write_demux.in_v_buf.y"- +~("t.registers.read_write_demux.in_v_buf._y")->"t.registers.read_write_demux.in_v_buf.y"+ += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_en_buf_t.out[0]" += "t.registers.read_write_demux._en1_X_t[1]" "t.registers.read_write_demux.out1_en_buf_t.out[1]" += "t.registers.read_write_demux._en1_X_t[2]" "t.registers.read_write_demux.out1_en_buf_t.out[2]" += "t.registers.read_write_demux._en1_X_t[3]" "t.registers.read_write_demux.out1_en_buf_t.out[3]" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[3].c1" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[2].c1" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[1].c1" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[0].c1" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux._en1_X_t[3]" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux._en1_X_t[2]" += "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux._en1_X_t[1]" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_en_buf_f.out[0]" += "t.registers.read_write_demux._en2_X_f[1]" "t.registers.read_write_demux.out2_en_buf_f.out[1]" += "t.registers.read_write_demux._en2_X_f[2]" "t.registers.read_write_demux.out2_en_buf_f.out[2]" += "t.registers.read_write_demux._en2_X_f[3]" "t.registers.read_write_demux.out2_en_buf_f.out[3]" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[3].c1" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[2].c1" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[1].c1" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[0].c1" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux._en2_X_f[3]" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux._en2_X_f[2]" += "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux._en2_X_f[1]" +"t.registers.read_write_demux.out1_a_inv.a"->"t.registers.read_write_demux.out1_a_inv.y"- +~("t.registers.read_write_demux.out1_a_inv.a")->"t.registers.read_write_demux.out1_a_inv.y"+ += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_en_buf_f.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_en_buf_f.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_en_buf_t.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_en_buf_t.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_t.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_t.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_f.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_f.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_en_buf_f.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_en_buf_f.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_en_buf_t.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_en_buf_t.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.vc.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.vc.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_buf_f.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_buf_f.supply.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_buf_t.supply.vss" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_buf_t.supply.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[3].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[3].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[2].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[2].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[1].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[1].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[0].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[0].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[3].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[3].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[2].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[2].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[1].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[1].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[0].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[0].vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.in_v_buf.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_el.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_f_c_t_or.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.reset_buf.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.en_ctl.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.inack_ctl.vdd" += "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out_or.vdd" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[3].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[3].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[2].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[2].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[1].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[1].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[0].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[0].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[3].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[3].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[2].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[2].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[1].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[1].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[0].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[0].vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.in_v_buf.vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_el.vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_f_c_t_or.vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.reset_buf.vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.en_ctl.vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.inack_ctl.vss" += "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out_or.vss" +~"t.registers.read_write_demux.vc.ct.C2Els[0].c1"&~"t.registers.read_write_demux.vc.ct.C2Els[0].c2"->"t.registers.read_write_demux.vc.ct.C2Els[0]._y"+ +"t.registers.read_write_demux.vc.ct.C2Els[0].c1"&"t.registers.read_write_demux.vc.ct.C2Els[0].c2"->"t.registers.read_write_demux.vc.ct.C2Els[0]._y"- +"t.registers.read_write_demux.vc.ct.C2Els[0]._y"->"t.registers.read_write_demux.vc.ct.C2Els[0].y"- +~("t.registers.read_write_demux.vc.ct.C2Els[0]._y")->"t.registers.read_write_demux.vc.ct.C2Els[0].y"+ +~"t.registers.read_write_demux.vc.ct.C2Els[1].c1"&~"t.registers.read_write_demux.vc.ct.C2Els[1].c2"->"t.registers.read_write_demux.vc.ct.C2Els[1]._y"+ +"t.registers.read_write_demux.vc.ct.C2Els[1].c1"&"t.registers.read_write_demux.vc.ct.C2Els[1].c2"->"t.registers.read_write_demux.vc.ct.C2Els[1]._y"- +"t.registers.read_write_demux.vc.ct.C2Els[1]._y"->"t.registers.read_write_demux.vc.ct.C2Els[1].y"- +~("t.registers.read_write_demux.vc.ct.C2Els[1]._y")->"t.registers.read_write_demux.vc.ct.C2Els[1].y"+ +~"t.registers.read_write_demux.vc.ct.C2Els[2].c1"&~"t.registers.read_write_demux.vc.ct.C2Els[2].c2"->"t.registers.read_write_demux.vc.ct.C2Els[2]._y"+ +"t.registers.read_write_demux.vc.ct.C2Els[2].c1"&"t.registers.read_write_demux.vc.ct.C2Els[2].c2"->"t.registers.read_write_demux.vc.ct.C2Els[2]._y"- +"t.registers.read_write_demux.vc.ct.C2Els[2]._y"->"t.registers.read_write_demux.vc.ct.C2Els[2].y"- +~("t.registers.read_write_demux.vc.ct.C2Els[2]._y")->"t.registers.read_write_demux.vc.ct.C2Els[2].y"+ += "t.registers.read_write_demux.vc.ct.tmp[4]" "t.registers.read_write_demux.vc.ct.C2Els[2].c1" += "t.registers.read_write_demux.vc.ct.tmp[4]" "t.registers.read_write_demux.vc.ct.C2Els[0].y" += "t.registers.read_write_demux.vc.ct.tmp[5]" "t.registers.read_write_demux.vc.ct.C2Els[2].c2" += "t.registers.read_write_demux.vc.ct.tmp[5]" "t.registers.read_write_demux.vc.ct.C2Els[1].y" += "t.registers.read_write_demux.vc.ct.supply.vdd" "t.registers.read_write_demux.vc.ct.C2Els[2].vdd" += "t.registers.read_write_demux.vc.ct.supply.vdd" "t.registers.read_write_demux.vc.ct.C2Els[1].vdd" += "t.registers.read_write_demux.vc.ct.supply.vdd" "t.registers.read_write_demux.vc.ct.C2Els[0].vdd" += "t.registers.read_write_demux.vc.ct.supply.vss" "t.registers.read_write_demux.vc.ct.C2Els[2].vss" += "t.registers.read_write_demux.vc.ct.supply.vss" "t.registers.read_write_demux.vc.ct.C2Els[1].vss" += "t.registers.read_write_demux.vc.ct.supply.vss" "t.registers.read_write_demux.vc.ct.C2Els[0].vss" += "t.registers.read_write_demux.vc.ct.in[0]" "t.registers.read_write_demux.vc.ct.C2Els[0].c1" += "t.registers.read_write_demux.vc.ct.in[0]" "t.registers.read_write_demux.vc.ct.tmp[0]" += "t.registers.read_write_demux.vc.ct.in[1]" "t.registers.read_write_demux.vc.ct.C2Els[0].c2" += "t.registers.read_write_demux.vc.ct.in[1]" "t.registers.read_write_demux.vc.ct.tmp[1]" += "t.registers.read_write_demux.vc.ct.in[2]" "t.registers.read_write_demux.vc.ct.C2Els[1].c1" += "t.registers.read_write_demux.vc.ct.in[2]" "t.registers.read_write_demux.vc.ct.tmp[2]" += "t.registers.read_write_demux.vc.ct.in[3]" "t.registers.read_write_demux.vc.ct.C2Els[1].c2" += "t.registers.read_write_demux.vc.ct.in[3]" "t.registers.read_write_demux.vc.ct.tmp[3]" += "t.registers.read_write_demux.vc.ct.out" "t.registers.read_write_demux.vc.ct.C2Els[2].y" += "t.registers.read_write_demux.vc.ct.out" "t.registers.read_write_demux.vc.ct.tmp[6]" += "t.registers.read_write_demux.vc.ct.in[0]" "t.registers.read_write_demux.vc.OR2_tf[0].y" += "t.registers.read_write_demux.vc.ct.in[1]" "t.registers.read_write_demux.vc.OR2_tf[1].y" += "t.registers.read_write_demux.vc.ct.in[2]" "t.registers.read_write_demux.vc.OR2_tf[2].y" += "t.registers.read_write_demux.vc.ct.in[3]" "t.registers.read_write_demux.vc.OR2_tf[3].y" +"t.registers.read_write_demux.vc.OR2_tf[0].a"|"t.registers.read_write_demux.vc.OR2_tf[0].b"->"t.registers.read_write_demux.vc.OR2_tf[0]._y"- +~("t.registers.read_write_demux.vc.OR2_tf[0].a"|"t.registers.read_write_demux.vc.OR2_tf[0].b")->"t.registers.read_write_demux.vc.OR2_tf[0]._y"+ +"t.registers.read_write_demux.vc.OR2_tf[0]._y"->"t.registers.read_write_demux.vc.OR2_tf[0].y"- +~("t.registers.read_write_demux.vc.OR2_tf[0]._y")->"t.registers.read_write_demux.vc.OR2_tf[0].y"+ +"t.registers.read_write_demux.vc.OR2_tf[1].a"|"t.registers.read_write_demux.vc.OR2_tf[1].b"->"t.registers.read_write_demux.vc.OR2_tf[1]._y"- +~("t.registers.read_write_demux.vc.OR2_tf[1].a"|"t.registers.read_write_demux.vc.OR2_tf[1].b")->"t.registers.read_write_demux.vc.OR2_tf[1]._y"+ +"t.registers.read_write_demux.vc.OR2_tf[1]._y"->"t.registers.read_write_demux.vc.OR2_tf[1].y"- +~("t.registers.read_write_demux.vc.OR2_tf[1]._y")->"t.registers.read_write_demux.vc.OR2_tf[1].y"+ +"t.registers.read_write_demux.vc.OR2_tf[2].a"|"t.registers.read_write_demux.vc.OR2_tf[2].b"->"t.registers.read_write_demux.vc.OR2_tf[2]._y"- +~("t.registers.read_write_demux.vc.OR2_tf[2].a"|"t.registers.read_write_demux.vc.OR2_tf[2].b")->"t.registers.read_write_demux.vc.OR2_tf[2]._y"+ +"t.registers.read_write_demux.vc.OR2_tf[2]._y"->"t.registers.read_write_demux.vc.OR2_tf[2].y"- +~("t.registers.read_write_demux.vc.OR2_tf[2]._y")->"t.registers.read_write_demux.vc.OR2_tf[2].y"+ +"t.registers.read_write_demux.vc.OR2_tf[3].a"|"t.registers.read_write_demux.vc.OR2_tf[3].b"->"t.registers.read_write_demux.vc.OR2_tf[3]._y"- +~("t.registers.read_write_demux.vc.OR2_tf[3].a"|"t.registers.read_write_demux.vc.OR2_tf[3].b")->"t.registers.read_write_demux.vc.OR2_tf[3]._y"+ +"t.registers.read_write_demux.vc.OR2_tf[3]._y"->"t.registers.read_write_demux.vc.OR2_tf[3].y"- +~("t.registers.read_write_demux.vc.OR2_tf[3]._y")->"t.registers.read_write_demux.vc.OR2_tf[3].y"+ += "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.ct.supply.vss" += "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.ct.supply.vdd" += "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[3].vdd" += "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[2].vdd" += "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[1].vdd" += "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[0].vdd" += "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[3].vss" += "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[2].vss" += "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[1].vss" += "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[0].vss" += "t.registers.read_write_demux.vc.out" "t.registers.read_write_demux.vc.ct.out" += "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].f" += "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].t" += "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].f" += "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].t" += "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].f" += "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].t" += "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].f" += "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].t" += "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].f" += "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].t" += "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].f" += "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].t" += "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].f" += "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].t" += "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].f" += "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].t" += "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.OR2_tf[3].b" += "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].f" += "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.OR2_tf[3].a" += "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].t" += "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.OR2_tf[2].b" += "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].f" += "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.OR2_tf[2].a" += "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].t" += "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.OR2_tf[1].b" += "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].f" += "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.OR2_tf[1].a" += "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].t" += "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.OR2_tf[0].b" += "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].f" += "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.OR2_tf[0].a" += "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].t" +"t.registers.read_write_demux.out2_a_B_buf_f.buf1.a"->"t.registers.read_write_demux.out2_a_B_buf_f.buf1._y"- +~("t.registers.read_write_demux.out2_a_B_buf_f.buf1.a")->"t.registers.read_write_demux.out2_a_B_buf_f.buf1._y"+ +"t.registers.read_write_demux.out2_a_B_buf_f.buf1._y"->"t.registers.read_write_demux.out2_a_B_buf_f.buf1.y"- +~("t.registers.read_write_demux.out2_a_B_buf_f.buf1._y")->"t.registers.read_write_demux.out2_a_B_buf_f.buf1.y"+ += "t.registers.read_write_demux.out2_a_B_buf_f.supply.vdd" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.vdd" += "t.registers.read_write_demux.out2_a_B_buf_f.supply.vss" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.vss" += "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[3]" += "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[2]" += "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[1]" += "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.y" += "t.registers.read_write_demux.out2_a_B_buf_f.in" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.a" +"t.registers.read_write_demux.out1_a_B_buf_t.buf1.a"->"t.registers.read_write_demux.out1_a_B_buf_t.buf1._y"- +~("t.registers.read_write_demux.out1_a_B_buf_t.buf1.a")->"t.registers.read_write_demux.out1_a_B_buf_t.buf1._y"+ +"t.registers.read_write_demux.out1_a_B_buf_t.buf1._y"->"t.registers.read_write_demux.out1_a_B_buf_t.buf1.y"- +~("t.registers.read_write_demux.out1_a_B_buf_t.buf1._y")->"t.registers.read_write_demux.out1_a_B_buf_t.buf1.y"+ += "t.registers.read_write_demux.out1_a_B_buf_t.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.vdd" += "t.registers.read_write_demux.out1_a_B_buf_t.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.vss" += "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[3]" += "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[2]" += "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[1]" += "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.y" += "t.registers.read_write_demux.out1_a_B_buf_t.in" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.a" +~"t.registers.read_write_demux.en_ctl.p1"&~"t.registers.read_write_demux.en_ctl.c1"->"t.registers.read_write_demux.en_ctl.y"+ +"t.registers.read_write_demux.en_ctl.c1"->"t.registers.read_write_demux.en_ctl.y"- += "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" += "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" += "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" += "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" += "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" += "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" += "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.c_f_c_t_or.b" += "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.c_buf_f.in" += "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" += "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.c_f_c_t_or.a" += "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.c_buf_t.in" += "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" +"t.registers.read_write_demux.c_buf_f.buf1.a"->"t.registers.read_write_demux.c_buf_f.buf1._y"- +~("t.registers.read_write_demux.c_buf_f.buf1.a")->"t.registers.read_write_demux.c_buf_f.buf1._y"+ +"t.registers.read_write_demux.c_buf_f.buf1._y"->"t.registers.read_write_demux.c_buf_f.buf1.y"- +~("t.registers.read_write_demux.c_buf_f.buf1._y")->"t.registers.read_write_demux.c_buf_f.buf1.y"+ += "t.registers.read_write_demux.c_buf_f.supply.vdd" "t.registers.read_write_demux.c_buf_f.buf1.vdd" += "t.registers.read_write_demux.c_buf_f.supply.vss" "t.registers.read_write_demux.c_buf_f.buf1.vss" += "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.out[3]" += "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.out[2]" += "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.out[1]" += "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.buf1.y" += "t.registers.read_write_demux.c_buf_f.in" "t.registers.read_write_demux.c_buf_f.buf1.a" +~"t.registers.read_write_demux.out1_f_buf_func[0].c1"&~"t.registers.read_write_demux.out1_f_buf_func[0].c2"|~"t.registers.read_write_demux.out1_f_buf_func[0].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[0]._y"+ +"t.registers.read_write_demux.out1_f_buf_func[0].c1"&"t.registers.read_write_demux.out1_f_buf_func[0].c2"&"t.registers.read_write_demux.out1_f_buf_func[0].n1"&"t.registers.read_write_demux.out1_f_buf_func[0].n2"&"t.registers.read_write_demux.out1_f_buf_func[0].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[0]._y"- +"t.registers.read_write_demux.out1_f_buf_func[0]._y"->"t.registers.read_write_demux.out1_f_buf_func[0].y"- +~("t.registers.read_write_demux.out1_f_buf_func[0]._y")->"t.registers.read_write_demux.out1_f_buf_func[0].y"+ +~"t.registers.read_write_demux.out1_f_buf_func[1].c1"&~"t.registers.read_write_demux.out1_f_buf_func[1].c2"|~"t.registers.read_write_demux.out1_f_buf_func[1].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[1]._y"+ +"t.registers.read_write_demux.out1_f_buf_func[1].c1"&"t.registers.read_write_demux.out1_f_buf_func[1].c2"&"t.registers.read_write_demux.out1_f_buf_func[1].n1"&"t.registers.read_write_demux.out1_f_buf_func[1].n2"&"t.registers.read_write_demux.out1_f_buf_func[1].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[1]._y"- +"t.registers.read_write_demux.out1_f_buf_func[1]._y"->"t.registers.read_write_demux.out1_f_buf_func[1].y"- +~("t.registers.read_write_demux.out1_f_buf_func[1]._y")->"t.registers.read_write_demux.out1_f_buf_func[1].y"+ +~"t.registers.read_write_demux.out1_f_buf_func[2].c1"&~"t.registers.read_write_demux.out1_f_buf_func[2].c2"|~"t.registers.read_write_demux.out1_f_buf_func[2].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[2]._y"+ +"t.registers.read_write_demux.out1_f_buf_func[2].c1"&"t.registers.read_write_demux.out1_f_buf_func[2].c2"&"t.registers.read_write_demux.out1_f_buf_func[2].n1"&"t.registers.read_write_demux.out1_f_buf_func[2].n2"&"t.registers.read_write_demux.out1_f_buf_func[2].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[2]._y"- +"t.registers.read_write_demux.out1_f_buf_func[2]._y"->"t.registers.read_write_demux.out1_f_buf_func[2].y"- +~("t.registers.read_write_demux.out1_f_buf_func[2]._y")->"t.registers.read_write_demux.out1_f_buf_func[2].y"+ +~"t.registers.read_write_demux.out1_f_buf_func[3].c1"&~"t.registers.read_write_demux.out1_f_buf_func[3].c2"|~"t.registers.read_write_demux.out1_f_buf_func[3].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[3]._y"+ +"t.registers.read_write_demux.out1_f_buf_func[3].c1"&"t.registers.read_write_demux.out1_f_buf_func[3].c2"&"t.registers.read_write_demux.out1_f_buf_func[3].n1"&"t.registers.read_write_demux.out1_f_buf_func[3].n2"&"t.registers.read_write_demux.out1_f_buf_func[3].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[3]._y"- +"t.registers.read_write_demux.out1_f_buf_func[3]._y"->"t.registers.read_write_demux.out1_f_buf_func[3].y"- +~("t.registers.read_write_demux.out1_f_buf_func[3]._y")->"t.registers.read_write_demux.out1_f_buf_func[3].y"+ += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" += "t.registers.read_write_demux._out2_a_BX_f[1]" "t.registers.read_write_demux.out2_a_B_buf_t.out[1]" += "t.registers.read_write_demux._out2_a_BX_f[2]" "t.registers.read_write_demux.out2_a_B_buf_t.out[2]" += "t.registers.read_write_demux._out2_a_BX_f[3]" "t.registers.read_write_demux.out2_a_B_buf_t.out[3]" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[3].c2" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[2].c2" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[1].c2" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[0].c2" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux._out2_a_BX_f[3]" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux._out2_a_BX_f[2]" += "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux._out2_a_BX_f[1]" += "t.registers.read_write_demux._in_v" "t.registers.read_write_demux.in_v_buf.a" += "t.registers.read_write_demux._in_v" "t.registers.read_write_demux.c_el.c2" += "t.registers.read_write_demux._in_v" "t.registers.read_write_demux.vc.out" +~"t.registers.read_write_demux.out1_t_buf_func[0].c1"&~"t.registers.read_write_demux.out1_t_buf_func[0].c2"|~"t.registers.read_write_demux.out1_t_buf_func[0].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[0]._y"+ +"t.registers.read_write_demux.out1_t_buf_func[0].c1"&"t.registers.read_write_demux.out1_t_buf_func[0].c2"&"t.registers.read_write_demux.out1_t_buf_func[0].n1"&"t.registers.read_write_demux.out1_t_buf_func[0].n2"&"t.registers.read_write_demux.out1_t_buf_func[0].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[0]._y"- +"t.registers.read_write_demux.out1_t_buf_func[0]._y"->"t.registers.read_write_demux.out1_t_buf_func[0].y"- +~("t.registers.read_write_demux.out1_t_buf_func[0]._y")->"t.registers.read_write_demux.out1_t_buf_func[0].y"+ +~"t.registers.read_write_demux.out1_t_buf_func[1].c1"&~"t.registers.read_write_demux.out1_t_buf_func[1].c2"|~"t.registers.read_write_demux.out1_t_buf_func[1].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[1]._y"+ +"t.registers.read_write_demux.out1_t_buf_func[1].c1"&"t.registers.read_write_demux.out1_t_buf_func[1].c2"&"t.registers.read_write_demux.out1_t_buf_func[1].n1"&"t.registers.read_write_demux.out1_t_buf_func[1].n2"&"t.registers.read_write_demux.out1_t_buf_func[1].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[1]._y"- +"t.registers.read_write_demux.out1_t_buf_func[1]._y"->"t.registers.read_write_demux.out1_t_buf_func[1].y"- +~("t.registers.read_write_demux.out1_t_buf_func[1]._y")->"t.registers.read_write_demux.out1_t_buf_func[1].y"+ +~"t.registers.read_write_demux.out1_t_buf_func[2].c1"&~"t.registers.read_write_demux.out1_t_buf_func[2].c2"|~"t.registers.read_write_demux.out1_t_buf_func[2].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[2]._y"+ +"t.registers.read_write_demux.out1_t_buf_func[2].c1"&"t.registers.read_write_demux.out1_t_buf_func[2].c2"&"t.registers.read_write_demux.out1_t_buf_func[2].n1"&"t.registers.read_write_demux.out1_t_buf_func[2].n2"&"t.registers.read_write_demux.out1_t_buf_func[2].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[2]._y"- +"t.registers.read_write_demux.out1_t_buf_func[2]._y"->"t.registers.read_write_demux.out1_t_buf_func[2].y"- +~("t.registers.read_write_demux.out1_t_buf_func[2]._y")->"t.registers.read_write_demux.out1_t_buf_func[2].y"+ +~"t.registers.read_write_demux.out1_t_buf_func[3].c1"&~"t.registers.read_write_demux.out1_t_buf_func[3].c2"|~"t.registers.read_write_demux.out1_t_buf_func[3].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[3]._y"+ +"t.registers.read_write_demux.out1_t_buf_func[3].c1"&"t.registers.read_write_demux.out1_t_buf_func[3].c2"&"t.registers.read_write_demux.out1_t_buf_func[3].n1"&"t.registers.read_write_demux.out1_t_buf_func[3].n2"&"t.registers.read_write_demux.out1_t_buf_func[3].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[3]._y"- +"t.registers.read_write_demux.out1_t_buf_func[3]._y"->"t.registers.read_write_demux.out1_t_buf_func[3].y"- +~("t.registers.read_write_demux.out1_t_buf_func[3]._y")->"t.registers.read_write_demux.out1_t_buf_func[3].y"+ +"t.registers.read_write_demux.out2_a_B_buf_t.buf1.a"->"t.registers.read_write_demux.out2_a_B_buf_t.buf1._y"- +~("t.registers.read_write_demux.out2_a_B_buf_t.buf1.a")->"t.registers.read_write_demux.out2_a_B_buf_t.buf1._y"+ +"t.registers.read_write_demux.out2_a_B_buf_t.buf1._y"->"t.registers.read_write_demux.out2_a_B_buf_t.buf1.y"- +~("t.registers.read_write_demux.out2_a_B_buf_t.buf1._y")->"t.registers.read_write_demux.out2_a_B_buf_t.buf1.y"+ += "t.registers.read_write_demux.out2_a_B_buf_t.supply.vdd" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.vdd" += "t.registers.read_write_demux.out2_a_B_buf_t.supply.vss" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.vss" += "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[3]" += "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[2]" += "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[1]" += "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.y" += "t.registers.read_write_demux.out2_a_B_buf_t.in" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.a" += "t.registers.read_write_demux._out2_a_B" "t.registers.read_write_demux.out2_a_B_buf_t.in" += "t.registers.read_write_demux._out2_a_B" "t.registers.read_write_demux.out2_a_B_buf_f.in" += "t.registers.read_write_demux._out2_a_B" "t.registers.read_write_demux.out2_a_inv.y" = "t.dly_cfg[0]" "t.registers.dly_cfg[0]" = "t.dly_cfg[1]" "t.registers.dly_cfg[1]" = "t.in.d.d[0].d[0]" "t.in.d.d[0].f" diff --git a/test/unit_tests/register_write/test.act b/test/unit_tests/register_write/test.act index c061169..fb020da 100644 --- a/test/unit_tests/register_write/test.act +++ b/test/unit_tests/register_write/test.act @@ -33,7 +33,7 @@ open tmpl::dataflow_neuro; // 2 bits encoder, 2 bits long words, 2 delays???? defproc register_test (avMx1of2<1+2+2> in; d1of<2> data[1<<2]; bool? dly_cfg[2]){ - register_rw<2,2,2> registers(.in=in,.data = data); + register_rw_v2<2,2,2> registers(.in=in,.data = data); //Low active Reset bool _reset_B; power _supply; diff --git a/test/unit_tests/register_write/test.prsim b/test/unit_tests/register_write/test.prsim index 722f651..0d2e2b5 100644 --- a/test/unit_tests/register_write/test.prsim +++ b/test/unit_tests/register_write/test.prsim @@ -2,10 +2,17 @@ watchall system "echo '[0] start test'" set-qdi-channel-neutral "t.in" 5 +set-qdi-channel-neutral "t._in_write" 5 +set-qdi-channel-neutral "t._in_read" 5 set t.data[0].d[0] 0 set t.data[0].d[1] 0 set t.data[1].d[0] 0 set t.data[1].d[1] 0 +set t.registers._in_write.a 0 +set t.registers._in_read.a 0 +set t.registers._in_write.v 0 +set t.registers._in_read.v 0 + set Reset 0 cycle status X @@ -23,9 +30,9 @@ set t.dly_cfg[1] 1 cycle assert-qdi-channel-neutral "t.in" 5 system "echo '[2] delay line set'" -set-qdi-channel-valid "t.in" 5 3 +set-qdi-channel-valid "t.in" 5 19 cycle -assert-qdi-channel-valid "t.in" 5 3 +assert-qdi-channel-valid "t.registers._in_write" 4 3 assert t.registers._clock 0 assert t.registers._out_encoder[0] 1 assert t.registers._out_encoder[1] 0