From cc2234a1b1977b90d6f21aa777d7f43ff6278a70 Mon Sep 17 00:00:00 2001 From: Michele Date: Wed, 9 Mar 2022 20:18:20 +0100 Subject: [PATCH] moved the ack of the register --- dataflow_neuro/registers.act | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/dataflow_neuro/registers.act b/dataflow_neuro/registers.act index 0ea0419..6fca411 100644 --- a/dataflow_neuro/registers.act +++ b/dataflow_neuro/registers.act @@ -146,7 +146,7 @@ defproc register_rw (avMx1of2<1+lognw+wl> in; avMx1of2 out; d1of d (i:lognw+wl:_in_write_temp.d[i] = _in_write.d.d[i];) vtree val_input_write(.in = _in_write_temp,.out = _in_write.v, .supply = supply); // Acknowledgment - //delayprog ack_dly(.in = _clock, .out = _in_write.a,.s = dly_cfg, .supply = supply); + delayprog ack_dly(.in = _clock, .out = _in_write.a,.s = dly_cfg, .supply = supply); // Generation of the fake clock pulse (inverted because the ff clocks are low_active) delayprog clk_dly(.in = _in_write.v, .out = _clock_temp,.s = dly_cfg, .supply = supply); INV_X1 inv_clk(.a = _clock_temp,.y = _clock_temp_inv,.vdd = supply.vdd,.vss = supply.vss);