From ded1742b7272416a307825a3f8a5bfc668ac3699 Mon Sep 17 00:00:00 2001
From: alexmadison <git@mdsn.co.uk>
Date: Mon, 21 Feb 2022 17:50:23 +0100
Subject: [PATCH] added some 3/4 cells and changed mux cells

---
 dataflow_neuro/cell_lib_std.act | 101 +++++++++++++++++++++++++++++---
 1 file changed, 94 insertions(+), 7 deletions(-)

diff --git a/dataflow_neuro/cell_lib_std.act b/dataflow_neuro/cell_lib_std.act
index 15dedd8..849c66c 100644
--- a/dataflow_neuro/cell_lib_std.act
+++ b/dataflow_neuro/cell_lib_std.act
@@ -118,6 +118,15 @@ namespace tmpl {
       sizing { y {-1} }
     } 
 
+    export defcell NOR4_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      prs {
+        a | b | c | d => y-
+      }
+      sizing { y {-1} }
+    }  
+
+
     export defcell OR2_X1(bool! y; bool? a, b, vdd, vss)
     {
       bool _y;
@@ -136,7 +145,28 @@ namespace tmpl {
         _y => y-
       }
       sizing { _y{-1}; y{-2} }
-    } 
+    }
+
+    export defcell OR3_X1(bool! y; bool? a, b, c, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a | b | c => _y-
+        _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+
+    export defcell OR4_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      bool _y;
+      prs {
+        a | b | c | d => _y-
+        _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+
 
     export defcell NAND2_X1(bool! y; bool? a, b, vdd, vss)
     {
@@ -154,6 +184,14 @@ namespace tmpl {
       sizing { y{-1} }
     }
 
+    export defcell NAND4_X1(bool! y; bool? a, b, c, d, vdd, vss)
+    {
+      prs {  
+        a & b & c & d => y-
+      }
+      sizing { y{-1} }
+    }
+
     export defcell AND2_X1(bool! y; bool? a, b, vdd, vss) 
     {
       bool _y;
@@ -172,8 +210,28 @@ namespace tmpl {
       _y => y-
       }
       sizing { _y{-1}; y{-2} }
+    }
+
+    export defcell AND3_X1(bool! y; bool? a, b, c, vdd, vss) 
+    {
+      bool _y;
+      prs {  
+        a & b & c => _y- 
+      _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
     } 
 
+    export defcell AND4_X1(bool! y; bool? a, b, c, d, vdd, vss) 
+    {
+      bool _y;
+      prs {  
+        a & b & c & d => _y- 
+      _y => y-
+      }
+      sizing { _y{-1}; y{-1} }
+    }
+
     export defcell XOR2_X1(bool! y; bool? a, b, vdd, vss)
     {
       bool _a, _b;
@@ -200,19 +258,48 @@ namespace tmpl {
       sizing { _a{-1}; _b{-1}; y{-1} }
     }
 
-    export defcell MUX2_X1(bool! y; bool? a, b, S, vdd, vss)
+    export defcell MUX2_X1(bool! y; bool? a, b, s, vdd, vss)
     {
       // y = !( S ? a : b )
-      bool _S;
+      // Adjusted to fit the XFAB Muxes
+      bool _s;
+      bool _y;
       prs {
-        S => _S-
+        s => _s-
 
-        [keeper=0] ~a & ~_S | ~b & ~S -> y+
-        a & S | b & _S -> y-
+        [keeper=0] ~a & ~s | ~b & ~_s -> _y+
+        a & _s | b & s -> _y-
+        _y => -y
       }
-      sizing { _S{-1}; y{-1} }
+      sizing { _s{-1}; y{-1}; _y{-1}}
     }
 
+    export defcell MUX4_X1(bool! y; bool? a, b, c, d, s0, s1, vdd, vss)
+    {
+      // y = !( S ? a : b )
+      bool _s0;
+      bool _s1;
+      bool _yab;
+      bool _ycd;
+
+      prs {
+        s0 => _s0-
+        s1 => _s1-
+
+        [keeper=0] a & _s0 | b & s0 -> _yab-
+        ~a & ~s0 | ~b & ~_s0 -> _yab+
+
+        [keeper=0] c & _s0 | d & s0 -> _ycd-
+        ~c & ~s0 | ~d & ~_s0 -> _ycd+
+
+        [keeper=0]_yab & _s1 | _ycd & s1 -> y-
+        ~_yab & ~s1 | ~_ycd & ~_s1 -> y+
+
+      }
+      sizing {_s0{-1}; _s1{-1}; y{-1}; _yab{-1} _ycd{-1}}
+    }
+
+
     export defcell OAI21_X1(bool! y; bool? a, b, c, vdd, vss)
     {
       prs {