From 77edb22bb6f4f00f549a9af9d06446f0fd32e421 Mon Sep 17 00:00:00 2001 From: Hugh Date: Mon, 11 Apr 2022 19:28:05 +0200 Subject: [PATCH] chnaged some a cells --- dataflow_neuro/cell_lib_async.act | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/dataflow_neuro/cell_lib_async.act b/dataflow_neuro/cell_lib_async.act index 2138e87..4e1b32a 100644 --- a/dataflow_neuro/cell_lib_async.act +++ b/dataflow_neuro/cell_lib_async.act @@ -27,13 +27,13 @@ namespace tmpl { namespace dataflow_neuro{ export defcell KEEP (bool y; bool vdd, vss) { - // bool _y; - // prs{ - // y => _y- + bool _y; + prs{ + y => _y- // [weak=1] _y -> y- // [weak=1] ~_y -> y+ - // } + } } export defcell A_1C2N_RB_X1 (bool! y; bool? c1,n1,n2,pr_B, sr_B; bool vdd, vss) { @@ -661,10 +661,10 @@ namespace tmpl { } export - defproc A_2N_U_X4(bool? a, b; bool! y; bool? vdd, vss) + defproc A_2N_U_X4(bool? n1, n2; bool! y; bool? vdd, vss) { prs{ - [keeper=0] a & b -> y- + [keeper=0] n1 & n2 -> y- } } @@ -677,10 +677,10 @@ namespace tmpl { } export - defproc A_2P_U_X4(bool? a, b; bool! y; bool? vdd, vss) + defproc A_2P_U_X4(bool? p1, p2; bool! y; bool? vdd, vss) { prs{ - [keeper=0] ~a & ~b -> y+ + [keeper=0] ~p1 & ~p2 -> y+ } }