From edb0443c01e83b5c967b87043b43035ddeba59ef Mon Sep 17 00:00:00 2001 From: Michele Date: Mon, 14 Mar 2022 17:15:27 +0100 Subject: [PATCH] Added new version of Register_rw (still not properly working) --- dataflow_neuro/cell_lib_std.act | 4 +- dataflow_neuro/registers.act | 168 +- test/unit_tests/register_wrw/run/prsim.out | 995 ++++-- test/unit_tests/register_wrw/run/prsim.pdf | Bin 0 -> 53431 bytes test/unit_tests/register_wrw/run/test.prs | 3206 +++++++++----------- test/unit_tests/register_wrw/test.prsim | 52 +- 6 files changed, 2245 insertions(+), 2180 deletions(-) create mode 100644 test/unit_tests/register_wrw/run/prsim.pdf diff --git a/dataflow_neuro/cell_lib_std.act b/dataflow_neuro/cell_lib_std.act index 5be7803..ce93a4a 100644 --- a/dataflow_neuro/cell_lib_std.act +++ b/dataflow_neuro/cell_lib_std.act @@ -373,7 +373,7 @@ namespace tmpl { } sizing { _en{-2}; y{-2,2} } } - export defproc DFFQ_R_X1 (bool? clk_B, reset_B, d; bool! q; bool? vdd,vss) + export defproc DFFQ_R_X1 (bool? clk_B, reset_B, d; bool! q,q_B; bool? vdd,vss) { bool _clk_B, __clk_B, _mqi,_mqib,_sqi,_sqib; prs { @@ -393,6 +393,8 @@ namespace tmpl { _sqib => _sqi- _sqib => q- + q => q_B- + } } diff --git a/dataflow_neuro/registers.act b/dataflow_neuro/registers.act index 6fca411..0b6dabe 100644 --- a/dataflow_neuro/registers.act +++ b/dataflow_neuro/registers.act @@ -62,9 +62,9 @@ defproc register_w (avMx1of2<1+lognw+wl> in; d1of data[1< clk_dly(.in = _in_v_temp, .out = _clock_temp,.s = dly_cfg, .supply = supply); INV_X1 inv_clk(.a = _clock_temp,.y = _clock_temp_inv,.vdd = supply.vdd,.vss = supply.vss); - sigbuf_1output<4> clk_X(.in = _clock_temp_inv,.out = _clock,.supply = supply); + sigbuf_1output<4> clk_X(.in = _clock_temp,.out = _clock,.supply = supply); // Sending back to the ackowledge - delayprog ack_dly(.in = _clock, .out = _in_a_temp,.s = dly_cfg, .supply = supply); + delayprog ack_dly(.in = _clock_temp_inv, .out = _in_a_temp,.s = dly_cfg, .supply = supply); sigbuf_1output<4> ack_input_X(.in = _in_a_temp,.out = in.a,.supply = supply); //Reset Buffers bool _reset_BX,_reset_mem_BX,_reset_mem_BXX[nw*wl]; @@ -127,61 +127,65 @@ defproc register_w (avMx1of2<1+lognw+wl> in; d1of data[1< the data saved in the flip flop, sized wl x nw export template defproc register_rw (avMx1of2<1+lognw+wl> in; avMx1of2 out; d1of data[1< _in_temp2,_in_read,_in_write; - avMx1of2<1>_in_flag; - // Read or write? - AND2_X1 ack_and(.a = _in_temp2.a,.b = _ff_v,.y = in.a,.vdd = supply.vdd,.vss = supply.vss); - in.v = _in_temp2.v; - _in_flag.d.d[0] = in.d.d[lognw+wl]; - (i:lognw+wl:_in_temp2.d.d[i] = in.d.d[i];) - demux read_write_demux(.in = _in_temp2,.out1 = _in_read, .out2 = _in_write, .cond = _in_flag,.reset_B = reset_B); - read_write_demux.supply= supply; - //WRITE PATH - // Validation - Mx1of2 _in_write_temp; - (i:lognw+wl:_in_write_temp.d[i] = _in_write.d.d[i];) - vtree val_input_write(.in = _in_write_temp,.out = _in_write.v, .supply = supply); - // Acknowledgment - delayprog ack_dly(.in = _clock, .out = _in_write.a,.s = dly_cfg, .supply = supply); - // Generation of the fake clock pulse (inverted because the ff clocks are low_active) - delayprog clk_dly(.in = _in_write.v, .out = _clock_temp,.s = dly_cfg, .supply = supply); + vtree<1+lognw+wl> val_input(.in = in.d,.out = _in_v_temp, .supply = supply); + sigbuf_1output<12> val_input_X(.in = _in_v_temp,.out = in.v,.supply = supply); + // Acknowledgment + OR2_X1 ack_readwrite(.a = _in_a_write,.b = _in_a_read,.y = _in_a_temp,.vdd = supply.vdd,.vss = supply.vss); + sigbuf_1output<12> ack_input_X(.in = _in_a_temp,.out = in.a,.supply = supply); + // WRITE + // Generation of the fake clock pulse if write is HIGH (inverted because the ff clocks are low_active) + bool _in_v_temp_write; + AND2_X1 clk_switch(.a = _in_v_temp,.b = in.d.d[lognw+wl].f, .y = _in_v_temp_write,.vdd = supply.vdd,.vss = supply.vss); + delayprog clk_dly(.in = _in_v_temp_write, .out = _clock_temp,.s = dly_cfg, .supply = supply); INV_X1 inv_clk(.a = _clock_temp,.y = _clock_temp_inv,.vdd = supply.vdd,.vss = supply.vss); - sigbuf_1output<4> clk_X(.in = _clock_temp_inv,.out = _clock,.supply = supply); - //READ PATH - //Validation - Mx1of2 _in_read_temp; - (i:lognw+wl:_in_read_temp.d[i] = _in_read.d.d[i];) - vtree val_input_read(.in = _in_read_temp,.out = _in_read.v, .supply = supply); - vtree ff_validator; - Mx1of2 _out_temp; - (i:wl:_out_temp.d[i] = out.d.d[i];) - ff_validator.in = _out_temp; - ff_validator.out = _ff_v; - ff_validator.supply = supply; - // Acknowledgment - _in_read.a = _ff_v; //The circuit is ack when flip flop data are valid - + sigbuf clk_X(.in = _clock_temp_inv,.out = _clock,.supply = supply); + sigbuf clock_buffer[nw]; + bool _clock_word_temp[nw],_clock_word[nw],_clock_buffer_out[nw*wl]; + // Sending back to the ackowledge + bool _in_a_write_temp; + delayprog ack_dly(.in = _clock_temp, .out = _in_a_write_temp,.s = dly_cfg, .supply = supply); + AND2_X1 ack_write_and(.a = in.d.d[lognw+wl].f,.b = _in_a_write_temp,.y = _in_a_write,.vdd = supply.vdd, .vss = supply.vss); + // READ + //Outputing the word to read + AND2_X1 word_to_read[nw]; + sigbuf word_to_read_X[nw]; + ortree bitselector_t[wl]; + ortree bitselector_f[wl]; + AND2_X1 word_selector_t[nw*wl]; + AND2_X1 word_selector_f[nw*wl]; + bool _out_word_to_read[2*nw*wl]; + buffer_s output_buf(.out = out,.supply = supply, .reset_B = reset_B); + AND2_X1 address_propagator_f[lognw],address_propagator_t[lognw]; + // Outputting the address if the read is true + (i:lognw: + address_propagator_t[i].a = in.d.d[lognw+wl].t; + address_propagator_t[i].b = in.d.d[i+wl].t; + address_propagator_t[i].y = output_buf.in.d.d[i+wl].t; + address_propagator_t[i].vdd = supply.vdd; + address_propagator_t[i].vss = supply.vss; + + address_propagator_f[i].a = in.d.d[lognw+wl].t; + address_propagator_f[i].b = in.d.d[i+wl].f; + address_propagator_f[i].y = output_buf.in.d.d[i+wl].f; + address_propagator_f[i].vdd = supply.vdd; + address_propagator_f[i].vss = supply.vss; + ) + AND2_X1 ack_read_and(.a = in.d.d[lognw+wl].t,.b = output_buf.in.a,.y = _in_a_read,.vdd = supply.vdd, .vss = supply.vss); //Reset Buffers - bool _reset_BX,_reset_mem_BX,_reset_mem_BXX[nw*wl*2]; + bool _reset_BX,_reset_mem_BX,_reset_mem_BXX[nw*wl]; BUF_X1 reset_buf_BX(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss); BUF_X1 reset_buf_BXX(.a=reset_mem_B, .y=_reset_mem_BX,.vdd=supply.vdd,.vss=supply.vss); - sigbuf reset_bufarray(.in=_reset_mem_BX, .out=_reset_mem_BXX,.supply=supply); - // Creating the different flip flop arrays - bool _out_encoder[nw],_clock_word_temp[nw],_clock_word[nw],_clock_buffer_out[nw*wl]; + sigbuf reset_bufarray(.in=_reset_mem_BX, .out=_reset_mem_BXX,.supply=supply); + //Creating the encoder andtree atree[nw]; - d1of _data_f; AND2_X1 and_encoder[nw]; - AND3_X1 reading_activator_t[nw*wl],reading_activator_f[nw*wl]; - - sigbuf clock_buffer[nw]; - DFFQ_R_X1 ff_t[nw*wl],ff_f[nw*wl]; - OR2_X1 ff_val[wl]; - (i:wl..lognw:out.d.d[i] = in.d.d[i];) - bool __ffout_dualrail[nw*wl]; + // Creating the different flip flop arrays + bool _out_encoder[nw]; + DFFQ_R_X1 ff[nw*wl]; + // For loop for assigning the different components pint bitval; (k:nw:atree[k].supply = supply;) (word_idx:nw: @@ -195,50 +199,50 @@ defproc register_rw (avMx1of2<1+lognw+wl> in; avMx1of2 out; d1of d []bitval >= 2 -> {false : "fuck"}; ] ) - // Encode which work is the right one - atree[word_idx].out = _out_encoder[word_idx]; - // READ: use the encoder selection to read the value - // WRITE: Activating the fake clock for the right word + atree[word_idx].out = _out_encoder[word_idx]; and_encoder[word_idx].a = _out_encoder[word_idx]; - and_encoder[word_idx].b = _clock; + and_encoder[word_idx].b = _clock[word_idx]; and_encoder[word_idx].y = _clock_word_temp[word_idx]; and_encoder[word_idx].vdd = supply.vdd; and_encoder[word_idx].vss = supply.vss; clock_buffer[word_idx].in = _clock_word_temp[word_idx]; clock_buffer[word_idx].supply = supply; - // Describing all the FF and their connection + // READ: Selecting the right word to read if read is high + word_to_read[word_idx].a = in.d.d[lognw+wl].t; + word_to_read[word_idx].b = _out_encoder[word_idx]; + word_to_read[word_idx].y = word_to_read_X[word_idx].in; + word_to_read[word_idx].vdd = supply.vdd; + word_to_read[word_idx].vss = supply.vss; + word_to_read_X[word_idx].supply = supply; + + + (bit_idx:wl: - ff_t[bit_idx+word_idx*(wl)].clk_B = clock_buffer[word_idx].out[bit_idx]; - ff_t[bit_idx+word_idx*(wl)].d = in.d.d[bit_idx].t; - ff_t[bit_idx+word_idx*(wl)].q = data[word_idx].d[bit_idx]; - ff_t[bit_idx+word_idx*(wl)].reset_B = _reset_mem_BXX[bit_idx+word_idx*(wl)]; - ff_t[bit_idx+word_idx*(wl)].vdd = supply.vdd; - ff_t[bit_idx+word_idx*(wl)].vss = supply.vss; - - ff_f[bit_idx+word_idx*(wl)].clk_B = clock_buffer[word_idx].out[bit_idx+wl-1]; - ff_f[bit_idx+word_idx*(wl)].d = in.d.d[bit_idx].f; - ff_f[bit_idx+word_idx*(wl)].reset_B = _reset_mem_BXX[bit_idx+word_idx*(wl)+nw-1]; - ff_f[bit_idx+word_idx*(wl)].vdd = supply.vdd; - ff_f[bit_idx+word_idx*(wl)].vss = supply.vss; - - reading_activator_t[bit_idx+word_idx*(wl)].a = _in_flag.d.d[0].t; - reading_activator_t[bit_idx+word_idx*(wl)].b = ff_t[bit_idx+word_idx*(wl)].q; - reading_activator_t[bit_idx+word_idx*(wl)].c = _out_encoder[word_idx]; - reading_activator_t[bit_idx+word_idx*(wl)].y = out.d.d[bit_idx].t; - reading_activator_t[bit_idx+word_idx*(wl)].vdd = supply.vdd; - reading_activator_t[bit_idx+word_idx*(wl)].vss = supply.vss; - - reading_activator_f[bit_idx+word_idx*(wl)].a = _in_flag.d.d[0].f; - reading_activator_f[bit_idx+word_idx*(wl)].b = ff_f[bit_idx+word_idx*(wl)].q; - reading_activator_f[bit_idx+word_idx*(wl)].y = out.d.d[bit_idx].f; - reading_activator_f[bit_idx+word_idx*(wl)].vdd = supply.vdd; - reading_activator_f[bit_idx+word_idx*(wl)].vss = supply.vss; - reading_activator_f[bit_idx+word_idx*(wl)].c = _out_encoder[word_idx]; - + // Describing all the FF and their connection + ff[bit_idx+word_idx*(wl)].clk_B = clock_buffer[word_idx].out[bit_idx]; + ff[bit_idx+word_idx*(wl)].d = in.d.d[bit_idx].t; + ff[bit_idx+word_idx*(wl)].q = data[word_idx].d[bit_idx]; + ff[bit_idx+word_idx*(wl)].reset_B = _reset_mem_BXX[bit_idx+word_idx*(wl)]; + ff[bit_idx+word_idx*(wl)].vdd = supply.vdd; + ff[bit_idx+word_idx*(wl)].vss = supply.vss; + // READ: creating the selectors for propagating the right word + word_to_read_X[word_idx].out[bit_idx] = word_selector_t[bit_idx+word_idx*(wl)].a; + word_to_read_X[word_idx].out[bit_idx+wl] = word_selector_f[bit_idx+word_idx*(wl)].a; + word_selector_t[bit_idx+word_idx*(wl)].b = ff[bit_idx+word_idx*(wl)].q; + word_selector_t[bit_idx+word_idx*(wl)].y = bitselector_t[bit_idx].in[word_idx]; + word_selector_f[bit_idx+word_idx*(wl)].b = ff[bit_idx+word_idx*(wl)].q_B; + word_selector_f[bit_idx+word_idx*(wl)].y = bitselector_f[bit_idx].in[word_idx]; + bitselector_t[bit_idx].out = output_buf.in.d.d[bit_idx].t; + bitselector_f[bit_idx].out = output_buf.in.d.d[bit_idx].f; + bitselector_t[bit_idx].supply = supply; + bitselector_f[bit_idx].supply = supply; ) ) } + + + }} diff --git a/test/unit_tests/register_wrw/run/prsim.out b/test/unit_tests/register_wrw/run/prsim.out index 83ccfd8..e3482d2 100644 --- a/test/unit_tests/register_wrw/run/prsim.out +++ b/test/unit_tests/register_wrw/run/prsim.out @@ -1,243 +1,768 @@ -t.registers.read_write_demux.vc.ct.in[0] t.registers.ff_f[4].clk_B t.registers._clock_word_temp[0] t.registers._clock_temp_inv t.registers._clock t.dly_cfg[1] t.registers.atree[2].in[1] t.registers.read_write_demux._in_v t.registers.read_write_demux._c_v t.registers.reading_activator_f[0].a t.registers.ff_t[0].d t.registers.ff_f[4].__clk_B t.registers.ff_t[0]._clk_B t.registers.ff_f[5]._clk_B t.registers.atree[0].in[1] t.registers.atree[0].in[0] t.registers.ff_f[6].clk_B t.registers.clock_buffer[1].buf1._y t.registers._out_encoder[2] t.registers._out_encoder[1] t.registers.clk_dly.and2[1]._y t.registers.ff_t[1]._clk_B t.registers.ff_f[0].d t.registers.atree[1].in[0] t.in.v t.registers.ff_t[4]._clk_B t.registers.ff_t[1].d t.registers.ff_f[0].clk_B t.registers.read_write_demux._c_t_buf[0] t.registers.clk_dly.dly[1].a t.registers._clock_word_temp[3] t.registers.read_write_demux._out2_a_BX_t[0] t.registers.ff_val[1].y t.registers.read_write_demux._out2_a_BX_f[0] t.registers.clock_buffer[0].buf1._y t.registers._out_encoder[0] t.registers.ff_f[1].d t.registers.ff_t[5]._clk_B t.registers.ff_t[4].__clk_B t.registers.reading_activator_t[0].a t.registers.clk_X.buf1._y t.registers.read_write_demux._c_f_buf[0] t.registers._clock_temp t.registers.read_write_demux.out2_a_B_buf_f.buf1._y t.registers._out_encoder[3] t.registers.read_write_demux.vc.ct.in[1] t.registers.clk_dly.dly[1]._y t.registers.read_write_demux.c_f_c_t_or._y t.registers.ff_t[0].__clk_B t.registers.ff_t[2]._clk_B t.registers.ff_val[1]._y t.registers.read_write_demux.vc.ct.in[2] t.registers._clock_word_temp[1] t.registers.clk_dly.mu2[0]._s t.registers.clock_buffer[2].buf1._y t.registers.ff_t[1].__clk_B t.registers.read_write_demux.in_v_buf._y t.registers.clk_dly.dly[1].__y t.registers.ff_f[7]._clk_B t.registers.clk_dly.mu2[0]._y t.registers.clock_buffer[3].buf1._y t.registers.read_write_demux._out2_a_B t.dly_cfg[0] t.registers.and_encoder[0]._y t.registers.clk_dly._a[1] t.registers.read_write_demux._in_c_v_ t.registers.ff_f[2].__clk_B t.registers.read_write_demux.vc.ct.in[3] t.registers.clk_dly.dly[2].__y t.registers.atree[3].and2s[0]._y t.registers.read_write_demux.vc.ct.tmp[4] t.registers.read_write_demux.c_el._y t.registers.ff_f[7].__clk_B t.registers.read_write_demux.vc.OR2_tf[2]._y t.registers._clock_word_temp[2] t.registers.atree[2].and2s[0]._y t.registers.ff_f[0].__clk_B t.registers._in_write.a t.registers.ff_val[0].y t.registers.ff_t[6]._clk_B t.registers.read_write_demux.vc.ct.C2Els[1]._y t.registers.ff_f[4]._clk_B t.registers.read_write_demux.vc.OR2_tf[0]._y t.registers.clk_dly.dly[2].___y t.registers.read_write_demux.vc.ct.C2Els[2]._y t.registers.ff_f[2].clk_B t.registers.read_write_demux.out2_a_B_buf_t.buf1._y t.registers.clk_dly.dly[2]._y t.registers.ff_val[0].b t.registers.read_write_demux.vc.ct.tmp[5] t.registers.read_write_demux.vc.ct.C2Els[0]._y t.registers.clk_dly.dly[1].y t.registers.ff_f[2]._clk_B t.registers.clk_dly.dly[2].y t.registers.read_write_demux.c_buf_f.buf1._y t.registers.ff_val[1].b t.registers.ff_val[0].a t.registers.ff_t[2].__clk_B t.registers.atree[1].and2s[0]._y t.registers.ff_f[3].__clk_B t.registers.ff_f[6].__clk_B t.registers.and_encoder[2]._y t.registers.ff_f[6]._clk_B t.registers.clk_dly.dly[1].___y t.registers.clk_dly.mu2[1]._s t.registers.ff_f[0]._clk_B t.registers.read_write_demux.c_buf_t.buf1._y t.registers.ff_val[1].a t.registers.ff_t[3]._clk_B t.registers.atree[0].and2s[0]._y t.registers.clk_dly.mu2[1]._y t.registers.ff_f[1]._clk_B t.registers.ff_val[0]._y t.registers.ff_t[7].__clk_B t.registers.ff_t[7]._clk_B t.registers.read_write_demux.vc.OR2_tf[1]._y t.registers.ff_f[5].__clk_B t.registers.ff_f[1].__clk_B t.registers.and_encoder[1]._y t.registers.ff_t[5].__clk_B t.registers.ff_t[6].__clk_B t.registers.and_encoder[3]._y t.registers.read_write_demux.vc.OR2_tf[3]._y t.registers.ff_t[3].__clk_B t.registers.ff_f[3]._clk_B + 0 GND : 0 + 0 Reset : 1 + 0 Vdd : 1 + 1 t._reset_B : 0 [by Reset:=1] + 3 t.registers.reset_buf_BXX._y : 1 [by t._reset_B:=0] + 4756 t.registers._reset_mem_BX : 0 [by t.registers.reset_buf_BXX._y:=1] + 5893 t.registers.reset_bufarray.buf3._y : 1 [by t.registers._reset_mem_BX:=0] + 6007 t.registers._reset_mem_BXX[0] : 0 [by t.registers.reset_bufarray.buf3._y:=1] + 6011 t.registers.ff[0]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6020 t.registers.ff[5]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6022 t.registers.ff[6]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6023 t.registers.ff[2]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6026 t.registers.ff[0]._mqi : 0 [by t.registers.ff[0]._mqib:=1] + 6027 t.registers.ff[3]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6046 t.registers.ff[6]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6047 t.registers.ff[4]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6054 t.registers.ff[2]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6077 t.registers.ff[6]._sqi : 0 [by t.registers.ff[6]._sqib:=1] + 6422 t.registers.ff[4]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6423 t.registers.ff[4]._sqi : 0 [by t.registers.ff[4]._sqib:=1] + 6423 t.data[2].d[0] : 0 [by t.registers.ff[4]._sqib:=1] + 6469 t.registers.ff[4]._mqi : 0 [by t.registers.ff[4]._mqib:=1] + 6498 t.registers.ff[5]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 6705 t.registers.ff[4].q_B : 1 [by t.data[2].d[0]:=0] + 7093 t.registers.reset_buf_BX._y : 1 [by t._reset_B:=0] + 7096 t.registers._reset_BX : 0 [by t.registers.reset_buf_BX._y:=1] + 7266 t.registers.ff[5]._mqi : 0 [by t.registers.ff[5]._mqib:=1] + 7733 t.registers.ff[7]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 8284 t.data[3].d[1] : 0 [by t.registers.ff[7]._sqib:=1] + 9238 t.registers.ff[7].q_B : 1 [by t.data[3].d[1]:=0] + 9355 t.registers.word_selector_t[7]._y : 1 [by t.data[3].d[1]:=0] + 10436 t.registers.word_selector_t[7].y : 0 [by t.registers.word_selector_t[7]._y:=1] + 10468 t.registers.output_buf.reset_buf._y : 1 [by t._reset_B:=0] + 12068 t.registers.ff[3]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 12086 t.data[1].d[1] : 0 [by t.registers.ff[3]._sqib:=1] + 13050 t.registers.ff[3]._sqi : 0 [by t.registers.ff[3]._sqib:=1] + 15136 t.registers.ff[0]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 16089 t.registers.ff[3].q_B : 1 [by t.data[1].d[1]:=0] + 16099 t.registers.word_selector_t[3]._y : 1 [by t.data[1].d[1]:=0] + 19731 t.registers.ff[1]._sqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 19872 t.data[1].d[0] : 0 [by t.registers.ff[2]._sqib:=1] + 19934 t.data[0].d[1] : 0 [by t.registers.ff[1]._sqib:=1] + 20003 t.registers.ff[1].q_B : 1 [by t.data[0].d[1]:=0] + 20011 t.registers.ff[2].q_B : 1 [by t.data[1].d[0]:=0] + 20233 t.registers.ff[1]._sqi : 0 [by t.registers.ff[1]._sqib:=1] + 20389 t.registers.ff[6]._mqi : 0 [by t.registers.ff[6]._mqib:=1] + 20859 t.registers.word_selector_t[3].y : 0 [by t.registers.word_selector_t[3]._y:=1] + 21726 t.registers.word_selector_t[2]._y : 1 [by t.data[1].d[0]:=0] + 21737 t.registers.word_selector_t[2].y : 0 [by t.registers.word_selector_t[2]._y:=1] + 26628 t.registers.word_selector_t[4]._y : 1 [by t.data[2].d[0]:=0] + 30174 t.registers.ff[7]._sqi : 0 [by t.registers.ff[7]._sqib:=1] + 30839 t.registers.ff[3]._mqi : 0 [by t.registers.ff[3]._mqib:=1] + 35803 t.registers.ff[2]._sqi : 0 [by t.registers.ff[2]._sqib:=1] + 36720 t.data[0].d[0] : 0 [by t.registers.ff[0]._sqib:=1] + 36735 t.registers.ff[0].q_B : 1 [by t.data[0].d[0]:=0] + 36924 t.registers.word_selector_t[0]._y : 1 [by t.data[0].d[0]:=0] + 36925 t.registers.word_selector_t[0].y : 0 [by t.registers.word_selector_t[0]._y:=1] + 36962 t.registers.bitselector_t[0].or2s[0]._y : 1 [by t.registers.word_selector_t[0].y:=0] + 37701 t.registers.bitselector_t[0].tmp[4] : 0 [by t.registers.bitselector_t[0].or2s[0]._y:=1] + 42951 t.data[2].d[1] : 0 [by t.registers.ff[5]._sqib:=1] + 43063 t.registers.word_selector_t[5]._y : 1 [by t.data[2].d[1]:=0] + 43103 t.registers.word_selector_t[5].y : 0 [by t.registers.word_selector_t[5]._y:=1] + 43360 t.registers.bitselector_t[1].or2s[1]._y : 1 [by t.registers.word_selector_t[5].y:=0] + 43447 t.registers.bitselector_t[1].tmp[5] : 0 [by t.registers.bitselector_t[1].or2s[1]._y:=1] + 49268 t.registers.ff[5]._sqi : 0 [by t.registers.ff[5]._sqib:=1] + 50105 t.registers.ff[1]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 50399 t.registers.ff[1]._mqi : 0 [by t.registers.ff[1]._mqib:=1] + 54768 t.registers.ff[2]._mqi : 0 [by t.registers.ff[2]._mqib:=1] + 56280 t.registers.word_selector_t[1]._y : 1 [by t.data[0].d[1]:=0] + 56281 t.registers.word_selector_t[1].y : 0 [by t.registers.word_selector_t[1]._y:=1] + 57675 t.data[3].d[0] : 0 [by t.registers.ff[6]._sqib:=1] + 58087 t.registers.bitselector_t[1].or2s[0]._y : 1 [by t.registers.word_selector_t[1].y:=0] + 58677 t.registers.bitselector_t[1].tmp[4] : 0 [by t.registers.bitselector_t[1].or2s[0]._y:=1] + 58855 t.registers.bitselector_t[1].or2s[2]._y : 1 [by t.registers.bitselector_t[1].tmp[4]:=0] + 58884 t.registers.ff[6].q_B : 1 [by t.data[3].d[0]:=0] + 59658 t.registers.bitselector_t[1].out : 0 [by t.registers.bitselector_t[1].or2s[2]._y:=1] + 59682 t.registers.word_selector_t[6]._y : 1 [by t.data[3].d[0]:=0] + 59846 t.registers.word_selector_t[6].y : 0 [by t.registers.word_selector_t[6]._y:=1] + 60037 t.registers.ff[0]._sqi : 0 [by t.registers.ff[0]._sqib:=1] + 64938 t.registers.output_buf._reset_BX : 0 [by t.registers.output_buf.reset_buf._y:=1] + 64960 t.registers.output_buf.inack_ctl._y : 1 [by t.registers.output_buf._reset_BX:=0] + 65807 t.registers.ack_read_and.b : 0 [by t.registers.output_buf.inack_ctl._y:=1] + 67133 t.registers.output_buf.reset_bufarray.buf1._y : 1 [by t.registers.output_buf._reset_BX:=0] + 67266 t.registers.output_buf._reset_BXX[0] : 0 [by t.registers.output_buf.reset_bufarray.buf1._y:=1] + 67273 t.registers.output_buf.f_buf_func[0]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 67296 t.registers.output_buf.f_buf_func[1]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 67364 t.out.d.d[0].f : 0 [by t.registers.output_buf.f_buf_func[0]._y:=1] + 67487 t.registers.output_buf.t_buf_func[3]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 67494 t.out.d.d[3].t : 0 [by t.registers.output_buf.t_buf_func[3]._y:=1] + 67625 t.registers.output_buf.t_buf_func[1]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 69485 t.out.d.d[1].f : 0 [by t.registers.output_buf.f_buf_func[1]._y:=1] + 70412 t.out.d.d[1].t : 0 [by t.registers.output_buf.t_buf_func[1]._y:=1] + 71373 t.registers.ff[7]._mqib : 1 [by t.registers._reset_mem_BXX[0]:=0] + 71479 t.registers.ff[7]._mqi : 0 [by t.registers.ff[7]._mqib:=1] + 73979 t.registers.output_buf.f_buf_func[2]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 74057 t.out.d.d[2].f : 0 [by t.registers.output_buf.f_buf_func[2]._y:=1] + 78414 t.registers.word_selector_t[4].y : 0 [by t.registers.word_selector_t[4]._y:=1] + 78689 t.registers.bitselector_t[0].or2s[1]._y : 1 [by t.registers.word_selector_t[4].y:=0] + 81382 t.registers.output_buf.t_buf_func[2]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 81837 t.out.d.d[2].t : 0 [by t.registers.output_buf.t_buf_func[2]._y:=1] + 82928 t.registers.output_buf.t_buf_func[0]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 82940 t.out.d.d[0].t : 0 [by t.registers.output_buf.t_buf_func[0]._y:=1] + 90463 t.registers.ff[5].q_B : 1 [by t.data[2].d[1]:=0] + 95935 t.registers.ack_read_and._y : 1 [by t.registers.ack_read_and.b:=0] + 96339 t.registers._in_a_read : 0 [by t.registers.ack_read_and._y:=1] + 97685 t.registers.bitselector_t[0].tmp[5] : 0 [by t.registers.bitselector_t[0].or2s[1]._y:=1] + 97697 t.registers.bitselector_t[0].or2s[2]._y : 1 [by t.registers.bitselector_t[0].tmp[5]:=0] + 103613 t.registers.bitselector_t[0].out : 0 [by t.registers.bitselector_t[0].or2s[2]._y:=1] + 124727 t.registers.output_buf.f_buf_func[3]._y : 1 [by t.registers.output_buf._reset_BXX[0]:=0] + 129003 t.out.d.d[3].f : 0 [by t.registers.output_buf.f_buf_func[3]._y:=1] +t.registers._clock_word_temp[0] t.registers.ack_dly._a[1] t.registers._clock_temp_inv t.registers.ff[0].clk_B t.registers._clock[0] t.dly_cfg[1] t.registers.ff[0].d t.registers.ff[4].clk_B t.registers.word_selector_f[3].y t.registers.output_buf._in_vX[0] t.registers._out_encoder[0] t.registers.bitselector_f[1].out t.registers.clock_buffer[1].buf1._y t.registers.atree[2].in[1] t.registers.ff[6].clk_B t.registers.word_selector_f[1].y t.registers.address_propagator_f[1].y t.registers._in_v_temp_write t.registers.bitselector_f[0].out t.registers.address_propagator_t[0].y t.registers._out_encoder[2] t.registers.clk_dly.and2[1]._y t.registers.output_buf._en_X_f[0] t.registers._out_encoder[1] t.registers.val_input.ct.in[0] t.registers.ack_dly.dly[2]._y t.registers.atree[0].in[0] t.in.d.d[0].f t.registers.word_selector_f[0].y t.in.v t.registers.word_selector_f[0].a t.registers.word_selector_f[6].a t.registers.clk_dly.dly[1].a t.registers.output_buf._en t.registers._in_a_write t.registers._clock_word_temp[3] t.registers.word_selector_f[4].a t.registers.output_buf._out_a_BX_t[0] t.registers.val_input.ct.in[3] t.registers.word_to_read[0].y t.registers.ff[1].d t.registers.clock_buffer[0].buf1._y t.registers.word_selector_f[2].y t.registers.output_buf.vc.ct.in[3] t.registers.ack_read_and.a t.registers.address_propagator_f[0]._y t.registers.word_selector_f[2].a t.registers.address_propagator_t[1].y t.registers.atree[1].in[0] t.registers.ack_dly.dly[2].___y t.registers.bitselector_f[0].or2s[2]._y t.registers.output_buf.vc.ct.tmp[4] t.registers.output_buf.vc.ct.tmp[5] t.registers.ack_dly.mu2[0]._y t.in.d.d[1].f t.registers.address_propagator_t[0]._y t.out.v t.registers.val_input.OR2_tf[3]._y t.registers.clk_X.buf1._y t.registers._clock_temp t.registers.word_to_read[3].y t.registers._in_a_write_temp t.registers.word_to_read[1].y t.registers.ff[7]._clk_B t.registers.output_buf.vc.ct.in[0] t.in.a t.registers.atree[0].in[1] t.registers._out_encoder[3] t.registers.ff[1]._clk_B t.registers.clk_dly.dly[0]._y t.registers.word_selector_f[4].y t.registers.val_input.OR2_tf[2]._y t.registers.val_input.ct.in[2] t.registers.output_buf._in_v t.registers.clk_dly.dly[1]._y t.registers.output_buf.vc.OR2_tf[0]._y t.registers.word_to_read[1]._y t.registers.output_buf._out_a_BX_f[0] t.registers.bitselector_f[0].tmp[5] t.registers.bitselector_f[1].tmp[4] t.registers._clock_word_temp[1] t.registers.clk_dly.mu2[0]._s t.registers.output_buf.in.v t.registers.ack_dly.dly[0]._y t.registers.word_selector_f[7].y t.registers.ack_dly.dly[0].a t.registers.address_propagator_f[0].y t.registers.clock_buffer[2].buf1._y t.registers.output_buf.vc.ct.in[1] t.registers.clk_dly.dly[1].__y t.registers.word_to_read[2].y t.registers.ff[2].clk_B t.registers._in_a_temp t.registers.ff[6]._clk_B t.registers.output_buf._en_X_t[0] t.registers.clk_dly.mu2[0]._y t.dly_cfg[0] t.registers.word_selector_f[5].y t.registers.bitselector_f[0].tmp[4] t.registers.clock_buffer[3].buf1._y t.registers.val_input.ct.tmp[5] t.registers._in_v_temp t.registers.output_buf._out_a_B t.registers.ack_dly.dly[1]._y t.registers.and_encoder[0]._y t.registers.clk_dly._a[1] t.registers.bitselector_f[1].or2s[0]._y t.registers.output_buf.vc.ct.in[2] t.registers.ack_dly.dly[1].y t.registers.output_buf.out_a_B_buf_f.buf1._y t.registers.clk_switch.b t.registers.val_input.OR2_tf[1]._y t.registers.clk_dly.dly[0].__y t.registers.output_buf.vc.ct.C2Els[2]._y t.registers.word_selector_f[4]._y t.registers.clk_dly.dly[2].__y t.registers.atree[3].and2s[0]._y t.registers.word_to_read_X[0].buf1._y t.registers.ack_dly.dly[2].y t.registers.ff[4].__clk_B t.registers.word_selector_f[2]._y t.registers.val_input.ct.in[4] t.registers._clock_word_temp[2] t.registers.val_input_X.buf4._y t.registers.atree[2].and2s[0]._y t.registers.val_input.ct.tmp[6] t.registers.val_input.ct.in[1] t.registers.output_buf.en_buf_t.buf1._y t.registers.output_buf.vc.ct.C2Els[0]._y t.registers.word_selector_f[6].y t.registers.bitselector_f[1].or2s[1]._y t.registers.val_input.OR2_tf[0]._y t.out.a t.registers.ff[5]._clk_B t.registers.output_buf.vc.OR2_tf[2]._y t.registers.word_to_read[3]._y t.registers.bitselector_f[1].or2s[2]._y t.registers.word_to_read_X[2].buf1._y t.registers.ack_input_X.buf4._y t.registers.ack_dly.mu2[1]._s t.registers.bitselector_f[0].or2s[0]._y t.registers.clk_dly.dly[2].___y t.registers.val_input.ct.C2Els[0]._y t.registers.ack_dly.mu2[1]._y t.registers.ack_dly.dly[0].__y t.registers.word_selector_f[7]._y t.registers.clk_dly.and2[0]._y t.registers.ack_dly.dly[1].__y t.registers.clk_dly.dly[2]._y t.registers.ff[5].__clk_B t.registers.ack_dly.dly[1].___y t.registers.ff[4]._clk_B t.registers.word_selector_f[6]._y t.registers.clk_dly.dly[1].y t.registers.ff[3]._clk_B t.registers.clk_dly.dly[2].y t.registers.word_selector_f[1]._y t.registers.ack_dly.dly[0].___y t.registers.atree[1].and2s[0]._y t.registers.ff[2].__clk_B t.registers.output_buf.in_v_bufN.buf1._y t.registers.clk_switch._y t.registers.ff[7].__clk_B t.registers.clk_dly.dly[0].___y t.registers.and_encoder[2]._y t.registers.clk_dly.dly[1].___y t.registers.clk_dly.mu2[1]._s t.registers.output_buf.in_v_buf4._y t.registers.ack_readwrite._y t.registers.output_buf.en_buf_f.buf1._y t.registers.atree[0].and2s[0]._y t.registers.word_to_read_X[3].buf1._y t.registers.clk_dly.mu2[1]._y t.registers.bitselector_f[1].tmp[5] t.registers.clk_dly.dly[0].a t.registers.ff[0]._clk_B t.registers.bitselector_f[0].or2s[1]._y t.registers.clk_dly.dly[0].y t.registers.address_propagator_t[1]._y t.registers.word_selector_f[0]._y t.registers.val_input.ct.C2Els[1]._y t.registers.output_buf.out_a_B_buf_t.buf1._y t.registers.ack_dly.and2[1]._y t.registers.ff[3].__clk_B t.registers.ack_dly.dly[0].y t.registers.ack_write_and._y t.registers.ff[6].__clk_B t.registers.ack_dly.dly[1].a t.registers.ff[1].__clk_B t.registers.output_buf.vc.OR2_tf[3]._y t.registers.word_to_read[2]._y t.registers.address_propagator_f[1]._y t.registers.word_selector_f[3]._y t.registers.ack_dly.dly[2].__y t.registers.ff[0].__clk_B t.registers.and_encoder[1]._y t.registers.ack_dly.and2[0]._y t.registers.word_to_read_X[1].buf1._y t.registers.val_input.OR2_tf[4]._y t.registers.word_selector_f[5]._y t.registers.output_buf.vc.OR2_tf[1]._y t.registers.word_to_read[0]._y t.registers.val_input.ct.C3Els[0]._y t.registers.output_buf.vc.ct.C2Els[1]._y t.registers.and_encoder[3]._y t.registers.ff[2]._clk_B t.registers.ack_dly.mu2[0]._s [0] start test ---------------------------------------------------------- -t.registers._clock_temp_inv t.registers._clock t.dly_cfg[1] t.registers.clk_dly.and2[1]._y t.registers.clk_dly.dly[1].a t.registers.read_write_demux._out2_a_BX_t[0] t.registers.ff_val[1].y t.registers.read_write_demux._out2_a_BX_f[0] t.registers.clk_X.buf1._y t.registers._clock_temp t.registers.read_write_demux.out2_a_B_buf_f.buf1._y t.registers.clk_dly.dly[1]._y t.registers.ff_val[1]._y t.registers.clk_dly.mu2[0]._s t.registers.clk_dly.dly[1].__y t.registers.clk_dly.mu2[0]._y t.registers.read_write_demux._out2_a_B t.dly_cfg[0] t.registers.clk_dly._a[1] t.registers.clk_dly.dly[2].__y t.registers._in_write.a t.registers.ff_val[0].y t.registers.clk_dly.dly[2].___y t.registers.read_write_demux.out2_a_B_buf_t.buf1._y t.registers.clk_dly.dly[2]._y t.registers.ff_val[0].b t.registers.clk_dly.dly[1].y t.registers.clk_dly.dly[2].y t.registers.ff_val[1].b t.registers.ff_val[0].a t.registers.clk_dly.dly[1].___y t.registers.clk_dly.mu2[1]._s t.registers.ff_val[1].a t.registers.clk_dly.mu2[1]._y t.registers.ff_val[0]._y + 129003 t.in.d.d[0].f : 0 + 129003 Reset : 0 + 129003 t.out.v : 0 + 129003 t.in.d.d[1].f : 0 + 129003 t.registers.atree[0].in[1] : 0 + 129003 t.registers.atree[1].in[0] : 0 + 129003 t.out.a : 0 + 129003 t.dly_cfg[1] : 1 + 129003 t.registers.ff[0].d : 0 + 129003 t.registers.atree[0].in[0] : 0 + 129003 t.dly_cfg[0] : 1 + 129003 t.registers.ack_read_and.a : 0 + 129003 t.registers.ff[1].d : 0 + 129003 t.registers.clk_switch.b : 0 + 129003 t.registers.atree[2].in[1] : 0 + 129004 t.registers.address_propagator_f[0]._y : 1 [by t.registers.atree[0].in[0]:=0] + 129005 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0] + 129005 t.registers.atree[2].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0] + 129006 t.registers.address_propagator_f[0].y : 0 [by t.registers.address_propagator_f[0]._y:=1] + 129008 t.registers._out_encoder[2] : 0 [by t.registers.atree[2].and2s[0]._y:=1] + 129014 t.registers.clk_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1] + 129019 t.registers.word_to_read[3]._y : 1 [by t.registers.ack_read_and.a:=0] + 129037 t.registers.and_encoder[2]._y : 1 [by t.registers._out_encoder[2]:=0] + 129070 t.registers.word_to_read[1]._y : 1 [by t.registers.ack_read_and.a:=0] + 129078 t.registers.output_buf._out_a_B : 1 [by t.out.a:=0] + 129122 t.registers.output_buf.out_a_B_buf_t.buf1._y : 0 [by t.registers.output_buf._out_a_B:=1] + 129141 t.registers.clk_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1] + 129169 t.registers.address_propagator_t[0]._y : 1 [by t.registers.atree[1].in[0]:=0] + 129170 t.registers.address_propagator_t[0].y : 0 [by t.registers.address_propagator_t[0]._y:=1] + 129223 t.registers.word_to_read[1].y : 0 [by t.registers.word_to_read[1]._y:=1] + 129245 t.registers.word_to_read_X[1].buf1._y : 1 [by t.registers.word_to_read[1].y:=0] + 129246 t.registers.word_selector_f[2].a : 0 [by t.registers.word_to_read_X[1].buf1._y:=1] + 129336 t.registers.word_to_read[3].y : 0 [by t.registers.word_to_read[3]._y:=1] + 129348 t.registers.ack_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1] + 129373 t.registers.word_to_read[0]._y : 1 [by t.registers.ack_read_and.a:=0] + 129387 t.registers.output_buf.vc.OR2_tf[2]._y : 1 [by t.registers.address_propagator_t[0].y:=0] + 129495 t.registers.word_to_read_X[3].buf1._y : 1 [by t.registers.word_to_read[3].y:=0] + 129531 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.ff[1].d:=0] + 129551 t.registers.ack_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1] + 129676 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1] + 130252 t.registers.address_propagator_f[1]._y : 1 [by t.registers.atree[0].in[1]:=0] + 130638 t.registers._clock_word_temp[2] : 0 [by t.registers.and_encoder[2]._y:=1] + 130674 t.registers.output_buf.vc.ct.in[2] : 0 [by t.registers.output_buf.vc.OR2_tf[2]._y:=1] + 130827 t.registers.word_selector_f[2]._y : 1 [by t.registers.word_selector_f[2].a:=0] + 130828 t.registers.word_selector_f[2].y : 0 [by t.registers.word_selector_f[2]._y:=1] + 131438 t.registers.ack_write_and._y : 1 [by t.registers.clk_switch.b:=0] + 131644 t.registers.word_to_read[2]._y : 1 [by t.registers.ack_read_and.a:=0] + 131727 t.registers.word_selector_f[6].a : 0 [by t.registers.word_to_read_X[3].buf1._y:=1] + 131741 t.registers.word_selector_f[7]._y : 1 [by t.registers.word_selector_f[6].a:=0] + 131748 t.registers.word_selector_f[7].y : 0 [by t.registers.word_selector_f[7]._y:=1] + 131806 t.registers.word_to_read[2].y : 0 [by t.registers.word_to_read[2]._y:=1] + 131839 t.registers.output_buf.out_a_B_buf_f.buf1._y : 0 [by t.registers.output_buf._out_a_B:=1] + 131902 t._reset_B : 1 [by Reset:=0] + 131903 t.registers.reset_buf_BX._y : 0 [by t._reset_B:=1] + 131903 t.registers.output_buf.reset_buf._y : 0 [by t._reset_B:=1] + 131903 t.registers.reset_buf_BXX._y : 0 [by t._reset_B:=1] + 131904 t.registers._reset_mem_BX : 1 [by t.registers.reset_buf_BXX._y:=0] + 131966 t.registers.word_to_read_X[2].buf1._y : 1 [by t.registers.word_to_read[2].y:=0] + 132090 t.registers.output_buf._reset_BX : 1 [by t.registers.output_buf.reset_buf._y:=0] + 132091 t.registers.output_buf.reset_bufarray.buf1._y : 0 [by t.registers.output_buf._reset_BX:=1] + 132502 t.registers.atree[3].and2s[0]._y : 1 [by t.registers.atree[1].in[0]:=0] + 132507 t.registers._out_encoder[3] : 0 [by t.registers.atree[3].and2s[0]._y:=1] +WARNING: weak-interference `t.registers.output_buf.t_buf_func[3]._y' +>> cause: t.registers.output_buf._reset_BXX[0] (val: 1) +>> time: 132944 +WARNING: weak-interference `t.registers.output_buf.f_buf_func[0]._y' +>> cause: t.registers.output_buf._reset_BXX[0] (val: 1) +>> time: 132944 +WARNING: weak-interference `t.registers.output_buf.f_buf_func[1]._y' +>> cause: t.registers.output_buf._reset_BXX[0] (val: 1) +>> time: 132944 +WARNING: weak-interference `t.registers.output_buf.f_buf_func[3]._y' +>> cause: t.registers.output_buf._reset_BXX[0] (val: 1) +>> time: 132944 + 132944 t.registers.output_buf._reset_BXX[0] : 1 [by t.registers.output_buf.reset_bufarray.buf1._y:=0] +WARNING: weak-interference `t.out.d.d[3].t' +>> cause: t.registers.output_buf.t_buf_func[3]._y (val: X) +>> time: 132945 + 132945 t.registers.output_buf.t_buf_func[3]._y : X [by t.registers.output_buf._reset_BXX[0]:=1] + 132948 t.out.d.d[3].t : X [by t.registers.output_buf.t_buf_func[3]._y:=X] +WARNING: weak-interference `t.out.d.d[0].f' +>> cause: t.registers.output_buf.f_buf_func[0]._y (val: X) +>> time: 132961 + 132961 t.registers.output_buf.f_buf_func[0]._y : X [by t.registers.output_buf._reset_BXX[0]:=1] + 133084 t.registers.address_propagator_f[1].y : 0 [by t.registers.address_propagator_f[1]._y:=1] + 133298 t.registers.output_buf._en : 1 [by t.out.v:=0] + 133299 t.registers.output_buf.en_buf_t.buf1._y : 0 [by t.registers.output_buf._en:=1] + 133341 t.registers.output_buf._en_X_t[0] : 1 [by t.registers.output_buf.en_buf_t.buf1._y:=0] + 133398 t.registers.and_encoder[3]._y : 1 [by t.registers._out_encoder[3]:=0] + 133538 t.registers.atree[1].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0] + 133565 t.registers.address_propagator_t[1]._y : 1 [by t.registers.ack_read_and.a:=0] + 133660 t.registers.address_propagator_t[1].y : 0 [by t.registers.address_propagator_t[1]._y:=1] + 133902 t.out.d.d[0].f : X [by t.registers.output_buf.f_buf_func[0]._y:=X] + 133995 t.registers.output_buf.vc.OR2_tf[3]._y : 1 [by t.registers.address_propagator_t[1].y:=0] + 134003 t.registers.output_buf.vc.ct.in[3] : 0 [by t.registers.output_buf.vc.OR2_tf[3]._y:=1] + 134037 t.registers.output_buf.vc.ct.C2Els[1]._y : 1 [by t.registers.output_buf.vc.ct.in[3]:=0] + 134146 t.registers._reset_BX : 1 [by t.registers.reset_buf_BX._y:=0] + 134266 t.registers.val_input.OR2_tf[0]._y : 1 [by t.registers.ff[0].d:=0] + 135184 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1] + 135188 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[0]:=0] +WARNING: weak-interference `t.out.d.d[1].f' +>> cause: t.registers.output_buf.f_buf_func[1]._y (val: X) +>> time: 135517 + 135517 t.registers.output_buf.f_buf_func[1]._y : X [by t.registers.output_buf._reset_BXX[0]:=1] + 136086 t.registers.reset_bufarray.buf3._y : 0 [by t.registers._reset_mem_BX:=1] + 136215 t.registers._clock_word_temp[3] : 0 [by t.registers.and_encoder[3]._y:=1] + 136992 t.registers.clock_buffer[2].buf1._y : 1 [by t.registers._clock_word_temp[2]:=0] + 137040 t.registers.ff[4].clk_B : 0 [by t.registers.clock_buffer[2].buf1._y:=1] + 137043 t.registers.ff[4]._clk_B : 1 [by t.registers.ff[4].clk_B:=0] + 137218 t.registers.ff[5]._clk_B : 1 [by t.registers.ff[4].clk_B:=0] + 137915 t.out.d.d[1].f : X [by t.registers.output_buf.f_buf_func[1]._y:=X] + 138591 t.registers.word_selector_f[3]._y : 1 [by t.registers.word_selector_f[2].a:=0] + 139096 t.registers.word_selector_f[6]._y : 1 [by t.registers.word_selector_f[6].a:=0] + 139301 t.registers._reset_mem_BXX[0] : 1 [by t.registers.reset_bufarray.buf3._y:=0] +WARNING: weak-interference `t.out.d.d[3].f' +>> cause: t.registers.output_buf.f_buf_func[3]._y (val: X) +>> time: 141305 + 141305 t.registers.output_buf.f_buf_func[3]._y : X [by t.registers.output_buf._reset_BXX[0]:=1] + 142044 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[2].in[1]:=0] + 142132 t.out.d.d[3].f : X [by t.registers.output_buf.f_buf_func[3]._y:=X] + 142217 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1] + 142805 t.registers.output_buf._out_a_BX_f[0] : 1 [by t.registers.output_buf.out_a_B_buf_t.buf1._y:=0] + 144542 t.registers.word_selector_f[3].y : 0 [by t.registers.word_selector_f[3]._y:=1] + 147271 t.registers._out_encoder[1] : 0 [by t.registers.atree[1].and2s[0]._y:=1] + 147455 t.registers.and_encoder[1]._y : 1 [by t.registers._out_encoder[1]:=0] + 147456 t.registers._clock_word_temp[1] : 0 [by t.registers.and_encoder[1]._y:=1] + 147529 t.registers.clock_buffer[1].buf1._y : 1 [by t.registers._clock_word_temp[1]:=0] + 147533 t.registers.ff[2].clk_B : 0 [by t.registers.clock_buffer[1].buf1._y:=1] + 147629 t.registers.ff[3]._clk_B : 1 [by t.registers.ff[2].clk_B:=0] + 147765 t.registers.ff[3].__clk_B : 0 [by t.registers.ff[3]._clk_B:=1] + 147924 t.registers.output_buf.vc.ct.tmp[5] : 0 [by t.registers.output_buf.vc.ct.C2Els[1]._y:=1] + 149049 t.registers.word_to_read[0].y : 0 [by t.registers.word_to_read[0]._y:=1] + 149050 t.registers.word_to_read_X[0].buf1._y : 1 [by t.registers.word_to_read[0].y:=0] + 149117 t.registers.ff[5].__clk_B : 0 [by t.registers.ff[5]._clk_B:=1] + 152928 t.registers.val_input.OR2_tf[4]._y : 1 [by t.registers.clk_switch.b:=0] + 153169 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1] + 153396 t.registers.output_buf._out_a_BX_t[0] : 1 [by t.registers.output_buf.out_a_B_buf_f.buf1._y:=0] + 155883 t.registers.clk_switch._y : 1 [by t.registers.clk_switch.b:=0] + 158020 t.registers.ff[4].__clk_B : 0 [by t.registers.ff[4]._clk_B:=1] + 159842 t.registers._in_v_temp_write : 0 [by t.registers.clk_switch._y:=1] + 159854 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp_write:=0] + 163754 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1] + 164783 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0] + 164784 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1] + 164840 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0] + 166748 t.registers.word_selector_f[4].a : 0 [by t.registers.word_to_read_X[2].buf1._y:=1] + 166749 t.registers.word_selector_f[4]._y : 1 [by t.registers.word_selector_f[4].a:=0] + 166785 t.registers.word_selector_f[5]._y : 1 [by t.registers.word_selector_f[4].a:=0] + 166786 t.registers.word_selector_f[5].y : 0 [by t.registers.word_selector_f[5]._y:=1] + 168096 t.registers.word_selector_f[0].a : 0 [by t.registers.word_to_read_X[0].buf1._y:=1] + 168109 t.registers.word_selector_f[1]._y : 1 [by t.registers.word_selector_f[0].a:=0] + 169788 t.registers.word_selector_f[0]._y : 1 [by t.registers.word_selector_f[0].a:=0] + 170145 t.registers.word_selector_f[0].y : 0 [by t.registers.word_selector_f[0]._y:=1] + 170170 t.registers.bitselector_f[0].or2s[0]._y : 1 [by t.registers.word_selector_f[0].y:=0] + 170191 t.registers.bitselector_f[0].tmp[4] : 0 [by t.registers.bitselector_f[0].or2s[0]._y:=1] + 170350 t.registers.bitselector_f[1].or2s[1]._y : 1 [by t.registers.word_selector_f[5].y:=0] + 170351 t.registers.bitselector_f[1].tmp[5] : 0 [by t.registers.bitselector_f[1].or2s[1]._y:=1] + 170722 t.registers._in_a_write : 0 [by t.registers.ack_write_and._y:=1] + 172920 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0] + 172921 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1] + 172922 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[2]:=0] + 173083 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1] + 178581 t.registers.word_selector_f[6].y : 0 [by t.registers.word_selector_f[6]._y:=1] + 180370 t.registers.ack_readwrite._y : 1 [by t.registers._in_a_write:=0] + 181407 t.registers._in_a_temp : 0 [by t.registers.ack_readwrite._y:=1] + 181412 t.registers.ack_input_X.buf4._y : 1 [by t.registers._in_a_temp:=0] + 181566 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1] + 181974 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[5]:=0] + 181985 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1] + 181993 t.in.a : 0 [by t.registers.ack_input_X.buf4._y:=1] + 183032 t.registers.val_input_X.buf4._y : 1 [by t.registers._in_v_temp:=0] + 183046 t.in.v : 0 [by t.registers.val_input_X.buf4._y:=1] + 183334 t.registers.clock_buffer[3].buf1._y : 1 [by t.registers._clock_word_temp[3]:=0] + 183352 t.registers.ff[6].clk_B : 0 [by t.registers.clock_buffer[3].buf1._y:=1] + 183356 t.registers.ff[6]._clk_B : 1 [by t.registers.ff[6].clk_B:=0] + 183456 t.registers.ff[7]._clk_B : 1 [by t.registers.ff[6].clk_B:=0] + 184660 t.registers.ff[7].__clk_B : 0 [by t.registers.ff[7]._clk_B:=1] + 184821 t.registers.ff[2]._clk_B : 1 [by t.registers.ff[2].clk_B:=0] + 185093 t.registers.word_selector_f[1].y : 0 [by t.registers.word_selector_f[1]._y:=1] + 185321 t.registers.bitselector_f[1].or2s[0]._y : 1 [by t.registers.word_selector_f[1].y:=0] + 186164 t.registers.bitselector_f[1].tmp[4] : 0 [by t.registers.bitselector_f[1].or2s[0]._y:=1] + 187623 t.registers.bitselector_f[1].or2s[2]._y : 1 [by t.registers.bitselector_f[1].tmp[4]:=0] + 187693 t.registers.bitselector_f[1].out : 0 [by t.registers.bitselector_f[1].or2s[2]._y:=1] + 189963 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1] + 189974 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0] + 189977 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1] + 190031 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0] + 190124 t.registers.word_selector_f[4].y : 0 [by t.registers.word_selector_f[4]._y:=1] + 191179 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1] + 191260 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] + 191285 t.registers.bitselector_f[0].or2s[1]._y : 1 [by t.registers.word_selector_f[4].y:=0] + 192260 t.registers.output_buf.en_buf_f.buf1._y : 0 [by t.registers.output_buf._en:=1] + 192352 t.registers.output_buf._en_X_f[0] : 1 [by t.registers.output_buf.en_buf_f.buf1._y:=0] + 193276 t.registers.ff[2].__clk_B : 0 [by t.registers.ff[2]._clk_B:=1] + 199831 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] + 202337 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1] + 208142 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1] + 209268 t.registers.bitselector_f[0].tmp[5] : 0 [by t.registers.bitselector_f[0].or2s[1]._y:=1] + 209846 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1] + 210459 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.dly[0].y:=0] + 211012 t.registers.bitselector_f[0].or2s[2]._y : 1 [by t.registers.bitselector_f[0].tmp[5]:=0] + 211057 t.registers.bitselector_f[0].out : 0 [by t.registers.bitselector_f[0].or2s[2]._y:=1] + 212054 t.registers.output_buf.vc.OR2_tf[0]._y : 1 [by t.registers.bitselector_f[0].out:=0] + 213703 t.registers.output_buf.vc.ct.in[0] : 0 [by t.registers.output_buf.vc.OR2_tf[0]._y:=1] + 214800 t.registers.ff[6].__clk_B : 0 [by t.registers.ff[6]._clk_B:=1] + 224481 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1] + 225006 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0] + 225906 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1] + 225958 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0] + 225965 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1] + 238115 t.registers.output_buf.vc.OR2_tf[1]._y : 1 [by t.registers.bitselector_f[1].out:=0] + 241577 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0] + 241579 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1] + 241933 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0] + 242066 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1] + 242067 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0] + 242071 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1] + 242617 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0] + 244582 t.registers.output_buf.vc.ct.in[1] : 0 [by t.registers.output_buf.vc.OR2_tf[1]._y:=1] + 244583 t.registers.output_buf.vc.ct.C2Els[0]._y : 1 [by t.registers.output_buf.vc.ct.in[1]:=0] + 256961 t.registers.output_buf.vc.ct.tmp[4] : 0 [by t.registers.output_buf.vc.ct.C2Els[0]._y:=1] + 257040 t.registers.output_buf.vc.ct.C2Els[2]._y : 1 [by t.registers.output_buf.vc.ct.tmp[4]:=0] + 259473 t.registers.output_buf._in_v : 0 [by t.registers.output_buf.vc.ct.C2Els[2]._y:=1] + 259561 t.registers.output_buf.in_v_buf4._y : 1 [by t.registers.output_buf._in_v:=0] + 267343 t.registers.output_buf.in.v : 0 [by t.registers.output_buf.in_v_buf4._y:=1] + 288180 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1] + 288210 t.registers._clock_temp_inv : 1 [by t.registers._clock_temp:=0] + 288239 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock_temp:=0] + 289677 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp_inv:=1] + 295670 t.registers.output_buf.in_v_bufN.buf1._y : 1 [by t.registers.output_buf.in.v:=0] + 296355 t.registers.output_buf._in_vX[0] : 0 [by t.registers.output_buf.in_v_bufN.buf1._y:=1] + 309061 t.registers._clock[0] : 1 [by t.registers.clk_X.buf1._y:=0] + 347743 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1] + 364458 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0] + 364585 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1] + 364754 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0] + 364797 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1] + 364809 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0] + 366088 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1] + 366321 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0] + 366324 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1] + 366362 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0] + 366363 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1] + 379115 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0] + 379207 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1] + 381934 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0] + 381936 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1] + 381937 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0] + 383438 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1] + 383440 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0] + 383458 t.registers._in_a_write_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1] +t.out.d.d[3].t t.out.d.d[0].f t.out.d.d[3].f t.out.d.d[1].f t.registers.output_buf.f_buf_func[0]._y t.registers.output_buf.t_buf_func[3]._y t.registers.output_buf.f_buf_func[3]._y t.registers.output_buf.f_buf_func[1]._y +WRONG ASSERT: "t.out.d.d[0].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[1].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[3].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[3].t" has value X and not 0. [1] reset completed ---------------------------------------------------------- [2] delay line set ---------------------------------------------------------- -WARNING: weak-interference `t.registers._in_write_temp.d[0].t' ->> cause: t.registers.read_write_demux.out2_t_buf_func[0]._y (val: X) ->> time: 555402 -WARNING: weak-interference `t.registers._in_write_temp.d[1].t' ->> cause: t.registers.read_write_demux.out2_t_buf_func[1]._y (val: X) ->> time: 555410 -WARNING: weak-interference `t.registers._in_write_temp.d[2].f' ->> cause: t.registers.read_write_demux.out2_f_buf_func[2]._y (val: X) ->> time: 555426 -WARNING: weak-interference `t.registers.val_input_write.OR2_tf[1]._y' ->> cause: t.registers._in_write_temp.d[1].t (val: X) ->> time: 555555 -WARNING: weak-interference `t.registers.val_input_write.ct.in[1]' ->> cause: t.registers.val_input_write.OR2_tf[1]._y (val: X) ->> time: 555785 -WARNING: weak-interference `t.registers.val_input_write.OR2_tf[0]._y' ->> cause: t.registers._in_write_temp.d[0].t (val: X) ->> time: 558923 -WARNING: weak-interference `t.registers.val_input_write.ct.in[0]' ->> cause: t.registers.val_input_write.OR2_tf[0]._y (val: X) ->> time: 558937 -WARNING: weak-interference `t.registers.val_input_write.ct.C2Els[0]._y' ->> cause: t.registers.val_input_write.ct.in[0] (val: X) ->> time: 560480 -WARNING: weak-interference `t.registers.val_input_write.ct.tmp[4]' ->> cause: t.registers.val_input_write.ct.C2Els[0]._y (val: X) ->> time: 562091 -WARNING: weak-interference `t.registers._in_write_temp.d[3].f' ->> cause: t.registers.read_write_demux.out2_f_buf_func[3]._y (val: X) ->> time: 565654 -WARNING: weak-interference `t.registers.val_input_write.OR2_tf[3]._y' ->> cause: t.registers._in_write_temp.d[3].f (val: X) ->> time: 565665 -WARNING: weak-interference `t.registers.val_input_write.ct.in[3]' ->> cause: t.registers.val_input_write.OR2_tf[3]._y (val: X) ->> time: 565666 -WARNING: weak-interference `t.registers.val_input_write.OR2_tf[2]._y' ->> cause: t.registers._in_write_temp.d[2].f (val: X) ->> time: 571594 -WARNING: weak-interference `t.registers.val_input_write.ct.in[2]' ->> cause: t.registers.val_input_write.OR2_tf[2]._y (val: X) ->> time: 578095 -WARNING: weak-interference `t.registers.val_input_write.ct.C2Els[1]._y' ->> cause: t.registers.val_input_write.ct.in[2] (val: X) ->> time: 578734 -WARNING: weak-interference `t.registers.val_input_write.ct.tmp[5]' ->> cause: t.registers.val_input_write.ct.C2Els[1]._y (val: X) ->> time: 580527 -WARNING: weak-interference `t.registers.val_input_write.ct.C2Els[2]._y' ->> cause: t.registers.val_input_write.ct.tmp[5] (val: X) ->> time: 580659 -WARNING: weak-interference `t.registers.clk_dly.in' ->> cause: t.registers.val_input_write.ct.C2Els[2]._y (val: X) ->> time: 580660 -WARNING: weak-interference `t.registers.clk_dly.and2[0]._y' ->> cause: t.registers.clk_dly.in (val: X) ->> time: 580677 -WARNING: weak-interference `t.registers.read_write_demux.out_or._y' ->> cause: t.registers.clk_dly.in (val: X) ->> time: 580677 -WARNING: weak-interference `t.registers.clk_dly.dly[0].a' ->> cause: t.registers.clk_dly.and2[0]._y (val: X) ->> time: 580829 -WARNING: weak-interference `t.registers.clk_dly.dly[0]._y' ->> cause: t.registers.clk_dly.dly[0].a (val: X) ->> time: 580832 -WARNING: weak-interference `t.registers.clk_dly.dly[0].__y' ->> cause: t.registers.clk_dly.dly[0]._y (val: X) ->> time: 581256 -WARNING: weak-interference `t.registers.clk_dly.dly[0].___y' ->> cause: t.registers.clk_dly.dly[0].__y (val: X) ->> time: 581262 -WARNING: weak-interference `t.registers.read_write_demux._out_v' ->> cause: t.registers.read_write_demux.out_or._y (val: X) ->> time: 583660 -WARNING: weak-interference `t.registers.clk_dly.dly[0].y' ->> cause: t.registers.clk_dly.dly[0].___y (val: X) ->> time: 583850 -WARNING: weak-interference `t.registers.clk_dly.mu2[0]._y' ->> cause: t.registers.clk_dly.dly[0].y (val: X) ->> time: 584680 -WARNING: weak-interference `t.registers.ack_and.a' ->> cause: t.registers.read_write_demux.inack_ctl._y (val: X) ->> time: 586123 -WARNING: weak-interference `t.registers.read_write_demux._en' ->> cause: t.registers.ack_and.a (val: X) ->> time: 586317 -WARNING: weak-interference `t.registers.read_write_demux.out2_en_buf_f.buf1._y' ->> cause: t.registers.read_write_demux._en (val: X) ->> time: 586920 -WARNING: weak-interference `t.registers.read_write_demux.out1_en_buf_t.buf1._y' ->> cause: t.registers.read_write_demux._en (val: X) ->> time: 586920 -WARNING: weak-interference `t.registers.read_write_demux.out2_en_buf_t.buf1._y' ->> cause: t.registers.read_write_demux._en (val: X) ->> time: 586920 -WARNING: weak-interference `t.registers.read_write_demux.out1_en_buf_f.buf1._y' ->> cause: t.registers.read_write_demux._en (val: X) ->> time: 586920 -WARNING: weak-interference `t.registers.read_write_demux._en1_X_t[0]' ->> cause: t.registers.read_write_demux.out1_en_buf_t.buf1._y (val: X) ->> time: 586937 -WARNING: weak-interference `t.registers.read_write_demux._en2_X_t[0]' ->> cause: t.registers.read_write_demux.out2_en_buf_t.buf1._y (val: X) ->> time: 586937 -WARNING: weak-interference `t.registers.read_write_demux._en2_X_f[0]' ->> cause: t.registers.read_write_demux.out2_en_buf_f.buf1._y (val: X) ->> time: 587058 -WARNING: weak-interference `t.registers.read_write_demux._en1_X_f[0]' ->> cause: t.registers.read_write_demux.out1_en_buf_f.buf1._y (val: X) ->> time: 587346 -WARNING: weak-interference `t.registers.clk_dly._a[1]' ->> cause: t.registers.clk_dly.mu2[0]._y (val: X) ->> time: 607612 -WARNING: weak-interference `t.registers.clk_dly.and2[1]._y' ->> cause: t.registers.clk_dly._a[1] (val: X) ->> time: 607619 -WARNING: weak-interference `t.registers.clk_dly.dly[1].a' ->> cause: t.registers.clk_dly.and2[1]._y (val: X) ->> time: 608033 -WARNING: weak-interference `t.registers.clk_dly.dly[1]._y' ->> cause: t.registers.clk_dly.dly[1].a (val: X) ->> time: 608037 -WARNING: weak-interference `t.registers.clk_dly.dly[1].__y' ->> cause: t.registers.clk_dly.dly[1]._y (val: X) ->> time: 609816 -WARNING: weak-interference `t.registers.clk_dly.dly[1].___y' ->> cause: t.registers.clk_dly.dly[1].__y (val: X) ->> time: 632690 -WARNING: weak-interference `t.registers.clk_dly.dly[1].y' ->> cause: t.registers.clk_dly.dly[1].___y (val: X) ->> time: 641335 -WARNING: weak-interference `t.registers.clk_dly.dly[2]._y' ->> cause: t.registers.clk_dly.dly[1].y (val: X) ->> time: 642268 -WARNING: weak-interference `t.registers.clk_dly.dly[2].__y' ->> cause: t.registers.clk_dly.dly[2]._y (val: X) ->> time: 643124 -WARNING: weak-interference `t.registers.clk_dly.dly[2].___y' ->> cause: t.registers.clk_dly.dly[2].__y (val: X) ->> time: 643263 -WARNING: weak-interference `t.registers.clk_dly.dly[2].y' ->> cause: t.registers.clk_dly.dly[2].___y (val: X) ->> time: 669472 -WARNING: weak-interference `t.registers.clk_dly.mu2[1]._y' ->> cause: t.registers.clk_dly.dly[2].y (val: X) ->> time: 669474 -WARNING: weak-interference `t.registers._clock_temp' ->> cause: t.registers.clk_dly.mu2[1]._y (val: X) ->> time: 722923 -WARNING: weak-interference `t.registers._clock_temp_inv' ->> cause: t.registers._clock_temp (val: X) ->> time: 722929 -WARNING: weak-interference `t.registers.clk_X.buf1._y' ->> cause: t.registers._clock_temp_inv (val: X) ->> time: 723183 -WARNING: weak-interference `t.registers._clock' ->> cause: t.registers.clk_X.buf1._y (val: X) ->> time: 723191 -WARNING: weak-interference `t.registers.and_encoder[0]._y' ->> cause: t.registers._clock (val: X) ->> time: 723192 -WARNING: weak-interference `t.registers._clock_word_temp[0]' ->> cause: t.registers.and_encoder[0]._y (val: X) ->> time: 723198 -WARNING: weak-interference `t.registers.clock_buffer[0].buf1._y' ->> cause: t.registers._clock_word_temp[0] (val: X) ->> time: 774234 -WARNING: weak-interference `t.registers.ff_f[0].clk_B' ->> cause: t.registers.clock_buffer[0].buf1._y (val: X) ->> time: 777324 -WARNING: weak-interference `t.registers.ff_f[0]._clk_B' ->> cause: t.registers.ff_f[0].clk_B (val: X) ->> time: 777550 -WARNING: weak-interference `t.registers.ff_f[1]._clk_B' ->> cause: t.registers.ff_f[0].clk_B (val: X) ->> time: 777550 -WARNING: weak-interference `t.registers.ff_t[0]._clk_B' ->> cause: t.registers.ff_f[0].clk_B (val: X) ->> time: 777550 -WARNING: weak-interference `t.registers.ff_t[1]._clk_B' ->> cause: t.registers.ff_f[0].clk_B (val: X) ->> time: 777550 -WARNING: weak-interference `t.registers.ff_f[1].__clk_B' ->> cause: t.registers.ff_f[1]._clk_B (val: X) ->> time: 777551 -WARNING: weak-interference `t.registers.ff_t[1].__clk_B' ->> cause: t.registers.ff_t[1]._clk_B (val: X) ->> time: 777552 -WARNING: weak-interference `t.registers.ff_t[1]._sqib' ->> cause: t.registers.ff_t[1]._clk_B (val: X) ->> time: 777552 -WARNING: weak-interference `t.registers.ff_t[0].__clk_B' ->> cause: t.registers.ff_t[0]._clk_B (val: X) ->> time: 777556 -WARNING: weak-interference `t.registers.ff_t[0]._sqib' ->> cause: t.registers.ff_t[0]._clk_B (val: X) ->> time: 777556 -WARNING: weak-interference `t.registers.ff_t[0]._sqi' ->> cause: t.registers.ff_t[0]._sqib (val: X) ->> time: 777649 -WARNING: weak-interference `t.data[0].d[0]' ->> cause: t.registers.ff_t[0]._sqib (val: X) ->> time: 777649 -WARNING: weak-interference `t.registers.ff_f[0].__clk_B' ->> cause: t.registers.ff_f[0]._clk_B (val: X) ->> time: 778369 -WARNING: weak-interference `t.registers.ff_t[1]._sqi' ->> cause: t.registers.ff_t[1]._sqib (val: X) ->> time: 798353 -WARNING: weak-interference `t.data[0].d[1]' ->> cause: t.registers.ff_t[1]._sqib (val: X) ->> time: 798353 -WRONG ASSERT: "t.registers._in_write.d.d[0].t" has value X and not 1. -WRONG ASSERT: "t.registers._in_write.d.d[1].t" has value X and not 1. -WRONG ASSERT: "t.registers._in_write.d.d[2].f" has value X and not 1. -WRONG ASSERT: "t.registers._in_write.d.d[3].f" has value X and not 1. -WRONG ASSERT: "t.registers._clock" has value X and not 0. -WARNING: weak-interference `t.registers.ff_t[0]._mqib' ->> cause: t.registers.ff_t[0].d (val: 0) ->> time: 800976 -WARNING: weak-interference `t.registers.ff_t[1]._mqib' ->> cause: t.registers.ff_t[1].d (val: 0) ->> time: 800976 -WARNING: weak-interference `t.registers.ff_t[0]._mqi' ->> cause: t.registers.ff_t[0]._mqib (val: X) ->> time: 800977 -WARNING: weak-interference `t.registers.ff_t[1]._mqi' ->> cause: t.registers.ff_t[1]._mqib (val: X) ->> time: 800982 -WRONG ASSERT: "t.registers._clock" has value X and not 1. -WRONG ASSERT: "t.registers.ff_t[0].q" has value X and not 1. -WRONG ASSERT: "t.registers.ff_t[1].q" has value X and not 1. + 383458 t.registers.ff[0].d : 1 + 383458 t.registers.clk_switch.b : 1 + 383458 t.registers.atree[0].in[0] : 1 + 383458 t.registers.ff[1].d : 1 + 383458 t.registers.atree[0].in[1] : 1 + 383463 t.registers.val_input.OR2_tf[3]._y : 0 [by t.registers.atree[0].in[1]:=1] + 383466 t.registers.val_input.OR2_tf[2]._y : 0 [by t.registers.atree[0].in[0]:=1] + 383467 t.registers.val_input.ct.in[2] : 1 [by t.registers.val_input.OR2_tf[2]._y:=0] + 383512 t.registers.val_input.OR2_tf[1]._y : 0 [by t.registers.ff[1].d:=1] + 383577 t.registers.val_input.OR2_tf[0]._y : 0 [by t.registers.ff[0].d:=1] + 383578 t.registers.val_input.ct.in[0] : 1 [by t.registers.val_input.OR2_tf[0]._y:=0] + 383650 t.registers.val_input.ct.in[1] : 1 [by t.registers.val_input.OR2_tf[1]._y:=0] + 383714 t.registers.val_input.ct.C2Els[0]._y : 0 [by t.registers.val_input.ct.in[1]:=1] + 383837 t.registers.val_input.ct.tmp[5] : 1 [by t.registers.val_input.ct.C2Els[0]._y:=0] + 384530 t.registers.val_input.ct.in[3] : 1 [by t.registers.val_input.OR2_tf[3]._y:=0] + 389178 t.registers.val_input.OR2_tf[4]._y : 0 [by t.registers.clk_switch.b:=1] + 389180 t.registers.val_input.ct.in[4] : 1 [by t.registers.val_input.OR2_tf[4]._y:=0] + 389217 t.registers.val_input.ct.C3Els[0]._y : 0 [by t.registers.val_input.ct.in[4]:=1] + 389360 t.registers.val_input.ct.tmp[6] : 1 [by t.registers.val_input.ct.C3Els[0]._y:=0] + 389411 t.registers.val_input.ct.C2Els[1]._y : 0 [by t.registers.val_input.ct.tmp[6]:=1] + 389853 t.registers._in_v_temp : 1 [by t.registers.val_input.ct.C2Els[1]._y:=0] + 389854 t.registers.val_input_X.buf4._y : 0 [by t.registers._in_v_temp:=1] + 389863 t.in.v : 1 [by t.registers.val_input_X.buf4._y:=0] + 389864 t.registers.clk_switch._y : 0 [by t.registers._in_v_temp:=1] + 389889 t.registers._in_v_temp_write : 1 [by t.registers.clk_switch._y:=0] + 400142 t.registers.clk_dly.and2[0]._y : 0 [by t.registers._in_v_temp_write:=1] + 403663 t.registers.clk_dly.dly[0].a : 1 [by t.registers.clk_dly.and2[0]._y:=0] + 403808 t.registers.clk_dly.dly[0]._y : 0 [by t.registers.clk_dly.dly[0].a:=1] + 419976 t.registers.clk_dly.dly[0].__y : 1 [by t.registers.clk_dly.dly[0]._y:=0] + 420206 t.registers.clk_dly.dly[0].___y : 0 [by t.registers.clk_dly.dly[0].__y:=1] + 420897 t.registers.clk_dly.dly[0].y : 1 [by t.registers.clk_dly.dly[0].___y:=0] + 420911 t.registers.clk_dly.mu2[0]._y : 0 [by t.registers.clk_dly.dly[0].y:=1] + 422454 t.registers.clk_dly._a[1] : 1 [by t.registers.clk_dly.mu2[0]._y:=0] + 424065 t.registers.clk_dly.and2[1]._y : 0 [by t.registers.clk_dly._a[1]:=1] + 433996 t.registers.atree[0].and2s[0]._y : 0 [by t.registers.atree[0].in[1]:=1] + 434007 t.registers._out_encoder[0] : 1 [by t.registers.atree[0].and2s[0]._y:=0] + 434008 t.registers.and_encoder[0]._y : 0 [by t.registers._out_encoder[0]:=1] + 434009 t.registers._clock_word_temp[0] : 1 [by t.registers.and_encoder[0]._y:=0] + 440510 t.registers.clock_buffer[0].buf1._y : 0 [by t.registers._clock_word_temp[0]:=1] + 441149 t.registers.ff[0].clk_B : 1 [by t.registers.clock_buffer[0].buf1._y:=0] + 441281 t.registers.ff[1]._clk_B : 0 [by t.registers.ff[0].clk_B:=1] + 441282 t.registers.ff[1].__clk_B : 1 [by t.registers.ff[1]._clk_B:=0] + 441299 t.registers.ff[1]._mqib : 0 [by t.registers.ff[1].__clk_B:=1] + 441451 t.registers.ff[1]._mqi : 1 [by t.registers.ff[1]._mqib:=0] + 441577 t.registers.clk_dly.dly[1].a : 1 [by t.registers.clk_dly.and2[1]._y:=0] + 442942 t.registers.ff[0]._clk_B : 0 [by t.registers.ff[0].clk_B:=1] + 442945 t.registers.ff[0].__clk_B : 1 [by t.registers.ff[0]._clk_B:=0] + 443369 t.registers.ff[0]._mqib : 0 [by t.registers.ff[0].__clk_B:=1] + 443375 t.registers.ff[0]._mqi : 1 [by t.registers.ff[0]._mqib:=0] + 444560 t.registers.clk_dly.dly[1]._y : 0 [by t.registers.clk_dly.dly[1].a:=1] + 447148 t.registers.clk_dly.dly[1].__y : 1 [by t.registers.clk_dly.dly[1]._y:=0] + 449609 t.registers.clk_dly.dly[1].___y : 0 [by t.registers.clk_dly.dly[1].__y:=1] + 450439 t.registers.clk_dly.dly[1].y : 1 [by t.registers.clk_dly.dly[1].___y:=0] + 473371 t.registers.clk_dly.dly[2]._y : 0 [by t.registers.clk_dly.dly[1].y:=1] + 473373 t.registers.clk_dly.dly[2].__y : 1 [by t.registers.clk_dly.dly[2]._y:=0] + 473567 t.registers.clk_dly.dly[2].___y : 0 [by t.registers.clk_dly.dly[2].__y:=1] + 474170 t.registers.clk_dly.dly[2].y : 1 [by t.registers.clk_dly.dly[2].___y:=0] + 474308 t.registers.clk_dly.mu2[1]._y : 0 [by t.registers.clk_dly.dly[2].y:=1] + 474325 t.registers._clock_temp : 1 [by t.registers.clk_dly.mu2[1]._y:=0] + 474342 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock_temp:=1] + 474343 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0] + 474344 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1] + 474751 t.registers._clock_temp_inv : 0 [by t.registers._clock_temp:=1] + 474752 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp_inv:=0] + 474771 t.registers._clock[0] : 0 [by t.registers.clk_X.buf1._y:=1] + 474939 t.registers.and_encoder[0]._y : 1 [by t.registers._clock[0]:=0] + 475370 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0] + 475478 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1] + 475531 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1] + 475651 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0] + 478078 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0] + 478079 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1] + 478080 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0] + 478470 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1] + 478677 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0] + 479510 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1] + 479538 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0] + 479545 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1] + 479959 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0] + 479963 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1] + 481742 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0] + 490712 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1] + 490878 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] + 491811 t.registers.ff[0]._sqib : 0 [by t.registers.ff[0]._clk_B:=1] + 491950 t.data[0].d[0] : 1 [by t.registers.ff[0]._sqib:=0] + 492667 t.registers.ff[0]._sqi : 1 [by t.registers.ff[0]._sqib:=0] + 499523 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1] + 504616 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1] + 504811 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0] + 504813 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1] + 518159 t.registers.ff[0].q_B : 0 [by t.data[0].d[0]:=1] + 530582 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] + 530588 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1] + 530836 t.registers.ff[1]._sqib : 0 [by t.registers.ff[1]._clk_B:=1] + 530837 t.data[0].d[1] : 1 [by t.registers.ff[1]._sqib:=0] + 530843 t.registers.ff[1].q_B : 0 [by t.data[0].d[1]:=1] + 530844 t.registers.ff[1]._sqi : 1 [by t.registers.ff[1]._sqib:=0] + 558262 t.registers._in_a_write_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0] + 609298 t.registers.ack_write_and._y : 0 [by t.registers._in_a_write_temp:=1] + 612388 t.registers._in_a_write : 1 [by t.registers.ack_write_and._y:=0] + 612614 t.registers.ack_readwrite._y : 0 [by t.registers._in_a_write:=1] + 613433 t.registers._in_a_temp : 1 [by t.registers.ack_readwrite._y:=0] + 613434 t.registers.ack_input_X.buf4._y : 0 [by t.registers._in_a_temp:=1] + 613440 t.in.a : 1 [by t.registers.ack_input_X.buf4._y:=0] +WRONG ASSERT: "t.out.d.d[0].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[1].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[3].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[3].t" has value X and not 0. + 613440 t.registers.ff[0].d : 0 + 613440 t.registers.clk_switch.b : 0 + 613440 t.registers.atree[0].in[0] : 0 + 613440 t.registers.ff[1].d : 0 + 613440 t.registers.atree[0].in[1] : 0 + 613442 t.registers.val_input.OR2_tf[0]._y : 1 [by t.registers.ff[0].d:=0] + 613455 t.registers.clk_switch._y : 1 [by t.registers.clk_switch.b:=0] + 613533 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0] + 613547 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0] + 613548 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1] + 614200 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1] + 614249 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1] + 615092 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.ff[1].d:=0] + 616078 t.registers._in_v_temp_write : 0 [by t.registers.clk_switch._y:=1] + 616079 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp_write:=0] + 616832 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1] + 617002 t.registers.ack_write_and._y : 1 [by t.registers.clk_switch.b:=0] + 617003 t.registers._in_a_write : 0 [by t.registers.ack_write_and._y:=1] + 617009 t.registers.ack_readwrite._y : 1 [by t.registers._in_a_write:=0] + 617010 t.registers._in_a_temp : 0 [by t.registers.ack_readwrite._y:=1] + 617379 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0] + 628231 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1] + 628253 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0] + 634241 t.registers.val_input.OR2_tf[4]._y : 1 [by t.registers.clk_switch.b:=0] + 634248 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1] + 638978 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1] + 639043 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[3]:=0] + 639056 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1] + 645031 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[1]:=0] + 646155 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1] + 646259 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[5]:=0] + 646300 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1] + 646301 t.registers.val_input_X.buf4._y : 1 [by t.registers._in_v_temp:=0] + 646302 t.in.v : 0 [by t.registers.val_input_X.buf4._y:=1] + 650761 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1] + 656499 t.registers.ack_input_X.buf4._y : 1 [by t.registers._in_a_temp:=0] + 669671 t.in.a : 0 [by t.registers.ack_input_X.buf4._y:=1] + 715139 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0] + 715140 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1] + 734965 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.dly[0].y:=0] + 738101 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1] + 738927 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0] + 740760 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1] + 757308 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0] + 757366 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1] + 759809 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0] + 776582 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1] + 813781 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0] + 813795 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1] + 814151 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0] + 849989 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1] + 850094 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0] + 850203 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1] + 850204 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock_temp:=0] + 850212 t.registers._clock_temp_inv : 1 [by t.registers._clock_temp:=0] + 850213 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp_inv:=1] + 886607 t.registers._clock[0] : 1 [by t.registers.clk_X.buf1._y:=0] + 888157 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1] + 888158 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0] + 891247 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1] + 939973 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0] + 940723 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1] + 947478 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0] + 947529 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1] + 947539 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0] + 947859 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1] + 955441 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0] + 955442 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1] + 955443 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0] + 957173 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1] + 958860 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0] + 958875 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1] + 983149 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0] + 983603 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1] + 983919 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0] + 983920 t.registers._in_a_write_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1] [3] first writing done +---------------------------------------------------------- + 983920 t.in.d.d[0].f : 1 + 983920 t.registers.ack_read_and.a : 1 + 983920 t.registers.atree[0].in[0] : 1 + 983920 t.in.d.d[1].f : 1 + 983920 t.registers.atree[0].in[1] : 1 + 983932 t.registers.val_input.OR2_tf[3]._y : 0 [by t.registers.atree[0].in[1]:=1] + 983940 t.registers.val_input.OR2_tf[2]._y : 0 [by t.registers.atree[0].in[0]:=1] + 984007 t.registers.val_input.OR2_tf[1]._y : 0 [by t.in.d.d[1].f:=1] + 984065 t.registers.address_propagator_f[1]._y : 0 [by t.registers.atree[0].in[1]:=1] + 984226 t.registers.val_input.ct.in[1] : 1 [by t.registers.val_input.OR2_tf[1]._y:=0] + 984303 t.registers.val_input.OR2_tf[0]._y : 0 [by t.in.d.d[0].f:=1] + 984833 t.registers.val_input.ct.in[3] : 1 [by t.registers.val_input.OR2_tf[3]._y:=0] + 985243 t.registers.address_propagator_f[0]._y : 0 [by t.registers.atree[0].in[0]:=1] + 985261 t.registers.address_propagator_f[0].y : 1 [by t.registers.address_propagator_f[0]._y:=0] + 985289 t.registers.val_input.ct.in[2] : 1 [by t.registers.val_input.OR2_tf[2]._y:=0] + 987455 t.registers.output_buf.vc.OR2_tf[2]._y : 0 [by t.registers.address_propagator_f[0].y:=1] + 990642 t.registers.atree[0].and2s[0]._y : 0 [by t.registers.atree[0].in[1]:=1] + 990762 t.registers._out_encoder[0] : 1 [by t.registers.atree[0].and2s[0]._y:=0] + 991383 t.registers.val_input.OR2_tf[4]._y : 0 [by t.registers.ack_read_and.a:=1] + 991975 t.registers.val_input.ct.in[4] : 1 [by t.registers.val_input.OR2_tf[4]._y:=0] + 991982 t.registers.val_input.ct.C3Els[0]._y : 0 [by t.registers.val_input.ct.in[4]:=1] + 991983 t.registers.val_input.ct.tmp[6] : 1 [by t.registers.val_input.ct.C3Els[0]._y:=0] + 992396 t.registers.address_propagator_f[1].y : 1 [by t.registers.address_propagator_f[1]._y:=0] + 992520 t.registers.output_buf.vc.OR2_tf[3]._y : 0 [by t.registers.address_propagator_f[1].y:=1] + 992826 t.registers.word_to_read[0]._y : 0 [by t.registers._out_encoder[0]:=1] + 993878 t.registers.word_to_read[0].y : 1 [by t.registers.word_to_read[0]._y:=0] + 994238 t.registers.word_to_read_X[0].buf1._y : 0 [by t.registers.word_to_read[0].y:=1] + 997077 t.registers.and_encoder[0]._y : 0 [by t.registers._out_encoder[0]:=1] + 998174 t.registers._clock_word_temp[0] : 1 [by t.registers.and_encoder[0]._y:=0] + 998450 t.registers.output_buf.vc.ct.in[3] : 1 [by t.registers.output_buf.vc.OR2_tf[3]._y:=0] + 1004432 t.registers.word_selector_f[0].a : 1 [by t.registers.word_to_read_X[0].buf1._y:=0] + 1004436 t.registers.word_selector_t[1]._y : 0 [by t.registers.word_selector_f[0].a:=1] + 1015884 t.registers.val_input.ct.in[0] : 1 [by t.registers.val_input.OR2_tf[0]._y:=0] + 1016096 t.registers.word_selector_t[0]._y : 0 [by t.registers.word_selector_f[0].a:=1] + 1018066 t.registers.clock_buffer[0].buf1._y : 0 [by t.registers._clock_word_temp[0]:=1] + 1018322 t.registers.ff[0].clk_B : 1 [by t.registers.clock_buffer[0].buf1._y:=0] + 1018359 t.registers.ff[1]._clk_B : 0 [by t.registers.ff[0].clk_B:=1] + 1018368 t.registers.ff[1]._mqib : 1 [by t.registers.ff[1]._clk_B:=0] + 1018371 t.registers.ff[1].__clk_B : 1 [by t.registers.ff[1]._clk_B:=0] + 1018795 t.registers.ff[1]._mqi : 0 [by t.registers.ff[1]._mqib:=1] + 1019477 t.registers.word_selector_t[0].y : 1 [by t.registers.word_selector_t[0]._y:=0] + 1019719 t.registers.bitselector_t[0].or2s[0]._y : 0 [by t.registers.word_selector_t[0].y:=1] + 1020554 t.registers.bitselector_t[0].tmp[4] : 1 [by t.registers.bitselector_t[0].or2s[0]._y:=0] + 1025427 t.registers.output_buf.vc.ct.in[2] : 1 [by t.registers.output_buf.vc.OR2_tf[2]._y:=0] + 1026987 t.registers.output_buf.vc.ct.C2Els[1]._y : 0 [by t.registers.output_buf.vc.ct.in[2]:=1] + 1033252 t.registers.ff[0]._clk_B : 0 [by t.registers.ff[0].clk_B:=1] + 1033512 t.registers.ff[0].__clk_B : 1 [by t.registers.ff[0]._clk_B:=0] + 1033545 t.registers.val_input.ct.C2Els[0]._y : 0 [by t.registers.val_input.ct.in[0]:=1] + 1033546 t.registers.val_input.ct.tmp[5] : 1 [by t.registers.val_input.ct.C2Els[0]._y:=0] + 1042240 t.registers.ff[0]._mqib : 1 [by t.registers.ff[0]._clk_B:=0] + 1042355 t.registers.word_selector_t[1].y : 1 [by t.registers.word_selector_t[1]._y:=0] + 1042374 t.registers.bitselector_t[1].or2s[0]._y : 0 [by t.registers.word_selector_t[1].y:=1] + 1042383 t.registers.bitselector_t[1].tmp[4] : 1 [by t.registers.bitselector_t[1].or2s[0]._y:=0] + 1042624 t.registers.ff[0]._mqi : 0 [by t.registers.ff[0]._mqib:=1] + 1064080 t.registers.output_buf.vc.ct.tmp[5] : 1 [by t.registers.output_buf.vc.ct.C2Els[1]._y:=0] + 1064337 t.registers.bitselector_t[1].or2s[2]._y : 0 [by t.registers.bitselector_t[1].tmp[4]:=1] + 1064525 t.registers.bitselector_t[1].out : 1 [by t.registers.bitselector_t[1].or2s[2]._y:=0] + 1067290 t.registers.bitselector_t[0].or2s[2]._y : 0 [by t.registers.bitselector_t[0].tmp[4]:=1] + 1069596 t.registers.val_input.ct.C2Els[1]._y : 0 [by t.registers.val_input.ct.tmp[5]:=1] + 1069744 t.registers._in_v_temp : 1 [by t.registers.val_input.ct.C2Els[1]._y:=0] + 1070890 t.registers.bitselector_t[0].out : 1 [by t.registers.bitselector_t[0].or2s[2]._y:=0] + 1070905 t.registers.output_buf.vc.OR2_tf[0]._y : 0 [by t.registers.bitselector_t[0].out:=1] + 1081514 t.registers.output_buf.vc.ct.in[0] : 1 [by t.registers.output_buf.vc.OR2_tf[0]._y:=0] + 1088621 t.registers.val_input_X.buf4._y : 0 [by t.registers._in_v_temp:=1] + 1089508 t.in.v : 1 [by t.registers.val_input_X.buf4._y:=0] + 1110301 t.registers.output_buf.vc.OR2_tf[1]._y : 0 [by t.registers.bitselector_t[1].out:=1] + 1118283 t.registers.output_buf.vc.ct.in[1] : 1 [by t.registers.output_buf.vc.OR2_tf[1]._y:=0] + 1118284 t.registers.output_buf.vc.ct.C2Els[0]._y : 0 [by t.registers.output_buf.vc.ct.in[1]:=1] + 1125010 t.registers.output_buf.vc.ct.tmp[4] : 1 [by t.registers.output_buf.vc.ct.C2Els[0]._y:=0] + 1125375 t.registers.output_buf.vc.ct.C2Els[2]._y : 0 [by t.registers.output_buf.vc.ct.tmp[4]:=1] + 1134333 t.registers.output_buf._in_v : 1 [by t.registers.output_buf.vc.ct.C2Els[2]._y:=0] + 1135717 t.registers.output_buf.in_v_buf4._y : 0 [by t.registers.output_buf._in_v:=1] + 1135738 t.registers.output_buf.in.v : 1 [by t.registers.output_buf.in_v_buf4._y:=0] + 1135779 t.registers.output_buf.in_v_bufN.buf1._y : 0 [by t.registers.output_buf.in.v:=1] + 1135782 t.registers.output_buf._in_vX[0] : 1 [by t.registers.output_buf.in_v_bufN.buf1._y:=0] + 1135784 t.registers.output_buf.f_buf_func[3]._y : 0 [by t.registers.output_buf._in_vX[0]:=1] + 1135787 t.out.d.d[3].f : 1 [by t.registers.output_buf.f_buf_func[3]._y:=0] + 1136364 t.registers.output_buf.f_buf_func[2]._y : 0 [by t.registers.output_buf._in_vX[0]:=1] + 1136365 t.out.d.d[2].f : 1 [by t.registers.output_buf.f_buf_func[2]._y:=0] + 1137659 t.registers.output_buf.t_buf_func[0]._y : 0 [by t.registers.output_buf._in_vX[0]:=1] + 1141111 t.out.d.d[0].t : 1 [by t.registers.output_buf.t_buf_func[0]._y:=0] + 1145291 t.registers.output_buf.t_buf_func[1]._y : 0 [by t.registers.output_buf._in_vX[0]:=1] + 1152424 t.out.d.d[1].t : 1 [by t.registers.output_buf.t_buf_func[1]._y:=0] +WRONG ASSERT: "t.out.d.d[0].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[1].f" has value X and not 0. +WRONG ASSERT: "t.out.d.d[3].t" has value X and not 0. + 1152424 t.out.v : 1 + 1153284 t.registers.output_buf.inack_ctl._y : 0 [by t.out.v:=1] + 1153285 t.registers.ack_read_and.b : 1 [by t.registers.output_buf.inack_ctl._y:=0] + 1153360 t.registers.ack_read_and._y : 0 [by t.registers.ack_read_and.b:=1] + 1153434 t.registers._in_a_read : 1 [by t.registers.ack_read_and._y:=0] + 1155704 t.registers.ack_readwrite._y : 0 [by t.registers._in_a_read:=1] + 1155802 t.registers._in_a_temp : 1 [by t.registers.ack_readwrite._y:=0] + 1161573 t.registers.ack_input_X.buf4._y : 0 [by t.registers._in_a_temp:=1] + 1181236 t.registers.output_buf._en : 0 [by t.registers.ack_read_and.b:=1] + 1185089 t.registers.output_buf.en_buf_f.buf1._y : 1 [by t.registers.output_buf._en:=0] + 1187377 t.registers.output_buf.en_buf_t.buf1._y : 1 [by t.registers.output_buf._en:=0] + 1187381 t.registers.output_buf._en_X_t[0] : 0 [by t.registers.output_buf.en_buf_t.buf1._y:=1] + 1187449 t.registers.output_buf._en_X_f[0] : 0 [by t.registers.output_buf.en_buf_f.buf1._y:=1] + 1193301 t.in.a : 1 [by t.registers.ack_input_X.buf4._y:=0] + 1193301 t.out.a : 1 + 1193306 t.registers.output_buf._out_a_B : 0 [by t.out.a:=1] + 1193400 t.registers.output_buf.out_a_B_buf_f.buf1._y : 1 [by t.registers.output_buf._out_a_B:=0] + 1193401 t.registers.output_buf._out_a_BX_t[0] : 0 [by t.registers.output_buf.out_a_B_buf_f.buf1._y:=1] + 1193403 t.registers.output_buf.t_buf_func[1]._y : 1 [by t.registers.output_buf._out_a_BX_t[0]:=0] + 1193437 t.registers.output_buf.t_buf_func[0]._y : 1 [by t.registers.output_buf._out_a_BX_t[0]:=0] + 1193438 t.out.d.d[0].t : 0 [by t.registers.output_buf.t_buf_func[0]._y:=1] + 1193439 t.out.d.d[1].t : 0 [by t.registers.output_buf.t_buf_func[1]._y:=1] + 1193597 t.registers.output_buf.out_a_B_buf_t.buf1._y : 1 [by t.registers.output_buf._out_a_B:=0] + 1193611 t.registers.output_buf._out_a_BX_f[0] : 0 [by t.registers.output_buf.out_a_B_buf_t.buf1._y:=1] + 1193623 t.registers.output_buf.f_buf_func[0]._y : 1 [by t.registers.output_buf._out_a_BX_f[0]:=0] + 1205521 t.out.d.d[0].f : 0 [by t.registers.output_buf.f_buf_func[0]._y:=1] + 1206601 t.registers.output_buf.f_buf_func[3]._y : 1 [by t.registers.output_buf._out_a_BX_f[0]:=0] + 1215168 t.registers.output_buf.f_buf_func[2]._y : 1 [by t.registers.output_buf._out_a_BX_f[0]:=0] + 1215169 t.out.d.d[2].f : 0 [by t.registers.output_buf.f_buf_func[2]._y:=1] + 1215219 t.registers.output_buf.t_buf_func[3]._y : 1 [by t.registers.output_buf._out_a_BX_t[0]:=0] + 1215431 t.out.d.d[3].t : 0 [by t.registers.output_buf.t_buf_func[3]._y:=1] + 1217642 t.registers.output_buf.f_buf_func[1]._y : 1 [by t.registers.output_buf._out_a_BX_f[0]:=0] + 1225054 t.out.d.d[1].f : 0 [by t.registers.output_buf.f_buf_func[1]._y:=1] + 1249551 t.out.d.d[3].f : 0 [by t.registers.output_buf.f_buf_func[3]._y:=1] + 1249551 t.in.d.d[0].f : 0 + 1249551 t.registers.ack_read_and.a : 0 + 1249551 t.registers.atree[0].in[0] : 0 + 1249551 t.in.d.d[1].f : 0 + 1249551 t.registers.atree[0].in[1] : 0 + 1249555 t.registers.word_to_read[0]._y : 1 [by t.registers.ack_read_and.a:=0] + 1249556 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0] + 1249577 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0] + 1249596 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1] + 1249612 t.registers.val_input.OR2_tf[1]._y : 1 [by t.in.d.d[1].f:=0] + 1249627 t.registers.word_to_read[0].y : 0 [by t.registers.word_to_read[0]._y:=1] + 1249629 t.registers.address_propagator_f[0]._y : 1 [by t.registers.ack_read_and.a:=0] + 1249664 t.registers.address_propagator_f[0].y : 0 [by t.registers.address_propagator_f[0]._y:=1] + 1249667 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1] + 1249676 t.registers.word_to_read_X[0].buf1._y : 1 [by t.registers.word_to_read[0].y:=0] + 1249690 t.registers.ack_read_and._y : 1 [by t.registers.ack_read_and.a:=0] + 1249695 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0] + 1249718 t.registers._in_a_read : 0 [by t.registers.ack_read_and._y:=1] + 1249815 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0] + 1249875 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1] + 1249906 t.registers.val_input.OR2_tf[4]._y : 1 [by t.registers.ack_read_and.a:=0] + 1249979 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1] + 1250682 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1] + 1252484 t.registers.val_input.OR2_tf[0]._y : 1 [by t.in.d.d[0].f:=0] + 1252785 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0] + 1254500 t.registers.word_selector_f[0].a : 0 [by t.registers.word_to_read_X[0].buf1._y:=1] + 1254501 t.registers.word_selector_t[1]._y : 1 [by t.registers.word_selector_f[0].a:=0] + 1254504 t.registers.word_selector_t[1].y : 0 [by t.registers.word_selector_t[1]._y:=1] + 1255841 t.registers.output_buf.vc.OR2_tf[2]._y : 1 [by t.registers.address_propagator_f[0].y:=0] + 1257310 t.registers.output_buf.vc.ct.in[2] : 0 [by t.registers.output_buf.vc.OR2_tf[2]._y:=1] + 1259476 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1] + 1259506 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[4]:=0] + 1259512 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1] + 1263702 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1] + 1263703 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] + 1263706 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1] + 1263792 t.registers.ff[0]._sqib : 1 [by t.registers.ff[0].__clk_B:=0] + 1263829 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0] + 1264724 t.registers.ff[0]._sqi : 0 [by t.registers.ff[0]._sqib:=1] + 1265285 t.data[0].d[0] : 0 [by t.registers.ff[0]._sqib:=1] + 1270192 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1] + 1270221 t.registers.ack_readwrite._y : 1 [by t.registers._in_a_read:=0] + 1270222 t.registers._in_a_temp : 0 [by t.registers.ack_readwrite._y:=1] + 1270466 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[0]:=0] + 1272552 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1] + 1272554 t.registers.ff[1]._sqib : 1 [by t.registers.ff[1].__clk_B:=0] + 1272913 t.registers.ff[1]._sqi : 0 [by t.registers.ff[1]._sqib:=1] + 1273168 t.registers.bitselector_t[1].or2s[0]._y : 1 [by t.registers.word_selector_t[1].y:=0] + 1274570 t.data[0].d[1] : 0 [by t.registers.ff[1]._sqib:=1] + 1274572 t.registers.ff[1].q_B : 1 [by t.data[0].d[1]:=0] + 1278373 t.registers.ack_input_X.buf4._y : 1 [by t.registers._in_a_temp:=0] + 1279638 t.registers.ff[0].q_B : 1 [by t.data[0].d[0]:=0] + 1280241 t.registers.word_selector_t[0]._y : 1 [by t.registers.word_selector_f[0].a:=0] + 1280244 t.registers.word_selector_t[0].y : 0 [by t.registers.word_selector_t[0]._y:=1] + 1287756 t.registers.address_propagator_f[1]._y : 1 [by t.registers.ack_read_and.a:=0] + 1288100 t.registers.address_propagator_f[1].y : 0 [by t.registers.address_propagator_f[1]._y:=1] + 1289883 t.registers.output_buf.vc.OR2_tf[3]._y : 1 [by t.registers.address_propagator_f[1].y:=0] + 1289912 t.registers.output_buf.vc.ct.in[3] : 0 [by t.registers.output_buf.vc.OR2_tf[3]._y:=1] + 1289983 t.registers.output_buf.vc.ct.C2Els[1]._y : 1 [by t.registers.output_buf.vc.ct.in[3]:=0] + 1290311 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1] + 1290345 t.registers.output_buf.vc.ct.tmp[5] : 0 [by t.registers.output_buf.vc.ct.C2Els[1]._y:=1] + 1290394 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[5]:=0] + 1292804 t.in.a : 0 [by t.registers.ack_input_X.buf4._y:=1] + 1297679 t.registers.bitselector_t[1].tmp[4] : 0 [by t.registers.bitselector_t[1].or2s[0]._y:=1] + 1297786 t.registers.bitselector_t[1].or2s[2]._y : 1 [by t.registers.bitselector_t[1].tmp[4]:=0] + 1297789 t.registers.bitselector_t[1].out : 0 [by t.registers.bitselector_t[1].or2s[2]._y:=1] + 1297790 t.registers.output_buf.vc.OR2_tf[1]._y : 1 [by t.registers.bitselector_t[1].out:=0] + 1297791 t.registers.output_buf.vc.ct.in[1] : 0 [by t.registers.output_buf.vc.OR2_tf[1]._y:=1] + 1317533 t.registers.bitselector_t[0].or2s[0]._y : 1 [by t.registers.word_selector_t[0].y:=0] + 1321878 t.registers.bitselector_t[0].tmp[4] : 0 [by t.registers.bitselector_t[0].or2s[0]._y:=1] + 1322736 t.registers.bitselector_t[0].or2s[2]._y : 1 [by t.registers.bitselector_t[0].tmp[4]:=0] + 1322748 t.registers.bitselector_t[0].out : 0 [by t.registers.bitselector_t[0].or2s[2]._y:=1] + 1338556 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1] + 1359177 t.registers.output_buf.vc.OR2_tf[0]._y : 1 [by t.registers.bitselector_t[0].out:=0] + 1389525 t.registers.val_input_X.buf4._y : 1 [by t.registers._in_v_temp:=0] + 1392523 t.registers.output_buf.vc.ct.in[0] : 0 [by t.registers.output_buf.vc.OR2_tf[0]._y:=1] + 1392551 t.registers.output_buf.vc.ct.C2Els[0]._y : 1 [by t.registers.output_buf.vc.ct.in[0]:=0] + 1392559 t.registers.output_buf.vc.ct.tmp[4] : 0 [by t.registers.output_buf.vc.ct.C2Els[0]._y:=1] + 1394506 t.in.v : 0 [by t.registers.val_input_X.buf4._y:=1] + 1413914 t.registers.output_buf.vc.ct.C2Els[2]._y : 1 [by t.registers.output_buf.vc.ct.tmp[4]:=0] + 1448245 t.registers.output_buf._in_v : 0 [by t.registers.output_buf.vc.ct.C2Els[2]._y:=1] + 1448510 t.registers.output_buf.in_v_buf4._y : 1 [by t.registers.output_buf._in_v:=0] + 1448589 t.registers.output_buf.in.v : 0 [by t.registers.output_buf.in_v_buf4._y:=1] + 1448597 t.registers.output_buf.in_v_bufN.buf1._y : 1 [by t.registers.output_buf.in.v:=0] + 1448638 t.registers.output_buf._in_vX[0] : 0 [by t.registers.output_buf.in_v_bufN.buf1._y:=1] +WRONG ASSERT: "t.registers.ff[0].q" has value 0 and not 1. +WRONG ASSERT: "t.registers.ff[1].q" has value 0 and not 1. +[4] reading done ---------------------------------------------------------- diff --git a/test/unit_tests/register_wrw/run/prsim.pdf b/test/unit_tests/register_wrw/run/prsim.pdf new file mode 100644 index 0000000000000000000000000000000000000000..95e105d2dc6872b66d431be427a3c40497ecf2a8 GIT binary patch literal 53431 zcmaHTbzD{5)~<*&h?InMBi$e+-CfeT>DY9qq-?rdB&Ab8y1Tm@B&0j<-r{@D`Of+7 z{cF#))|g{F;~6o>TKtqkK}3w6nSl+FqIi+G=qDmGF%z+^p#>r@FEOKnfhoX&m<4=C ziI`Ev4G17+6gF@)u(CBJ=I2KQ*cd|ux&Cc~sH>y6vZH|`fSB!hlbEfIBQfjqTEW24 z5nyja%nrFkWK^)XHBtsR5^I6&h=_sp16&=686~a3HiiEF3jh6;B-SBjR5mj(Hn%Y) z=6K%zN#4)`VB|>5`A7M`;4uHY1A;a-wvG@6C5v+ATlaV8Jz4GRRb<4n5XY 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z(04IEJ-I{6`mJBwV!$_J4A4qyZ615}O1{krOvjOVAqr?!%VK~QyE;%NlWKo^iJ2s1 z^@bphEI;_j@HMR;ROmC$pZ-h67Pv8eeT4!VRIyxLe+9L zf8AgbXga$jb54JGyZCvno2Qo!K-N5dj1lR$v(0*LF{}et1dvpI;r{Oia>N&HV}FvM z{FemK5dR?;^arhIAgIVDR?{$80)ooUXrT<3-#}3FZcK;4d?FD9xejyw8%1hy1=tPw zRBTLt{?i*340$O)dd+Tr`KRyTCc2{C=qwAHbVEjPShCZDy@`89IO~l75~>)?p&>0y z7ZSUv7Eru$kifA}gO$oi&dS3+cFqi-!fvBP$(==~8lT z)>?UoEpXOlOJBYBrG^jTgcz(VYX|OF|0Q5k4#cn@0TL_REruNiL;v&d_$~#Ne5AH! z#)IcJVt@-s2o^Q);8~ae04fD&1q*{`D@_2WjJJn0;W0NeeMsQ|Bk`Ef-(>$+me`z_ z-$yd6+K?6EbW?5YYApdYoi!uSj0V6|8z84IdJ9Zr$!>H3xd17B%R50ir->o2*B66A zf(9B$0=QF&pXcv^nq_g%38iDT2xkYVA!~L&Pl9V5+@Z&Cq)^$V+A65mKDJrPj|du8 z9XD1j*d9(Mu}?k12?*{;@YcFZvNB`FLWw#K%oauvkNYe_*pkM!SjNr>A-bSs*J5^mnyb0-&~;%U@cAnuT!cBtR+Cl8YNBf|~LUFanJY zd3wPmTIhRbi2PFxd@@`jLOIv8@68+erW?_Es4 zYHIe1YU`f)E1-Ld4RcECE*C-2A~lAb)U07Yz_z9vPFeKY~9o7}$R|17J zNO`=XsE0^X*O=8h1g|B67Yrqm%@AHkB}Mzcq@bDjB~PGyG%tP5S~?I6wmilH=Vt

%2w)c9eC_|>ENQ?l4K)2)YWn)AZF6VW zws8o4D!H54*LHqLe{K#y!Fg+&MZdNazGtj$?EKn*_?rpge<4qLm~g$@fePHHWzRf4 zP_Lo7e*}2_4fyZP4=SX>D33{rY!g%=(DQl;h^aD6;D|iD!atnW0jsvG-9O(9g>?j# z;;~aeSlxLt=|BW8@ZFDc55a=*_QNhxyo%tJW(h1CU9%FY@$37xWOGhv^D+vA)usH{YRaxiwtG+lAroFAKE`gQW9#NJv zcr}ej)D*mA8n2vuBZybJ{EhH0=0mstVRN5E&?wzs^gcg^)m&{sNtW<<`nErC3f82( zlGQAQyL%8r!`d)nzkyeO%AS9YA7<6G{e|#wVORFV55s3?-wnd~T*|D%kCK_z&-me{ z`tUG*6fM{U;+sBevKT+gz9Ad%D!sqOuV?qw6^)WQ;(m&m%h)|Fs(FoOPhp3W|)b-l+F3GV z)_lV6Ww;nlpS0P_Z;0@DAtg_}UOEaoQ&`6|XK5k+GI}YF0BJsYJ7fXZLhd<`OBM1G zS3**6%&Z-dCF=l+IwtVHq^MXjSl>#ew;&JJ*jC4{OO6p(pQ|Nn5yUNZ5)Bg2LW%=2 z+x_*1jM?&N0-&9lGofWswT&O;{hEoIxBJnCTMW#{lNAuLL1*$#Af_`*N~LvK=OCog zD3J}bU(lOSTnJeR2aau9UEb6IS_3la|2;*mtlFBcc8x_ZT?T8TFs&Bz`6&X(nj|&6 z1~)_mHB(^7eFjT`aWA7A-P-~yS_nEY%-L<�J(>Wok)%_l#HLOQUi9( zp^i06v4nUN%{nc@p*%{FuEBH$$T)vW{DnImFm1kWTC$S8X71_{+boJBeBeFLLjuZ_ z>^TPZYxS6&6AI;c*X&=Pa(YGoC1G&B7&?8jTbX;>D1c#Lo3CDax~CMLyMWS z1;H3`EsJkeMyuk`oS|P0d%?=cn26u|7iP=jP_yyin^Sp9PN(|^ZU_I!B=OtdO#Z8R zay)-U8tC7={ocLJS^5MtPF;gJsfoB=ppX(YPV}%WkOT8+wYf#@ziGrqo#jNJU0cy= zV3^Tg%^`q7g7t+Wz6}Js0Is|k(0D03Zv|9xi(>QG>iC$p0JRU(5$Esp87b!3yz<9?wS;KPduj{am)L zLA;sU-b;p6^lK6Do2Y*ynEz|}a1k3kQx>^o5A2F_#is_j;G^uzsncw*eOAD-o`f^PxH@wh4eDzh4aiYPGEPx{JZx;U*yohKW(7EiY;ZiiZ*j1hlwac~GmE}4TJCc zvxvCn@@w!p9WbOS=s9LtNV%Kk#;K2PC9s{8;e=G_APF^%zT9z)F>H%f@agIhE{ybS ze!6sOA#7?j__fE?PvP_$8L%bQUoy794d{7cY|I;+Hz7Q3x(2m~#u_AfO-t5BTBG@> z$d3qX1M6>ue<>eAj^X00OTe^v!RYLw90z6R9vk)!R!F<9rJk!vYo{=AF>AADFbq~$=??AN&uUObL=@Dhk-e_I?_0(2N*ag ze&6r+l<;}Jepn68hX!fJ`bstbDbt+xRl07&bRS?2v0YAmwDJcDX}~n%FA4uK7r@uQ z?>fB!$^dq`9};noA+Kmji=V@41v|PMD$&b5(1ll2OSV}R93}$mYhQ;NSQBlOyQtyk z3RSCIE%|Ba8=UV!4Grb>$G`a@;e>!$Dpg2W1;@{oLW)HJWJa+0j~@9JKtnb zMY=`=tnB_v1l%0|gcBj)wA#csI3E%iy3g9hLWy~;(LbU5-{1dwemu=1x&n9pvP+Uz z793-twcqe}DSv8Z!D5paYHXQ~d8ANcr#Y ze>p#>jL+`x8hk@+T`Acn2SgCSaKB_$?=U9}*?x(8G=>}?w9KFQVD*9)j0r(gb^nZH##5+rZ{W}SZV?;%NdUb^T zTm5wUr0D4fJUs#bOd2lsurE*Gpbd7f1pG;^IaJaG&Xs(A^F4+6&H0p&qPK&MuZyRL z670`vzmg;hi9#XK!bo8W;D;Q20Eyy3B6)Zz*5UzomivJZOD{K1UpE(9gg;tPL=er7 zaQ5}}@{tr0a{u*8(9_!qBm(Y7?fvY4PpIEhdD%N6Y+)y#9`-+S;Qfub0B;9J3gB4| zLjjx|{`feiXw7^y9ALWXQWB#Zc2Fw#1(_-KwOg7Mh5&4rZ7%_05_{Mk=u&YM+ z@7I_{i3!6F1UH0<{>dxg{`8M}h$DeZ-VJGiYtcW$V85mt@K{FA4mz_sv39)M>1y1o}RE+SaY@K5{UP~jCZ7G"t.registers.reset_bufarray.buf6._y"- -~("t.registers.reset_bufarray.buf6.a")->"t.registers.reset_bufarray.buf6._y"+ -"t.registers.reset_bufarray.buf6._y"->"t.registers.reset_bufarray.buf6.y"- -~("t.registers.reset_bufarray.buf6._y")->"t.registers.reset_bufarray.buf6.y"+ -= "t.registers.reset_bufarray.supply.vdd" "t.registers.reset_bufarray.buf6.vdd" -= "t.registers.reset_bufarray.supply.vss" "t.registers.reset_bufarray.buf6.vss" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[15]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[14]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[13]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[12]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[11]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[10]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[9]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[8]" +"t.registers.reset_bufarray.buf3.a"->"t.registers.reset_bufarray.buf3._y"- +~("t.registers.reset_bufarray.buf3.a")->"t.registers.reset_bufarray.buf3._y"+ +"t.registers.reset_bufarray.buf3._y"->"t.registers.reset_bufarray.buf3.y"- +~("t.registers.reset_bufarray.buf3._y")->"t.registers.reset_bufarray.buf3.y"+ += "t.registers.reset_bufarray.supply.vdd" "t.registers.reset_bufarray.buf3.vdd" += "t.registers.reset_bufarray.supply.vss" "t.registers.reset_bufarray.buf3.vss" = "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[7]" = "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[6]" = "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[5]" @@ -38,192 +30,271 @@ = "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[3]" = "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[2]" = "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.out[1]" -= "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.buf6.y" -= "t.registers.reset_bufarray.in" "t.registers.reset_bufarray.buf6.a" += "t.registers.reset_bufarray.out[0]" "t.registers.reset_bufarray.buf3.y" += "t.registers.reset_bufarray.in" "t.registers.reset_bufarray.buf3.a" +"t.registers.bitselector_f[0].or2s[0].a"|"t.registers.bitselector_f[0].or2s[0].b"->"t.registers.bitselector_f[0].or2s[0]._y"- +~("t.registers.bitselector_f[0].or2s[0].a"|"t.registers.bitselector_f[0].or2s[0].b")->"t.registers.bitselector_f[0].or2s[0]._y"+ +"t.registers.bitselector_f[0].or2s[0]._y"->"t.registers.bitselector_f[0].or2s[0].y"- +~("t.registers.bitselector_f[0].or2s[0]._y")->"t.registers.bitselector_f[0].or2s[0].y"+ +"t.registers.bitselector_f[0].or2s[1].a"|"t.registers.bitselector_f[0].or2s[1].b"->"t.registers.bitselector_f[0].or2s[1]._y"- +~("t.registers.bitselector_f[0].or2s[1].a"|"t.registers.bitselector_f[0].or2s[1].b")->"t.registers.bitselector_f[0].or2s[1]._y"+ +"t.registers.bitselector_f[0].or2s[1]._y"->"t.registers.bitselector_f[0].or2s[1].y"- +~("t.registers.bitselector_f[0].or2s[1]._y")->"t.registers.bitselector_f[0].or2s[1].y"+ +"t.registers.bitselector_f[0].or2s[2].a"|"t.registers.bitselector_f[0].or2s[2].b"->"t.registers.bitselector_f[0].or2s[2]._y"- +~("t.registers.bitselector_f[0].or2s[2].a"|"t.registers.bitselector_f[0].or2s[2].b")->"t.registers.bitselector_f[0].or2s[2]._y"+ +"t.registers.bitselector_f[0].or2s[2]._y"->"t.registers.bitselector_f[0].or2s[2].y"- +~("t.registers.bitselector_f[0].or2s[2]._y")->"t.registers.bitselector_f[0].or2s[2].y"+ += "t.registers.bitselector_f[0].tmp[4]" "t.registers.bitselector_f[0].or2s[2].a" += "t.registers.bitselector_f[0].tmp[4]" "t.registers.bitselector_f[0].or2s[0].y" += "t.registers.bitselector_f[0].tmp[5]" "t.registers.bitselector_f[0].or2s[2].b" += "t.registers.bitselector_f[0].tmp[5]" "t.registers.bitselector_f[0].or2s[1].y" += "t.registers.bitselector_f[0].supply.vdd" "t.registers.bitselector_f[0].or2s[2].vdd" += "t.registers.bitselector_f[0].supply.vdd" "t.registers.bitselector_f[0].or2s[1].vdd" += "t.registers.bitselector_f[0].supply.vdd" "t.registers.bitselector_f[0].or2s[0].vdd" += "t.registers.bitselector_f[0].supply.vss" "t.registers.bitselector_f[0].or2s[2].vss" += "t.registers.bitselector_f[0].supply.vss" "t.registers.bitselector_f[0].or2s[1].vss" += "t.registers.bitselector_f[0].supply.vss" "t.registers.bitselector_f[0].or2s[0].vss" += "t.registers.bitselector_f[0].in[0]" "t.registers.bitselector_f[0].or2s[0].a" += "t.registers.bitselector_f[0].in[0]" "t.registers.bitselector_f[0].tmp[0]" += "t.registers.bitselector_f[0].in[1]" "t.registers.bitselector_f[0].or2s[0].b" += "t.registers.bitselector_f[0].in[1]" "t.registers.bitselector_f[0].tmp[1]" += "t.registers.bitselector_f[0].in[2]" "t.registers.bitselector_f[0].or2s[1].a" += "t.registers.bitselector_f[0].in[2]" "t.registers.bitselector_f[0].tmp[2]" += "t.registers.bitselector_f[0].in[3]" "t.registers.bitselector_f[0].or2s[1].b" += "t.registers.bitselector_f[0].in[3]" "t.registers.bitselector_f[0].tmp[3]" += "t.registers.bitselector_f[0].out" "t.registers.bitselector_f[0].or2s[2].y" += "t.registers.bitselector_f[0].out" "t.registers.bitselector_f[0].tmp[6]" +"t.registers.bitselector_f[1].or2s[0].a"|"t.registers.bitselector_f[1].or2s[0].b"->"t.registers.bitselector_f[1].or2s[0]._y"- +~("t.registers.bitselector_f[1].or2s[0].a"|"t.registers.bitselector_f[1].or2s[0].b")->"t.registers.bitselector_f[1].or2s[0]._y"+ +"t.registers.bitselector_f[1].or2s[0]._y"->"t.registers.bitselector_f[1].or2s[0].y"- +~("t.registers.bitselector_f[1].or2s[0]._y")->"t.registers.bitselector_f[1].or2s[0].y"+ +"t.registers.bitselector_f[1].or2s[1].a"|"t.registers.bitselector_f[1].or2s[1].b"->"t.registers.bitselector_f[1].or2s[1]._y"- +~("t.registers.bitselector_f[1].or2s[1].a"|"t.registers.bitselector_f[1].or2s[1].b")->"t.registers.bitselector_f[1].or2s[1]._y"+ +"t.registers.bitselector_f[1].or2s[1]._y"->"t.registers.bitselector_f[1].or2s[1].y"- +~("t.registers.bitselector_f[1].or2s[1]._y")->"t.registers.bitselector_f[1].or2s[1].y"+ +"t.registers.bitselector_f[1].or2s[2].a"|"t.registers.bitselector_f[1].or2s[2].b"->"t.registers.bitselector_f[1].or2s[2]._y"- +~("t.registers.bitselector_f[1].or2s[2].a"|"t.registers.bitselector_f[1].or2s[2].b")->"t.registers.bitselector_f[1].or2s[2]._y"+ +"t.registers.bitselector_f[1].or2s[2]._y"->"t.registers.bitselector_f[1].or2s[2].y"- +~("t.registers.bitselector_f[1].or2s[2]._y")->"t.registers.bitselector_f[1].or2s[2].y"+ += "t.registers.bitselector_f[1].tmp[4]" "t.registers.bitselector_f[1].or2s[2].a" += "t.registers.bitselector_f[1].tmp[4]" "t.registers.bitselector_f[1].or2s[0].y" += "t.registers.bitselector_f[1].tmp[5]" "t.registers.bitselector_f[1].or2s[2].b" += "t.registers.bitselector_f[1].tmp[5]" "t.registers.bitselector_f[1].or2s[1].y" += "t.registers.bitselector_f[1].supply.vdd" "t.registers.bitselector_f[1].or2s[2].vdd" += "t.registers.bitselector_f[1].supply.vdd" "t.registers.bitselector_f[1].or2s[1].vdd" += "t.registers.bitselector_f[1].supply.vdd" "t.registers.bitselector_f[1].or2s[0].vdd" += "t.registers.bitselector_f[1].supply.vss" "t.registers.bitselector_f[1].or2s[2].vss" += "t.registers.bitselector_f[1].supply.vss" "t.registers.bitselector_f[1].or2s[1].vss" += "t.registers.bitselector_f[1].supply.vss" "t.registers.bitselector_f[1].or2s[0].vss" += "t.registers.bitselector_f[1].in[0]" "t.registers.bitselector_f[1].or2s[0].a" += "t.registers.bitselector_f[1].in[0]" "t.registers.bitselector_f[1].tmp[0]" += "t.registers.bitselector_f[1].in[1]" "t.registers.bitselector_f[1].or2s[0].b" += "t.registers.bitselector_f[1].in[1]" "t.registers.bitselector_f[1].tmp[1]" += "t.registers.bitselector_f[1].in[2]" "t.registers.bitselector_f[1].or2s[1].a" += "t.registers.bitselector_f[1].in[2]" "t.registers.bitselector_f[1].tmp[2]" += "t.registers.bitselector_f[1].in[3]" "t.registers.bitselector_f[1].or2s[1].b" += "t.registers.bitselector_f[1].in[3]" "t.registers.bitselector_f[1].tmp[3]" += "t.registers.bitselector_f[1].out" "t.registers.bitselector_f[1].or2s[2].y" += "t.registers.bitselector_f[1].out" "t.registers.bitselector_f[1].tmp[6]" += "t.registers.bitselector_f[1].out" "t.registers.output_buf.in.d.d[1].f" += "t.registers.bitselector_f[1].out" "t.registers.output_buf.in.d.d[1].d[0]" += "t.registers.bitselector_f[0].out" "t.registers.output_buf.in.d.d[0].f" += "t.registers.bitselector_f[0].out" "t.registers.output_buf.in.d.d[0].d[0]" += "t.registers._clock_temp" "t.registers.ack_dly.in" = "t.registers._clock_temp" "t.registers.inv_clk.a" = "t.registers._clock_temp" "t.registers.clk_dly.out" -= "t.registers._in_flag.d.d[0].d[0]" "t.registers._in_flag.d.d[0].f" -= "t.registers._in_flag.d.d[0].d[1]" "t.registers._in_flag.d.d[0].t" -= "t.registers._in_flag.d.d[0].d[0]" "t.registers._in_flag.d.d[0].f" -= "t.registers._in_flag.d.d[0].d[1]" "t.registers._in_flag.d.d[0].t" -= "t.registers._in_flag.d.d[0].d[0]" "t.registers._in_flag.d.d[0].f" -= "t.registers._in_flag.d.d[0].d[1]" "t.registers._in_flag.d.d[0].t" -= "t.registers._in_flag.v" "t.registers.read_write_demux.cond.v" -= "t.registers._in_flag.a" "t.registers.read_write_demux.cond.a" -= "t.registers._in_flag.d.d[0].f" "t.registers.read_write_demux.cond.d.d[0].f" -= "t.registers._in_flag.d.d[0].t" "t.registers.read_write_demux.cond.d.d[0].t" -= "t.registers._in_flag.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].d[0]" -= "t.registers._in_flag.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].d[1]" -"t.registers.ack_and.a"&"t.registers.ack_and.b"->"t.registers.ack_and._y"- -~("t.registers.ack_and.a"&"t.registers.ack_and.b")->"t.registers.ack_and._y"+ -"t.registers.ack_and._y"->"t.registers.ack_and.y"- -~("t.registers.ack_and._y")->"t.registers.ack_and.y"+ -= "t.registers.ack_and.a" "t.registers._in_temp2.a" -= "t.registers.ack_and.a" "t.registers._in_flag.a" -= "t.registers._out_temp.d[0].d[0]" "t.registers._out_temp.d[0].f" -= "t.registers._out_temp.d[0].d[1]" "t.registers._out_temp.d[0].t" -= "t.registers._out_temp.d[1].d[0]" "t.registers._out_temp.d[1].f" -= "t.registers._out_temp.d[1].d[1]" "t.registers._out_temp.d[1].t" -= "t.registers._out_temp.d[1].d[0]" "t.registers._out_temp.d[1].f" -= "t.registers._out_temp.d[1].d[1]" "t.registers._out_temp.d[1].t" -= "t.registers._out_temp.d[0].d[0]" "t.registers._out_temp.d[0].f" -= "t.registers._out_temp.d[0].d[1]" "t.registers._out_temp.d[0].t" -= "t.registers._out_temp.d[0].f" "t.registers.ff_validator.in.d[0].f" -= "t.registers._out_temp.d[0].t" "t.registers.ff_validator.in.d[0].t" -= "t.registers._out_temp.d[0].d[0]" "t.registers.ff_validator.in.d[0].d[0]" -= "t.registers._out_temp.d[0].d[1]" "t.registers.ff_validator.in.d[0].d[1]" -= "t.registers._out_temp.d[1].f" "t.registers.ff_validator.in.d[1].f" -= "t.registers._out_temp.d[1].t" "t.registers.ff_validator.in.d[1].t" -= "t.registers._out_temp.d[1].d[0]" "t.registers.ff_validator.in.d[1].d[0]" -= "t.registers._out_temp.d[1].d[1]" "t.registers.ff_validator.in.d[1].d[1]" -"t.registers.ff_f[0].clk_B"->"t.registers.ff_f[0]._clk_B"- -~("t.registers.ff_f[0].clk_B")->"t.registers.ff_f[0]._clk_B"+ -"t.registers.ff_f[0]._clk_B"->"t.registers.ff_f[0].__clk_B"- -~("t.registers.ff_f[0]._clk_B")->"t.registers.ff_f[0].__clk_B"+ -~"t.registers.ff_f[0].d"&~"t.registers.ff_f[0]._clk_B"|~"t.registers.ff_f[0].reset_B"|~"t.registers.ff_f[0].__clk_B"&~"t.registers.ff_f[0]._mqi"->"t.registers.ff_f[0]._mqib"+ -("t.registers.ff_f[0].d"&"t.registers.ff_f[0].__clk_B"|"t.registers.ff_f[0]._mqi"&"t.registers.ff_f[0]._clk_B")&"t.registers.ff_f[0].reset_B"->"t.registers.ff_f[0]._mqib"- -"t.registers.ff_f[0]._mqib"->"t.registers.ff_f[0]._mqi"- -~("t.registers.ff_f[0]._mqib")->"t.registers.ff_f[0]._mqi"+ -~"t.registers.ff_f[0]._mqi"&~"t.registers.ff_f[0].__clk_B"|~"t.registers.ff_f[0].reset_B"|~"t.registers.ff_f[0]._sqi"&~"t.registers.ff_f[0]._clk_B"->"t.registers.ff_f[0]._sqib"+ -("t.registers.ff_f[0]._mqi"&"t.registers.ff_f[0]._clk_B"|"t.registers.ff_f[0]._sqi"&"t.registers.ff_f[0].__clk_B")&"t.registers.ff_f[0].reset_B"->"t.registers.ff_f[0]._sqib"- -"t.registers.ff_f[0]._sqib"->"t.registers.ff_f[0]._sqi"- -~("t.registers.ff_f[0]._sqib")->"t.registers.ff_f[0]._sqi"+ -"t.registers.ff_f[0]._sqib"->"t.registers.ff_f[0].q"- -~("t.registers.ff_f[0]._sqib")->"t.registers.ff_f[0].q"+ -"t.registers.ff_f[1].clk_B"->"t.registers.ff_f[1]._clk_B"- -~("t.registers.ff_f[1].clk_B")->"t.registers.ff_f[1]._clk_B"+ -"t.registers.ff_f[1]._clk_B"->"t.registers.ff_f[1].__clk_B"- -~("t.registers.ff_f[1]._clk_B")->"t.registers.ff_f[1].__clk_B"+ -~"t.registers.ff_f[1].d"&~"t.registers.ff_f[1]._clk_B"|~"t.registers.ff_f[1].reset_B"|~"t.registers.ff_f[1].__clk_B"&~"t.registers.ff_f[1]._mqi"->"t.registers.ff_f[1]._mqib"+ -("t.registers.ff_f[1].d"&"t.registers.ff_f[1].__clk_B"|"t.registers.ff_f[1]._mqi"&"t.registers.ff_f[1]._clk_B")&"t.registers.ff_f[1].reset_B"->"t.registers.ff_f[1]._mqib"- -"t.registers.ff_f[1]._mqib"->"t.registers.ff_f[1]._mqi"- -~("t.registers.ff_f[1]._mqib")->"t.registers.ff_f[1]._mqi"+ -~"t.registers.ff_f[1]._mqi"&~"t.registers.ff_f[1].__clk_B"|~"t.registers.ff_f[1].reset_B"|~"t.registers.ff_f[1]._sqi"&~"t.registers.ff_f[1]._clk_B"->"t.registers.ff_f[1]._sqib"+ -("t.registers.ff_f[1]._mqi"&"t.registers.ff_f[1]._clk_B"|"t.registers.ff_f[1]._sqi"&"t.registers.ff_f[1].__clk_B")&"t.registers.ff_f[1].reset_B"->"t.registers.ff_f[1]._sqib"- -"t.registers.ff_f[1]._sqib"->"t.registers.ff_f[1]._sqi"- -~("t.registers.ff_f[1]._sqib")->"t.registers.ff_f[1]._sqi"+ -"t.registers.ff_f[1]._sqib"->"t.registers.ff_f[1].q"- -~("t.registers.ff_f[1]._sqib")->"t.registers.ff_f[1].q"+ -"t.registers.ff_f[2].clk_B"->"t.registers.ff_f[2]._clk_B"- -~("t.registers.ff_f[2].clk_B")->"t.registers.ff_f[2]._clk_B"+ -"t.registers.ff_f[2]._clk_B"->"t.registers.ff_f[2].__clk_B"- -~("t.registers.ff_f[2]._clk_B")->"t.registers.ff_f[2].__clk_B"+ -~"t.registers.ff_f[2].d"&~"t.registers.ff_f[2]._clk_B"|~"t.registers.ff_f[2].reset_B"|~"t.registers.ff_f[2].__clk_B"&~"t.registers.ff_f[2]._mqi"->"t.registers.ff_f[2]._mqib"+ -("t.registers.ff_f[2].d"&"t.registers.ff_f[2].__clk_B"|"t.registers.ff_f[2]._mqi"&"t.registers.ff_f[2]._clk_B")&"t.registers.ff_f[2].reset_B"->"t.registers.ff_f[2]._mqib"- -"t.registers.ff_f[2]._mqib"->"t.registers.ff_f[2]._mqi"- -~("t.registers.ff_f[2]._mqib")->"t.registers.ff_f[2]._mqi"+ -~"t.registers.ff_f[2]._mqi"&~"t.registers.ff_f[2].__clk_B"|~"t.registers.ff_f[2].reset_B"|~"t.registers.ff_f[2]._sqi"&~"t.registers.ff_f[2]._clk_B"->"t.registers.ff_f[2]._sqib"+ -("t.registers.ff_f[2]._mqi"&"t.registers.ff_f[2]._clk_B"|"t.registers.ff_f[2]._sqi"&"t.registers.ff_f[2].__clk_B")&"t.registers.ff_f[2].reset_B"->"t.registers.ff_f[2]._sqib"- -"t.registers.ff_f[2]._sqib"->"t.registers.ff_f[2]._sqi"- -~("t.registers.ff_f[2]._sqib")->"t.registers.ff_f[2]._sqi"+ -"t.registers.ff_f[2]._sqib"->"t.registers.ff_f[2].q"- -~("t.registers.ff_f[2]._sqib")->"t.registers.ff_f[2].q"+ -"t.registers.ff_f[3].clk_B"->"t.registers.ff_f[3]._clk_B"- -~("t.registers.ff_f[3].clk_B")->"t.registers.ff_f[3]._clk_B"+ -"t.registers.ff_f[3]._clk_B"->"t.registers.ff_f[3].__clk_B"- -~("t.registers.ff_f[3]._clk_B")->"t.registers.ff_f[3].__clk_B"+ -~"t.registers.ff_f[3].d"&~"t.registers.ff_f[3]._clk_B"|~"t.registers.ff_f[3].reset_B"|~"t.registers.ff_f[3].__clk_B"&~"t.registers.ff_f[3]._mqi"->"t.registers.ff_f[3]._mqib"+ -("t.registers.ff_f[3].d"&"t.registers.ff_f[3].__clk_B"|"t.registers.ff_f[3]._mqi"&"t.registers.ff_f[3]._clk_B")&"t.registers.ff_f[3].reset_B"->"t.registers.ff_f[3]._mqib"- -"t.registers.ff_f[3]._mqib"->"t.registers.ff_f[3]._mqi"- -~("t.registers.ff_f[3]._mqib")->"t.registers.ff_f[3]._mqi"+ -~"t.registers.ff_f[3]._mqi"&~"t.registers.ff_f[3].__clk_B"|~"t.registers.ff_f[3].reset_B"|~"t.registers.ff_f[3]._sqi"&~"t.registers.ff_f[3]._clk_B"->"t.registers.ff_f[3]._sqib"+ -("t.registers.ff_f[3]._mqi"&"t.registers.ff_f[3]._clk_B"|"t.registers.ff_f[3]._sqi"&"t.registers.ff_f[3].__clk_B")&"t.registers.ff_f[3].reset_B"->"t.registers.ff_f[3]._sqib"- -"t.registers.ff_f[3]._sqib"->"t.registers.ff_f[3]._sqi"- -~("t.registers.ff_f[3]._sqib")->"t.registers.ff_f[3]._sqi"+ -"t.registers.ff_f[3]._sqib"->"t.registers.ff_f[3].q"- -~("t.registers.ff_f[3]._sqib")->"t.registers.ff_f[3].q"+ -"t.registers.ff_f[4].clk_B"->"t.registers.ff_f[4]._clk_B"- -~("t.registers.ff_f[4].clk_B")->"t.registers.ff_f[4]._clk_B"+ -"t.registers.ff_f[4]._clk_B"->"t.registers.ff_f[4].__clk_B"- -~("t.registers.ff_f[4]._clk_B")->"t.registers.ff_f[4].__clk_B"+ -~"t.registers.ff_f[4].d"&~"t.registers.ff_f[4]._clk_B"|~"t.registers.ff_f[4].reset_B"|~"t.registers.ff_f[4].__clk_B"&~"t.registers.ff_f[4]._mqi"->"t.registers.ff_f[4]._mqib"+ -("t.registers.ff_f[4].d"&"t.registers.ff_f[4].__clk_B"|"t.registers.ff_f[4]._mqi"&"t.registers.ff_f[4]._clk_B")&"t.registers.ff_f[4].reset_B"->"t.registers.ff_f[4]._mqib"- -"t.registers.ff_f[4]._mqib"->"t.registers.ff_f[4]._mqi"- -~("t.registers.ff_f[4]._mqib")->"t.registers.ff_f[4]._mqi"+ -~"t.registers.ff_f[4]._mqi"&~"t.registers.ff_f[4].__clk_B"|~"t.registers.ff_f[4].reset_B"|~"t.registers.ff_f[4]._sqi"&~"t.registers.ff_f[4]._clk_B"->"t.registers.ff_f[4]._sqib"+ -("t.registers.ff_f[4]._mqi"&"t.registers.ff_f[4]._clk_B"|"t.registers.ff_f[4]._sqi"&"t.registers.ff_f[4].__clk_B")&"t.registers.ff_f[4].reset_B"->"t.registers.ff_f[4]._sqib"- -"t.registers.ff_f[4]._sqib"->"t.registers.ff_f[4]._sqi"- -~("t.registers.ff_f[4]._sqib")->"t.registers.ff_f[4]._sqi"+ -"t.registers.ff_f[4]._sqib"->"t.registers.ff_f[4].q"- -~("t.registers.ff_f[4]._sqib")->"t.registers.ff_f[4].q"+ -"t.registers.ff_f[5].clk_B"->"t.registers.ff_f[5]._clk_B"- -~("t.registers.ff_f[5].clk_B")->"t.registers.ff_f[5]._clk_B"+ -"t.registers.ff_f[5]._clk_B"->"t.registers.ff_f[5].__clk_B"- -~("t.registers.ff_f[5]._clk_B")->"t.registers.ff_f[5].__clk_B"+ -~"t.registers.ff_f[5].d"&~"t.registers.ff_f[5]._clk_B"|~"t.registers.ff_f[5].reset_B"|~"t.registers.ff_f[5].__clk_B"&~"t.registers.ff_f[5]._mqi"->"t.registers.ff_f[5]._mqib"+ -("t.registers.ff_f[5].d"&"t.registers.ff_f[5].__clk_B"|"t.registers.ff_f[5]._mqi"&"t.registers.ff_f[5]._clk_B")&"t.registers.ff_f[5].reset_B"->"t.registers.ff_f[5]._mqib"- -"t.registers.ff_f[5]._mqib"->"t.registers.ff_f[5]._mqi"- -~("t.registers.ff_f[5]._mqib")->"t.registers.ff_f[5]._mqi"+ -~"t.registers.ff_f[5]._mqi"&~"t.registers.ff_f[5].__clk_B"|~"t.registers.ff_f[5].reset_B"|~"t.registers.ff_f[5]._sqi"&~"t.registers.ff_f[5]._clk_B"->"t.registers.ff_f[5]._sqib"+ -("t.registers.ff_f[5]._mqi"&"t.registers.ff_f[5]._clk_B"|"t.registers.ff_f[5]._sqi"&"t.registers.ff_f[5].__clk_B")&"t.registers.ff_f[5].reset_B"->"t.registers.ff_f[5]._sqib"- -"t.registers.ff_f[5]._sqib"->"t.registers.ff_f[5]._sqi"- -~("t.registers.ff_f[5]._sqib")->"t.registers.ff_f[5]._sqi"+ -"t.registers.ff_f[5]._sqib"->"t.registers.ff_f[5].q"- -~("t.registers.ff_f[5]._sqib")->"t.registers.ff_f[5].q"+ -"t.registers.ff_f[6].clk_B"->"t.registers.ff_f[6]._clk_B"- -~("t.registers.ff_f[6].clk_B")->"t.registers.ff_f[6]._clk_B"+ -"t.registers.ff_f[6]._clk_B"->"t.registers.ff_f[6].__clk_B"- -~("t.registers.ff_f[6]._clk_B")->"t.registers.ff_f[6].__clk_B"+ -~"t.registers.ff_f[6].d"&~"t.registers.ff_f[6]._clk_B"|~"t.registers.ff_f[6].reset_B"|~"t.registers.ff_f[6].__clk_B"&~"t.registers.ff_f[6]._mqi"->"t.registers.ff_f[6]._mqib"+ -("t.registers.ff_f[6].d"&"t.registers.ff_f[6].__clk_B"|"t.registers.ff_f[6]._mqi"&"t.registers.ff_f[6]._clk_B")&"t.registers.ff_f[6].reset_B"->"t.registers.ff_f[6]._mqib"- -"t.registers.ff_f[6]._mqib"->"t.registers.ff_f[6]._mqi"- -~("t.registers.ff_f[6]._mqib")->"t.registers.ff_f[6]._mqi"+ -~"t.registers.ff_f[6]._mqi"&~"t.registers.ff_f[6].__clk_B"|~"t.registers.ff_f[6].reset_B"|~"t.registers.ff_f[6]._sqi"&~"t.registers.ff_f[6]._clk_B"->"t.registers.ff_f[6]._sqib"+ -("t.registers.ff_f[6]._mqi"&"t.registers.ff_f[6]._clk_B"|"t.registers.ff_f[6]._sqi"&"t.registers.ff_f[6].__clk_B")&"t.registers.ff_f[6].reset_B"->"t.registers.ff_f[6]._sqib"- -"t.registers.ff_f[6]._sqib"->"t.registers.ff_f[6]._sqi"- -~("t.registers.ff_f[6]._sqib")->"t.registers.ff_f[6]._sqi"+ -"t.registers.ff_f[6]._sqib"->"t.registers.ff_f[6].q"- -~("t.registers.ff_f[6]._sqib")->"t.registers.ff_f[6].q"+ -"t.registers.ff_f[7].clk_B"->"t.registers.ff_f[7]._clk_B"- -~("t.registers.ff_f[7].clk_B")->"t.registers.ff_f[7]._clk_B"+ -"t.registers.ff_f[7]._clk_B"->"t.registers.ff_f[7].__clk_B"- -~("t.registers.ff_f[7]._clk_B")->"t.registers.ff_f[7].__clk_B"+ -~"t.registers.ff_f[7].d"&~"t.registers.ff_f[7]._clk_B"|~"t.registers.ff_f[7].reset_B"|~"t.registers.ff_f[7].__clk_B"&~"t.registers.ff_f[7]._mqi"->"t.registers.ff_f[7]._mqib"+ -("t.registers.ff_f[7].d"&"t.registers.ff_f[7].__clk_B"|"t.registers.ff_f[7]._mqi"&"t.registers.ff_f[7]._clk_B")&"t.registers.ff_f[7].reset_B"->"t.registers.ff_f[7]._mqib"- -"t.registers.ff_f[7]._mqib"->"t.registers.ff_f[7]._mqi"- -~("t.registers.ff_f[7]._mqib")->"t.registers.ff_f[7]._mqi"+ -~"t.registers.ff_f[7]._mqi"&~"t.registers.ff_f[7].__clk_B"|~"t.registers.ff_f[7].reset_B"|~"t.registers.ff_f[7]._sqi"&~"t.registers.ff_f[7]._clk_B"->"t.registers.ff_f[7]._sqib"+ -("t.registers.ff_f[7]._mqi"&"t.registers.ff_f[7]._clk_B"|"t.registers.ff_f[7]._sqi"&"t.registers.ff_f[7].__clk_B")&"t.registers.ff_f[7].reset_B"->"t.registers.ff_f[7]._sqib"- -"t.registers.ff_f[7]._sqib"->"t.registers.ff_f[7]._sqi"- -~("t.registers.ff_f[7]._sqib")->"t.registers.ff_f[7]._sqi"+ -"t.registers.ff_f[7]._sqib"->"t.registers.ff_f[7].q"- -~("t.registers.ff_f[7]._sqib")->"t.registers.ff_f[7].q"+ -= "t.registers.ff_f[7].clk_B" "t.registers.ff_t[7].clk_B" -= "t.registers.ff_f[7].clk_B" "t.registers.clock_buffer[3].out[3]" -= "t.registers.ff_f[7].clk_B" "t.registers.clock_buffer[3].out[2]" -= "t.registers.ff_f[7].clk_B" "t.registers.clock_buffer[3].out[1]" -= "t.registers.ff_f[7].clk_B" "t.registers.clock_buffer[3].out[0]" -= "t.registers.ff_f[7].clk_B" "t.registers.ff_t[6].clk_B" -= "t.registers.ff_f[7].clk_B" "t.registers.ff_f[6].clk_B" -= "t.registers.ff_f[7].q" "t.registers.reading_activator_f[7].b" -= "t.registers.ff_f[6].q" "t.registers.reading_activator_f[6].b" -= "t.registers.ff_f[5].clk_B" "t.registers.ff_t[5].clk_B" -= "t.registers.ff_f[5].clk_B" "t.registers.clock_buffer[2].out[3]" -= "t.registers.ff_f[5].clk_B" "t.registers.clock_buffer[2].out[2]" -= "t.registers.ff_f[5].clk_B" "t.registers.clock_buffer[2].out[1]" -= "t.registers.ff_f[5].clk_B" "t.registers.clock_buffer[2].out[0]" -= "t.registers.ff_f[5].clk_B" "t.registers.ff_t[4].clk_B" -= "t.registers.ff_f[5].clk_B" "t.registers.ff_f[4].clk_B" -= "t.registers.ff_f[5].q" "t.registers.reading_activator_f[5].b" -= "t.registers.ff_f[4].q" "t.registers.reading_activator_f[4].b" -= "t.registers.ff_f[3].clk_B" "t.registers.ff_t[3].clk_B" -= "t.registers.ff_f[3].clk_B" "t.registers.clock_buffer[1].out[3]" -= "t.registers.ff_f[3].clk_B" "t.registers.clock_buffer[1].out[2]" -= "t.registers.ff_f[3].clk_B" "t.registers.clock_buffer[1].out[1]" -= "t.registers.ff_f[3].clk_B" "t.registers.clock_buffer[1].out[0]" -= "t.registers.ff_f[3].clk_B" "t.registers.ff_t[2].clk_B" -= "t.registers.ff_f[3].clk_B" "t.registers.ff_f[2].clk_B" -= "t.registers.ff_f[3].q" "t.registers.reading_activator_f[3].b" -= "t.registers.ff_f[2].q" "t.registers.reading_activator_f[2].b" -= "t.registers.ff_f[1].clk_B" "t.registers.ff_t[1].clk_B" -= "t.registers.ff_f[1].clk_B" "t.registers.clock_buffer[0].out[3]" -= "t.registers.ff_f[1].clk_B" "t.registers.clock_buffer[0].out[2]" -= "t.registers.ff_f[1].clk_B" "t.registers.clock_buffer[0].out[1]" -= "t.registers.ff_f[1].clk_B" "t.registers.clock_buffer[0].out[0]" -= "t.registers.ff_f[1].clk_B" "t.registers.ff_t[0].clk_B" -= "t.registers.ff_f[1].clk_B" "t.registers.ff_f[0].clk_B" -= "t.registers.ff_f[1].q" "t.registers.reading_activator_f[1].b" -= "t.registers.ff_f[0].q" "t.registers.reading_activator_f[0].b" +"t.registers.word_selector_t[0].a"&"t.registers.word_selector_t[0].b"->"t.registers.word_selector_t[0]._y"- +~("t.registers.word_selector_t[0].a"&"t.registers.word_selector_t[0].b")->"t.registers.word_selector_t[0]._y"+ +"t.registers.word_selector_t[0]._y"->"t.registers.word_selector_t[0].y"- +~("t.registers.word_selector_t[0]._y")->"t.registers.word_selector_t[0].y"+ +"t.registers.word_selector_t[1].a"&"t.registers.word_selector_t[1].b"->"t.registers.word_selector_t[1]._y"- +~("t.registers.word_selector_t[1].a"&"t.registers.word_selector_t[1].b")->"t.registers.word_selector_t[1]._y"+ +"t.registers.word_selector_t[1]._y"->"t.registers.word_selector_t[1].y"- +~("t.registers.word_selector_t[1]._y")->"t.registers.word_selector_t[1].y"+ +"t.registers.word_selector_t[2].a"&"t.registers.word_selector_t[2].b"->"t.registers.word_selector_t[2]._y"- +~("t.registers.word_selector_t[2].a"&"t.registers.word_selector_t[2].b")->"t.registers.word_selector_t[2]._y"+ +"t.registers.word_selector_t[2]._y"->"t.registers.word_selector_t[2].y"- +~("t.registers.word_selector_t[2]._y")->"t.registers.word_selector_t[2].y"+ +"t.registers.word_selector_t[3].a"&"t.registers.word_selector_t[3].b"->"t.registers.word_selector_t[3]._y"- +~("t.registers.word_selector_t[3].a"&"t.registers.word_selector_t[3].b")->"t.registers.word_selector_t[3]._y"+ +"t.registers.word_selector_t[3]._y"->"t.registers.word_selector_t[3].y"- +~("t.registers.word_selector_t[3]._y")->"t.registers.word_selector_t[3].y"+ +"t.registers.word_selector_t[4].a"&"t.registers.word_selector_t[4].b"->"t.registers.word_selector_t[4]._y"- +~("t.registers.word_selector_t[4].a"&"t.registers.word_selector_t[4].b")->"t.registers.word_selector_t[4]._y"+ +"t.registers.word_selector_t[4]._y"->"t.registers.word_selector_t[4].y"- +~("t.registers.word_selector_t[4]._y")->"t.registers.word_selector_t[4].y"+ +"t.registers.word_selector_t[5].a"&"t.registers.word_selector_t[5].b"->"t.registers.word_selector_t[5]._y"- +~("t.registers.word_selector_t[5].a"&"t.registers.word_selector_t[5].b")->"t.registers.word_selector_t[5]._y"+ +"t.registers.word_selector_t[5]._y"->"t.registers.word_selector_t[5].y"- +~("t.registers.word_selector_t[5]._y")->"t.registers.word_selector_t[5].y"+ +"t.registers.word_selector_t[6].a"&"t.registers.word_selector_t[6].b"->"t.registers.word_selector_t[6]._y"- +~("t.registers.word_selector_t[6].a"&"t.registers.word_selector_t[6].b")->"t.registers.word_selector_t[6]._y"+ +"t.registers.word_selector_t[6]._y"->"t.registers.word_selector_t[6].y"- +~("t.registers.word_selector_t[6]._y")->"t.registers.word_selector_t[6].y"+ +"t.registers.word_selector_t[7].a"&"t.registers.word_selector_t[7].b"->"t.registers.word_selector_t[7]._y"- +~("t.registers.word_selector_t[7].a"&"t.registers.word_selector_t[7].b")->"t.registers.word_selector_t[7]._y"+ +"t.registers.word_selector_t[7]._y"->"t.registers.word_selector_t[7].y"- +~("t.registers.word_selector_t[7]._y")->"t.registers.word_selector_t[7].y"+ += "t.registers.word_selector_t[7].y" "t.registers.bitselector_t[1].in[3]" += "t.registers.word_selector_t[6].y" "t.registers.bitselector_t[0].in[3]" += "t.registers.word_selector_t[5].y" "t.registers.bitselector_t[1].in[2]" += "t.registers.word_selector_t[4].y" "t.registers.bitselector_t[0].in[2]" += "t.registers.word_selector_t[3].y" "t.registers.bitselector_t[1].in[1]" += "t.registers.word_selector_t[2].y" "t.registers.bitselector_t[0].in[1]" += "t.registers.word_selector_t[1].y" "t.registers.bitselector_t[1].in[0]" += "t.registers.word_selector_t[0].y" "t.registers.bitselector_t[0].in[0]" +"t.registers.ack_write_and.a"&"t.registers.ack_write_and.b"->"t.registers.ack_write_and._y"- +~("t.registers.ack_write_and.a"&"t.registers.ack_write_and.b")->"t.registers.ack_write_and._y"+ +"t.registers.ack_write_and._y"->"t.registers.ack_write_and.y"- +~("t.registers.ack_write_and._y")->"t.registers.ack_write_and.y"+ +"t.registers.ff[0].clk_B"->"t.registers.ff[0]._clk_B"- +~("t.registers.ff[0].clk_B")->"t.registers.ff[0]._clk_B"+ +"t.registers.ff[0]._clk_B"->"t.registers.ff[0].__clk_B"- +~("t.registers.ff[0]._clk_B")->"t.registers.ff[0].__clk_B"+ +~"t.registers.ff[0].d"&~"t.registers.ff[0]._clk_B"|~"t.registers.ff[0].reset_B"|~"t.registers.ff[0].__clk_B"&~"t.registers.ff[0]._mqi"->"t.registers.ff[0]._mqib"+ +("t.registers.ff[0].d"&"t.registers.ff[0].__clk_B"|"t.registers.ff[0]._mqi"&"t.registers.ff[0]._clk_B")&"t.registers.ff[0].reset_B"->"t.registers.ff[0]._mqib"- +"t.registers.ff[0]._mqib"->"t.registers.ff[0]._mqi"- +~("t.registers.ff[0]._mqib")->"t.registers.ff[0]._mqi"+ +~"t.registers.ff[0]._mqi"&~"t.registers.ff[0].__clk_B"|~"t.registers.ff[0].reset_B"|~"t.registers.ff[0]._sqi"&~"t.registers.ff[0]._clk_B"->"t.registers.ff[0]._sqib"+ +("t.registers.ff[0]._mqi"&"t.registers.ff[0]._clk_B"|"t.registers.ff[0]._sqi"&"t.registers.ff[0].__clk_B")&"t.registers.ff[0].reset_B"->"t.registers.ff[0]._sqib"- +"t.registers.ff[0]._sqib"->"t.registers.ff[0]._sqi"- +~("t.registers.ff[0]._sqib")->"t.registers.ff[0]._sqi"+ +"t.registers.ff[0]._sqib"->"t.registers.ff[0].q"- +~("t.registers.ff[0]._sqib")->"t.registers.ff[0].q"+ +"t.registers.ff[0].q"->"t.registers.ff[0].q_B"- +~("t.registers.ff[0].q")->"t.registers.ff[0].q_B"+ +"t.registers.ff[1].clk_B"->"t.registers.ff[1]._clk_B"- +~("t.registers.ff[1].clk_B")->"t.registers.ff[1]._clk_B"+ +"t.registers.ff[1]._clk_B"->"t.registers.ff[1].__clk_B"- +~("t.registers.ff[1]._clk_B")->"t.registers.ff[1].__clk_B"+ +~"t.registers.ff[1].d"&~"t.registers.ff[1]._clk_B"|~"t.registers.ff[1].reset_B"|~"t.registers.ff[1].__clk_B"&~"t.registers.ff[1]._mqi"->"t.registers.ff[1]._mqib"+ +("t.registers.ff[1].d"&"t.registers.ff[1].__clk_B"|"t.registers.ff[1]._mqi"&"t.registers.ff[1]._clk_B")&"t.registers.ff[1].reset_B"->"t.registers.ff[1]._mqib"- +"t.registers.ff[1]._mqib"->"t.registers.ff[1]._mqi"- +~("t.registers.ff[1]._mqib")->"t.registers.ff[1]._mqi"+ +~"t.registers.ff[1]._mqi"&~"t.registers.ff[1].__clk_B"|~"t.registers.ff[1].reset_B"|~"t.registers.ff[1]._sqi"&~"t.registers.ff[1]._clk_B"->"t.registers.ff[1]._sqib"+ +("t.registers.ff[1]._mqi"&"t.registers.ff[1]._clk_B"|"t.registers.ff[1]._sqi"&"t.registers.ff[1].__clk_B")&"t.registers.ff[1].reset_B"->"t.registers.ff[1]._sqib"- +"t.registers.ff[1]._sqib"->"t.registers.ff[1]._sqi"- +~("t.registers.ff[1]._sqib")->"t.registers.ff[1]._sqi"+ +"t.registers.ff[1]._sqib"->"t.registers.ff[1].q"- +~("t.registers.ff[1]._sqib")->"t.registers.ff[1].q"+ +"t.registers.ff[1].q"->"t.registers.ff[1].q_B"- +~("t.registers.ff[1].q")->"t.registers.ff[1].q_B"+ +"t.registers.ff[2].clk_B"->"t.registers.ff[2]._clk_B"- +~("t.registers.ff[2].clk_B")->"t.registers.ff[2]._clk_B"+ +"t.registers.ff[2]._clk_B"->"t.registers.ff[2].__clk_B"- +~("t.registers.ff[2]._clk_B")->"t.registers.ff[2].__clk_B"+ +~"t.registers.ff[2].d"&~"t.registers.ff[2]._clk_B"|~"t.registers.ff[2].reset_B"|~"t.registers.ff[2].__clk_B"&~"t.registers.ff[2]._mqi"->"t.registers.ff[2]._mqib"+ +("t.registers.ff[2].d"&"t.registers.ff[2].__clk_B"|"t.registers.ff[2]._mqi"&"t.registers.ff[2]._clk_B")&"t.registers.ff[2].reset_B"->"t.registers.ff[2]._mqib"- +"t.registers.ff[2]._mqib"->"t.registers.ff[2]._mqi"- +~("t.registers.ff[2]._mqib")->"t.registers.ff[2]._mqi"+ +~"t.registers.ff[2]._mqi"&~"t.registers.ff[2].__clk_B"|~"t.registers.ff[2].reset_B"|~"t.registers.ff[2]._sqi"&~"t.registers.ff[2]._clk_B"->"t.registers.ff[2]._sqib"+ +("t.registers.ff[2]._mqi"&"t.registers.ff[2]._clk_B"|"t.registers.ff[2]._sqi"&"t.registers.ff[2].__clk_B")&"t.registers.ff[2].reset_B"->"t.registers.ff[2]._sqib"- +"t.registers.ff[2]._sqib"->"t.registers.ff[2]._sqi"- +~("t.registers.ff[2]._sqib")->"t.registers.ff[2]._sqi"+ +"t.registers.ff[2]._sqib"->"t.registers.ff[2].q"- +~("t.registers.ff[2]._sqib")->"t.registers.ff[2].q"+ +"t.registers.ff[2].q"->"t.registers.ff[2].q_B"- +~("t.registers.ff[2].q")->"t.registers.ff[2].q_B"+ +"t.registers.ff[3].clk_B"->"t.registers.ff[3]._clk_B"- +~("t.registers.ff[3].clk_B")->"t.registers.ff[3]._clk_B"+ +"t.registers.ff[3]._clk_B"->"t.registers.ff[3].__clk_B"- +~("t.registers.ff[3]._clk_B")->"t.registers.ff[3].__clk_B"+ +~"t.registers.ff[3].d"&~"t.registers.ff[3]._clk_B"|~"t.registers.ff[3].reset_B"|~"t.registers.ff[3].__clk_B"&~"t.registers.ff[3]._mqi"->"t.registers.ff[3]._mqib"+ +("t.registers.ff[3].d"&"t.registers.ff[3].__clk_B"|"t.registers.ff[3]._mqi"&"t.registers.ff[3]._clk_B")&"t.registers.ff[3].reset_B"->"t.registers.ff[3]._mqib"- +"t.registers.ff[3]._mqib"->"t.registers.ff[3]._mqi"- +~("t.registers.ff[3]._mqib")->"t.registers.ff[3]._mqi"+ +~"t.registers.ff[3]._mqi"&~"t.registers.ff[3].__clk_B"|~"t.registers.ff[3].reset_B"|~"t.registers.ff[3]._sqi"&~"t.registers.ff[3]._clk_B"->"t.registers.ff[3]._sqib"+ +("t.registers.ff[3]._mqi"&"t.registers.ff[3]._clk_B"|"t.registers.ff[3]._sqi"&"t.registers.ff[3].__clk_B")&"t.registers.ff[3].reset_B"->"t.registers.ff[3]._sqib"- +"t.registers.ff[3]._sqib"->"t.registers.ff[3]._sqi"- +~("t.registers.ff[3]._sqib")->"t.registers.ff[3]._sqi"+ +"t.registers.ff[3]._sqib"->"t.registers.ff[3].q"- +~("t.registers.ff[3]._sqib")->"t.registers.ff[3].q"+ +"t.registers.ff[3].q"->"t.registers.ff[3].q_B"- +~("t.registers.ff[3].q")->"t.registers.ff[3].q_B"+ +"t.registers.ff[4].clk_B"->"t.registers.ff[4]._clk_B"- +~("t.registers.ff[4].clk_B")->"t.registers.ff[4]._clk_B"+ +"t.registers.ff[4]._clk_B"->"t.registers.ff[4].__clk_B"- +~("t.registers.ff[4]._clk_B")->"t.registers.ff[4].__clk_B"+ +~"t.registers.ff[4].d"&~"t.registers.ff[4]._clk_B"|~"t.registers.ff[4].reset_B"|~"t.registers.ff[4].__clk_B"&~"t.registers.ff[4]._mqi"->"t.registers.ff[4]._mqib"+ +("t.registers.ff[4].d"&"t.registers.ff[4].__clk_B"|"t.registers.ff[4]._mqi"&"t.registers.ff[4]._clk_B")&"t.registers.ff[4].reset_B"->"t.registers.ff[4]._mqib"- +"t.registers.ff[4]._mqib"->"t.registers.ff[4]._mqi"- +~("t.registers.ff[4]._mqib")->"t.registers.ff[4]._mqi"+ +~"t.registers.ff[4]._mqi"&~"t.registers.ff[4].__clk_B"|~"t.registers.ff[4].reset_B"|~"t.registers.ff[4]._sqi"&~"t.registers.ff[4]._clk_B"->"t.registers.ff[4]._sqib"+ +("t.registers.ff[4]._mqi"&"t.registers.ff[4]._clk_B"|"t.registers.ff[4]._sqi"&"t.registers.ff[4].__clk_B")&"t.registers.ff[4].reset_B"->"t.registers.ff[4]._sqib"- +"t.registers.ff[4]._sqib"->"t.registers.ff[4]._sqi"- +~("t.registers.ff[4]._sqib")->"t.registers.ff[4]._sqi"+ +"t.registers.ff[4]._sqib"->"t.registers.ff[4].q"- +~("t.registers.ff[4]._sqib")->"t.registers.ff[4].q"+ +"t.registers.ff[4].q"->"t.registers.ff[4].q_B"- +~("t.registers.ff[4].q")->"t.registers.ff[4].q_B"+ +"t.registers.ff[5].clk_B"->"t.registers.ff[5]._clk_B"- +~("t.registers.ff[5].clk_B")->"t.registers.ff[5]._clk_B"+ +"t.registers.ff[5]._clk_B"->"t.registers.ff[5].__clk_B"- +~("t.registers.ff[5]._clk_B")->"t.registers.ff[5].__clk_B"+ +~"t.registers.ff[5].d"&~"t.registers.ff[5]._clk_B"|~"t.registers.ff[5].reset_B"|~"t.registers.ff[5].__clk_B"&~"t.registers.ff[5]._mqi"->"t.registers.ff[5]._mqib"+ +("t.registers.ff[5].d"&"t.registers.ff[5].__clk_B"|"t.registers.ff[5]._mqi"&"t.registers.ff[5]._clk_B")&"t.registers.ff[5].reset_B"->"t.registers.ff[5]._mqib"- +"t.registers.ff[5]._mqib"->"t.registers.ff[5]._mqi"- +~("t.registers.ff[5]._mqib")->"t.registers.ff[5]._mqi"+ +~"t.registers.ff[5]._mqi"&~"t.registers.ff[5].__clk_B"|~"t.registers.ff[5].reset_B"|~"t.registers.ff[5]._sqi"&~"t.registers.ff[5]._clk_B"->"t.registers.ff[5]._sqib"+ +("t.registers.ff[5]._mqi"&"t.registers.ff[5]._clk_B"|"t.registers.ff[5]._sqi"&"t.registers.ff[5].__clk_B")&"t.registers.ff[5].reset_B"->"t.registers.ff[5]._sqib"- +"t.registers.ff[5]._sqib"->"t.registers.ff[5]._sqi"- +~("t.registers.ff[5]._sqib")->"t.registers.ff[5]._sqi"+ +"t.registers.ff[5]._sqib"->"t.registers.ff[5].q"- +~("t.registers.ff[5]._sqib")->"t.registers.ff[5].q"+ +"t.registers.ff[5].q"->"t.registers.ff[5].q_B"- +~("t.registers.ff[5].q")->"t.registers.ff[5].q_B"+ +"t.registers.ff[6].clk_B"->"t.registers.ff[6]._clk_B"- +~("t.registers.ff[6].clk_B")->"t.registers.ff[6]._clk_B"+ +"t.registers.ff[6]._clk_B"->"t.registers.ff[6].__clk_B"- +~("t.registers.ff[6]._clk_B")->"t.registers.ff[6].__clk_B"+ +~"t.registers.ff[6].d"&~"t.registers.ff[6]._clk_B"|~"t.registers.ff[6].reset_B"|~"t.registers.ff[6].__clk_B"&~"t.registers.ff[6]._mqi"->"t.registers.ff[6]._mqib"+ +("t.registers.ff[6].d"&"t.registers.ff[6].__clk_B"|"t.registers.ff[6]._mqi"&"t.registers.ff[6]._clk_B")&"t.registers.ff[6].reset_B"->"t.registers.ff[6]._mqib"- +"t.registers.ff[6]._mqib"->"t.registers.ff[6]._mqi"- +~("t.registers.ff[6]._mqib")->"t.registers.ff[6]._mqi"+ +~"t.registers.ff[6]._mqi"&~"t.registers.ff[6].__clk_B"|~"t.registers.ff[6].reset_B"|~"t.registers.ff[6]._sqi"&~"t.registers.ff[6]._clk_B"->"t.registers.ff[6]._sqib"+ +("t.registers.ff[6]._mqi"&"t.registers.ff[6]._clk_B"|"t.registers.ff[6]._sqi"&"t.registers.ff[6].__clk_B")&"t.registers.ff[6].reset_B"->"t.registers.ff[6]._sqib"- +"t.registers.ff[6]._sqib"->"t.registers.ff[6]._sqi"- +~("t.registers.ff[6]._sqib")->"t.registers.ff[6]._sqi"+ +"t.registers.ff[6]._sqib"->"t.registers.ff[6].q"- +~("t.registers.ff[6]._sqib")->"t.registers.ff[6].q"+ +"t.registers.ff[6].q"->"t.registers.ff[6].q_B"- +~("t.registers.ff[6].q")->"t.registers.ff[6].q_B"+ +"t.registers.ff[7].clk_B"->"t.registers.ff[7]._clk_B"- +~("t.registers.ff[7].clk_B")->"t.registers.ff[7]._clk_B"+ +"t.registers.ff[7]._clk_B"->"t.registers.ff[7].__clk_B"- +~("t.registers.ff[7]._clk_B")->"t.registers.ff[7].__clk_B"+ +~"t.registers.ff[7].d"&~"t.registers.ff[7]._clk_B"|~"t.registers.ff[7].reset_B"|~"t.registers.ff[7].__clk_B"&~"t.registers.ff[7]._mqi"->"t.registers.ff[7]._mqib"+ +("t.registers.ff[7].d"&"t.registers.ff[7].__clk_B"|"t.registers.ff[7]._mqi"&"t.registers.ff[7]._clk_B")&"t.registers.ff[7].reset_B"->"t.registers.ff[7]._mqib"- +"t.registers.ff[7]._mqib"->"t.registers.ff[7]._mqi"- +~("t.registers.ff[7]._mqib")->"t.registers.ff[7]._mqi"+ +~"t.registers.ff[7]._mqi"&~"t.registers.ff[7].__clk_B"|~"t.registers.ff[7].reset_B"|~"t.registers.ff[7]._sqi"&~"t.registers.ff[7]._clk_B"->"t.registers.ff[7]._sqib"+ +("t.registers.ff[7]._mqi"&"t.registers.ff[7]._clk_B"|"t.registers.ff[7]._sqi"&"t.registers.ff[7].__clk_B")&"t.registers.ff[7].reset_B"->"t.registers.ff[7]._sqib"- +"t.registers.ff[7]._sqib"->"t.registers.ff[7]._sqi"- +~("t.registers.ff[7]._sqib")->"t.registers.ff[7]._sqi"+ +"t.registers.ff[7]._sqib"->"t.registers.ff[7].q"- +~("t.registers.ff[7]._sqib")->"t.registers.ff[7].q"+ +"t.registers.ff[7].q"->"t.registers.ff[7].q_B"- +~("t.registers.ff[7].q")->"t.registers.ff[7].q_B"+ += "t.registers.ff[7].clk_B" "t.registers.clock_buffer[3].out[1]" += "t.registers.ff[7].clk_B" "t.registers.clock_buffer[3].out[0]" += "t.registers.ff[7].clk_B" "t.registers.ff[6].clk_B" += "t.registers.ff[7].q_B" "t.registers.word_selector_f[7].b" += "t.registers.ff[6].q_B" "t.registers.word_selector_f[6].b" += "t.registers.ff[5].clk_B" "t.registers.clock_buffer[2].out[1]" += "t.registers.ff[5].clk_B" "t.registers.clock_buffer[2].out[0]" += "t.registers.ff[5].clk_B" "t.registers.ff[4].clk_B" += "t.registers.ff[5].q_B" "t.registers.word_selector_f[5].b" += "t.registers.ff[4].q_B" "t.registers.word_selector_f[4].b" += "t.registers.ff[3].clk_B" "t.registers.clock_buffer[1].out[1]" += "t.registers.ff[3].clk_B" "t.registers.clock_buffer[1].out[0]" += "t.registers.ff[3].clk_B" "t.registers.ff[2].clk_B" += "t.registers.ff[3].q_B" "t.registers.word_selector_f[3].b" += "t.registers.ff[2].q_B" "t.registers.word_selector_f[2].b" += "t.registers.ff[1].clk_B" "t.registers.clock_buffer[0].out[1]" += "t.registers.ff[1].clk_B" "t.registers.clock_buffer[0].out[0]" += "t.registers.ff[1].clk_B" "t.registers.ff[0].clk_B" += "t.registers.ff[1].q_B" "t.registers.word_selector_f[1].b" += "t.registers.ff[0].q_B" "t.registers.word_selector_f[0].b" = "t.registers._clock_temp_inv" "t.registers.clk_X.in" = "t.registers._clock_temp_inv" "t.registers.inv_clk.y" = "t.registers.reset_mem_B" "t.registers.reset_buf_BXX.a" @@ -233,103 +304,11 @@ ~("t.registers.clk_X.buf1._y")->"t.registers.clk_X.buf1.y"+ = "t.registers.clk_X.supply.vdd" "t.registers.clk_X.buf1.vdd" = "t.registers.clk_X.supply.vss" "t.registers.clk_X.buf1.vss" -= "t.registers.clk_X.out" "t.registers.clk_X.buf1.y" += "t.registers.clk_X.out[0]" "t.registers.clk_X.out[3]" += "t.registers.clk_X.out[0]" "t.registers.clk_X.out[2]" += "t.registers.clk_X.out[0]" "t.registers.clk_X.out[1]" += "t.registers.clk_X.out[0]" "t.registers.clk_X.buf1.y" = "t.registers.clk_X.in" "t.registers.clk_X.buf1.a" -~"t.registers.val_input_read.ct.C2Els[0].c1"&~"t.registers.val_input_read.ct.C2Els[0].c2"->"t.registers.val_input_read.ct.C2Els[0]._y"+ -"t.registers.val_input_read.ct.C2Els[0].c1"&"t.registers.val_input_read.ct.C2Els[0].c2"->"t.registers.val_input_read.ct.C2Els[0]._y"- -"t.registers.val_input_read.ct.C2Els[0]._y"->"t.registers.val_input_read.ct.C2Els[0].y"- -~("t.registers.val_input_read.ct.C2Els[0]._y")->"t.registers.val_input_read.ct.C2Els[0].y"+ -~"t.registers.val_input_read.ct.C2Els[1].c1"&~"t.registers.val_input_read.ct.C2Els[1].c2"->"t.registers.val_input_read.ct.C2Els[1]._y"+ -"t.registers.val_input_read.ct.C2Els[1].c1"&"t.registers.val_input_read.ct.C2Els[1].c2"->"t.registers.val_input_read.ct.C2Els[1]._y"- -"t.registers.val_input_read.ct.C2Els[1]._y"->"t.registers.val_input_read.ct.C2Els[1].y"- -~("t.registers.val_input_read.ct.C2Els[1]._y")->"t.registers.val_input_read.ct.C2Els[1].y"+ -~"t.registers.val_input_read.ct.C2Els[2].c1"&~"t.registers.val_input_read.ct.C2Els[2].c2"->"t.registers.val_input_read.ct.C2Els[2]._y"+ -"t.registers.val_input_read.ct.C2Els[2].c1"&"t.registers.val_input_read.ct.C2Els[2].c2"->"t.registers.val_input_read.ct.C2Els[2]._y"- -"t.registers.val_input_read.ct.C2Els[2]._y"->"t.registers.val_input_read.ct.C2Els[2].y"- -~("t.registers.val_input_read.ct.C2Els[2]._y")->"t.registers.val_input_read.ct.C2Els[2].y"+ -= "t.registers.val_input_read.ct.tmp[4]" "t.registers.val_input_read.ct.C2Els[2].c1" -= "t.registers.val_input_read.ct.tmp[4]" "t.registers.val_input_read.ct.C2Els[0].y" -= "t.registers.val_input_read.ct.tmp[5]" "t.registers.val_input_read.ct.C2Els[2].c2" -= "t.registers.val_input_read.ct.tmp[5]" "t.registers.val_input_read.ct.C2Els[1].y" -= "t.registers.val_input_read.ct.supply.vdd" "t.registers.val_input_read.ct.C2Els[2].vdd" -= "t.registers.val_input_read.ct.supply.vdd" "t.registers.val_input_read.ct.C2Els[1].vdd" -= "t.registers.val_input_read.ct.supply.vdd" "t.registers.val_input_read.ct.C2Els[0].vdd" -= "t.registers.val_input_read.ct.supply.vss" "t.registers.val_input_read.ct.C2Els[2].vss" -= "t.registers.val_input_read.ct.supply.vss" "t.registers.val_input_read.ct.C2Els[1].vss" -= "t.registers.val_input_read.ct.supply.vss" "t.registers.val_input_read.ct.C2Els[0].vss" -= "t.registers.val_input_read.ct.in[0]" "t.registers.val_input_read.ct.C2Els[0].c1" -= "t.registers.val_input_read.ct.in[0]" "t.registers.val_input_read.ct.tmp[0]" -= "t.registers.val_input_read.ct.in[1]" "t.registers.val_input_read.ct.C2Els[0].c2" -= "t.registers.val_input_read.ct.in[1]" "t.registers.val_input_read.ct.tmp[1]" -= "t.registers.val_input_read.ct.in[2]" "t.registers.val_input_read.ct.C2Els[1].c1" -= "t.registers.val_input_read.ct.in[2]" "t.registers.val_input_read.ct.tmp[2]" -= "t.registers.val_input_read.ct.in[3]" "t.registers.val_input_read.ct.C2Els[1].c2" -= "t.registers.val_input_read.ct.in[3]" "t.registers.val_input_read.ct.tmp[3]" -= "t.registers.val_input_read.ct.out" "t.registers.val_input_read.ct.C2Els[2].y" -= "t.registers.val_input_read.ct.out" "t.registers.val_input_read.ct.tmp[6]" -= "t.registers.val_input_read.ct.in[0]" "t.registers.val_input_read.OR2_tf[0].y" -= "t.registers.val_input_read.ct.in[1]" "t.registers.val_input_read.OR2_tf[1].y" -= "t.registers.val_input_read.ct.in[2]" "t.registers.val_input_read.OR2_tf[2].y" -= "t.registers.val_input_read.ct.in[3]" "t.registers.val_input_read.OR2_tf[3].y" -"t.registers.val_input_read.OR2_tf[0].a"|"t.registers.val_input_read.OR2_tf[0].b"->"t.registers.val_input_read.OR2_tf[0]._y"- -~("t.registers.val_input_read.OR2_tf[0].a"|"t.registers.val_input_read.OR2_tf[0].b")->"t.registers.val_input_read.OR2_tf[0]._y"+ -"t.registers.val_input_read.OR2_tf[0]._y"->"t.registers.val_input_read.OR2_tf[0].y"- -~("t.registers.val_input_read.OR2_tf[0]._y")->"t.registers.val_input_read.OR2_tf[0].y"+ -"t.registers.val_input_read.OR2_tf[1].a"|"t.registers.val_input_read.OR2_tf[1].b"->"t.registers.val_input_read.OR2_tf[1]._y"- -~("t.registers.val_input_read.OR2_tf[1].a"|"t.registers.val_input_read.OR2_tf[1].b")->"t.registers.val_input_read.OR2_tf[1]._y"+ -"t.registers.val_input_read.OR2_tf[1]._y"->"t.registers.val_input_read.OR2_tf[1].y"- -~("t.registers.val_input_read.OR2_tf[1]._y")->"t.registers.val_input_read.OR2_tf[1].y"+ -"t.registers.val_input_read.OR2_tf[2].a"|"t.registers.val_input_read.OR2_tf[2].b"->"t.registers.val_input_read.OR2_tf[2]._y"- -~("t.registers.val_input_read.OR2_tf[2].a"|"t.registers.val_input_read.OR2_tf[2].b")->"t.registers.val_input_read.OR2_tf[2]._y"+ -"t.registers.val_input_read.OR2_tf[2]._y"->"t.registers.val_input_read.OR2_tf[2].y"- -~("t.registers.val_input_read.OR2_tf[2]._y")->"t.registers.val_input_read.OR2_tf[2].y"+ -"t.registers.val_input_read.OR2_tf[3].a"|"t.registers.val_input_read.OR2_tf[3].b"->"t.registers.val_input_read.OR2_tf[3]._y"- -~("t.registers.val_input_read.OR2_tf[3].a"|"t.registers.val_input_read.OR2_tf[3].b")->"t.registers.val_input_read.OR2_tf[3]._y"+ -"t.registers.val_input_read.OR2_tf[3]._y"->"t.registers.val_input_read.OR2_tf[3].y"- -~("t.registers.val_input_read.OR2_tf[3]._y")->"t.registers.val_input_read.OR2_tf[3].y"+ -= "t.registers.val_input_read.supply.vss" "t.registers.val_input_read.ct.supply.vss" -= "t.registers.val_input_read.supply.vdd" "t.registers.val_input_read.ct.supply.vdd" -= "t.registers.val_input_read.supply.vdd" "t.registers.val_input_read.OR2_tf[3].vdd" -= "t.registers.val_input_read.supply.vdd" "t.registers.val_input_read.OR2_tf[2].vdd" -= "t.registers.val_input_read.supply.vdd" "t.registers.val_input_read.OR2_tf[1].vdd" -= "t.registers.val_input_read.supply.vdd" "t.registers.val_input_read.OR2_tf[0].vdd" -= "t.registers.val_input_read.supply.vss" "t.registers.val_input_read.OR2_tf[3].vss" -= "t.registers.val_input_read.supply.vss" "t.registers.val_input_read.OR2_tf[2].vss" -= "t.registers.val_input_read.supply.vss" "t.registers.val_input_read.OR2_tf[1].vss" -= "t.registers.val_input_read.supply.vss" "t.registers.val_input_read.OR2_tf[0].vss" -= "t.registers.val_input_read.out" "t.registers.val_input_read.ct.out" -= "t.registers.val_input_read.in.d[0].d[0]" "t.registers.val_input_read.in.d[0].f" -= "t.registers.val_input_read.in.d[0].d[1]" "t.registers.val_input_read.in.d[0].t" -= "t.registers.val_input_read.in.d[1].d[0]" "t.registers.val_input_read.in.d[1].f" -= "t.registers.val_input_read.in.d[1].d[1]" "t.registers.val_input_read.in.d[1].t" -= "t.registers.val_input_read.in.d[2].d[0]" "t.registers.val_input_read.in.d[2].f" -= "t.registers.val_input_read.in.d[2].d[1]" "t.registers.val_input_read.in.d[2].t" -= "t.registers.val_input_read.in.d[3].d[0]" "t.registers.val_input_read.in.d[3].f" -= "t.registers.val_input_read.in.d[3].d[1]" "t.registers.val_input_read.in.d[3].t" -= "t.registers.val_input_read.in.d[3].d[0]" "t.registers.val_input_read.in.d[3].f" -= "t.registers.val_input_read.in.d[3].d[1]" "t.registers.val_input_read.in.d[3].t" -= "t.registers.val_input_read.in.d[2].d[0]" "t.registers.val_input_read.in.d[2].f" -= "t.registers.val_input_read.in.d[2].d[1]" "t.registers.val_input_read.in.d[2].t" -= "t.registers.val_input_read.in.d[1].d[0]" "t.registers.val_input_read.in.d[1].f" -= "t.registers.val_input_read.in.d[1].d[1]" "t.registers.val_input_read.in.d[1].t" -= "t.registers.val_input_read.in.d[0].d[0]" "t.registers.val_input_read.in.d[0].f" -= "t.registers.val_input_read.in.d[0].d[1]" "t.registers.val_input_read.in.d[0].t" -= "t.registers.val_input_read.in.d[3].d[0]" "t.registers.val_input_read.OR2_tf[3].b" -= "t.registers.val_input_read.in.d[3].d[0]" "t.registers.val_input_read.in.d[3].f" -= "t.registers.val_input_read.in.d[3].d[1]" "t.registers.val_input_read.OR2_tf[3].a" -= "t.registers.val_input_read.in.d[3].d[1]" "t.registers.val_input_read.in.d[3].t" -= "t.registers.val_input_read.in.d[2].d[0]" "t.registers.val_input_read.OR2_tf[2].b" -= "t.registers.val_input_read.in.d[2].d[0]" "t.registers.val_input_read.in.d[2].f" -= "t.registers.val_input_read.in.d[2].d[1]" "t.registers.val_input_read.OR2_tf[2].a" -= "t.registers.val_input_read.in.d[2].d[1]" "t.registers.val_input_read.in.d[2].t" -= "t.registers.val_input_read.in.d[1].d[0]" "t.registers.val_input_read.OR2_tf[1].b" -= "t.registers.val_input_read.in.d[1].d[0]" "t.registers.val_input_read.in.d[1].f" -= "t.registers.val_input_read.in.d[1].d[1]" "t.registers.val_input_read.OR2_tf[1].a" -= "t.registers.val_input_read.in.d[1].d[1]" "t.registers.val_input_read.in.d[1].t" -= "t.registers.val_input_read.in.d[0].d[0]" "t.registers.val_input_read.OR2_tf[0].b" -= "t.registers.val_input_read.in.d[0].d[0]" "t.registers.val_input_read.in.d[0].f" -= "t.registers.val_input_read.in.d[0].d[1]" "t.registers.val_input_read.OR2_tf[0].a" -= "t.registers.val_input_read.in.d[0].d[1]" "t.registers.val_input_read.in.d[0].t" "t.registers.reset_buf_BX.a"->"t.registers.reset_buf_BX._y"- ~("t.registers.reset_buf_BX.a")->"t.registers.reset_buf_BX._y"+ "t.registers.reset_buf_BX._y"->"t.registers.reset_buf_BX.y"- @@ -364,393 +343,205 @@ = "t.registers.in.d.d[1].d[1]" "t.registers.in.d.d[1].t" = "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f" = "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t" -= "t.registers.in.a" "t.registers.ack_and.y" -= "t.registers.in.v" "t.registers._in_temp2.v" -= "t.registers.in.d.d[0].f" "t.registers._in_temp2.d.d[0].f" -= "t.registers.in.d.d[0].t" "t.registers._in_temp2.d.d[0].t" -= "t.registers.in.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].d[0]" -= "t.registers.in.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].d[1]" -= "t.registers.in.d.d[1].f" "t.registers._in_temp2.d.d[1].f" -= "t.registers.in.d.d[1].t" "t.registers._in_temp2.d.d[1].t" -= "t.registers.in.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].d[0]" -= "t.registers.in.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].d[1]" -= "t.registers.in.d.d[2].f" "t.registers.out.d.d[2].f" -= "t.registers.in.d.d[2].t" "t.registers.out.d.d[2].t" -= "t.registers.in.d.d[2].d[0]" "t.registers.out.d.d[2].d[0]" -= "t.registers.in.d.d[2].d[1]" "t.registers.out.d.d[2].d[1]" -= "t.registers.in.d.d[2].f" "t.registers._in_temp2.d.d[2].f" -= "t.registers.in.d.d[2].t" "t.registers._in_temp2.d.d[2].t" -= "t.registers.in.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].d[0]" -= "t.registers.in.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].d[1]" -= "t.registers.in.d.d[3].f" "t.registers._in_temp2.d.d[3].f" -= "t.registers.in.d.d[3].t" "t.registers._in_temp2.d.d[3].t" -= "t.registers.in.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].d[0]" -= "t.registers.in.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].d[1]" -= "t.registers.in.d.d[4].f" "t.registers._in_flag.d.d[0].f" -= "t.registers.in.d.d[4].t" "t.registers._in_flag.d.d[0].t" -= "t.registers.in.d.d[4].d[0]" "t.registers._in_flag.d.d[0].d[0]" -= "t.registers.in.d.d[4].d[1]" "t.registers._in_flag.d.d[0].d[1]" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[7].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[6].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[5].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[4].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[3].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[2].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[1].a" -= "t.registers.in.d.d[4].d[0]" "t.registers.reading_activator_f[0].a" += "t.registers.in.d.d[0].f" "t.registers.val_input.in.d[0].f" += "t.registers.in.d.d[0].t" "t.registers.val_input.in.d[0].t" += "t.registers.in.d.d[0].d[0]" "t.registers.val_input.in.d[0].d[0]" += "t.registers.in.d.d[0].d[1]" "t.registers.val_input.in.d[0].d[1]" += "t.registers.in.d.d[1].f" "t.registers.val_input.in.d[1].f" += "t.registers.in.d.d[1].t" "t.registers.val_input.in.d[1].t" += "t.registers.in.d.d[1].d[0]" "t.registers.val_input.in.d[1].d[0]" += "t.registers.in.d.d[1].d[1]" "t.registers.val_input.in.d[1].d[1]" += "t.registers.in.d.d[2].f" "t.registers.val_input.in.d[2].f" += "t.registers.in.d.d[2].t" "t.registers.val_input.in.d[2].t" += "t.registers.in.d.d[2].d[0]" "t.registers.val_input.in.d[2].d[0]" += "t.registers.in.d.d[2].d[1]" "t.registers.val_input.in.d[2].d[1]" += "t.registers.in.d.d[3].f" "t.registers.val_input.in.d[3].f" += "t.registers.in.d.d[3].t" "t.registers.val_input.in.d[3].t" += "t.registers.in.d.d[3].d[0]" "t.registers.val_input.in.d[3].d[0]" += "t.registers.in.d.d[3].d[1]" "t.registers.val_input.in.d[3].d[1]" += "t.registers.in.d.d[4].f" "t.registers.val_input.in.d[4].f" += "t.registers.in.d.d[4].t" "t.registers.val_input.in.d[4].t" += "t.registers.in.d.d[4].d[0]" "t.registers.val_input.in.d[4].d[0]" += "t.registers.in.d.d[4].d[1]" "t.registers.val_input.in.d[4].d[1]" += "t.registers.in.a" "t.registers.ack_input_X.out" += "t.registers.in.v" "t.registers.val_input_X.out" += "t.registers.in.d.d[4].d[0]" "t.registers.ack_write_and.a" += "t.registers.in.d.d[4].d[0]" "t.registers.clk_switch.b" = "t.registers.in.d.d[4].d[0]" "t.registers.in.d.d[4].f" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[7].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[6].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[5].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[4].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[3].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[2].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[1].a" -= "t.registers.in.d.d[4].d[1]" "t.registers.reading_activator_t[0].a" += "t.registers.in.d.d[4].d[1]" "t.registers.word_to_read[3].a" += "t.registers.in.d.d[4].d[1]" "t.registers.word_to_read[2].a" += "t.registers.in.d.d[4].d[1]" "t.registers.word_to_read[1].a" += "t.registers.in.d.d[4].d[1]" "t.registers.word_to_read[0].a" += "t.registers.in.d.d[4].d[1]" "t.registers.ack_read_and.a" += "t.registers.in.d.d[4].d[1]" "t.registers.address_propagator_f[1].a" += "t.registers.in.d.d[4].d[1]" "t.registers.address_propagator_t[1].a" += "t.registers.in.d.d[4].d[1]" "t.registers.address_propagator_f[0].a" += "t.registers.in.d.d[4].d[1]" "t.registers.address_propagator_t[0].a" = "t.registers.in.d.d[4].d[1]" "t.registers.in.d.d[4].t" = "t.registers.in.d.d[3].d[0]" "t.registers.atree[1].in[1]" = "t.registers.in.d.d[3].d[0]" "t.registers.atree[0].in[1]" += "t.registers.in.d.d[3].d[0]" "t.registers.address_propagator_f[1].b" = "t.registers.in.d.d[3].d[0]" "t.registers.in.d.d[3].f" = "t.registers.in.d.d[3].d[1]" "t.registers.atree[3].in[1]" = "t.registers.in.d.d[3].d[1]" "t.registers.atree[2].in[1]" += "t.registers.in.d.d[3].d[1]" "t.registers.address_propagator_t[1].b" = "t.registers.in.d.d[3].d[1]" "t.registers.in.d.d[3].t" = "t.registers.in.d.d[2].d[0]" "t.registers.atree[2].in[0]" = "t.registers.in.d.d[2].d[0]" "t.registers.atree[0].in[0]" += "t.registers.in.d.d[2].d[0]" "t.registers.address_propagator_f[0].b" = "t.registers.in.d.d[2].d[0]" "t.registers.in.d.d[2].f" = "t.registers.in.d.d[2].d[1]" "t.registers.atree[3].in[0]" = "t.registers.in.d.d[2].d[1]" "t.registers.atree[1].in[0]" += "t.registers.in.d.d[2].d[1]" "t.registers.address_propagator_t[0].b" = "t.registers.in.d.d[2].d[1]" "t.registers.in.d.d[2].t" -= "t.registers.in.d.d[1].d[0]" "t.registers.ff_f[7].d" -= "t.registers.in.d.d[1].d[0]" "t.registers.ff_f[5].d" -= "t.registers.in.d.d[1].d[0]" "t.registers.ff_f[3].d" -= "t.registers.in.d.d[1].d[0]" "t.registers.ff_f[1].d" = "t.registers.in.d.d[1].d[0]" "t.registers.in.d.d[1].f" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff_t[7].d" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff_t[5].d" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff_t[3].d" -= "t.registers.in.d.d[1].d[1]" "t.registers.ff_t[1].d" += "t.registers.in.d.d[1].d[1]" "t.registers.ff[7].d" += "t.registers.in.d.d[1].d[1]" "t.registers.ff[5].d" += "t.registers.in.d.d[1].d[1]" "t.registers.ff[3].d" += "t.registers.in.d.d[1].d[1]" "t.registers.ff[1].d" = "t.registers.in.d.d[1].d[1]" "t.registers.in.d.d[1].t" -= "t.registers.in.d.d[0].d[0]" "t.registers.ff_f[6].d" -= "t.registers.in.d.d[0].d[0]" "t.registers.ff_f[4].d" -= "t.registers.in.d.d[0].d[0]" "t.registers.ff_f[2].d" -= "t.registers.in.d.d[0].d[0]" "t.registers.ff_f[0].d" = "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff_t[6].d" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff_t[4].d" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff_t[2].d" -= "t.registers.in.d.d[0].d[1]" "t.registers.ff_t[0].d" += "t.registers.in.d.d[0].d[1]" "t.registers.ff[6].d" += "t.registers.in.d.d[0].d[1]" "t.registers.ff[4].d" += "t.registers.in.d.d[0].d[1]" "t.registers.ff[2].d" += "t.registers.in.d.d[0].d[1]" "t.registers.ff[0].d" = "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t" -= "t.registers._in_temp2.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].f" -= "t.registers._in_temp2.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].t" -= "t.registers._in_temp2.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].f" -= "t.registers._in_temp2.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].t" -= "t.registers._in_temp2.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].f" -= "t.registers._in_temp2.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].t" -= "t.registers._in_temp2.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].f" -= "t.registers._in_temp2.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].t" -= "t.registers._in_temp2.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].f" -= "t.registers._in_temp2.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].t" -= "t.registers._in_temp2.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].f" -= "t.registers._in_temp2.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].t" -= "t.registers._in_temp2.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].f" -= "t.registers._in_temp2.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].t" -= "t.registers._in_temp2.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].f" -= "t.registers._in_temp2.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].t" -= "t.registers._in_temp2.d.d[3].d[0]" "t.registers._in_temp2.d.d[3].f" -= "t.registers._in_temp2.d.d[3].d[1]" "t.registers._in_temp2.d.d[3].t" -= "t.registers._in_temp2.d.d[2].d[0]" "t.registers._in_temp2.d.d[2].f" -= "t.registers._in_temp2.d.d[2].d[1]" "t.registers._in_temp2.d.d[2].t" -= "t.registers._in_temp2.d.d[1].d[0]" "t.registers._in_temp2.d.d[1].f" -= "t.registers._in_temp2.d.d[1].d[1]" "t.registers._in_temp2.d.d[1].t" -= "t.registers._in_temp2.d.d[0].d[0]" "t.registers._in_temp2.d.d[0].f" -= "t.registers._in_temp2.d.d[0].d[1]" "t.registers._in_temp2.d.d[0].t" -= "t.registers._in_temp2.v" "t.registers.read_write_demux.in.v" -= "t.registers._in_temp2.a" "t.registers.read_write_demux.in.a" -= "t.registers._in_temp2.d.d[0].f" "t.registers.read_write_demux.in.d.d[0].f" -= "t.registers._in_temp2.d.d[0].t" "t.registers.read_write_demux.in.d.d[0].t" -= "t.registers._in_temp2.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].d[0]" -= "t.registers._in_temp2.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].d[1]" -= "t.registers._in_temp2.d.d[1].f" "t.registers.read_write_demux.in.d.d[1].f" -= "t.registers._in_temp2.d.d[1].t" "t.registers.read_write_demux.in.d.d[1].t" -= "t.registers._in_temp2.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].d[0]" -= "t.registers._in_temp2.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].d[1]" -= "t.registers._in_temp2.d.d[2].f" "t.registers.read_write_demux.in.d.d[2].f" -= "t.registers._in_temp2.d.d[2].t" "t.registers.read_write_demux.in.d.d[2].t" -= "t.registers._in_temp2.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].d[0]" -= "t.registers._in_temp2.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].d[1]" -= "t.registers._in_temp2.d.d[3].f" "t.registers.read_write_demux.in.d.d[3].f" -= "t.registers._in_temp2.d.d[3].t" "t.registers.read_write_demux.in.d.d[3].t" -= "t.registers._in_temp2.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].d[0]" -= "t.registers._in_temp2.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].d[1]" -= "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" -= "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" -= "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" -= "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" -= "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" -= "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" -= "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" -= "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" -= "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" -= "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" -= "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" -= "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" -= "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" -= "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" -= "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" -= "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" -= "t.registers._in_read.d.d[3].d[0]" "t.registers._in_read.d.d[3].f" -= "t.registers._in_read.d.d[3].d[1]" "t.registers._in_read.d.d[3].t" -= "t.registers._in_read.d.d[2].d[0]" "t.registers._in_read.d.d[2].f" -= "t.registers._in_read.d.d[2].d[1]" "t.registers._in_read.d.d[2].t" -= "t.registers._in_read.d.d[1].d[0]" "t.registers._in_read.d.d[1].f" -= "t.registers._in_read.d.d[1].d[1]" "t.registers._in_read.d.d[1].t" -= "t.registers._in_read.d.d[0].d[0]" "t.registers._in_read.d.d[0].f" -= "t.registers._in_read.d.d[0].d[1]" "t.registers._in_read.d.d[0].t" -= "t.registers._in_read.v" "t.registers.read_write_demux.out1.v" -= "t.registers._in_read.a" "t.registers.read_write_demux.out1.a" -= "t.registers._in_read.d.d[0].f" "t.registers.read_write_demux.out1.d.d[0].f" -= "t.registers._in_read.d.d[0].t" "t.registers.read_write_demux.out1.d.d[0].t" -= "t.registers._in_read.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].d[0]" -= "t.registers._in_read.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].d[1]" -= "t.registers._in_read.d.d[1].f" "t.registers.read_write_demux.out1.d.d[1].f" -= "t.registers._in_read.d.d[1].t" "t.registers.read_write_demux.out1.d.d[1].t" -= "t.registers._in_read.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].d[0]" -= "t.registers._in_read.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].d[1]" -= "t.registers._in_read.d.d[2].f" "t.registers.read_write_demux.out1.d.d[2].f" -= "t.registers._in_read.d.d[2].t" "t.registers.read_write_demux.out1.d.d[2].t" -= "t.registers._in_read.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].d[0]" -= "t.registers._in_read.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].d[1]" -= "t.registers._in_read.d.d[3].f" "t.registers.read_write_demux.out1.d.d[3].f" -= "t.registers._in_read.d.d[3].t" "t.registers.read_write_demux.out1.d.d[3].t" -= "t.registers._in_read.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].d[0]" -= "t.registers._in_read.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].d[1]" -= "t.registers._in_read.v" "t.registers.val_input_read.out" -= "t.registers._in_write_temp.d[0].d[0]" "t.registers._in_write_temp.d[0].f" -= "t.registers._in_write_temp.d[0].d[1]" "t.registers._in_write_temp.d[0].t" -= "t.registers._in_write_temp.d[1].d[0]" "t.registers._in_write_temp.d[1].f" -= "t.registers._in_write_temp.d[1].d[1]" "t.registers._in_write_temp.d[1].t" -= "t.registers._in_write_temp.d[2].d[0]" "t.registers._in_write_temp.d[2].f" -= "t.registers._in_write_temp.d[2].d[1]" "t.registers._in_write_temp.d[2].t" -= "t.registers._in_write_temp.d[3].d[0]" "t.registers._in_write_temp.d[3].f" -= "t.registers._in_write_temp.d[3].d[1]" "t.registers._in_write_temp.d[3].t" -= "t.registers._in_write_temp.d[3].d[0]" "t.registers._in_write_temp.d[3].f" -= "t.registers._in_write_temp.d[3].d[1]" "t.registers._in_write_temp.d[3].t" -= "t.registers._in_write_temp.d[2].d[0]" "t.registers._in_write_temp.d[2].f" -= "t.registers._in_write_temp.d[2].d[1]" "t.registers._in_write_temp.d[2].t" -= "t.registers._in_write_temp.d[1].d[0]" "t.registers._in_write_temp.d[1].f" -= "t.registers._in_write_temp.d[1].d[1]" "t.registers._in_write_temp.d[1].t" -= "t.registers._in_write_temp.d[0].d[0]" "t.registers._in_write_temp.d[0].f" -= "t.registers._in_write_temp.d[0].d[1]" "t.registers._in_write_temp.d[0].t" -= "t.registers._in_write_temp.d[0].f" "t.registers.val_input_write.in.d[0].f" -= "t.registers._in_write_temp.d[0].t" "t.registers.val_input_write.in.d[0].t" -= "t.registers._in_write_temp.d[0].d[0]" "t.registers.val_input_write.in.d[0].d[0]" -= "t.registers._in_write_temp.d[0].d[1]" "t.registers.val_input_write.in.d[0].d[1]" -= "t.registers._in_write_temp.d[1].f" "t.registers.val_input_write.in.d[1].f" -= "t.registers._in_write_temp.d[1].t" "t.registers.val_input_write.in.d[1].t" -= "t.registers._in_write_temp.d[1].d[0]" "t.registers.val_input_write.in.d[1].d[0]" -= "t.registers._in_write_temp.d[1].d[1]" "t.registers.val_input_write.in.d[1].d[1]" -= "t.registers._in_write_temp.d[2].f" "t.registers.val_input_write.in.d[2].f" -= "t.registers._in_write_temp.d[2].t" "t.registers.val_input_write.in.d[2].t" -= "t.registers._in_write_temp.d[2].d[0]" "t.registers.val_input_write.in.d[2].d[0]" -= "t.registers._in_write_temp.d[2].d[1]" "t.registers.val_input_write.in.d[2].d[1]" -= "t.registers._in_write_temp.d[3].f" "t.registers.val_input_write.in.d[3].f" -= "t.registers._in_write_temp.d[3].t" "t.registers.val_input_write.in.d[3].t" -= "t.registers._in_write_temp.d[3].d[0]" "t.registers.val_input_write.in.d[3].d[0]" -= "t.registers._in_write_temp.d[3].d[1]" "t.registers.val_input_write.in.d[3].d[1]" -= "t.registers._in_write_temp.d[0].f" "t.registers._in_write.d.d[0].f" -= "t.registers._in_write_temp.d[0].t" "t.registers._in_write.d.d[0].t" -= "t.registers._in_write_temp.d[0].d[0]" "t.registers._in_write.d.d[0].d[0]" -= "t.registers._in_write_temp.d[0].d[1]" "t.registers._in_write.d.d[0].d[1]" -= "t.registers._in_write_temp.d[1].f" "t.registers._in_write.d.d[1].f" -= "t.registers._in_write_temp.d[1].t" "t.registers._in_write.d.d[1].t" -= "t.registers._in_write_temp.d[1].d[0]" "t.registers._in_write.d.d[1].d[0]" -= "t.registers._in_write_temp.d[1].d[1]" "t.registers._in_write.d.d[1].d[1]" -= "t.registers._in_write_temp.d[2].f" "t.registers._in_write.d.d[2].f" -= "t.registers._in_write_temp.d[2].t" "t.registers._in_write.d.d[2].t" -= "t.registers._in_write_temp.d[2].d[0]" "t.registers._in_write.d.d[2].d[0]" -= "t.registers._in_write_temp.d[2].d[1]" "t.registers._in_write.d.d[2].d[1]" -= "t.registers._in_write_temp.d[3].f" "t.registers._in_write.d.d[3].f" -= "t.registers._in_write_temp.d[3].t" "t.registers._in_write.d.d[3].t" -= "t.registers._in_write_temp.d[3].d[0]" "t.registers._in_write.d.d[3].d[0]" -= "t.registers._in_write_temp.d[3].d[1]" "t.registers._in_write.d.d[3].d[1]" -= "t.registers._in_write_temp.d[3].d[0]" "t.registers._in_write_temp.d[3].f" -= "t.registers._in_write_temp.d[3].d[1]" "t.registers._in_write_temp.d[3].t" -= "t.registers._in_write_temp.d[2].d[0]" "t.registers._in_write_temp.d[2].f" -= "t.registers._in_write_temp.d[2].d[1]" "t.registers._in_write_temp.d[2].t" -= "t.registers._in_write_temp.d[1].d[0]" "t.registers._in_write_temp.d[1].f" -= "t.registers._in_write_temp.d[1].d[1]" "t.registers._in_write_temp.d[1].t" -= "t.registers._in_write_temp.d[0].d[0]" "t.registers._in_write_temp.d[0].f" -= "t.registers._in_write_temp.d[0].d[1]" "t.registers._in_write_temp.d[0].t" -~"t.registers.val_input_write.ct.C2Els[0].c1"&~"t.registers.val_input_write.ct.C2Els[0].c2"->"t.registers.val_input_write.ct.C2Els[0]._y"+ -"t.registers.val_input_write.ct.C2Els[0].c1"&"t.registers.val_input_write.ct.C2Els[0].c2"->"t.registers.val_input_write.ct.C2Els[0]._y"- -"t.registers.val_input_write.ct.C2Els[0]._y"->"t.registers.val_input_write.ct.C2Els[0].y"- -~("t.registers.val_input_write.ct.C2Els[0]._y")->"t.registers.val_input_write.ct.C2Els[0].y"+ -~"t.registers.val_input_write.ct.C2Els[1].c1"&~"t.registers.val_input_write.ct.C2Els[1].c2"->"t.registers.val_input_write.ct.C2Els[1]._y"+ -"t.registers.val_input_write.ct.C2Els[1].c1"&"t.registers.val_input_write.ct.C2Els[1].c2"->"t.registers.val_input_write.ct.C2Els[1]._y"- -"t.registers.val_input_write.ct.C2Els[1]._y"->"t.registers.val_input_write.ct.C2Els[1].y"- -~("t.registers.val_input_write.ct.C2Els[1]._y")->"t.registers.val_input_write.ct.C2Els[1].y"+ -~"t.registers.val_input_write.ct.C2Els[2].c1"&~"t.registers.val_input_write.ct.C2Els[2].c2"->"t.registers.val_input_write.ct.C2Els[2]._y"+ -"t.registers.val_input_write.ct.C2Els[2].c1"&"t.registers.val_input_write.ct.C2Els[2].c2"->"t.registers.val_input_write.ct.C2Els[2]._y"- -"t.registers.val_input_write.ct.C2Els[2]._y"->"t.registers.val_input_write.ct.C2Els[2].y"- -~("t.registers.val_input_write.ct.C2Els[2]._y")->"t.registers.val_input_write.ct.C2Els[2].y"+ -= "t.registers.val_input_write.ct.tmp[4]" "t.registers.val_input_write.ct.C2Els[2].c1" -= "t.registers.val_input_write.ct.tmp[4]" "t.registers.val_input_write.ct.C2Els[0].y" -= "t.registers.val_input_write.ct.tmp[5]" "t.registers.val_input_write.ct.C2Els[2].c2" -= "t.registers.val_input_write.ct.tmp[5]" "t.registers.val_input_write.ct.C2Els[1].y" -= "t.registers.val_input_write.ct.supply.vdd" "t.registers.val_input_write.ct.C2Els[2].vdd" -= "t.registers.val_input_write.ct.supply.vdd" "t.registers.val_input_write.ct.C2Els[1].vdd" -= "t.registers.val_input_write.ct.supply.vdd" "t.registers.val_input_write.ct.C2Els[0].vdd" -= "t.registers.val_input_write.ct.supply.vss" "t.registers.val_input_write.ct.C2Els[2].vss" -= "t.registers.val_input_write.ct.supply.vss" "t.registers.val_input_write.ct.C2Els[1].vss" -= "t.registers.val_input_write.ct.supply.vss" "t.registers.val_input_write.ct.C2Els[0].vss" -= "t.registers.val_input_write.ct.in[0]" "t.registers.val_input_write.ct.C2Els[0].c1" -= "t.registers.val_input_write.ct.in[0]" "t.registers.val_input_write.ct.tmp[0]" -= "t.registers.val_input_write.ct.in[1]" "t.registers.val_input_write.ct.C2Els[0].c2" -= "t.registers.val_input_write.ct.in[1]" "t.registers.val_input_write.ct.tmp[1]" -= "t.registers.val_input_write.ct.in[2]" "t.registers.val_input_write.ct.C2Els[1].c1" -= "t.registers.val_input_write.ct.in[2]" "t.registers.val_input_write.ct.tmp[2]" -= "t.registers.val_input_write.ct.in[3]" "t.registers.val_input_write.ct.C2Els[1].c2" -= "t.registers.val_input_write.ct.in[3]" "t.registers.val_input_write.ct.tmp[3]" -= "t.registers.val_input_write.ct.out" "t.registers.val_input_write.ct.C2Els[2].y" -= "t.registers.val_input_write.ct.out" "t.registers.val_input_write.ct.tmp[6]" -= "t.registers.val_input_write.ct.in[0]" "t.registers.val_input_write.OR2_tf[0].y" -= "t.registers.val_input_write.ct.in[1]" "t.registers.val_input_write.OR2_tf[1].y" -= "t.registers.val_input_write.ct.in[2]" "t.registers.val_input_write.OR2_tf[2].y" -= "t.registers.val_input_write.ct.in[3]" "t.registers.val_input_write.OR2_tf[3].y" -"t.registers.val_input_write.OR2_tf[0].a"|"t.registers.val_input_write.OR2_tf[0].b"->"t.registers.val_input_write.OR2_tf[0]._y"- -~("t.registers.val_input_write.OR2_tf[0].a"|"t.registers.val_input_write.OR2_tf[0].b")->"t.registers.val_input_write.OR2_tf[0]._y"+ -"t.registers.val_input_write.OR2_tf[0]._y"->"t.registers.val_input_write.OR2_tf[0].y"- -~("t.registers.val_input_write.OR2_tf[0]._y")->"t.registers.val_input_write.OR2_tf[0].y"+ -"t.registers.val_input_write.OR2_tf[1].a"|"t.registers.val_input_write.OR2_tf[1].b"->"t.registers.val_input_write.OR2_tf[1]._y"- -~("t.registers.val_input_write.OR2_tf[1].a"|"t.registers.val_input_write.OR2_tf[1].b")->"t.registers.val_input_write.OR2_tf[1]._y"+ -"t.registers.val_input_write.OR2_tf[1]._y"->"t.registers.val_input_write.OR2_tf[1].y"- -~("t.registers.val_input_write.OR2_tf[1]._y")->"t.registers.val_input_write.OR2_tf[1].y"+ -"t.registers.val_input_write.OR2_tf[2].a"|"t.registers.val_input_write.OR2_tf[2].b"->"t.registers.val_input_write.OR2_tf[2]._y"- -~("t.registers.val_input_write.OR2_tf[2].a"|"t.registers.val_input_write.OR2_tf[2].b")->"t.registers.val_input_write.OR2_tf[2]._y"+ -"t.registers.val_input_write.OR2_tf[2]._y"->"t.registers.val_input_write.OR2_tf[2].y"- -~("t.registers.val_input_write.OR2_tf[2]._y")->"t.registers.val_input_write.OR2_tf[2].y"+ -"t.registers.val_input_write.OR2_tf[3].a"|"t.registers.val_input_write.OR2_tf[3].b"->"t.registers.val_input_write.OR2_tf[3]._y"- -~("t.registers.val_input_write.OR2_tf[3].a"|"t.registers.val_input_write.OR2_tf[3].b")->"t.registers.val_input_write.OR2_tf[3]._y"+ -"t.registers.val_input_write.OR2_tf[3]._y"->"t.registers.val_input_write.OR2_tf[3].y"- -~("t.registers.val_input_write.OR2_tf[3]._y")->"t.registers.val_input_write.OR2_tf[3].y"+ -= "t.registers.val_input_write.supply.vss" "t.registers.val_input_write.ct.supply.vss" -= "t.registers.val_input_write.supply.vdd" "t.registers.val_input_write.ct.supply.vdd" -= "t.registers.val_input_write.supply.vdd" "t.registers.val_input_write.OR2_tf[3].vdd" -= "t.registers.val_input_write.supply.vdd" "t.registers.val_input_write.OR2_tf[2].vdd" -= "t.registers.val_input_write.supply.vdd" "t.registers.val_input_write.OR2_tf[1].vdd" -= "t.registers.val_input_write.supply.vdd" "t.registers.val_input_write.OR2_tf[0].vdd" -= "t.registers.val_input_write.supply.vss" "t.registers.val_input_write.OR2_tf[3].vss" -= "t.registers.val_input_write.supply.vss" "t.registers.val_input_write.OR2_tf[2].vss" -= "t.registers.val_input_write.supply.vss" "t.registers.val_input_write.OR2_tf[1].vss" -= "t.registers.val_input_write.supply.vss" "t.registers.val_input_write.OR2_tf[0].vss" -= "t.registers.val_input_write.out" "t.registers.val_input_write.ct.out" -= "t.registers.val_input_write.in.d[0].d[0]" "t.registers.val_input_write.in.d[0].f" -= "t.registers.val_input_write.in.d[0].d[1]" "t.registers.val_input_write.in.d[0].t" -= "t.registers.val_input_write.in.d[1].d[0]" "t.registers.val_input_write.in.d[1].f" -= "t.registers.val_input_write.in.d[1].d[1]" "t.registers.val_input_write.in.d[1].t" -= "t.registers.val_input_write.in.d[2].d[0]" "t.registers.val_input_write.in.d[2].f" -= "t.registers.val_input_write.in.d[2].d[1]" "t.registers.val_input_write.in.d[2].t" -= "t.registers.val_input_write.in.d[3].d[0]" "t.registers.val_input_write.in.d[3].f" -= "t.registers.val_input_write.in.d[3].d[1]" "t.registers.val_input_write.in.d[3].t" -= "t.registers.val_input_write.in.d[3].d[0]" "t.registers.val_input_write.in.d[3].f" -= "t.registers.val_input_write.in.d[3].d[1]" "t.registers.val_input_write.in.d[3].t" -= "t.registers.val_input_write.in.d[2].d[0]" "t.registers.val_input_write.in.d[2].f" -= "t.registers.val_input_write.in.d[2].d[1]" "t.registers.val_input_write.in.d[2].t" -= "t.registers.val_input_write.in.d[1].d[0]" "t.registers.val_input_write.in.d[1].f" -= "t.registers.val_input_write.in.d[1].d[1]" "t.registers.val_input_write.in.d[1].t" -= "t.registers.val_input_write.in.d[0].d[0]" "t.registers.val_input_write.in.d[0].f" -= "t.registers.val_input_write.in.d[0].d[1]" "t.registers.val_input_write.in.d[0].t" -= "t.registers.val_input_write.in.d[3].d[0]" "t.registers.val_input_write.OR2_tf[3].b" -= "t.registers.val_input_write.in.d[3].d[0]" "t.registers.val_input_write.in.d[3].f" -= "t.registers.val_input_write.in.d[3].d[1]" "t.registers.val_input_write.OR2_tf[3].a" -= "t.registers.val_input_write.in.d[3].d[1]" "t.registers.val_input_write.in.d[3].t" -= "t.registers.val_input_write.in.d[2].d[0]" "t.registers.val_input_write.OR2_tf[2].b" -= "t.registers.val_input_write.in.d[2].d[0]" "t.registers.val_input_write.in.d[2].f" -= "t.registers.val_input_write.in.d[2].d[1]" "t.registers.val_input_write.OR2_tf[2].a" -= "t.registers.val_input_write.in.d[2].d[1]" "t.registers.val_input_write.in.d[2].t" -= "t.registers.val_input_write.in.d[1].d[0]" "t.registers.val_input_write.OR2_tf[1].b" -= "t.registers.val_input_write.in.d[1].d[0]" "t.registers.val_input_write.in.d[1].f" -= "t.registers.val_input_write.in.d[1].d[1]" "t.registers.val_input_write.OR2_tf[1].a" -= "t.registers.val_input_write.in.d[1].d[1]" "t.registers.val_input_write.in.d[1].t" -= "t.registers.val_input_write.in.d[0].d[0]" "t.registers.val_input_write.OR2_tf[0].b" -= "t.registers.val_input_write.in.d[0].d[0]" "t.registers.val_input_write.in.d[0].f" -= "t.registers.val_input_write.in.d[0].d[1]" "t.registers.val_input_write.OR2_tf[0].a" -= "t.registers.val_input_write.in.d[0].d[1]" "t.registers.val_input_write.in.d[0].t" -= "t.registers.reset_B" "t.registers.reset_buf_BX.a" -= "t.registers.reset_B" "t.registers.read_write_demux.reset_B" -= "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" -= "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" -= "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" -= "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" -= "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" -= "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" -= "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" -= "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" -= "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" -= "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" -= "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" -= "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" -= "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" -= "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" -= "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" -= "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" -= "t.registers._in_write.d.d[3].d[0]" "t.registers._in_write.d.d[3].f" -= "t.registers._in_write.d.d[3].d[1]" "t.registers._in_write.d.d[3].t" -= "t.registers._in_write.d.d[2].d[0]" "t.registers._in_write.d.d[2].f" -= "t.registers._in_write.d.d[2].d[1]" "t.registers._in_write.d.d[2].t" -= "t.registers._in_write.d.d[1].d[0]" "t.registers._in_write.d.d[1].f" -= "t.registers._in_write.d.d[1].d[1]" "t.registers._in_write.d.d[1].t" -= "t.registers._in_write.d.d[0].d[0]" "t.registers._in_write.d.d[0].f" -= "t.registers._in_write.d.d[0].d[1]" "t.registers._in_write.d.d[0].t" -= "t.registers._in_write.v" "t.registers.read_write_demux.out2.v" -= "t.registers._in_write.a" "t.registers.read_write_demux.out2.a" -= "t.registers._in_write.d.d[0].f" "t.registers.read_write_demux.out2.d.d[0].f" -= "t.registers._in_write.d.d[0].t" "t.registers.read_write_demux.out2.d.d[0].t" -= "t.registers._in_write.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].d[0]" -= "t.registers._in_write.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].d[1]" -= "t.registers._in_write.d.d[1].f" "t.registers.read_write_demux.out2.d.d[1].f" -= "t.registers._in_write.d.d[1].t" "t.registers.read_write_demux.out2.d.d[1].t" -= "t.registers._in_write.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].d[0]" -= "t.registers._in_write.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].d[1]" -= "t.registers._in_write.d.d[2].f" "t.registers.read_write_demux.out2.d.d[2].f" -= "t.registers._in_write.d.d[2].t" "t.registers.read_write_demux.out2.d.d[2].t" -= "t.registers._in_write.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].d[0]" -= "t.registers._in_write.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].d[1]" -= "t.registers._in_write.d.d[3].f" "t.registers.read_write_demux.out2.d.d[3].f" -= "t.registers._in_write.d.d[3].t" "t.registers.read_write_demux.out2.d.d[3].t" -= "t.registers._in_write.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].d[0]" -= "t.registers._in_write.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].d[1]" +"t.registers.word_to_read_X[0].buf1.a"->"t.registers.word_to_read_X[0].buf1._y"- +~("t.registers.word_to_read_X[0].buf1.a")->"t.registers.word_to_read_X[0].buf1._y"+ +"t.registers.word_to_read_X[0].buf1._y"->"t.registers.word_to_read_X[0].buf1.y"- +~("t.registers.word_to_read_X[0].buf1._y")->"t.registers.word_to_read_X[0].buf1.y"+ += "t.registers.word_to_read_X[0].supply.vdd" "t.registers.word_to_read_X[0].buf1.vdd" += "t.registers.word_to_read_X[0].supply.vss" "t.registers.word_to_read_X[0].buf1.vss" += "t.registers.word_to_read_X[0].out[0]" "t.registers.word_to_read_X[0].out[3]" += "t.registers.word_to_read_X[0].out[0]" "t.registers.word_to_read_X[0].out[2]" += "t.registers.word_to_read_X[0].out[0]" "t.registers.word_to_read_X[0].out[1]" += "t.registers.word_to_read_X[0].out[0]" "t.registers.word_to_read_X[0].buf1.y" += "t.registers.word_to_read_X[0].in" "t.registers.word_to_read_X[0].buf1.a" +"t.registers.word_to_read_X[1].buf1.a"->"t.registers.word_to_read_X[1].buf1._y"- +~("t.registers.word_to_read_X[1].buf1.a")->"t.registers.word_to_read_X[1].buf1._y"+ +"t.registers.word_to_read_X[1].buf1._y"->"t.registers.word_to_read_X[1].buf1.y"- +~("t.registers.word_to_read_X[1].buf1._y")->"t.registers.word_to_read_X[1].buf1.y"+ += "t.registers.word_to_read_X[1].supply.vdd" "t.registers.word_to_read_X[1].buf1.vdd" += "t.registers.word_to_read_X[1].supply.vss" "t.registers.word_to_read_X[1].buf1.vss" += "t.registers.word_to_read_X[1].out[0]" "t.registers.word_to_read_X[1].out[3]" += "t.registers.word_to_read_X[1].out[0]" "t.registers.word_to_read_X[1].out[2]" += "t.registers.word_to_read_X[1].out[0]" "t.registers.word_to_read_X[1].out[1]" += "t.registers.word_to_read_X[1].out[0]" "t.registers.word_to_read_X[1].buf1.y" += "t.registers.word_to_read_X[1].in" "t.registers.word_to_read_X[1].buf1.a" +"t.registers.word_to_read_X[2].buf1.a"->"t.registers.word_to_read_X[2].buf1._y"- +~("t.registers.word_to_read_X[2].buf1.a")->"t.registers.word_to_read_X[2].buf1._y"+ +"t.registers.word_to_read_X[2].buf1._y"->"t.registers.word_to_read_X[2].buf1.y"- +~("t.registers.word_to_read_X[2].buf1._y")->"t.registers.word_to_read_X[2].buf1.y"+ += "t.registers.word_to_read_X[2].supply.vdd" "t.registers.word_to_read_X[2].buf1.vdd" += "t.registers.word_to_read_X[2].supply.vss" "t.registers.word_to_read_X[2].buf1.vss" += "t.registers.word_to_read_X[2].out[0]" "t.registers.word_to_read_X[2].out[3]" += "t.registers.word_to_read_X[2].out[0]" "t.registers.word_to_read_X[2].out[2]" += "t.registers.word_to_read_X[2].out[0]" "t.registers.word_to_read_X[2].out[1]" += "t.registers.word_to_read_X[2].out[0]" "t.registers.word_to_read_X[2].buf1.y" += "t.registers.word_to_read_X[2].in" "t.registers.word_to_read_X[2].buf1.a" +"t.registers.word_to_read_X[3].buf1.a"->"t.registers.word_to_read_X[3].buf1._y"- +~("t.registers.word_to_read_X[3].buf1.a")->"t.registers.word_to_read_X[3].buf1._y"+ +"t.registers.word_to_read_X[3].buf1._y"->"t.registers.word_to_read_X[3].buf1.y"- +~("t.registers.word_to_read_X[3].buf1._y")->"t.registers.word_to_read_X[3].buf1.y"+ += "t.registers.word_to_read_X[3].supply.vdd" "t.registers.word_to_read_X[3].buf1.vdd" += "t.registers.word_to_read_X[3].supply.vss" "t.registers.word_to_read_X[3].buf1.vss" += "t.registers.word_to_read_X[3].out[0]" "t.registers.word_to_read_X[3].out[3]" += "t.registers.word_to_read_X[3].out[0]" "t.registers.word_to_read_X[3].out[2]" += "t.registers.word_to_read_X[3].out[0]" "t.registers.word_to_read_X[3].out[1]" += "t.registers.word_to_read_X[3].out[0]" "t.registers.word_to_read_X[3].buf1.y" += "t.registers.word_to_read_X[3].in" "t.registers.word_to_read_X[3].buf1.a" +"t.registers.ack_dly.and2[0].a"&"t.registers.ack_dly.and2[0].b"->"t.registers.ack_dly.and2[0]._y"- +~("t.registers.ack_dly.and2[0].a"&"t.registers.ack_dly.and2[0].b")->"t.registers.ack_dly.and2[0]._y"+ +"t.registers.ack_dly.and2[0]._y"->"t.registers.ack_dly.and2[0].y"- +~("t.registers.ack_dly.and2[0]._y")->"t.registers.ack_dly.and2[0].y"+ +"t.registers.ack_dly.and2[1].a"&"t.registers.ack_dly.and2[1].b"->"t.registers.ack_dly.and2[1]._y"- +~("t.registers.ack_dly.and2[1].a"&"t.registers.ack_dly.and2[1].b")->"t.registers.ack_dly.and2[1]._y"+ +"t.registers.ack_dly.and2[1]._y"->"t.registers.ack_dly.and2[1].y"- +~("t.registers.ack_dly.and2[1]._y")->"t.registers.ack_dly.and2[1].y"+ += "t.registers.ack_dly.s[0]" "t.registers.ack_dly.mu2[0].s" += "t.registers.ack_dly.s[0]" "t.registers.ack_dly.and2[0].b" += "t.registers.ack_dly.s[1]" "t.registers.ack_dly.mu2[1].s" += "t.registers.ack_dly.s[1]" "t.registers.ack_dly.and2[1].b" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.dly[2].vdd" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.dly[1].vdd" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.dly[0].vdd" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.mu2[1].vdd" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.mu2[0].vdd" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.and2[1].vdd" += "t.registers.ack_dly.supply.vdd" "t.registers.ack_dly.and2[0].vdd" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.dly[2].vss" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.dly[1].vss" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.dly[0].vss" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.mu2[1].vss" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.mu2[0].vss" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.and2[1].vss" += "t.registers.ack_dly.supply.vss" "t.registers.ack_dly.and2[0].vss" +"t.registers.ack_dly.mu2[0].s"->"t.registers.ack_dly.mu2[0]._s"- +~("t.registers.ack_dly.mu2[0].s")->"t.registers.ack_dly.mu2[0]._s"+ +~"t.registers.ack_dly.mu2[0].a"&~"t.registers.ack_dly.mu2[0].s"|~"t.registers.ack_dly.mu2[0].b"&~"t.registers.ack_dly.mu2[0]._s"->"t.registers.ack_dly.mu2[0]._y"+ +"t.registers.ack_dly.mu2[0].a"&"t.registers.ack_dly.mu2[0]._s"|"t.registers.ack_dly.mu2[0].b"&"t.registers.ack_dly.mu2[0].s"->"t.registers.ack_dly.mu2[0]._y"- +"t.registers.ack_dly.mu2[0]._y"->"t.registers.ack_dly.mu2[0].y"- +~("t.registers.ack_dly.mu2[0]._y")->"t.registers.ack_dly.mu2[0].y"+ +"t.registers.ack_dly.mu2[1].s"->"t.registers.ack_dly.mu2[1]._s"- +~("t.registers.ack_dly.mu2[1].s")->"t.registers.ack_dly.mu2[1]._s"+ +~"t.registers.ack_dly.mu2[1].a"&~"t.registers.ack_dly.mu2[1].s"|~"t.registers.ack_dly.mu2[1].b"&~"t.registers.ack_dly.mu2[1]._s"->"t.registers.ack_dly.mu2[1]._y"+ +"t.registers.ack_dly.mu2[1].a"&"t.registers.ack_dly.mu2[1]._s"|"t.registers.ack_dly.mu2[1].b"&"t.registers.ack_dly.mu2[1].s"->"t.registers.ack_dly.mu2[1]._y"- +"t.registers.ack_dly.mu2[1]._y"->"t.registers.ack_dly.mu2[1].y"- +~("t.registers.ack_dly.mu2[1]._y")->"t.registers.ack_dly.mu2[1].y"+ +"t.registers.ack_dly.dly[0].a"->"t.registers.ack_dly.dly[0]._y"- +~("t.registers.ack_dly.dly[0].a")->"t.registers.ack_dly.dly[0]._y"+ +"t.registers.ack_dly.dly[0]._y"->"t.registers.ack_dly.dly[0].__y"- +~("t.registers.ack_dly.dly[0]._y")->"t.registers.ack_dly.dly[0].__y"+ +"t.registers.ack_dly.dly[0].__y"->"t.registers.ack_dly.dly[0].___y"- +~("t.registers.ack_dly.dly[0].__y")->"t.registers.ack_dly.dly[0].___y"+ +"t.registers.ack_dly.dly[0].___y"->"t.registers.ack_dly.dly[0].y"- +~("t.registers.ack_dly.dly[0].___y")->"t.registers.ack_dly.dly[0].y"+ +"t.registers.ack_dly.dly[1].a"->"t.registers.ack_dly.dly[1]._y"- +~("t.registers.ack_dly.dly[1].a")->"t.registers.ack_dly.dly[1]._y"+ +"t.registers.ack_dly.dly[1]._y"->"t.registers.ack_dly.dly[1].__y"- +~("t.registers.ack_dly.dly[1]._y")->"t.registers.ack_dly.dly[1].__y"+ +"t.registers.ack_dly.dly[1].__y"->"t.registers.ack_dly.dly[1].___y"- +~("t.registers.ack_dly.dly[1].__y")->"t.registers.ack_dly.dly[1].___y"+ +"t.registers.ack_dly.dly[1].___y"->"t.registers.ack_dly.dly[1].y"- +~("t.registers.ack_dly.dly[1].___y")->"t.registers.ack_dly.dly[1].y"+ +"t.registers.ack_dly.dly[2].a"->"t.registers.ack_dly.dly[2]._y"- +~("t.registers.ack_dly.dly[2].a")->"t.registers.ack_dly.dly[2]._y"+ +"t.registers.ack_dly.dly[2]._y"->"t.registers.ack_dly.dly[2].__y"- +~("t.registers.ack_dly.dly[2]._y")->"t.registers.ack_dly.dly[2].__y"+ +"t.registers.ack_dly.dly[2].__y"->"t.registers.ack_dly.dly[2].___y"- +~("t.registers.ack_dly.dly[2].__y")->"t.registers.ack_dly.dly[2].___y"+ +"t.registers.ack_dly.dly[2].___y"->"t.registers.ack_dly.dly[2].y"- +~("t.registers.ack_dly.dly[2].___y")->"t.registers.ack_dly.dly[2].y"+ += "t.registers.ack_dly.dly[2].y" "t.registers.ack_dly.mu2[1].b" += "t.registers.ack_dly.dly[2].a" "t.registers.ack_dly.dly[1].y" += "t.registers.ack_dly.dly[1].a" "t.registers.ack_dly.and2[1].y" += "t.registers.ack_dly.dly[0].y" "t.registers.ack_dly.mu2[0].b" += "t.registers.ack_dly.dly[0].a" "t.registers.ack_dly.and2[0].y" += "t.registers.ack_dly._a[1]" "t.registers.ack_dly.mu2[1].a" += "t.registers.ack_dly._a[1]" "t.registers.ack_dly.and2[1].a" += "t.registers.ack_dly._a[1]" "t.registers.ack_dly.mu2[0].y" += "t.registers.ack_dly.out" "t.registers.ack_dly.mu2[1].y" += "t.registers.ack_dly.out" "t.registers.ack_dly._a[2]" += "t.registers.ack_dly.in" "t.registers.ack_dly.mu2[0].a" += "t.registers.ack_dly.in" "t.registers.ack_dly.and2[0].a" += "t.registers.ack_dly.in" "t.registers.ack_dly._a[0]" = "t.registers._reset_BX" "t.registers.reset_buf_BX.y" -= "t.registers._clock_word_temp[0]" "t.registers.clock_buffer[0].in" -= "t.registers._clock_word_temp[0]" "t.registers.and_encoder[0].y" -= "t.registers._clock_word_temp[1]" "t.registers.clock_buffer[1].in" -= "t.registers._clock_word_temp[1]" "t.registers.and_encoder[1].y" -= "t.registers._clock_word_temp[2]" "t.registers.clock_buffer[2].in" -= "t.registers._clock_word_temp[2]" "t.registers.and_encoder[2].y" -= "t.registers._clock_word_temp[3]" "t.registers.clock_buffer[3].in" -= "t.registers._clock_word_temp[3]" "t.registers.and_encoder[3].y" -= "t.registers._out_encoder[0]" "t.registers.reading_activator_f[1].c" -= "t.registers._out_encoder[0]" "t.registers.reading_activator_t[1].c" -= "t.registers._out_encoder[0]" "t.registers.reading_activator_f[0].c" -= "t.registers._out_encoder[0]" "t.registers.reading_activator_t[0].c" += "t.registers.reset_B" "t.registers.reset_buf_BX.a" += "t.registers.reset_B" "t.registers.output_buf.reset_B" +"t.registers.clk_switch.a"&"t.registers.clk_switch.b"->"t.registers.clk_switch._y"- +~("t.registers.clk_switch.a"&"t.registers.clk_switch.b")->"t.registers.clk_switch._y"+ +"t.registers.clk_switch._y"->"t.registers.clk_switch.y"- +~("t.registers.clk_switch._y")->"t.registers.clk_switch.y"+ += "t.registers._out_encoder[0]" "t.registers.word_to_read[0].b" = "t.registers._out_encoder[0]" "t.registers.and_encoder[0].a" = "t.registers._out_encoder[0]" "t.registers.atree[0].out" -= "t.registers._out_encoder[1]" "t.registers.reading_activator_f[3].c" -= "t.registers._out_encoder[1]" "t.registers.reading_activator_t[3].c" -= "t.registers._out_encoder[1]" "t.registers.reading_activator_f[2].c" -= "t.registers._out_encoder[1]" "t.registers.reading_activator_t[2].c" += "t.registers._out_encoder[1]" "t.registers.word_to_read[1].b" = "t.registers._out_encoder[1]" "t.registers.and_encoder[1].a" = "t.registers._out_encoder[1]" "t.registers.atree[1].out" -= "t.registers._out_encoder[2]" "t.registers.reading_activator_f[5].c" -= "t.registers._out_encoder[2]" "t.registers.reading_activator_t[5].c" -= "t.registers._out_encoder[2]" "t.registers.reading_activator_f[4].c" -= "t.registers._out_encoder[2]" "t.registers.reading_activator_t[4].c" += "t.registers._out_encoder[2]" "t.registers.word_to_read[2].b" = "t.registers._out_encoder[2]" "t.registers.and_encoder[2].a" = "t.registers._out_encoder[2]" "t.registers.atree[2].out" -= "t.registers._out_encoder[3]" "t.registers.reading_activator_f[7].c" -= "t.registers._out_encoder[3]" "t.registers.reading_activator_t[7].c" -= "t.registers._out_encoder[3]" "t.registers.reading_activator_f[6].c" -= "t.registers._out_encoder[3]" "t.registers.reading_activator_t[6].c" += "t.registers._out_encoder[3]" "t.registers.word_to_read[3].b" = "t.registers._out_encoder[3]" "t.registers.and_encoder[3].a" = "t.registers._out_encoder[3]" "t.registers.atree[3].out" = "t.registers._reset_mem_BXX[0]" "t.registers.reset_bufarray.out[0]" @@ -761,38 +552,14 @@ = "t.registers._reset_mem_BXX[5]" "t.registers.reset_bufarray.out[5]" = "t.registers._reset_mem_BXX[6]" "t.registers.reset_bufarray.out[6]" = "t.registers._reset_mem_BXX[7]" "t.registers.reset_bufarray.out[7]" -= "t.registers._reset_mem_BXX[8]" "t.registers.reset_bufarray.out[8]" -= "t.registers._reset_mem_BXX[9]" "t.registers.reset_bufarray.out[9]" -= "t.registers._reset_mem_BXX[10]" "t.registers.reset_bufarray.out[10]" -= "t.registers._reset_mem_BXX[11]" "t.registers.reset_bufarray.out[11]" -= "t.registers._reset_mem_BXX[12]" "t.registers.reset_bufarray.out[12]" -= "t.registers._reset_mem_BXX[13]" "t.registers.reset_bufarray.out[13]" -= "t.registers._reset_mem_BXX[14]" "t.registers.reset_bufarray.out[14]" -= "t.registers._reset_mem_BXX[15]" "t.registers.reset_bufarray.out[15]" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[7].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[7].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[6].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[6].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[5].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[5].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[4].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[4].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[3].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[3].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[2].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[2].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[1].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[1].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_f[0].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers.ff_t[0].reset_B" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[15]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[14]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[13]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[12]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[11]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[10]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[9]" -= "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[8]" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[7].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[6].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[5].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[4].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[3].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[2].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[1].reset_B" += "t.registers._reset_mem_BXX[0]" "t.registers.ff[0].reset_B" = "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[7]" = "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[6]" = "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[5]" @@ -800,118 +567,471 @@ = "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[3]" = "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[2]" = "t.registers._reset_mem_BXX[0]" "t.registers._reset_mem_BXX[1]" -"t.registers.ff_t[0].clk_B"->"t.registers.ff_t[0]._clk_B"- -~("t.registers.ff_t[0].clk_B")->"t.registers.ff_t[0]._clk_B"+ -"t.registers.ff_t[0]._clk_B"->"t.registers.ff_t[0].__clk_B"- -~("t.registers.ff_t[0]._clk_B")->"t.registers.ff_t[0].__clk_B"+ -~"t.registers.ff_t[0].d"&~"t.registers.ff_t[0]._clk_B"|~"t.registers.ff_t[0].reset_B"|~"t.registers.ff_t[0].__clk_B"&~"t.registers.ff_t[0]._mqi"->"t.registers.ff_t[0]._mqib"+ -("t.registers.ff_t[0].d"&"t.registers.ff_t[0].__clk_B"|"t.registers.ff_t[0]._mqi"&"t.registers.ff_t[0]._clk_B")&"t.registers.ff_t[0].reset_B"->"t.registers.ff_t[0]._mqib"- -"t.registers.ff_t[0]._mqib"->"t.registers.ff_t[0]._mqi"- -~("t.registers.ff_t[0]._mqib")->"t.registers.ff_t[0]._mqi"+ -~"t.registers.ff_t[0]._mqi"&~"t.registers.ff_t[0].__clk_B"|~"t.registers.ff_t[0].reset_B"|~"t.registers.ff_t[0]._sqi"&~"t.registers.ff_t[0]._clk_B"->"t.registers.ff_t[0]._sqib"+ -("t.registers.ff_t[0]._mqi"&"t.registers.ff_t[0]._clk_B"|"t.registers.ff_t[0]._sqi"&"t.registers.ff_t[0].__clk_B")&"t.registers.ff_t[0].reset_B"->"t.registers.ff_t[0]._sqib"- -"t.registers.ff_t[0]._sqib"->"t.registers.ff_t[0]._sqi"- -~("t.registers.ff_t[0]._sqib")->"t.registers.ff_t[0]._sqi"+ -"t.registers.ff_t[0]._sqib"->"t.registers.ff_t[0].q"- -~("t.registers.ff_t[0]._sqib")->"t.registers.ff_t[0].q"+ -"t.registers.ff_t[1].clk_B"->"t.registers.ff_t[1]._clk_B"- -~("t.registers.ff_t[1].clk_B")->"t.registers.ff_t[1]._clk_B"+ -"t.registers.ff_t[1]._clk_B"->"t.registers.ff_t[1].__clk_B"- -~("t.registers.ff_t[1]._clk_B")->"t.registers.ff_t[1].__clk_B"+ -~"t.registers.ff_t[1].d"&~"t.registers.ff_t[1]._clk_B"|~"t.registers.ff_t[1].reset_B"|~"t.registers.ff_t[1].__clk_B"&~"t.registers.ff_t[1]._mqi"->"t.registers.ff_t[1]._mqib"+ -("t.registers.ff_t[1].d"&"t.registers.ff_t[1].__clk_B"|"t.registers.ff_t[1]._mqi"&"t.registers.ff_t[1]._clk_B")&"t.registers.ff_t[1].reset_B"->"t.registers.ff_t[1]._mqib"- -"t.registers.ff_t[1]._mqib"->"t.registers.ff_t[1]._mqi"- -~("t.registers.ff_t[1]._mqib")->"t.registers.ff_t[1]._mqi"+ -~"t.registers.ff_t[1]._mqi"&~"t.registers.ff_t[1].__clk_B"|~"t.registers.ff_t[1].reset_B"|~"t.registers.ff_t[1]._sqi"&~"t.registers.ff_t[1]._clk_B"->"t.registers.ff_t[1]._sqib"+ -("t.registers.ff_t[1]._mqi"&"t.registers.ff_t[1]._clk_B"|"t.registers.ff_t[1]._sqi"&"t.registers.ff_t[1].__clk_B")&"t.registers.ff_t[1].reset_B"->"t.registers.ff_t[1]._sqib"- -"t.registers.ff_t[1]._sqib"->"t.registers.ff_t[1]._sqi"- -~("t.registers.ff_t[1]._sqib")->"t.registers.ff_t[1]._sqi"+ -"t.registers.ff_t[1]._sqib"->"t.registers.ff_t[1].q"- -~("t.registers.ff_t[1]._sqib")->"t.registers.ff_t[1].q"+ -"t.registers.ff_t[2].clk_B"->"t.registers.ff_t[2]._clk_B"- -~("t.registers.ff_t[2].clk_B")->"t.registers.ff_t[2]._clk_B"+ -"t.registers.ff_t[2]._clk_B"->"t.registers.ff_t[2].__clk_B"- -~("t.registers.ff_t[2]._clk_B")->"t.registers.ff_t[2].__clk_B"+ -~"t.registers.ff_t[2].d"&~"t.registers.ff_t[2]._clk_B"|~"t.registers.ff_t[2].reset_B"|~"t.registers.ff_t[2].__clk_B"&~"t.registers.ff_t[2]._mqi"->"t.registers.ff_t[2]._mqib"+ -("t.registers.ff_t[2].d"&"t.registers.ff_t[2].__clk_B"|"t.registers.ff_t[2]._mqi"&"t.registers.ff_t[2]._clk_B")&"t.registers.ff_t[2].reset_B"->"t.registers.ff_t[2]._mqib"- -"t.registers.ff_t[2]._mqib"->"t.registers.ff_t[2]._mqi"- -~("t.registers.ff_t[2]._mqib")->"t.registers.ff_t[2]._mqi"+ -~"t.registers.ff_t[2]._mqi"&~"t.registers.ff_t[2].__clk_B"|~"t.registers.ff_t[2].reset_B"|~"t.registers.ff_t[2]._sqi"&~"t.registers.ff_t[2]._clk_B"->"t.registers.ff_t[2]._sqib"+ -("t.registers.ff_t[2]._mqi"&"t.registers.ff_t[2]._clk_B"|"t.registers.ff_t[2]._sqi"&"t.registers.ff_t[2].__clk_B")&"t.registers.ff_t[2].reset_B"->"t.registers.ff_t[2]._sqib"- -"t.registers.ff_t[2]._sqib"->"t.registers.ff_t[2]._sqi"- -~("t.registers.ff_t[2]._sqib")->"t.registers.ff_t[2]._sqi"+ -"t.registers.ff_t[2]._sqib"->"t.registers.ff_t[2].q"- -~("t.registers.ff_t[2]._sqib")->"t.registers.ff_t[2].q"+ -"t.registers.ff_t[3].clk_B"->"t.registers.ff_t[3]._clk_B"- -~("t.registers.ff_t[3].clk_B")->"t.registers.ff_t[3]._clk_B"+ -"t.registers.ff_t[3]._clk_B"->"t.registers.ff_t[3].__clk_B"- -~("t.registers.ff_t[3]._clk_B")->"t.registers.ff_t[3].__clk_B"+ -~"t.registers.ff_t[3].d"&~"t.registers.ff_t[3]._clk_B"|~"t.registers.ff_t[3].reset_B"|~"t.registers.ff_t[3].__clk_B"&~"t.registers.ff_t[3]._mqi"->"t.registers.ff_t[3]._mqib"+ -("t.registers.ff_t[3].d"&"t.registers.ff_t[3].__clk_B"|"t.registers.ff_t[3]._mqi"&"t.registers.ff_t[3]._clk_B")&"t.registers.ff_t[3].reset_B"->"t.registers.ff_t[3]._mqib"- -"t.registers.ff_t[3]._mqib"->"t.registers.ff_t[3]._mqi"- -~("t.registers.ff_t[3]._mqib")->"t.registers.ff_t[3]._mqi"+ -~"t.registers.ff_t[3]._mqi"&~"t.registers.ff_t[3].__clk_B"|~"t.registers.ff_t[3].reset_B"|~"t.registers.ff_t[3]._sqi"&~"t.registers.ff_t[3]._clk_B"->"t.registers.ff_t[3]._sqib"+ -("t.registers.ff_t[3]._mqi"&"t.registers.ff_t[3]._clk_B"|"t.registers.ff_t[3]._sqi"&"t.registers.ff_t[3].__clk_B")&"t.registers.ff_t[3].reset_B"->"t.registers.ff_t[3]._sqib"- -"t.registers.ff_t[3]._sqib"->"t.registers.ff_t[3]._sqi"- -~("t.registers.ff_t[3]._sqib")->"t.registers.ff_t[3]._sqi"+ -"t.registers.ff_t[3]._sqib"->"t.registers.ff_t[3].q"- -~("t.registers.ff_t[3]._sqib")->"t.registers.ff_t[3].q"+ -"t.registers.ff_t[4].clk_B"->"t.registers.ff_t[4]._clk_B"- -~("t.registers.ff_t[4].clk_B")->"t.registers.ff_t[4]._clk_B"+ -"t.registers.ff_t[4]._clk_B"->"t.registers.ff_t[4].__clk_B"- -~("t.registers.ff_t[4]._clk_B")->"t.registers.ff_t[4].__clk_B"+ -~"t.registers.ff_t[4].d"&~"t.registers.ff_t[4]._clk_B"|~"t.registers.ff_t[4].reset_B"|~"t.registers.ff_t[4].__clk_B"&~"t.registers.ff_t[4]._mqi"->"t.registers.ff_t[4]._mqib"+ -("t.registers.ff_t[4].d"&"t.registers.ff_t[4].__clk_B"|"t.registers.ff_t[4]._mqi"&"t.registers.ff_t[4]._clk_B")&"t.registers.ff_t[4].reset_B"->"t.registers.ff_t[4]._mqib"- -"t.registers.ff_t[4]._mqib"->"t.registers.ff_t[4]._mqi"- -~("t.registers.ff_t[4]._mqib")->"t.registers.ff_t[4]._mqi"+ -~"t.registers.ff_t[4]._mqi"&~"t.registers.ff_t[4].__clk_B"|~"t.registers.ff_t[4].reset_B"|~"t.registers.ff_t[4]._sqi"&~"t.registers.ff_t[4]._clk_B"->"t.registers.ff_t[4]._sqib"+ -("t.registers.ff_t[4]._mqi"&"t.registers.ff_t[4]._clk_B"|"t.registers.ff_t[4]._sqi"&"t.registers.ff_t[4].__clk_B")&"t.registers.ff_t[4].reset_B"->"t.registers.ff_t[4]._sqib"- -"t.registers.ff_t[4]._sqib"->"t.registers.ff_t[4]._sqi"- -~("t.registers.ff_t[4]._sqib")->"t.registers.ff_t[4]._sqi"+ -"t.registers.ff_t[4]._sqib"->"t.registers.ff_t[4].q"- -~("t.registers.ff_t[4]._sqib")->"t.registers.ff_t[4].q"+ -"t.registers.ff_t[5].clk_B"->"t.registers.ff_t[5]._clk_B"- -~("t.registers.ff_t[5].clk_B")->"t.registers.ff_t[5]._clk_B"+ -"t.registers.ff_t[5]._clk_B"->"t.registers.ff_t[5].__clk_B"- -~("t.registers.ff_t[5]._clk_B")->"t.registers.ff_t[5].__clk_B"+ -~"t.registers.ff_t[5].d"&~"t.registers.ff_t[5]._clk_B"|~"t.registers.ff_t[5].reset_B"|~"t.registers.ff_t[5].__clk_B"&~"t.registers.ff_t[5]._mqi"->"t.registers.ff_t[5]._mqib"+ -("t.registers.ff_t[5].d"&"t.registers.ff_t[5].__clk_B"|"t.registers.ff_t[5]._mqi"&"t.registers.ff_t[5]._clk_B")&"t.registers.ff_t[5].reset_B"->"t.registers.ff_t[5]._mqib"- -"t.registers.ff_t[5]._mqib"->"t.registers.ff_t[5]._mqi"- -~("t.registers.ff_t[5]._mqib")->"t.registers.ff_t[5]._mqi"+ -~"t.registers.ff_t[5]._mqi"&~"t.registers.ff_t[5].__clk_B"|~"t.registers.ff_t[5].reset_B"|~"t.registers.ff_t[5]._sqi"&~"t.registers.ff_t[5]._clk_B"->"t.registers.ff_t[5]._sqib"+ -("t.registers.ff_t[5]._mqi"&"t.registers.ff_t[5]._clk_B"|"t.registers.ff_t[5]._sqi"&"t.registers.ff_t[5].__clk_B")&"t.registers.ff_t[5].reset_B"->"t.registers.ff_t[5]._sqib"- -"t.registers.ff_t[5]._sqib"->"t.registers.ff_t[5]._sqi"- -~("t.registers.ff_t[5]._sqib")->"t.registers.ff_t[5]._sqi"+ -"t.registers.ff_t[5]._sqib"->"t.registers.ff_t[5].q"- -~("t.registers.ff_t[5]._sqib")->"t.registers.ff_t[5].q"+ -"t.registers.ff_t[6].clk_B"->"t.registers.ff_t[6]._clk_B"- -~("t.registers.ff_t[6].clk_B")->"t.registers.ff_t[6]._clk_B"+ -"t.registers.ff_t[6]._clk_B"->"t.registers.ff_t[6].__clk_B"- -~("t.registers.ff_t[6]._clk_B")->"t.registers.ff_t[6].__clk_B"+ -~"t.registers.ff_t[6].d"&~"t.registers.ff_t[6]._clk_B"|~"t.registers.ff_t[6].reset_B"|~"t.registers.ff_t[6].__clk_B"&~"t.registers.ff_t[6]._mqi"->"t.registers.ff_t[6]._mqib"+ -("t.registers.ff_t[6].d"&"t.registers.ff_t[6].__clk_B"|"t.registers.ff_t[6]._mqi"&"t.registers.ff_t[6]._clk_B")&"t.registers.ff_t[6].reset_B"->"t.registers.ff_t[6]._mqib"- -"t.registers.ff_t[6]._mqib"->"t.registers.ff_t[6]._mqi"- -~("t.registers.ff_t[6]._mqib")->"t.registers.ff_t[6]._mqi"+ -~"t.registers.ff_t[6]._mqi"&~"t.registers.ff_t[6].__clk_B"|~"t.registers.ff_t[6].reset_B"|~"t.registers.ff_t[6]._sqi"&~"t.registers.ff_t[6]._clk_B"->"t.registers.ff_t[6]._sqib"+ -("t.registers.ff_t[6]._mqi"&"t.registers.ff_t[6]._clk_B"|"t.registers.ff_t[6]._sqi"&"t.registers.ff_t[6].__clk_B")&"t.registers.ff_t[6].reset_B"->"t.registers.ff_t[6]._sqib"- -"t.registers.ff_t[6]._sqib"->"t.registers.ff_t[6]._sqi"- -~("t.registers.ff_t[6]._sqib")->"t.registers.ff_t[6]._sqi"+ -"t.registers.ff_t[6]._sqib"->"t.registers.ff_t[6].q"- -~("t.registers.ff_t[6]._sqib")->"t.registers.ff_t[6].q"+ -"t.registers.ff_t[7].clk_B"->"t.registers.ff_t[7]._clk_B"- -~("t.registers.ff_t[7].clk_B")->"t.registers.ff_t[7]._clk_B"+ -"t.registers.ff_t[7]._clk_B"->"t.registers.ff_t[7].__clk_B"- -~("t.registers.ff_t[7]._clk_B")->"t.registers.ff_t[7].__clk_B"+ -~"t.registers.ff_t[7].d"&~"t.registers.ff_t[7]._clk_B"|~"t.registers.ff_t[7].reset_B"|~"t.registers.ff_t[7].__clk_B"&~"t.registers.ff_t[7]._mqi"->"t.registers.ff_t[7]._mqib"+ -("t.registers.ff_t[7].d"&"t.registers.ff_t[7].__clk_B"|"t.registers.ff_t[7]._mqi"&"t.registers.ff_t[7]._clk_B")&"t.registers.ff_t[7].reset_B"->"t.registers.ff_t[7]._mqib"- -"t.registers.ff_t[7]._mqib"->"t.registers.ff_t[7]._mqi"- -~("t.registers.ff_t[7]._mqib")->"t.registers.ff_t[7]._mqi"+ -~"t.registers.ff_t[7]._mqi"&~"t.registers.ff_t[7].__clk_B"|~"t.registers.ff_t[7].reset_B"|~"t.registers.ff_t[7]._sqi"&~"t.registers.ff_t[7]._clk_B"->"t.registers.ff_t[7]._sqib"+ -("t.registers.ff_t[7]._mqi"&"t.registers.ff_t[7]._clk_B"|"t.registers.ff_t[7]._sqi"&"t.registers.ff_t[7].__clk_B")&"t.registers.ff_t[7].reset_B"->"t.registers.ff_t[7]._sqib"- -"t.registers.ff_t[7]._sqib"->"t.registers.ff_t[7]._sqi"- -~("t.registers.ff_t[7]._sqib")->"t.registers.ff_t[7]._sqi"+ -"t.registers.ff_t[7]._sqib"->"t.registers.ff_t[7].q"- -~("t.registers.ff_t[7]._sqib")->"t.registers.ff_t[7].q"+ +"t.registers.output_buf.out_a_B_buf_t.buf1.a"->"t.registers.output_buf.out_a_B_buf_t.buf1._y"- +~("t.registers.output_buf.out_a_B_buf_t.buf1.a")->"t.registers.output_buf.out_a_B_buf_t.buf1._y"+ +"t.registers.output_buf.out_a_B_buf_t.buf1._y"->"t.registers.output_buf.out_a_B_buf_t.buf1.y"- +~("t.registers.output_buf.out_a_B_buf_t.buf1._y")->"t.registers.output_buf.out_a_B_buf_t.buf1.y"+ += "t.registers.output_buf.out_a_B_buf_t.supply.vdd" "t.registers.output_buf.out_a_B_buf_t.buf1.vdd" += "t.registers.output_buf.out_a_B_buf_t.supply.vss" "t.registers.output_buf.out_a_B_buf_t.buf1.vss" += "t.registers.output_buf.out_a_B_buf_t.out[0]" "t.registers.output_buf.out_a_B_buf_t.out[3]" += "t.registers.output_buf.out_a_B_buf_t.out[0]" "t.registers.output_buf.out_a_B_buf_t.out[2]" += "t.registers.output_buf.out_a_B_buf_t.out[0]" "t.registers.output_buf.out_a_B_buf_t.out[1]" += "t.registers.output_buf.out_a_B_buf_t.out[0]" "t.registers.output_buf.out_a_B_buf_t.buf1.y" += "t.registers.output_buf.out_a_B_buf_t.in" "t.registers.output_buf.out_a_B_buf_t.buf1.a" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf.en_buf_f.out[0]" += "t.registers.output_buf._en_X_f[1]" "t.registers.output_buf.en_buf_f.out[1]" += "t.registers.output_buf._en_X_f[2]" "t.registers.output_buf.en_buf_f.out[2]" += "t.registers.output_buf._en_X_f[3]" "t.registers.output_buf.en_buf_f.out[3]" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf.f_buf_func[3].c1" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf.f_buf_func[2].c1" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf.f_buf_func[1].c1" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf.f_buf_func[0].c1" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf._en_X_f[3]" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf._en_X_f[2]" += "t.registers.output_buf._en_X_f[0]" "t.registers.output_buf._en_X_f[1]" +~"t.registers.output_buf.inack_ctl.c1"&~"t.registers.output_buf.inack_ctl.c2"&~"t.registers.output_buf.inack_ctl.c3"|~"t.registers.output_buf.inack_ctl.pr_B"->"t.registers.output_buf.inack_ctl._y"+ +"t.registers.output_buf.inack_ctl.c1"&"t.registers.output_buf.inack_ctl.c2"&"t.registers.output_buf.inack_ctl.c3"&"t.registers.output_buf.inack_ctl.sr_B"->"t.registers.output_buf.inack_ctl._y"- +"t.registers.output_buf.inack_ctl._y"->"t.registers.output_buf.inack_ctl.y"- +~("t.registers.output_buf.inack_ctl._y")->"t.registers.output_buf.inack_ctl.y"+ +"t.registers.output_buf.reset_bufarray.buf1.a"->"t.registers.output_buf.reset_bufarray.buf1._y"- +~("t.registers.output_buf.reset_bufarray.buf1.a")->"t.registers.output_buf.reset_bufarray.buf1._y"+ +"t.registers.output_buf.reset_bufarray.buf1._y"->"t.registers.output_buf.reset_bufarray.buf1.y"- +~("t.registers.output_buf.reset_bufarray.buf1._y")->"t.registers.output_buf.reset_bufarray.buf1.y"+ += "t.registers.output_buf.reset_bufarray.supply.vdd" "t.registers.output_buf.reset_bufarray.buf1.vdd" += "t.registers.output_buf.reset_bufarray.supply.vss" "t.registers.output_buf.reset_bufarray.buf1.vss" += "t.registers.output_buf.reset_bufarray.out[0]" "t.registers.output_buf.reset_bufarray.out[3]" += "t.registers.output_buf.reset_bufarray.out[0]" "t.registers.output_buf.reset_bufarray.out[2]" += "t.registers.output_buf.reset_bufarray.out[0]" "t.registers.output_buf.reset_bufarray.out[1]" += "t.registers.output_buf.reset_bufarray.out[0]" "t.registers.output_buf.reset_bufarray.buf1.y" += "t.registers.output_buf.reset_bufarray.in" "t.registers.output_buf.reset_bufarray.buf1.a" +"t.registers.output_buf.in_v_buf4.a"->"t.registers.output_buf.in_v_buf4._y"- +~("t.registers.output_buf.in_v_buf4.a")->"t.registers.output_buf.in_v_buf4._y"+ +"t.registers.output_buf.in_v_buf4._y"->"t.registers.output_buf.in_v_buf4.y"- +~("t.registers.output_buf.in_v_buf4._y")->"t.registers.output_buf.in_v_buf4.y"+ +"t.registers.output_buf.out_a_inv.a"->"t.registers.output_buf.out_a_inv.y"- +~("t.registers.output_buf.out_a_inv.a")->"t.registers.output_buf.out_a_inv.y"+ += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf.out_a_B_buf_t.out[0]" += "t.registers.output_buf._out_a_BX_f[1]" "t.registers.output_buf.out_a_B_buf_t.out[1]" += "t.registers.output_buf._out_a_BX_f[2]" "t.registers.output_buf.out_a_B_buf_t.out[2]" += "t.registers.output_buf._out_a_BX_f[3]" "t.registers.output_buf.out_a_B_buf_t.out[3]" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf.f_buf_func[3].c2" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf.f_buf_func[2].c2" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf.f_buf_func[1].c2" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf.f_buf_func[0].c2" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf._out_a_BX_f[3]" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf._out_a_BX_f[2]" += "t.registers.output_buf._out_a_BX_f[0]" "t.registers.output_buf._out_a_BX_f[1]" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.out_a_B_buf_t.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.out_a_B_buf_t.supply.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.out_a_B_buf_f.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.out_a_B_buf_f.supply.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.en_buf_f.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.en_buf_f.supply.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.en_buf_t.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.en_buf_t.supply.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.in_v_bufN.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.in_v_bufN.supply.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.vc.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.vc.supply.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.reset_bufarray.supply.vss" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.reset_bufarray.supply.vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.t_buf_func[3].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.f_buf_func[3].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.t_buf_func[2].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.f_buf_func[2].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.t_buf_func[1].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.f_buf_func[1].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.t_buf_func[0].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.f_buf_func[0].vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.out_a_inv.vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.in_v_buf4.vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.reset_buf.vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.en_ctl.vdd" += "t.registers.output_buf.supply.vdd" "t.registers.output_buf.inack_ctl.vdd" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.t_buf_func[3].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.f_buf_func[3].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.t_buf_func[2].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.f_buf_func[2].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.t_buf_func[1].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.f_buf_func[1].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.t_buf_func[0].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.f_buf_func[0].vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.out_a_inv.vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.in_v_buf4.vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.reset_buf.vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.en_ctl.vss" += "t.registers.output_buf.supply.vss" "t.registers.output_buf.inack_ctl.vss" +~"t.registers.output_buf.vc.ct.C2Els[0].c1"&~"t.registers.output_buf.vc.ct.C2Els[0].c2"->"t.registers.output_buf.vc.ct.C2Els[0]._y"+ +"t.registers.output_buf.vc.ct.C2Els[0].c1"&"t.registers.output_buf.vc.ct.C2Els[0].c2"->"t.registers.output_buf.vc.ct.C2Els[0]._y"- +"t.registers.output_buf.vc.ct.C2Els[0]._y"->"t.registers.output_buf.vc.ct.C2Els[0].y"- +~("t.registers.output_buf.vc.ct.C2Els[0]._y")->"t.registers.output_buf.vc.ct.C2Els[0].y"+ +~"t.registers.output_buf.vc.ct.C2Els[1].c1"&~"t.registers.output_buf.vc.ct.C2Els[1].c2"->"t.registers.output_buf.vc.ct.C2Els[1]._y"+ +"t.registers.output_buf.vc.ct.C2Els[1].c1"&"t.registers.output_buf.vc.ct.C2Els[1].c2"->"t.registers.output_buf.vc.ct.C2Els[1]._y"- +"t.registers.output_buf.vc.ct.C2Els[1]._y"->"t.registers.output_buf.vc.ct.C2Els[1].y"- +~("t.registers.output_buf.vc.ct.C2Els[1]._y")->"t.registers.output_buf.vc.ct.C2Els[1].y"+ +~"t.registers.output_buf.vc.ct.C2Els[2].c1"&~"t.registers.output_buf.vc.ct.C2Els[2].c2"->"t.registers.output_buf.vc.ct.C2Els[2]._y"+ +"t.registers.output_buf.vc.ct.C2Els[2].c1"&"t.registers.output_buf.vc.ct.C2Els[2].c2"->"t.registers.output_buf.vc.ct.C2Els[2]._y"- +"t.registers.output_buf.vc.ct.C2Els[2]._y"->"t.registers.output_buf.vc.ct.C2Els[2].y"- +~("t.registers.output_buf.vc.ct.C2Els[2]._y")->"t.registers.output_buf.vc.ct.C2Els[2].y"+ += "t.registers.output_buf.vc.ct.tmp[4]" "t.registers.output_buf.vc.ct.C2Els[2].c1" += "t.registers.output_buf.vc.ct.tmp[4]" "t.registers.output_buf.vc.ct.C2Els[0].y" += "t.registers.output_buf.vc.ct.tmp[5]" "t.registers.output_buf.vc.ct.C2Els[2].c2" += "t.registers.output_buf.vc.ct.tmp[5]" "t.registers.output_buf.vc.ct.C2Els[1].y" += "t.registers.output_buf.vc.ct.supply.vdd" "t.registers.output_buf.vc.ct.C2Els[2].vdd" += "t.registers.output_buf.vc.ct.supply.vdd" "t.registers.output_buf.vc.ct.C2Els[1].vdd" += "t.registers.output_buf.vc.ct.supply.vdd" "t.registers.output_buf.vc.ct.C2Els[0].vdd" += "t.registers.output_buf.vc.ct.supply.vss" "t.registers.output_buf.vc.ct.C2Els[2].vss" += "t.registers.output_buf.vc.ct.supply.vss" "t.registers.output_buf.vc.ct.C2Els[1].vss" += "t.registers.output_buf.vc.ct.supply.vss" "t.registers.output_buf.vc.ct.C2Els[0].vss" += "t.registers.output_buf.vc.ct.in[0]" "t.registers.output_buf.vc.ct.C2Els[0].c1" += "t.registers.output_buf.vc.ct.in[0]" "t.registers.output_buf.vc.ct.tmp[0]" += "t.registers.output_buf.vc.ct.in[1]" "t.registers.output_buf.vc.ct.C2Els[0].c2" += "t.registers.output_buf.vc.ct.in[1]" "t.registers.output_buf.vc.ct.tmp[1]" += "t.registers.output_buf.vc.ct.in[2]" "t.registers.output_buf.vc.ct.C2Els[1].c1" += "t.registers.output_buf.vc.ct.in[2]" "t.registers.output_buf.vc.ct.tmp[2]" += "t.registers.output_buf.vc.ct.in[3]" "t.registers.output_buf.vc.ct.C2Els[1].c2" += "t.registers.output_buf.vc.ct.in[3]" "t.registers.output_buf.vc.ct.tmp[3]" += "t.registers.output_buf.vc.ct.out" "t.registers.output_buf.vc.ct.C2Els[2].y" += "t.registers.output_buf.vc.ct.out" "t.registers.output_buf.vc.ct.tmp[6]" += "t.registers.output_buf.vc.ct.in[0]" "t.registers.output_buf.vc.OR2_tf[0].y" += "t.registers.output_buf.vc.ct.in[1]" "t.registers.output_buf.vc.OR2_tf[1].y" += "t.registers.output_buf.vc.ct.in[2]" "t.registers.output_buf.vc.OR2_tf[2].y" += "t.registers.output_buf.vc.ct.in[3]" "t.registers.output_buf.vc.OR2_tf[3].y" +"t.registers.output_buf.vc.OR2_tf[0].a"|"t.registers.output_buf.vc.OR2_tf[0].b"->"t.registers.output_buf.vc.OR2_tf[0]._y"- +~("t.registers.output_buf.vc.OR2_tf[0].a"|"t.registers.output_buf.vc.OR2_tf[0].b")->"t.registers.output_buf.vc.OR2_tf[0]._y"+ +"t.registers.output_buf.vc.OR2_tf[0]._y"->"t.registers.output_buf.vc.OR2_tf[0].y"- +~("t.registers.output_buf.vc.OR2_tf[0]._y")->"t.registers.output_buf.vc.OR2_tf[0].y"+ +"t.registers.output_buf.vc.OR2_tf[1].a"|"t.registers.output_buf.vc.OR2_tf[1].b"->"t.registers.output_buf.vc.OR2_tf[1]._y"- +~("t.registers.output_buf.vc.OR2_tf[1].a"|"t.registers.output_buf.vc.OR2_tf[1].b")->"t.registers.output_buf.vc.OR2_tf[1]._y"+ +"t.registers.output_buf.vc.OR2_tf[1]._y"->"t.registers.output_buf.vc.OR2_tf[1].y"- +~("t.registers.output_buf.vc.OR2_tf[1]._y")->"t.registers.output_buf.vc.OR2_tf[1].y"+ +"t.registers.output_buf.vc.OR2_tf[2].a"|"t.registers.output_buf.vc.OR2_tf[2].b"->"t.registers.output_buf.vc.OR2_tf[2]._y"- +~("t.registers.output_buf.vc.OR2_tf[2].a"|"t.registers.output_buf.vc.OR2_tf[2].b")->"t.registers.output_buf.vc.OR2_tf[2]._y"+ +"t.registers.output_buf.vc.OR2_tf[2]._y"->"t.registers.output_buf.vc.OR2_tf[2].y"- +~("t.registers.output_buf.vc.OR2_tf[2]._y")->"t.registers.output_buf.vc.OR2_tf[2].y"+ +"t.registers.output_buf.vc.OR2_tf[3].a"|"t.registers.output_buf.vc.OR2_tf[3].b"->"t.registers.output_buf.vc.OR2_tf[3]._y"- +~("t.registers.output_buf.vc.OR2_tf[3].a"|"t.registers.output_buf.vc.OR2_tf[3].b")->"t.registers.output_buf.vc.OR2_tf[3]._y"+ +"t.registers.output_buf.vc.OR2_tf[3]._y"->"t.registers.output_buf.vc.OR2_tf[3].y"- +~("t.registers.output_buf.vc.OR2_tf[3]._y")->"t.registers.output_buf.vc.OR2_tf[3].y"+ += "t.registers.output_buf.vc.supply.vss" "t.registers.output_buf.vc.ct.supply.vss" += "t.registers.output_buf.vc.supply.vdd" "t.registers.output_buf.vc.ct.supply.vdd" += "t.registers.output_buf.vc.supply.vdd" "t.registers.output_buf.vc.OR2_tf[3].vdd" += "t.registers.output_buf.vc.supply.vdd" "t.registers.output_buf.vc.OR2_tf[2].vdd" += "t.registers.output_buf.vc.supply.vdd" "t.registers.output_buf.vc.OR2_tf[1].vdd" += "t.registers.output_buf.vc.supply.vdd" "t.registers.output_buf.vc.OR2_tf[0].vdd" += "t.registers.output_buf.vc.supply.vss" "t.registers.output_buf.vc.OR2_tf[3].vss" += "t.registers.output_buf.vc.supply.vss" "t.registers.output_buf.vc.OR2_tf[2].vss" += "t.registers.output_buf.vc.supply.vss" "t.registers.output_buf.vc.OR2_tf[1].vss" += "t.registers.output_buf.vc.supply.vss" "t.registers.output_buf.vc.OR2_tf[0].vss" += "t.registers.output_buf.vc.out" "t.registers.output_buf.vc.ct.out" += "t.registers.output_buf.vc.in.d[0].d[0]" "t.registers.output_buf.vc.in.d[0].f" += "t.registers.output_buf.vc.in.d[0].d[1]" "t.registers.output_buf.vc.in.d[0].t" += "t.registers.output_buf.vc.in.d[1].d[0]" "t.registers.output_buf.vc.in.d[1].f" += "t.registers.output_buf.vc.in.d[1].d[1]" "t.registers.output_buf.vc.in.d[1].t" += "t.registers.output_buf.vc.in.d[2].d[0]" "t.registers.output_buf.vc.in.d[2].f" += "t.registers.output_buf.vc.in.d[2].d[1]" "t.registers.output_buf.vc.in.d[2].t" += "t.registers.output_buf.vc.in.d[3].d[0]" "t.registers.output_buf.vc.in.d[3].f" += "t.registers.output_buf.vc.in.d[3].d[1]" "t.registers.output_buf.vc.in.d[3].t" += "t.registers.output_buf.vc.in.d[3].d[0]" "t.registers.output_buf.vc.in.d[3].f" += "t.registers.output_buf.vc.in.d[3].d[1]" "t.registers.output_buf.vc.in.d[3].t" += "t.registers.output_buf.vc.in.d[2].d[0]" "t.registers.output_buf.vc.in.d[2].f" += "t.registers.output_buf.vc.in.d[2].d[1]" "t.registers.output_buf.vc.in.d[2].t" += "t.registers.output_buf.vc.in.d[1].d[0]" "t.registers.output_buf.vc.in.d[1].f" += "t.registers.output_buf.vc.in.d[1].d[1]" "t.registers.output_buf.vc.in.d[1].t" += "t.registers.output_buf.vc.in.d[0].d[0]" "t.registers.output_buf.vc.in.d[0].f" += "t.registers.output_buf.vc.in.d[0].d[1]" "t.registers.output_buf.vc.in.d[0].t" += "t.registers.output_buf.vc.in.d[3].d[0]" "t.registers.output_buf.vc.OR2_tf[3].b" += "t.registers.output_buf.vc.in.d[3].d[0]" "t.registers.output_buf.vc.in.d[3].f" += "t.registers.output_buf.vc.in.d[3].d[1]" "t.registers.output_buf.vc.OR2_tf[3].a" += "t.registers.output_buf.vc.in.d[3].d[1]" "t.registers.output_buf.vc.in.d[3].t" += "t.registers.output_buf.vc.in.d[2].d[0]" "t.registers.output_buf.vc.OR2_tf[2].b" += "t.registers.output_buf.vc.in.d[2].d[0]" "t.registers.output_buf.vc.in.d[2].f" += "t.registers.output_buf.vc.in.d[2].d[1]" "t.registers.output_buf.vc.OR2_tf[2].a" += "t.registers.output_buf.vc.in.d[2].d[1]" "t.registers.output_buf.vc.in.d[2].t" += "t.registers.output_buf.vc.in.d[1].d[0]" "t.registers.output_buf.vc.OR2_tf[1].b" += "t.registers.output_buf.vc.in.d[1].d[0]" "t.registers.output_buf.vc.in.d[1].f" += "t.registers.output_buf.vc.in.d[1].d[1]" "t.registers.output_buf.vc.OR2_tf[1].a" += "t.registers.output_buf.vc.in.d[1].d[1]" "t.registers.output_buf.vc.in.d[1].t" += "t.registers.output_buf.vc.in.d[0].d[0]" "t.registers.output_buf.vc.OR2_tf[0].b" += "t.registers.output_buf.vc.in.d[0].d[0]" "t.registers.output_buf.vc.in.d[0].f" += "t.registers.output_buf.vc.in.d[0].d[1]" "t.registers.output_buf.vc.OR2_tf[0].a" += "t.registers.output_buf.vc.in.d[0].d[1]" "t.registers.output_buf.vc.in.d[0].t" +"t.registers.output_buf.out_a_B_buf_f.buf1.a"->"t.registers.output_buf.out_a_B_buf_f.buf1._y"- +~("t.registers.output_buf.out_a_B_buf_f.buf1.a")->"t.registers.output_buf.out_a_B_buf_f.buf1._y"+ +"t.registers.output_buf.out_a_B_buf_f.buf1._y"->"t.registers.output_buf.out_a_B_buf_f.buf1.y"- +~("t.registers.output_buf.out_a_B_buf_f.buf1._y")->"t.registers.output_buf.out_a_B_buf_f.buf1.y"+ += "t.registers.output_buf.out_a_B_buf_f.supply.vdd" "t.registers.output_buf.out_a_B_buf_f.buf1.vdd" += "t.registers.output_buf.out_a_B_buf_f.supply.vss" "t.registers.output_buf.out_a_B_buf_f.buf1.vss" += "t.registers.output_buf.out_a_B_buf_f.out[0]" "t.registers.output_buf.out_a_B_buf_f.out[3]" += "t.registers.output_buf.out_a_B_buf_f.out[0]" "t.registers.output_buf.out_a_B_buf_f.out[2]" += "t.registers.output_buf.out_a_B_buf_f.out[0]" "t.registers.output_buf.out_a_B_buf_f.out[1]" += "t.registers.output_buf.out_a_B_buf_f.out[0]" "t.registers.output_buf.out_a_B_buf_f.buf1.y" += "t.registers.output_buf.out_a_B_buf_f.in" "t.registers.output_buf.out_a_B_buf_f.buf1.a" += "t.registers.output_buf._en" "t.registers.output_buf.en_buf_f.in" += "t.registers.output_buf._en" "t.registers.output_buf.en_buf_t.in" += "t.registers.output_buf._en" "t.registers.output_buf.en_ctl.y" += "t.registers.output_buf._en" "t.registers.output_buf.inack_ctl.c1" +~"t.registers.output_buf.en_ctl.p1"&~"t.registers.output_buf.en_ctl.c1"->"t.registers.output_buf.en_ctl.y"+ +"t.registers.output_buf.en_ctl.c1"->"t.registers.output_buf.en_ctl.y"- += "t.registers.output_buf.out.d.d[0].d[0]" "t.registers.output_buf.out.d.d[0].f" += "t.registers.output_buf.out.d.d[0].d[1]" "t.registers.output_buf.out.d.d[0].t" += "t.registers.output_buf.out.d.d[1].d[0]" "t.registers.output_buf.out.d.d[1].f" += "t.registers.output_buf.out.d.d[1].d[1]" "t.registers.output_buf.out.d.d[1].t" += "t.registers.output_buf.out.d.d[2].d[0]" "t.registers.output_buf.out.d.d[2].f" += "t.registers.output_buf.out.d.d[2].d[1]" "t.registers.output_buf.out.d.d[2].t" += "t.registers.output_buf.out.d.d[3].d[0]" "t.registers.output_buf.out.d.d[3].f" += "t.registers.output_buf.out.d.d[3].d[1]" "t.registers.output_buf.out.d.d[3].t" += "t.registers.output_buf.out.d.d[3].d[0]" "t.registers.output_buf.out.d.d[3].f" += "t.registers.output_buf.out.d.d[3].d[1]" "t.registers.output_buf.out.d.d[3].t" += "t.registers.output_buf.out.d.d[2].d[0]" "t.registers.output_buf.out.d.d[2].f" += "t.registers.output_buf.out.d.d[2].d[1]" "t.registers.output_buf.out.d.d[2].t" += "t.registers.output_buf.out.d.d[1].d[0]" "t.registers.output_buf.out.d.d[1].f" += "t.registers.output_buf.out.d.d[1].d[1]" "t.registers.output_buf.out.d.d[1].t" += "t.registers.output_buf.out.d.d[0].d[0]" "t.registers.output_buf.out.d.d[0].f" += "t.registers.output_buf.out.d.d[0].d[1]" "t.registers.output_buf.out.d.d[0].t" += "t.registers.output_buf.out.d.d[3].d[0]" "t.registers.output_buf.out.d.d[3].f" += "t.registers.output_buf.out.d.d[3].d[1]" "t.registers.output_buf.out.d.d[3].t" += "t.registers.output_buf.out.d.d[2].d[0]" "t.registers.output_buf.out.d.d[2].f" += "t.registers.output_buf.out.d.d[2].d[1]" "t.registers.output_buf.out.d.d[2].t" += "t.registers.output_buf.out.d.d[1].d[0]" "t.registers.output_buf.out.d.d[1].f" += "t.registers.output_buf.out.d.d[1].d[1]" "t.registers.output_buf.out.d.d[1].t" += "t.registers.output_buf.out.d.d[0].d[0]" "t.registers.output_buf.out.d.d[0].f" += "t.registers.output_buf.out.d.d[0].d[1]" "t.registers.output_buf.out.d.d[0].t" += "t.registers.output_buf.out.a" "t.registers.output_buf.out_a_inv.a" += "t.registers.output_buf.out.v" "t.registers.output_buf.en_ctl.p1" += "t.registers.output_buf.out.v" "t.registers.output_buf.inack_ctl.c3" += "t.registers.output_buf.out.d.d[3].d[0]" "t.registers.output_buf.f_buf_func[3].y" += "t.registers.output_buf.out.d.d[3].d[0]" "t.registers.output_buf.out.d.d[3].f" += "t.registers.output_buf.out.d.d[3].d[1]" "t.registers.output_buf.t_buf_func[3].y" += "t.registers.output_buf.out.d.d[3].d[1]" "t.registers.output_buf.out.d.d[3].t" += "t.registers.output_buf.out.d.d[2].d[0]" "t.registers.output_buf.f_buf_func[2].y" += "t.registers.output_buf.out.d.d[2].d[0]" "t.registers.output_buf.out.d.d[2].f" += "t.registers.output_buf.out.d.d[2].d[1]" "t.registers.output_buf.t_buf_func[2].y" += "t.registers.output_buf.out.d.d[2].d[1]" "t.registers.output_buf.out.d.d[2].t" += "t.registers.output_buf.out.d.d[1].d[0]" "t.registers.output_buf.f_buf_func[1].y" += "t.registers.output_buf.out.d.d[1].d[0]" "t.registers.output_buf.out.d.d[1].f" += "t.registers.output_buf.out.d.d[1].d[1]" "t.registers.output_buf.t_buf_func[1].y" += "t.registers.output_buf.out.d.d[1].d[1]" "t.registers.output_buf.out.d.d[1].t" += "t.registers.output_buf.out.d.d[0].d[0]" "t.registers.output_buf.f_buf_func[0].y" += "t.registers.output_buf.out.d.d[0].d[0]" "t.registers.output_buf.out.d.d[0].f" += "t.registers.output_buf.out.d.d[0].d[1]" "t.registers.output_buf.t_buf_func[0].y" += "t.registers.output_buf.out.d.d[0].d[1]" "t.registers.output_buf.out.d.d[0].t" += "t.registers.output_buf.in.d.d[0].d[0]" "t.registers.output_buf.in.d.d[0].f" += "t.registers.output_buf.in.d.d[0].d[1]" "t.registers.output_buf.in.d.d[0].t" += "t.registers.output_buf.in.d.d[1].d[0]" "t.registers.output_buf.in.d.d[1].f" += "t.registers.output_buf.in.d.d[1].d[1]" "t.registers.output_buf.in.d.d[1].t" += "t.registers.output_buf.in.d.d[2].d[0]" "t.registers.output_buf.in.d.d[2].f" += "t.registers.output_buf.in.d.d[2].d[1]" "t.registers.output_buf.in.d.d[2].t" += "t.registers.output_buf.in.d.d[3].d[0]" "t.registers.output_buf.in.d.d[3].f" += "t.registers.output_buf.in.d.d[3].d[1]" "t.registers.output_buf.in.d.d[3].t" += "t.registers.output_buf.in.d.d[3].d[0]" "t.registers.output_buf.in.d.d[3].f" += "t.registers.output_buf.in.d.d[3].d[1]" "t.registers.output_buf.in.d.d[3].t" += "t.registers.output_buf.in.d.d[2].d[0]" "t.registers.output_buf.in.d.d[2].f" += "t.registers.output_buf.in.d.d[2].d[1]" "t.registers.output_buf.in.d.d[2].t" += "t.registers.output_buf.in.d.d[1].d[0]" "t.registers.output_buf.in.d.d[1].f" += "t.registers.output_buf.in.d.d[1].d[1]" "t.registers.output_buf.in.d.d[1].t" += "t.registers.output_buf.in.d.d[0].d[0]" "t.registers.output_buf.in.d.d[0].f" += "t.registers.output_buf.in.d.d[0].d[1]" "t.registers.output_buf.in.d.d[0].t" += "t.registers.output_buf.in.d.d[3].d[0]" "t.registers.output_buf.in.d.d[3].f" += "t.registers.output_buf.in.d.d[3].d[1]" "t.registers.output_buf.in.d.d[3].t" += "t.registers.output_buf.in.d.d[2].d[0]" "t.registers.output_buf.in.d.d[2].f" += "t.registers.output_buf.in.d.d[2].d[1]" "t.registers.output_buf.in.d.d[2].t" += "t.registers.output_buf.in.d.d[1].d[0]" "t.registers.output_buf.in.d.d[1].f" += "t.registers.output_buf.in.d.d[1].d[1]" "t.registers.output_buf.in.d.d[1].t" += "t.registers.output_buf.in.d.d[0].d[0]" "t.registers.output_buf.in.d.d[0].f" += "t.registers.output_buf.in.d.d[0].d[1]" "t.registers.output_buf.in.d.d[0].t" += "t.registers.output_buf.in.d.d[0].f" "t.registers.output_buf.vc.in.d[0].f" += "t.registers.output_buf.in.d.d[0].t" "t.registers.output_buf.vc.in.d[0].t" += "t.registers.output_buf.in.d.d[0].d[0]" "t.registers.output_buf.vc.in.d[0].d[0]" += "t.registers.output_buf.in.d.d[0].d[1]" "t.registers.output_buf.vc.in.d[0].d[1]" += "t.registers.output_buf.in.d.d[1].f" "t.registers.output_buf.vc.in.d[1].f" += "t.registers.output_buf.in.d.d[1].t" "t.registers.output_buf.vc.in.d[1].t" += "t.registers.output_buf.in.d.d[1].d[0]" "t.registers.output_buf.vc.in.d[1].d[0]" += "t.registers.output_buf.in.d.d[1].d[1]" "t.registers.output_buf.vc.in.d[1].d[1]" += "t.registers.output_buf.in.d.d[2].f" "t.registers.output_buf.vc.in.d[2].f" += "t.registers.output_buf.in.d.d[2].t" "t.registers.output_buf.vc.in.d[2].t" += "t.registers.output_buf.in.d.d[2].d[0]" "t.registers.output_buf.vc.in.d[2].d[0]" += "t.registers.output_buf.in.d.d[2].d[1]" "t.registers.output_buf.vc.in.d[2].d[1]" += "t.registers.output_buf.in.d.d[3].f" "t.registers.output_buf.vc.in.d[3].f" += "t.registers.output_buf.in.d.d[3].t" "t.registers.output_buf.vc.in.d[3].t" += "t.registers.output_buf.in.d.d[3].d[0]" "t.registers.output_buf.vc.in.d[3].d[0]" += "t.registers.output_buf.in.d.d[3].d[1]" "t.registers.output_buf.vc.in.d[3].d[1]" += "t.registers.output_buf.in.a" "t.registers.output_buf.en_ctl.c1" += "t.registers.output_buf.in.a" "t.registers.output_buf.inack_ctl.y" += "t.registers.output_buf.in.v" "t.registers.output_buf.in_v_bufN.in" += "t.registers.output_buf.in.v" "t.registers.output_buf.in_v_buf4.y" += "t.registers.output_buf.in.v" "t.registers.output_buf.inack_ctl.c2" += "t.registers.output_buf.in.d.d[3].d[0]" "t.registers.output_buf.f_buf_func[3].n1" += "t.registers.output_buf.in.d.d[3].d[0]" "t.registers.output_buf.in.d.d[3].f" += "t.registers.output_buf.in.d.d[3].d[1]" "t.registers.output_buf.t_buf_func[3].n1" += "t.registers.output_buf.in.d.d[3].d[1]" "t.registers.output_buf.in.d.d[3].t" += "t.registers.output_buf.in.d.d[2].d[0]" "t.registers.output_buf.f_buf_func[2].n1" += "t.registers.output_buf.in.d.d[2].d[0]" "t.registers.output_buf.in.d.d[2].f" += "t.registers.output_buf.in.d.d[2].d[1]" "t.registers.output_buf.t_buf_func[2].n1" += "t.registers.output_buf.in.d.d[2].d[1]" "t.registers.output_buf.in.d.d[2].t" += "t.registers.output_buf.in.d.d[1].d[0]" "t.registers.output_buf.f_buf_func[1].n1" += "t.registers.output_buf.in.d.d[1].d[0]" "t.registers.output_buf.in.d.d[1].f" += "t.registers.output_buf.in.d.d[1].d[1]" "t.registers.output_buf.t_buf_func[1].n1" += "t.registers.output_buf.in.d.d[1].d[1]" "t.registers.output_buf.in.d.d[1].t" += "t.registers.output_buf.in.d.d[0].d[0]" "t.registers.output_buf.f_buf_func[0].n1" += "t.registers.output_buf.in.d.d[0].d[0]" "t.registers.output_buf.in.d.d[0].f" += "t.registers.output_buf.in.d.d[0].d[1]" "t.registers.output_buf.t_buf_func[0].n1" += "t.registers.output_buf.in.d.d[0].d[1]" "t.registers.output_buf.in.d.d[0].t" +"t.registers.output_buf.reset_buf.a"->"t.registers.output_buf.reset_buf._y"- +~("t.registers.output_buf.reset_buf.a")->"t.registers.output_buf.reset_buf._y"+ +"t.registers.output_buf.reset_buf._y"->"t.registers.output_buf.reset_buf.y"- +~("t.registers.output_buf.reset_buf._y")->"t.registers.output_buf.reset_buf.y"+ += "t.registers.output_buf._in_v" "t.registers.output_buf.in_v_buf4.a" += "t.registers.output_buf._in_v" "t.registers.output_buf.vc.out" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf.out_a_B_buf_f.out[0]" += "t.registers.output_buf._out_a_BX_t[1]" "t.registers.output_buf.out_a_B_buf_f.out[1]" += "t.registers.output_buf._out_a_BX_t[2]" "t.registers.output_buf.out_a_B_buf_f.out[2]" += "t.registers.output_buf._out_a_BX_t[3]" "t.registers.output_buf.out_a_B_buf_f.out[3]" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf.t_buf_func[3].c2" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf.t_buf_func[2].c2" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf.t_buf_func[1].c2" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf.t_buf_func[0].c2" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf._out_a_BX_t[3]" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf._out_a_BX_t[2]" += "t.registers.output_buf._out_a_BX_t[0]" "t.registers.output_buf._out_a_BX_t[1]" += "t.registers.output_buf._reset_BX" "t.registers.output_buf.reset_bufarray.in" += "t.registers.output_buf._reset_BX" "t.registers.output_buf.reset_buf.y" += "t.registers.output_buf._reset_BX" "t.registers.output_buf.inack_ctl.sr_B" += "t.registers.output_buf._reset_BX" "t.registers.output_buf.inack_ctl.pr_B" += "t.registers.output_buf.reset_B" "t.registers.output_buf.reset_buf.a" +"t.registers.output_buf.en_buf_f.buf1.a"->"t.registers.output_buf.en_buf_f.buf1._y"- +~("t.registers.output_buf.en_buf_f.buf1.a")->"t.registers.output_buf.en_buf_f.buf1._y"+ +"t.registers.output_buf.en_buf_f.buf1._y"->"t.registers.output_buf.en_buf_f.buf1.y"- +~("t.registers.output_buf.en_buf_f.buf1._y")->"t.registers.output_buf.en_buf_f.buf1.y"+ += "t.registers.output_buf.en_buf_f.supply.vdd" "t.registers.output_buf.en_buf_f.buf1.vdd" += "t.registers.output_buf.en_buf_f.supply.vss" "t.registers.output_buf.en_buf_f.buf1.vss" += "t.registers.output_buf.en_buf_f.out[0]" "t.registers.output_buf.en_buf_f.out[3]" += "t.registers.output_buf.en_buf_f.out[0]" "t.registers.output_buf.en_buf_f.out[2]" += "t.registers.output_buf.en_buf_f.out[0]" "t.registers.output_buf.en_buf_f.out[1]" += "t.registers.output_buf.en_buf_f.out[0]" "t.registers.output_buf.en_buf_f.buf1.y" += "t.registers.output_buf.en_buf_f.in" "t.registers.output_buf.en_buf_f.buf1.a" +"t.registers.output_buf.en_buf_t.buf1.a"->"t.registers.output_buf.en_buf_t.buf1._y"- +~("t.registers.output_buf.en_buf_t.buf1.a")->"t.registers.output_buf.en_buf_t.buf1._y"+ +"t.registers.output_buf.en_buf_t.buf1._y"->"t.registers.output_buf.en_buf_t.buf1.y"- +~("t.registers.output_buf.en_buf_t.buf1._y")->"t.registers.output_buf.en_buf_t.buf1.y"+ += "t.registers.output_buf.en_buf_t.supply.vdd" "t.registers.output_buf.en_buf_t.buf1.vdd" += "t.registers.output_buf.en_buf_t.supply.vss" "t.registers.output_buf.en_buf_t.buf1.vss" += "t.registers.output_buf.en_buf_t.out[0]" "t.registers.output_buf.en_buf_t.out[3]" += "t.registers.output_buf.en_buf_t.out[0]" "t.registers.output_buf.en_buf_t.out[2]" += "t.registers.output_buf.en_buf_t.out[0]" "t.registers.output_buf.en_buf_t.out[1]" += "t.registers.output_buf.en_buf_t.out[0]" "t.registers.output_buf.en_buf_t.buf1.y" += "t.registers.output_buf.en_buf_t.in" "t.registers.output_buf.en_buf_t.buf1.a" += "t.registers.output_buf._out_a_B" "t.registers.output_buf.out_a_B_buf_t.in" += "t.registers.output_buf._out_a_B" "t.registers.output_buf.out_a_B_buf_f.in" += "t.registers.output_buf._out_a_B" "t.registers.output_buf.out_a_inv.y" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.reset_bufarray.out[0]" += "t.registers.output_buf._reset_BXX[1]" "t.registers.output_buf.reset_bufarray.out[1]" += "t.registers.output_buf._reset_BXX[2]" "t.registers.output_buf.reset_bufarray.out[2]" += "t.registers.output_buf._reset_BXX[3]" "t.registers.output_buf.reset_bufarray.out[3]" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[3].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[3].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[3].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[3].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[2].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[2].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[2].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[2].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[1].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[1].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[1].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[1].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[0].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.f_buf_func[0].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[0].sr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf.t_buf_func[0].pr_B" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf._reset_BXX[3]" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf._reset_BXX[2]" += "t.registers.output_buf._reset_BXX[0]" "t.registers.output_buf._reset_BXX[1]" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.in_v_bufN.out[0]" += "t.registers.output_buf._in_vX[1]" "t.registers.output_buf.in_v_bufN.out[1]" += "t.registers.output_buf._in_vX[2]" "t.registers.output_buf.in_v_bufN.out[2]" += "t.registers.output_buf._in_vX[3]" "t.registers.output_buf.in_v_bufN.out[3]" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.t_buf_func[3].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.f_buf_func[3].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.t_buf_func[2].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.f_buf_func[2].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.t_buf_func[1].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.f_buf_func[1].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.t_buf_func[0].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf.f_buf_func[0].n2" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf._in_vX[3]" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf._in_vX[2]" += "t.registers.output_buf._in_vX[0]" "t.registers.output_buf._in_vX[1]" +"t.registers.output_buf.in_v_bufN.buf1.a"->"t.registers.output_buf.in_v_bufN.buf1._y"- +~("t.registers.output_buf.in_v_bufN.buf1.a")->"t.registers.output_buf.in_v_bufN.buf1._y"+ +"t.registers.output_buf.in_v_bufN.buf1._y"->"t.registers.output_buf.in_v_bufN.buf1.y"- +~("t.registers.output_buf.in_v_bufN.buf1._y")->"t.registers.output_buf.in_v_bufN.buf1.y"+ += "t.registers.output_buf.in_v_bufN.supply.vdd" "t.registers.output_buf.in_v_bufN.buf1.vdd" += "t.registers.output_buf.in_v_bufN.supply.vss" "t.registers.output_buf.in_v_bufN.buf1.vss" += "t.registers.output_buf.in_v_bufN.out[0]" "t.registers.output_buf.in_v_bufN.out[3]" += "t.registers.output_buf.in_v_bufN.out[0]" "t.registers.output_buf.in_v_bufN.out[2]" += "t.registers.output_buf.in_v_bufN.out[0]" "t.registers.output_buf.in_v_bufN.out[1]" += "t.registers.output_buf.in_v_bufN.out[0]" "t.registers.output_buf.in_v_bufN.buf1.y" += "t.registers.output_buf.in_v_bufN.in" "t.registers.output_buf.in_v_bufN.buf1.a" +~"t.registers.output_buf.t_buf_func[0].c1"&~"t.registers.output_buf.t_buf_func[0].c2"|~"t.registers.output_buf.t_buf_func[0].pr_B"->"t.registers.output_buf.t_buf_func[0]._y"+ +"t.registers.output_buf.t_buf_func[0].c1"&"t.registers.output_buf.t_buf_func[0].c2"&"t.registers.output_buf.t_buf_func[0].n1"&"t.registers.output_buf.t_buf_func[0].n2"&"t.registers.output_buf.t_buf_func[0].sr_B"->"t.registers.output_buf.t_buf_func[0]._y"- +"t.registers.output_buf.t_buf_func[0]._y"->"t.registers.output_buf.t_buf_func[0].y"- +~("t.registers.output_buf.t_buf_func[0]._y")->"t.registers.output_buf.t_buf_func[0].y"+ +~"t.registers.output_buf.t_buf_func[1].c1"&~"t.registers.output_buf.t_buf_func[1].c2"|~"t.registers.output_buf.t_buf_func[1].pr_B"->"t.registers.output_buf.t_buf_func[1]._y"+ +"t.registers.output_buf.t_buf_func[1].c1"&"t.registers.output_buf.t_buf_func[1].c2"&"t.registers.output_buf.t_buf_func[1].n1"&"t.registers.output_buf.t_buf_func[1].n2"&"t.registers.output_buf.t_buf_func[1].sr_B"->"t.registers.output_buf.t_buf_func[1]._y"- +"t.registers.output_buf.t_buf_func[1]._y"->"t.registers.output_buf.t_buf_func[1].y"- +~("t.registers.output_buf.t_buf_func[1]._y")->"t.registers.output_buf.t_buf_func[1].y"+ +~"t.registers.output_buf.t_buf_func[2].c1"&~"t.registers.output_buf.t_buf_func[2].c2"|~"t.registers.output_buf.t_buf_func[2].pr_B"->"t.registers.output_buf.t_buf_func[2]._y"+ +"t.registers.output_buf.t_buf_func[2].c1"&"t.registers.output_buf.t_buf_func[2].c2"&"t.registers.output_buf.t_buf_func[2].n1"&"t.registers.output_buf.t_buf_func[2].n2"&"t.registers.output_buf.t_buf_func[2].sr_B"->"t.registers.output_buf.t_buf_func[2]._y"- +"t.registers.output_buf.t_buf_func[2]._y"->"t.registers.output_buf.t_buf_func[2].y"- +~("t.registers.output_buf.t_buf_func[2]._y")->"t.registers.output_buf.t_buf_func[2].y"+ +~"t.registers.output_buf.t_buf_func[3].c1"&~"t.registers.output_buf.t_buf_func[3].c2"|~"t.registers.output_buf.t_buf_func[3].pr_B"->"t.registers.output_buf.t_buf_func[3]._y"+ +"t.registers.output_buf.t_buf_func[3].c1"&"t.registers.output_buf.t_buf_func[3].c2"&"t.registers.output_buf.t_buf_func[3].n1"&"t.registers.output_buf.t_buf_func[3].n2"&"t.registers.output_buf.t_buf_func[3].sr_B"->"t.registers.output_buf.t_buf_func[3]._y"- +"t.registers.output_buf.t_buf_func[3]._y"->"t.registers.output_buf.t_buf_func[3].y"- +~("t.registers.output_buf.t_buf_func[3]._y")->"t.registers.output_buf.t_buf_func[3].y"+ +~"t.registers.output_buf.f_buf_func[0].c1"&~"t.registers.output_buf.f_buf_func[0].c2"|~"t.registers.output_buf.f_buf_func[0].pr_B"->"t.registers.output_buf.f_buf_func[0]._y"+ +"t.registers.output_buf.f_buf_func[0].c1"&"t.registers.output_buf.f_buf_func[0].c2"&"t.registers.output_buf.f_buf_func[0].n1"&"t.registers.output_buf.f_buf_func[0].n2"&"t.registers.output_buf.f_buf_func[0].sr_B"->"t.registers.output_buf.f_buf_func[0]._y"- +"t.registers.output_buf.f_buf_func[0]._y"->"t.registers.output_buf.f_buf_func[0].y"- +~("t.registers.output_buf.f_buf_func[0]._y")->"t.registers.output_buf.f_buf_func[0].y"+ +~"t.registers.output_buf.f_buf_func[1].c1"&~"t.registers.output_buf.f_buf_func[1].c2"|~"t.registers.output_buf.f_buf_func[1].pr_B"->"t.registers.output_buf.f_buf_func[1]._y"+ +"t.registers.output_buf.f_buf_func[1].c1"&"t.registers.output_buf.f_buf_func[1].c2"&"t.registers.output_buf.f_buf_func[1].n1"&"t.registers.output_buf.f_buf_func[1].n2"&"t.registers.output_buf.f_buf_func[1].sr_B"->"t.registers.output_buf.f_buf_func[1]._y"- +"t.registers.output_buf.f_buf_func[1]._y"->"t.registers.output_buf.f_buf_func[1].y"- +~("t.registers.output_buf.f_buf_func[1]._y")->"t.registers.output_buf.f_buf_func[1].y"+ +~"t.registers.output_buf.f_buf_func[2].c1"&~"t.registers.output_buf.f_buf_func[2].c2"|~"t.registers.output_buf.f_buf_func[2].pr_B"->"t.registers.output_buf.f_buf_func[2]._y"+ +"t.registers.output_buf.f_buf_func[2].c1"&"t.registers.output_buf.f_buf_func[2].c2"&"t.registers.output_buf.f_buf_func[2].n1"&"t.registers.output_buf.f_buf_func[2].n2"&"t.registers.output_buf.f_buf_func[2].sr_B"->"t.registers.output_buf.f_buf_func[2]._y"- +"t.registers.output_buf.f_buf_func[2]._y"->"t.registers.output_buf.f_buf_func[2].y"- +~("t.registers.output_buf.f_buf_func[2]._y")->"t.registers.output_buf.f_buf_func[2].y"+ +~"t.registers.output_buf.f_buf_func[3].c1"&~"t.registers.output_buf.f_buf_func[3].c2"|~"t.registers.output_buf.f_buf_func[3].pr_B"->"t.registers.output_buf.f_buf_func[3]._y"+ +"t.registers.output_buf.f_buf_func[3].c1"&"t.registers.output_buf.f_buf_func[3].c2"&"t.registers.output_buf.f_buf_func[3].n1"&"t.registers.output_buf.f_buf_func[3].n2"&"t.registers.output_buf.f_buf_func[3].sr_B"->"t.registers.output_buf.f_buf_func[3]._y"- +"t.registers.output_buf.f_buf_func[3]._y"->"t.registers.output_buf.f_buf_func[3].y"- +~("t.registers.output_buf.f_buf_func[3]._y")->"t.registers.output_buf.f_buf_func[3].y"+ += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf.en_buf_t.out[0]" += "t.registers.output_buf._en_X_t[1]" "t.registers.output_buf.en_buf_t.out[1]" += "t.registers.output_buf._en_X_t[2]" "t.registers.output_buf.en_buf_t.out[2]" += "t.registers.output_buf._en_X_t[3]" "t.registers.output_buf.en_buf_t.out[3]" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf.t_buf_func[3].c1" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf.t_buf_func[2].c1" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf.t_buf_func[1].c1" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf.t_buf_func[0].c1" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf._en_X_t[3]" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf._en_X_t[2]" += "t.registers.output_buf._en_X_t[0]" "t.registers.output_buf._en_X_t[1]" += "t.registers._clock_word_temp[0]" "t.registers.clock_buffer[0].in" += "t.registers._clock_word_temp[0]" "t.registers.and_encoder[0].y" += "t.registers._clock_word_temp[1]" "t.registers.clock_buffer[1].in" += "t.registers._clock_word_temp[1]" "t.registers.and_encoder[1].y" += "t.registers._clock_word_temp[2]" "t.registers.clock_buffer[2].in" += "t.registers._clock_word_temp[2]" "t.registers.and_encoder[2].y" += "t.registers._clock_word_temp[3]" "t.registers.clock_buffer[3].in" += "t.registers._clock_word_temp[3]" "t.registers.and_encoder[3].y" += "t.registers._in_a_write" "t.registers.ack_write_and.y" += "t.registers._in_a_write" "t.registers.ack_readwrite.a" += "t.registers._in_a_read" "t.registers.ack_read_and.y" += "t.registers._in_a_read" "t.registers.ack_readwrite.b" +"t.registers.ack_readwrite.a"|"t.registers.ack_readwrite.b"->"t.registers.ack_readwrite._y"- +~("t.registers.ack_readwrite.a"|"t.registers.ack_readwrite.b")->"t.registers.ack_readwrite._y"+ +"t.registers.ack_readwrite._y"->"t.registers.ack_readwrite.y"- +~("t.registers.ack_readwrite._y")->"t.registers.ack_readwrite.y"+ "t.registers.and_encoder[0].a"&"t.registers.and_encoder[0].b"->"t.registers.and_encoder[0]._y"- ~("t.registers.and_encoder[0].a"&"t.registers.and_encoder[0].b")->"t.registers.and_encoder[0]._y"+ "t.registers.and_encoder[0]._y"->"t.registers.and_encoder[0].y"- @@ -930,17 +1050,59 @@ ~("t.registers.and_encoder[3]._y")->"t.registers.and_encoder[3].y"+ = "t.registers._reset_mem_BX" "t.registers.reset_bufarray.in" = "t.registers._reset_mem_BX" "t.registers.reset_buf_BXX.y" -= "t.registers._ff_v" "t.registers._in_read.a" -= "t.registers._ff_v" "t.registers.ff_validator.out" -= "t.registers._ff_v" "t.registers.ack_and.b" +"t.registers.ack_read_and.a"&"t.registers.ack_read_and.b"->"t.registers.ack_read_and._y"- +~("t.registers.ack_read_and.a"&"t.registers.ack_read_and.b")->"t.registers.ack_read_and._y"+ +"t.registers.ack_read_and._y"->"t.registers.ack_read_and.y"- +~("t.registers.ack_read_and._y")->"t.registers.ack_read_and.y"+ += "t.registers.ack_read_and.b" "t.registers.output_buf.in.a" +"t.registers.word_to_read[0].a"&"t.registers.word_to_read[0].b"->"t.registers.word_to_read[0]._y"- +~("t.registers.word_to_read[0].a"&"t.registers.word_to_read[0].b")->"t.registers.word_to_read[0]._y"+ +"t.registers.word_to_read[0]._y"->"t.registers.word_to_read[0].y"- +~("t.registers.word_to_read[0]._y")->"t.registers.word_to_read[0].y"+ +"t.registers.word_to_read[1].a"&"t.registers.word_to_read[1].b"->"t.registers.word_to_read[1]._y"- +~("t.registers.word_to_read[1].a"&"t.registers.word_to_read[1].b")->"t.registers.word_to_read[1]._y"+ +"t.registers.word_to_read[1]._y"->"t.registers.word_to_read[1].y"- +~("t.registers.word_to_read[1]._y")->"t.registers.word_to_read[1].y"+ +"t.registers.word_to_read[2].a"&"t.registers.word_to_read[2].b"->"t.registers.word_to_read[2]._y"- +~("t.registers.word_to_read[2].a"&"t.registers.word_to_read[2].b")->"t.registers.word_to_read[2]._y"+ +"t.registers.word_to_read[2]._y"->"t.registers.word_to_read[2].y"- +~("t.registers.word_to_read[2]._y")->"t.registers.word_to_read[2].y"+ +"t.registers.word_to_read[3].a"&"t.registers.word_to_read[3].b"->"t.registers.word_to_read[3]._y"- +~("t.registers.word_to_read[3].a"&"t.registers.word_to_read[3].b")->"t.registers.word_to_read[3]._y"+ +"t.registers.word_to_read[3]._y"->"t.registers.word_to_read[3].y"- +~("t.registers.word_to_read[3]._y")->"t.registers.word_to_read[3].y"+ += "t.registers.word_to_read[3].y" "t.registers.word_to_read_X[3].in" += "t.registers.word_to_read[2].y" "t.registers.word_to_read_X[2].in" += "t.registers.word_to_read[1].y" "t.registers.word_to_read_X[1].in" += "t.registers.word_to_read[0].y" "t.registers.word_to_read_X[0].in" += "t.registers._in_a_temp" "t.registers.ack_input_X.in" += "t.registers._in_a_temp" "t.registers.ack_readwrite.y" += "t.registers.dly_cfg[0]" "t.registers.ack_dly.s[0]" += "t.registers.dly_cfg[1]" "t.registers.ack_dly.s[1]" = "t.registers.dly_cfg[0]" "t.registers.clk_dly.s[0]" = "t.registers.dly_cfg[1]" "t.registers.clk_dly.s[1]" += "t.registers.supply.vss" "t.registers.word_to_read_X[3].supply.vss" += "t.registers.supply.vdd" "t.registers.word_to_read_X[3].supply.vdd" = "t.registers.supply.vss" "t.registers.clock_buffer[3].supply.vss" = "t.registers.supply.vdd" "t.registers.clock_buffer[3].supply.vdd" += "t.registers.supply.vss" "t.registers.word_to_read_X[2].supply.vss" += "t.registers.supply.vdd" "t.registers.word_to_read_X[2].supply.vdd" = "t.registers.supply.vss" "t.registers.clock_buffer[2].supply.vss" = "t.registers.supply.vdd" "t.registers.clock_buffer[2].supply.vdd" += "t.registers.supply.vss" "t.registers.word_to_read_X[1].supply.vss" += "t.registers.supply.vdd" "t.registers.word_to_read_X[1].supply.vdd" = "t.registers.supply.vss" "t.registers.clock_buffer[1].supply.vss" = "t.registers.supply.vdd" "t.registers.clock_buffer[1].supply.vdd" += "t.registers.supply.vss" "t.registers.bitselector_f[1].supply.vss" += "t.registers.supply.vdd" "t.registers.bitselector_f[1].supply.vdd" += "t.registers.supply.vss" "t.registers.bitselector_t[1].supply.vss" += "t.registers.supply.vdd" "t.registers.bitselector_t[1].supply.vdd" += "t.registers.supply.vss" "t.registers.bitselector_f[0].supply.vss" += "t.registers.supply.vdd" "t.registers.bitselector_f[0].supply.vdd" += "t.registers.supply.vss" "t.registers.bitselector_t[0].supply.vss" += "t.registers.supply.vdd" "t.registers.bitselector_t[0].supply.vdd" += "t.registers.supply.vss" "t.registers.word_to_read_X[0].supply.vss" += "t.registers.supply.vdd" "t.registers.word_to_read_X[0].supply.vdd" = "t.registers.supply.vss" "t.registers.clock_buffer[0].supply.vss" = "t.registers.supply.vdd" "t.registers.clock_buffer[0].supply.vdd" = "t.registers.supply.vss" "t.registers.atree[3].supply.vss" @@ -953,204 +1115,100 @@ = "t.registers.supply.vdd" "t.registers.atree[0].supply.vdd" = "t.registers.supply.vss" "t.registers.reset_bufarray.supply.vss" = "t.registers.supply.vdd" "t.registers.reset_bufarray.supply.vdd" -= "t.registers.supply.vss" "t.registers.ff_validator.supply.vss" -= "t.registers.supply.vdd" "t.registers.ff_validator.supply.vdd" -= "t.registers.supply.vss" "t.registers.val_input_read.supply.vss" -= "t.registers.supply.vdd" "t.registers.val_input_read.supply.vdd" += "t.registers.supply.vss" "t.registers.output_buf.supply.vss" += "t.registers.supply.vdd" "t.registers.output_buf.supply.vdd" += "t.registers.supply.vss" "t.registers.ack_dly.supply.vss" += "t.registers.supply.vdd" "t.registers.ack_dly.supply.vdd" = "t.registers.supply.vss" "t.registers.clk_X.supply.vss" = "t.registers.supply.vdd" "t.registers.clk_X.supply.vdd" = "t.registers.supply.vss" "t.registers.clk_dly.supply.vss" = "t.registers.supply.vdd" "t.registers.clk_dly.supply.vdd" -= "t.registers.supply.vss" "t.registers.val_input_write.supply.vss" -= "t.registers.supply.vdd" "t.registers.val_input_write.supply.vdd" -= "t.registers.supply.vss" "t.registers.read_write_demux.supply.vss" -= "t.registers.supply.vdd" "t.registers.read_write_demux.supply.vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[7].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[7].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[7].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[7].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[6].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[6].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[6].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[6].vdd" += "t.registers.supply.vss" "t.registers.ack_input_X.supply.vss" += "t.registers.supply.vdd" "t.registers.ack_input_X.supply.vdd" += "t.registers.supply.vss" "t.registers.val_input_X.supply.vss" += "t.registers.supply.vdd" "t.registers.val_input_X.supply.vdd" += "t.registers.supply.vss" "t.registers.val_input.supply.vss" += "t.registers.supply.vdd" "t.registers.val_input.supply.vdd" += "t.registers.supply.vdd" "t.registers.ff[7].vdd" += "t.registers.supply.vdd" "t.registers.ff[6].vdd" += "t.registers.supply.vdd" "t.registers.word_to_read[3].vdd" = "t.registers.supply.vdd" "t.registers.and_encoder[3].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[5].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[5].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[5].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[5].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[4].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[4].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[4].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[4].vdd" += "t.registers.supply.vdd" "t.registers.ff[5].vdd" += "t.registers.supply.vdd" "t.registers.ff[4].vdd" += "t.registers.supply.vdd" "t.registers.word_to_read[2].vdd" = "t.registers.supply.vdd" "t.registers.and_encoder[2].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[3].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[3].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[3].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[3].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[2].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[2].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[2].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[2].vdd" += "t.registers.supply.vdd" "t.registers.ff[3].vdd" += "t.registers.supply.vdd" "t.registers.ff[2].vdd" += "t.registers.supply.vdd" "t.registers.word_to_read[1].vdd" = "t.registers.supply.vdd" "t.registers.and_encoder[1].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[1].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[1].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[1].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[1].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_f[0].vdd" -= "t.registers.supply.vdd" "t.registers.reading_activator_t[0].vdd" -= "t.registers.supply.vdd" "t.registers.ff_f[0].vdd" -= "t.registers.supply.vdd" "t.registers.ff_t[0].vdd" += "t.registers.supply.vdd" "t.registers.ff[1].vdd" += "t.registers.supply.vdd" "t.registers.ff[0].vdd" += "t.registers.supply.vdd" "t.registers.word_to_read[0].vdd" = "t.registers.supply.vdd" "t.registers.and_encoder[0].vdd" = "t.registers.supply.vdd" "t.registers.reset_buf_BXX.vdd" = "t.registers.supply.vdd" "t.registers.reset_buf_BX.vdd" += "t.registers.supply.vdd" "t.registers.ack_read_and.vdd" += "t.registers.supply.vdd" "t.registers.address_propagator_f[1].vdd" += "t.registers.supply.vdd" "t.registers.address_propagator_t[1].vdd" += "t.registers.supply.vdd" "t.registers.address_propagator_f[0].vdd" += "t.registers.supply.vdd" "t.registers.address_propagator_t[0].vdd" += "t.registers.supply.vdd" "t.registers.ack_write_and.vdd" = "t.registers.supply.vdd" "t.registers.inv_clk.vdd" -= "t.registers.supply.vdd" "t.registers.ack_and.vdd" -= "t.registers.supply.vss" "t.registers.reading_activator_f[7].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[7].vss" -= "t.registers.supply.vss" "t.registers.ff_f[7].vss" -= "t.registers.supply.vss" "t.registers.ff_t[7].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[6].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[6].vss" -= "t.registers.supply.vss" "t.registers.ff_f[6].vss" -= "t.registers.supply.vss" "t.registers.ff_t[6].vss" += "t.registers.supply.vdd" "t.registers.clk_switch.vdd" += "t.registers.supply.vdd" "t.registers.ack_readwrite.vdd" += "t.registers.supply.vss" "t.registers.ff[7].vss" += "t.registers.supply.vss" "t.registers.ff[6].vss" += "t.registers.supply.vss" "t.registers.word_to_read[3].vss" = "t.registers.supply.vss" "t.registers.and_encoder[3].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[5].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[5].vss" -= "t.registers.supply.vss" "t.registers.ff_f[5].vss" -= "t.registers.supply.vss" "t.registers.ff_t[5].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[4].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[4].vss" -= "t.registers.supply.vss" "t.registers.ff_f[4].vss" -= "t.registers.supply.vss" "t.registers.ff_t[4].vss" += "t.registers.supply.vss" "t.registers.ff[5].vss" += "t.registers.supply.vss" "t.registers.ff[4].vss" += "t.registers.supply.vss" "t.registers.word_to_read[2].vss" = "t.registers.supply.vss" "t.registers.and_encoder[2].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[3].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[3].vss" -= "t.registers.supply.vss" "t.registers.ff_f[3].vss" -= "t.registers.supply.vss" "t.registers.ff_t[3].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[2].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[2].vss" -= "t.registers.supply.vss" "t.registers.ff_f[2].vss" -= "t.registers.supply.vss" "t.registers.ff_t[2].vss" += "t.registers.supply.vss" "t.registers.ff[3].vss" += "t.registers.supply.vss" "t.registers.ff[2].vss" += "t.registers.supply.vss" "t.registers.word_to_read[1].vss" = "t.registers.supply.vss" "t.registers.and_encoder[1].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[1].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[1].vss" -= "t.registers.supply.vss" "t.registers.ff_f[1].vss" -= "t.registers.supply.vss" "t.registers.ff_t[1].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_f[0].vss" -= "t.registers.supply.vss" "t.registers.reading_activator_t[0].vss" -= "t.registers.supply.vss" "t.registers.ff_f[0].vss" -= "t.registers.supply.vss" "t.registers.ff_t[0].vss" += "t.registers.supply.vss" "t.registers.ff[1].vss" += "t.registers.supply.vss" "t.registers.ff[0].vss" += "t.registers.supply.vss" "t.registers.word_to_read[0].vss" = "t.registers.supply.vss" "t.registers.and_encoder[0].vss" = "t.registers.supply.vss" "t.registers.reset_buf_BXX.vss" = "t.registers.supply.vss" "t.registers.reset_buf_BX.vss" += "t.registers.supply.vss" "t.registers.ack_read_and.vss" += "t.registers.supply.vss" "t.registers.address_propagator_f[1].vss" += "t.registers.supply.vss" "t.registers.address_propagator_t[1].vss" += "t.registers.supply.vss" "t.registers.address_propagator_f[0].vss" += "t.registers.supply.vss" "t.registers.address_propagator_t[0].vss" += "t.registers.supply.vss" "t.registers.ack_write_and.vss" = "t.registers.supply.vss" "t.registers.inv_clk.vss" -= "t.registers.supply.vss" "t.registers.ack_and.vss" += "t.registers.supply.vss" "t.registers.clk_switch.vss" += "t.registers.supply.vss" "t.registers.ack_readwrite.vss" "t.registers.inv_clk.a"->"t.registers.inv_clk.y"- ~("t.registers.inv_clk.a")->"t.registers.inv_clk.y"+ -= "t.registers.data[3].d[0]" "t.registers.reading_activator_t[6].b" -= "t.registers.data[3].d[0]" "t.registers.ff_t[6].q" -= "t.registers.data[3].d[1]" "t.registers.reading_activator_t[7].b" -= "t.registers.data[3].d[1]" "t.registers.ff_t[7].q" -= "t.registers.data[2].d[0]" "t.registers.reading_activator_t[4].b" -= "t.registers.data[2].d[0]" "t.registers.ff_t[4].q" -= "t.registers.data[2].d[1]" "t.registers.reading_activator_t[5].b" -= "t.registers.data[2].d[1]" "t.registers.ff_t[5].q" -= "t.registers.data[1].d[0]" "t.registers.reading_activator_t[2].b" -= "t.registers.data[1].d[0]" "t.registers.ff_t[2].q" -= "t.registers.data[1].d[1]" "t.registers.reading_activator_t[3].b" -= "t.registers.data[1].d[1]" "t.registers.ff_t[3].q" -= "t.registers.data[0].d[0]" "t.registers.reading_activator_t[0].b" -= "t.registers.data[0].d[0]" "t.registers.ff_t[0].q" -= "t.registers.data[0].d[1]" "t.registers.reading_activator_t[1].b" -= "t.registers.data[0].d[1]" "t.registers.ff_t[1].q" -= "t.registers._in_read_temp.d[0].d[0]" "t.registers._in_read_temp.d[0].f" -= "t.registers._in_read_temp.d[0].d[1]" "t.registers._in_read_temp.d[0].t" -= "t.registers._in_read_temp.d[1].d[0]" "t.registers._in_read_temp.d[1].f" -= "t.registers._in_read_temp.d[1].d[1]" "t.registers._in_read_temp.d[1].t" -= "t.registers._in_read_temp.d[2].d[0]" "t.registers._in_read_temp.d[2].f" -= "t.registers._in_read_temp.d[2].d[1]" "t.registers._in_read_temp.d[2].t" -= "t.registers._in_read_temp.d[3].d[0]" "t.registers._in_read_temp.d[3].f" -= "t.registers._in_read_temp.d[3].d[1]" "t.registers._in_read_temp.d[3].t" -= "t.registers._in_read_temp.d[3].d[0]" "t.registers._in_read_temp.d[3].f" -= "t.registers._in_read_temp.d[3].d[1]" "t.registers._in_read_temp.d[3].t" -= "t.registers._in_read_temp.d[2].d[0]" "t.registers._in_read_temp.d[2].f" -= "t.registers._in_read_temp.d[2].d[1]" "t.registers._in_read_temp.d[2].t" -= "t.registers._in_read_temp.d[1].d[0]" "t.registers._in_read_temp.d[1].f" -= "t.registers._in_read_temp.d[1].d[1]" "t.registers._in_read_temp.d[1].t" -= "t.registers._in_read_temp.d[0].d[0]" "t.registers._in_read_temp.d[0].f" -= "t.registers._in_read_temp.d[0].d[1]" "t.registers._in_read_temp.d[0].t" -= "t.registers._in_read_temp.d[0].f" "t.registers.val_input_read.in.d[0].f" -= "t.registers._in_read_temp.d[0].t" "t.registers.val_input_read.in.d[0].t" -= "t.registers._in_read_temp.d[0].d[0]" "t.registers.val_input_read.in.d[0].d[0]" -= "t.registers._in_read_temp.d[0].d[1]" "t.registers.val_input_read.in.d[0].d[1]" -= "t.registers._in_read_temp.d[1].f" "t.registers.val_input_read.in.d[1].f" -= "t.registers._in_read_temp.d[1].t" "t.registers.val_input_read.in.d[1].t" -= "t.registers._in_read_temp.d[1].d[0]" "t.registers.val_input_read.in.d[1].d[0]" -= "t.registers._in_read_temp.d[1].d[1]" "t.registers.val_input_read.in.d[1].d[1]" -= "t.registers._in_read_temp.d[2].f" "t.registers.val_input_read.in.d[2].f" -= "t.registers._in_read_temp.d[2].t" "t.registers.val_input_read.in.d[2].t" -= "t.registers._in_read_temp.d[2].d[0]" "t.registers.val_input_read.in.d[2].d[0]" -= "t.registers._in_read_temp.d[2].d[1]" "t.registers.val_input_read.in.d[2].d[1]" -= "t.registers._in_read_temp.d[3].f" "t.registers.val_input_read.in.d[3].f" -= "t.registers._in_read_temp.d[3].t" "t.registers.val_input_read.in.d[3].t" -= "t.registers._in_read_temp.d[3].d[0]" "t.registers.val_input_read.in.d[3].d[0]" -= "t.registers._in_read_temp.d[3].d[1]" "t.registers.val_input_read.in.d[3].d[1]" -= "t.registers._in_read_temp.d[0].f" "t.registers._in_read.d.d[0].f" -= "t.registers._in_read_temp.d[0].t" "t.registers._in_read.d.d[0].t" -= "t.registers._in_read_temp.d[0].d[0]" "t.registers._in_read.d.d[0].d[0]" -= "t.registers._in_read_temp.d[0].d[1]" "t.registers._in_read.d.d[0].d[1]" -= "t.registers._in_read_temp.d[1].f" "t.registers._in_read.d.d[1].f" -= "t.registers._in_read_temp.d[1].t" "t.registers._in_read.d.d[1].t" -= "t.registers._in_read_temp.d[1].d[0]" "t.registers._in_read.d.d[1].d[0]" -= "t.registers._in_read_temp.d[1].d[1]" "t.registers._in_read.d.d[1].d[1]" -= "t.registers._in_read_temp.d[2].f" "t.registers._in_read.d.d[2].f" -= "t.registers._in_read_temp.d[2].t" "t.registers._in_read.d.d[2].t" -= "t.registers._in_read_temp.d[2].d[0]" "t.registers._in_read.d.d[2].d[0]" -= "t.registers._in_read_temp.d[2].d[1]" "t.registers._in_read.d.d[2].d[1]" -= "t.registers._in_read_temp.d[3].f" "t.registers._in_read.d.d[3].f" -= "t.registers._in_read_temp.d[3].t" "t.registers._in_read.d.d[3].t" -= "t.registers._in_read_temp.d[3].d[0]" "t.registers._in_read.d.d[3].d[0]" -= "t.registers._in_read_temp.d[3].d[1]" "t.registers._in_read.d.d[3].d[1]" -= "t.registers._in_read_temp.d[3].d[0]" "t.registers._in_read_temp.d[3].f" -= "t.registers._in_read_temp.d[3].d[1]" "t.registers._in_read_temp.d[3].t" -= "t.registers._in_read_temp.d[2].d[0]" "t.registers._in_read_temp.d[2].f" -= "t.registers._in_read_temp.d[2].d[1]" "t.registers._in_read_temp.d[2].t" -= "t.registers._in_read_temp.d[1].d[0]" "t.registers._in_read_temp.d[1].f" -= "t.registers._in_read_temp.d[1].d[1]" "t.registers._in_read_temp.d[1].t" -= "t.registers._in_read_temp.d[0].d[0]" "t.registers._in_read_temp.d[0].f" -= "t.registers._in_read_temp.d[0].d[1]" "t.registers._in_read_temp.d[0].t" -"t.registers.reading_activator_f[0].a"&"t.registers.reading_activator_f[0].b"&"t.registers.reading_activator_f[0].c"->"t.registers.reading_activator_f[0]._y"- -~("t.registers.reading_activator_f[0].a"&"t.registers.reading_activator_f[0].b"&"t.registers.reading_activator_f[0].c")->"t.registers.reading_activator_f[0]._y"+ -"t.registers.reading_activator_f[0]._y"->"t.registers.reading_activator_f[0].y"- -~("t.registers.reading_activator_f[0]._y")->"t.registers.reading_activator_f[0].y"+ -"t.registers.reading_activator_f[1].a"&"t.registers.reading_activator_f[1].b"&"t.registers.reading_activator_f[1].c"->"t.registers.reading_activator_f[1]._y"- -~("t.registers.reading_activator_f[1].a"&"t.registers.reading_activator_f[1].b"&"t.registers.reading_activator_f[1].c")->"t.registers.reading_activator_f[1]._y"+ -"t.registers.reading_activator_f[1]._y"->"t.registers.reading_activator_f[1].y"- -~("t.registers.reading_activator_f[1]._y")->"t.registers.reading_activator_f[1].y"+ -"t.registers.reading_activator_f[2].a"&"t.registers.reading_activator_f[2].b"&"t.registers.reading_activator_f[2].c"->"t.registers.reading_activator_f[2]._y"- -~("t.registers.reading_activator_f[2].a"&"t.registers.reading_activator_f[2].b"&"t.registers.reading_activator_f[2].c")->"t.registers.reading_activator_f[2]._y"+ -"t.registers.reading_activator_f[2]._y"->"t.registers.reading_activator_f[2].y"- -~("t.registers.reading_activator_f[2]._y")->"t.registers.reading_activator_f[2].y"+ -"t.registers.reading_activator_f[3].a"&"t.registers.reading_activator_f[3].b"&"t.registers.reading_activator_f[3].c"->"t.registers.reading_activator_f[3]._y"- -~("t.registers.reading_activator_f[3].a"&"t.registers.reading_activator_f[3].b"&"t.registers.reading_activator_f[3].c")->"t.registers.reading_activator_f[3]._y"+ -"t.registers.reading_activator_f[3]._y"->"t.registers.reading_activator_f[3].y"- -~("t.registers.reading_activator_f[3]._y")->"t.registers.reading_activator_f[3].y"+ -"t.registers.reading_activator_f[4].a"&"t.registers.reading_activator_f[4].b"&"t.registers.reading_activator_f[4].c"->"t.registers.reading_activator_f[4]._y"- -~("t.registers.reading_activator_f[4].a"&"t.registers.reading_activator_f[4].b"&"t.registers.reading_activator_f[4].c")->"t.registers.reading_activator_f[4]._y"+ -"t.registers.reading_activator_f[4]._y"->"t.registers.reading_activator_f[4].y"- -~("t.registers.reading_activator_f[4]._y")->"t.registers.reading_activator_f[4].y"+ -"t.registers.reading_activator_f[5].a"&"t.registers.reading_activator_f[5].b"&"t.registers.reading_activator_f[5].c"->"t.registers.reading_activator_f[5]._y"- -~("t.registers.reading_activator_f[5].a"&"t.registers.reading_activator_f[5].b"&"t.registers.reading_activator_f[5].c")->"t.registers.reading_activator_f[5]._y"+ -"t.registers.reading_activator_f[5]._y"->"t.registers.reading_activator_f[5].y"- -~("t.registers.reading_activator_f[5]._y")->"t.registers.reading_activator_f[5].y"+ -"t.registers.reading_activator_f[6].a"&"t.registers.reading_activator_f[6].b"&"t.registers.reading_activator_f[6].c"->"t.registers.reading_activator_f[6]._y"- -~("t.registers.reading_activator_f[6].a"&"t.registers.reading_activator_f[6].b"&"t.registers.reading_activator_f[6].c")->"t.registers.reading_activator_f[6]._y"+ -"t.registers.reading_activator_f[6]._y"->"t.registers.reading_activator_f[6].y"- -~("t.registers.reading_activator_f[6]._y")->"t.registers.reading_activator_f[6].y"+ -"t.registers.reading_activator_f[7].a"&"t.registers.reading_activator_f[7].b"&"t.registers.reading_activator_f[7].c"->"t.registers.reading_activator_f[7]._y"- -~("t.registers.reading_activator_f[7].a"&"t.registers.reading_activator_f[7].b"&"t.registers.reading_activator_f[7].c")->"t.registers.reading_activator_f[7]._y"+ -"t.registers.reading_activator_f[7]._y"->"t.registers.reading_activator_f[7].y"- -~("t.registers.reading_activator_f[7]._y")->"t.registers.reading_activator_f[7].y"+ += "t.registers.data[3].d[0]" "t.registers.word_selector_t[6].b" += "t.registers.data[3].d[0]" "t.registers.ff[6].q" += "t.registers.data[3].d[1]" "t.registers.word_selector_t[7].b" += "t.registers.data[3].d[1]" "t.registers.ff[7].q" += "t.registers.data[2].d[0]" "t.registers.word_selector_t[4].b" += "t.registers.data[2].d[0]" "t.registers.ff[4].q" += "t.registers.data[2].d[1]" "t.registers.word_selector_t[5].b" += "t.registers.data[2].d[1]" "t.registers.ff[5].q" += "t.registers.data[1].d[0]" "t.registers.word_selector_t[2].b" += "t.registers.data[1].d[0]" "t.registers.ff[2].q" += "t.registers.data[1].d[1]" "t.registers.word_selector_t[3].b" += "t.registers.data[1].d[1]" "t.registers.ff[3].q" += "t.registers.data[0].d[0]" "t.registers.word_selector_t[0].b" += "t.registers.data[0].d[0]" "t.registers.ff[0].q" += "t.registers.data[0].d[1]" "t.registers.word_selector_t[1].b" += "t.registers.data[0].d[1]" "t.registers.ff[1].q" +"t.registers.val_input_X.buf4.a"->"t.registers.val_input_X.buf4._y"- +~("t.registers.val_input_X.buf4.a")->"t.registers.val_input_X.buf4._y"+ +"t.registers.val_input_X.buf4._y"->"t.registers.val_input_X.buf4.y"- +~("t.registers.val_input_X.buf4._y")->"t.registers.val_input_X.buf4.y"+ += "t.registers.val_input_X.supply.vdd" "t.registers.val_input_X.buf4.vdd" += "t.registers.val_input_X.supply.vss" "t.registers.val_input_X.buf4.vss" += "t.registers.val_input_X.out" "t.registers.val_input_X.buf4.y" += "t.registers.val_input_X.in" "t.registers.val_input_X.buf4.a" = "t.registers.out.d.d[0].d[0]" "t.registers.out.d.d[0].f" = "t.registers.out.d.d[0].d[1]" "t.registers.out.d.d[0].t" = "t.registers.out.d.d[1].d[0]" "t.registers.out.d.d[1].f" @@ -1175,36 +1233,40 @@ = "t.registers.out.d.d[1].d[1]" "t.registers.out.d.d[1].t" = "t.registers.out.d.d[0].d[0]" "t.registers.out.d.d[0].f" = "t.registers.out.d.d[0].d[1]" "t.registers.out.d.d[0].t" -= "t.registers.out.d.d[0].f" "t.registers._out_temp.d[0].f" -= "t.registers.out.d.d[0].t" "t.registers._out_temp.d[0].t" -= "t.registers.out.d.d[0].d[0]" "t.registers._out_temp.d[0].d[0]" -= "t.registers.out.d.d[0].d[1]" "t.registers._out_temp.d[0].d[1]" -= "t.registers.out.d.d[1].f" "t.registers._out_temp.d[1].f" -= "t.registers.out.d.d[1].t" "t.registers._out_temp.d[1].t" -= "t.registers.out.d.d[1].d[0]" "t.registers._out_temp.d[1].d[0]" -= "t.registers.out.d.d[1].d[1]" "t.registers._out_temp.d[1].d[1]" += "t.registers.out.v" "t.registers.output_buf.out.v" += "t.registers.out.a" "t.registers.output_buf.out.a" += "t.registers.out.d.d[0].f" "t.registers.output_buf.out.d.d[0].f" += "t.registers.out.d.d[0].t" "t.registers.output_buf.out.d.d[0].t" += "t.registers.out.d.d[0].d[0]" "t.registers.output_buf.out.d.d[0].d[0]" += "t.registers.out.d.d[0].d[1]" "t.registers.output_buf.out.d.d[0].d[1]" += "t.registers.out.d.d[1].f" "t.registers.output_buf.out.d.d[1].f" += "t.registers.out.d.d[1].t" "t.registers.output_buf.out.d.d[1].t" += "t.registers.out.d.d[1].d[0]" "t.registers.output_buf.out.d.d[1].d[0]" += "t.registers.out.d.d[1].d[1]" "t.registers.output_buf.out.d.d[1].d[1]" += "t.registers.out.d.d[2].f" "t.registers.output_buf.out.d.d[2].f" += "t.registers.out.d.d[2].t" "t.registers.output_buf.out.d.d[2].t" += "t.registers.out.d.d[2].d[0]" "t.registers.output_buf.out.d.d[2].d[0]" += "t.registers.out.d.d[2].d[1]" "t.registers.output_buf.out.d.d[2].d[1]" += "t.registers.out.d.d[3].f" "t.registers.output_buf.out.d.d[3].f" += "t.registers.out.d.d[3].t" "t.registers.output_buf.out.d.d[3].t" += "t.registers.out.d.d[3].d[0]" "t.registers.output_buf.out.d.d[3].d[0]" += "t.registers.out.d.d[3].d[1]" "t.registers.output_buf.out.d.d[3].d[1]" = "t.registers.out.d.d[3].d[0]" "t.registers.out.d.d[3].f" = "t.registers.out.d.d[3].d[1]" "t.registers.out.d.d[3].t" -= "t.registers.out.d.d[1].d[0]" "t.registers.reading_activator_f[7].y" -= "t.registers.out.d.d[1].d[0]" "t.registers.reading_activator_f[5].y" -= "t.registers.out.d.d[1].d[0]" "t.registers.reading_activator_f[3].y" -= "t.registers.out.d.d[1].d[0]" "t.registers.reading_activator_f[1].y" += "t.registers.out.d.d[2].d[0]" "t.registers.out.d.d[2].f" += "t.registers.out.d.d[2].d[1]" "t.registers.out.d.d[2].t" = "t.registers.out.d.d[1].d[0]" "t.registers.out.d.d[1].f" -= "t.registers.out.d.d[1].d[1]" "t.registers.reading_activator_t[7].y" -= "t.registers.out.d.d[1].d[1]" "t.registers.reading_activator_t[5].y" -= "t.registers.out.d.d[1].d[1]" "t.registers.reading_activator_t[3].y" -= "t.registers.out.d.d[1].d[1]" "t.registers.reading_activator_t[1].y" = "t.registers.out.d.d[1].d[1]" "t.registers.out.d.d[1].t" -= "t.registers.out.d.d[0].d[0]" "t.registers.reading_activator_f[6].y" -= "t.registers.out.d.d[0].d[0]" "t.registers.reading_activator_f[4].y" -= "t.registers.out.d.d[0].d[0]" "t.registers.reading_activator_f[2].y" -= "t.registers.out.d.d[0].d[0]" "t.registers.reading_activator_f[0].y" = "t.registers.out.d.d[0].d[0]" "t.registers.out.d.d[0].f" -= "t.registers.out.d.d[0].d[1]" "t.registers.reading_activator_t[6].y" -= "t.registers.out.d.d[0].d[1]" "t.registers.reading_activator_t[4].y" -= "t.registers.out.d.d[0].d[1]" "t.registers.reading_activator_t[2].y" -= "t.registers.out.d.d[0].d[1]" "t.registers.reading_activator_t[0].y" = "t.registers.out.d.d[0].d[1]" "t.registers.out.d.d[0].t" +"t.registers.ack_input_X.buf4.a"->"t.registers.ack_input_X.buf4._y"- +~("t.registers.ack_input_X.buf4.a")->"t.registers.ack_input_X.buf4._y"+ +"t.registers.ack_input_X.buf4._y"->"t.registers.ack_input_X.buf4.y"- +~("t.registers.ack_input_X.buf4._y")->"t.registers.ack_input_X.buf4.y"+ += "t.registers.ack_input_X.supply.vdd" "t.registers.ack_input_X.buf4.vdd" += "t.registers.ack_input_X.supply.vss" "t.registers.ack_input_X.buf4.vss" += "t.registers.ack_input_X.out" "t.registers.ack_input_X.buf4.y" += "t.registers.ack_input_X.in" "t.registers.ack_input_X.buf4.a" = "t.registers.atree[0].supply.vdd" "t.registers.atree[0].and2s[0].vdd" = "t.registers.atree[0].supply.vss" "t.registers.atree[0].and2s[0].vss" "t.registers.atree[0].and2s[0].a"&"t.registers.atree[0].and2s[0].b"->"t.registers.atree[0].and2s[0]._y"- @@ -1257,6 +1319,186 @@ ~("t.registers.reset_buf_BXX.a")->"t.registers.reset_buf_BXX._y"+ "t.registers.reset_buf_BXX._y"->"t.registers.reset_buf_BXX.y"- ~("t.registers.reset_buf_BXX._y")->"t.registers.reset_buf_BXX.y"+ +"t.registers.bitselector_t[0].or2s[0].a"|"t.registers.bitselector_t[0].or2s[0].b"->"t.registers.bitselector_t[0].or2s[0]._y"- +~("t.registers.bitselector_t[0].or2s[0].a"|"t.registers.bitselector_t[0].or2s[0].b")->"t.registers.bitselector_t[0].or2s[0]._y"+ +"t.registers.bitselector_t[0].or2s[0]._y"->"t.registers.bitselector_t[0].or2s[0].y"- +~("t.registers.bitselector_t[0].or2s[0]._y")->"t.registers.bitselector_t[0].or2s[0].y"+ +"t.registers.bitselector_t[0].or2s[1].a"|"t.registers.bitselector_t[0].or2s[1].b"->"t.registers.bitselector_t[0].or2s[1]._y"- +~("t.registers.bitselector_t[0].or2s[1].a"|"t.registers.bitselector_t[0].or2s[1].b")->"t.registers.bitselector_t[0].or2s[1]._y"+ +"t.registers.bitselector_t[0].or2s[1]._y"->"t.registers.bitselector_t[0].or2s[1].y"- +~("t.registers.bitselector_t[0].or2s[1]._y")->"t.registers.bitselector_t[0].or2s[1].y"+ +"t.registers.bitselector_t[0].or2s[2].a"|"t.registers.bitselector_t[0].or2s[2].b"->"t.registers.bitselector_t[0].or2s[2]._y"- +~("t.registers.bitselector_t[0].or2s[2].a"|"t.registers.bitselector_t[0].or2s[2].b")->"t.registers.bitselector_t[0].or2s[2]._y"+ +"t.registers.bitselector_t[0].or2s[2]._y"->"t.registers.bitselector_t[0].or2s[2].y"- +~("t.registers.bitselector_t[0].or2s[2]._y")->"t.registers.bitselector_t[0].or2s[2].y"+ += "t.registers.bitselector_t[0].tmp[4]" "t.registers.bitselector_t[0].or2s[2].a" += "t.registers.bitselector_t[0].tmp[4]" "t.registers.bitselector_t[0].or2s[0].y" += "t.registers.bitselector_t[0].tmp[5]" "t.registers.bitselector_t[0].or2s[2].b" += "t.registers.bitselector_t[0].tmp[5]" "t.registers.bitselector_t[0].or2s[1].y" += "t.registers.bitselector_t[0].supply.vdd" "t.registers.bitselector_t[0].or2s[2].vdd" += "t.registers.bitselector_t[0].supply.vdd" "t.registers.bitselector_t[0].or2s[1].vdd" += "t.registers.bitselector_t[0].supply.vdd" "t.registers.bitselector_t[0].or2s[0].vdd" += "t.registers.bitselector_t[0].supply.vss" "t.registers.bitselector_t[0].or2s[2].vss" += "t.registers.bitselector_t[0].supply.vss" "t.registers.bitselector_t[0].or2s[1].vss" += "t.registers.bitselector_t[0].supply.vss" "t.registers.bitselector_t[0].or2s[0].vss" += "t.registers.bitselector_t[0].in[0]" "t.registers.bitselector_t[0].or2s[0].a" += "t.registers.bitselector_t[0].in[0]" "t.registers.bitselector_t[0].tmp[0]" += "t.registers.bitselector_t[0].in[1]" "t.registers.bitselector_t[0].or2s[0].b" += "t.registers.bitselector_t[0].in[1]" "t.registers.bitselector_t[0].tmp[1]" += "t.registers.bitselector_t[0].in[2]" "t.registers.bitselector_t[0].or2s[1].a" += "t.registers.bitselector_t[0].in[2]" "t.registers.bitselector_t[0].tmp[2]" += "t.registers.bitselector_t[0].in[3]" "t.registers.bitselector_t[0].or2s[1].b" += "t.registers.bitselector_t[0].in[3]" "t.registers.bitselector_t[0].tmp[3]" += "t.registers.bitselector_t[0].out" "t.registers.bitselector_t[0].or2s[2].y" += "t.registers.bitselector_t[0].out" "t.registers.bitselector_t[0].tmp[6]" +"t.registers.bitselector_t[1].or2s[0].a"|"t.registers.bitselector_t[1].or2s[0].b"->"t.registers.bitselector_t[1].or2s[0]._y"- +~("t.registers.bitselector_t[1].or2s[0].a"|"t.registers.bitselector_t[1].or2s[0].b")->"t.registers.bitselector_t[1].or2s[0]._y"+ +"t.registers.bitselector_t[1].or2s[0]._y"->"t.registers.bitselector_t[1].or2s[0].y"- +~("t.registers.bitselector_t[1].or2s[0]._y")->"t.registers.bitselector_t[1].or2s[0].y"+ +"t.registers.bitselector_t[1].or2s[1].a"|"t.registers.bitselector_t[1].or2s[1].b"->"t.registers.bitselector_t[1].or2s[1]._y"- +~("t.registers.bitselector_t[1].or2s[1].a"|"t.registers.bitselector_t[1].or2s[1].b")->"t.registers.bitselector_t[1].or2s[1]._y"+ +"t.registers.bitselector_t[1].or2s[1]._y"->"t.registers.bitselector_t[1].or2s[1].y"- +~("t.registers.bitselector_t[1].or2s[1]._y")->"t.registers.bitselector_t[1].or2s[1].y"+ +"t.registers.bitselector_t[1].or2s[2].a"|"t.registers.bitselector_t[1].or2s[2].b"->"t.registers.bitselector_t[1].or2s[2]._y"- +~("t.registers.bitselector_t[1].or2s[2].a"|"t.registers.bitselector_t[1].or2s[2].b")->"t.registers.bitselector_t[1].or2s[2]._y"+ +"t.registers.bitselector_t[1].or2s[2]._y"->"t.registers.bitselector_t[1].or2s[2].y"- +~("t.registers.bitselector_t[1].or2s[2]._y")->"t.registers.bitselector_t[1].or2s[2].y"+ += "t.registers.bitselector_t[1].tmp[4]" "t.registers.bitselector_t[1].or2s[2].a" += "t.registers.bitselector_t[1].tmp[4]" "t.registers.bitselector_t[1].or2s[0].y" += "t.registers.bitselector_t[1].tmp[5]" "t.registers.bitselector_t[1].or2s[2].b" += "t.registers.bitselector_t[1].tmp[5]" "t.registers.bitselector_t[1].or2s[1].y" += "t.registers.bitselector_t[1].supply.vdd" "t.registers.bitselector_t[1].or2s[2].vdd" += "t.registers.bitselector_t[1].supply.vdd" "t.registers.bitselector_t[1].or2s[1].vdd" += "t.registers.bitselector_t[1].supply.vdd" "t.registers.bitselector_t[1].or2s[0].vdd" += "t.registers.bitselector_t[1].supply.vss" "t.registers.bitselector_t[1].or2s[2].vss" += "t.registers.bitselector_t[1].supply.vss" "t.registers.bitselector_t[1].or2s[1].vss" += "t.registers.bitselector_t[1].supply.vss" "t.registers.bitselector_t[1].or2s[0].vss" += "t.registers.bitselector_t[1].in[0]" "t.registers.bitselector_t[1].or2s[0].a" += "t.registers.bitselector_t[1].in[0]" "t.registers.bitselector_t[1].tmp[0]" += "t.registers.bitselector_t[1].in[1]" "t.registers.bitselector_t[1].or2s[0].b" += "t.registers.bitselector_t[1].in[1]" "t.registers.bitselector_t[1].tmp[1]" += "t.registers.bitselector_t[1].in[2]" "t.registers.bitselector_t[1].or2s[1].a" += "t.registers.bitselector_t[1].in[2]" "t.registers.bitselector_t[1].tmp[2]" += "t.registers.bitselector_t[1].in[3]" "t.registers.bitselector_t[1].or2s[1].b" += "t.registers.bitselector_t[1].in[3]" "t.registers.bitselector_t[1].tmp[3]" += "t.registers.bitselector_t[1].out" "t.registers.bitselector_t[1].or2s[2].y" += "t.registers.bitselector_t[1].out" "t.registers.bitselector_t[1].tmp[6]" += "t.registers.bitselector_t[1].out" "t.registers.output_buf.in.d.d[1].t" += "t.registers.bitselector_t[1].out" "t.registers.output_buf.in.d.d[1].d[1]" += "t.registers.bitselector_t[0].out" "t.registers.output_buf.in.d.d[0].t" += "t.registers.bitselector_t[0].out" "t.registers.output_buf.in.d.d[0].d[1]" +~"t.registers.val_input.ct.C2Els[0].c1"&~"t.registers.val_input.ct.C2Els[0].c2"->"t.registers.val_input.ct.C2Els[0]._y"+ +"t.registers.val_input.ct.C2Els[0].c1"&"t.registers.val_input.ct.C2Els[0].c2"->"t.registers.val_input.ct.C2Els[0]._y"- +"t.registers.val_input.ct.C2Els[0]._y"->"t.registers.val_input.ct.C2Els[0].y"- +~("t.registers.val_input.ct.C2Els[0]._y")->"t.registers.val_input.ct.C2Els[0].y"+ +~"t.registers.val_input.ct.C2Els[1].c1"&~"t.registers.val_input.ct.C2Els[1].c2"->"t.registers.val_input.ct.C2Els[1]._y"+ +"t.registers.val_input.ct.C2Els[1].c1"&"t.registers.val_input.ct.C2Els[1].c2"->"t.registers.val_input.ct.C2Els[1]._y"- +"t.registers.val_input.ct.C2Els[1]._y"->"t.registers.val_input.ct.C2Els[1].y"- +~("t.registers.val_input.ct.C2Els[1]._y")->"t.registers.val_input.ct.C2Els[1].y"+ +~"t.registers.val_input.ct.C3Els[0].c1"&~"t.registers.val_input.ct.C3Els[0].c2"&~"t.registers.val_input.ct.C3Els[0].c3"->"t.registers.val_input.ct.C3Els[0]._y"+ +"t.registers.val_input.ct.C3Els[0].c1"&"t.registers.val_input.ct.C3Els[0].c2"&"t.registers.val_input.ct.C3Els[0].c3"->"t.registers.val_input.ct.C3Els[0]._y"- +"t.registers.val_input.ct.C3Els[0]._y"->"t.registers.val_input.ct.C3Els[0].y"- +~("t.registers.val_input.ct.C3Els[0]._y")->"t.registers.val_input.ct.C3Els[0].y"+ += "t.registers.val_input.ct.tmp[5]" "t.registers.val_input.ct.C2Els[1].c1" += "t.registers.val_input.ct.tmp[5]" "t.registers.val_input.ct.C2Els[0].y" += "t.registers.val_input.ct.tmp[6]" "t.registers.val_input.ct.C2Els[1].c2" += "t.registers.val_input.ct.tmp[6]" "t.registers.val_input.ct.C3Els[0].y" += "t.registers.val_input.ct.supply.vdd" "t.registers.val_input.ct.C3Els[0].vdd" += "t.registers.val_input.ct.supply.vdd" "t.registers.val_input.ct.C2Els[1].vdd" += "t.registers.val_input.ct.supply.vdd" "t.registers.val_input.ct.C2Els[0].vdd" += "t.registers.val_input.ct.supply.vss" "t.registers.val_input.ct.C3Els[0].vss" += "t.registers.val_input.ct.supply.vss" "t.registers.val_input.ct.C2Els[1].vss" += "t.registers.val_input.ct.supply.vss" "t.registers.val_input.ct.C2Els[0].vss" += "t.registers.val_input.ct.in[0]" "t.registers.val_input.ct.C2Els[0].c1" += "t.registers.val_input.ct.in[0]" "t.registers.val_input.ct.tmp[0]" += "t.registers.val_input.ct.in[1]" "t.registers.val_input.ct.C2Els[0].c2" += "t.registers.val_input.ct.in[1]" "t.registers.val_input.ct.tmp[1]" += "t.registers.val_input.ct.in[2]" "t.registers.val_input.ct.C3Els[0].c1" += "t.registers.val_input.ct.in[2]" "t.registers.val_input.ct.tmp[2]" += "t.registers.val_input.ct.in[3]" "t.registers.val_input.ct.C3Els[0].c2" += "t.registers.val_input.ct.in[3]" "t.registers.val_input.ct.tmp[3]" += "t.registers.val_input.ct.in[4]" "t.registers.val_input.ct.C3Els[0].c3" += "t.registers.val_input.ct.in[4]" "t.registers.val_input.ct.tmp[4]" += "t.registers.val_input.ct.out" "t.registers.val_input.ct.C2Els[1].y" += "t.registers.val_input.ct.out" "t.registers.val_input.ct.tmp[7]" += "t.registers.val_input.ct.in[0]" "t.registers.val_input.OR2_tf[0].y" += "t.registers.val_input.ct.in[1]" "t.registers.val_input.OR2_tf[1].y" += "t.registers.val_input.ct.in[2]" "t.registers.val_input.OR2_tf[2].y" += "t.registers.val_input.ct.in[3]" "t.registers.val_input.OR2_tf[3].y" += "t.registers.val_input.ct.in[4]" "t.registers.val_input.OR2_tf[4].y" +"t.registers.val_input.OR2_tf[0].a"|"t.registers.val_input.OR2_tf[0].b"->"t.registers.val_input.OR2_tf[0]._y"- +~("t.registers.val_input.OR2_tf[0].a"|"t.registers.val_input.OR2_tf[0].b")->"t.registers.val_input.OR2_tf[0]._y"+ +"t.registers.val_input.OR2_tf[0]._y"->"t.registers.val_input.OR2_tf[0].y"- +~("t.registers.val_input.OR2_tf[0]._y")->"t.registers.val_input.OR2_tf[0].y"+ +"t.registers.val_input.OR2_tf[1].a"|"t.registers.val_input.OR2_tf[1].b"->"t.registers.val_input.OR2_tf[1]._y"- +~("t.registers.val_input.OR2_tf[1].a"|"t.registers.val_input.OR2_tf[1].b")->"t.registers.val_input.OR2_tf[1]._y"+ +"t.registers.val_input.OR2_tf[1]._y"->"t.registers.val_input.OR2_tf[1].y"- +~("t.registers.val_input.OR2_tf[1]._y")->"t.registers.val_input.OR2_tf[1].y"+ +"t.registers.val_input.OR2_tf[2].a"|"t.registers.val_input.OR2_tf[2].b"->"t.registers.val_input.OR2_tf[2]._y"- +~("t.registers.val_input.OR2_tf[2].a"|"t.registers.val_input.OR2_tf[2].b")->"t.registers.val_input.OR2_tf[2]._y"+ +"t.registers.val_input.OR2_tf[2]._y"->"t.registers.val_input.OR2_tf[2].y"- +~("t.registers.val_input.OR2_tf[2]._y")->"t.registers.val_input.OR2_tf[2].y"+ +"t.registers.val_input.OR2_tf[3].a"|"t.registers.val_input.OR2_tf[3].b"->"t.registers.val_input.OR2_tf[3]._y"- +~("t.registers.val_input.OR2_tf[3].a"|"t.registers.val_input.OR2_tf[3].b")->"t.registers.val_input.OR2_tf[3]._y"+ +"t.registers.val_input.OR2_tf[3]._y"->"t.registers.val_input.OR2_tf[3].y"- +~("t.registers.val_input.OR2_tf[3]._y")->"t.registers.val_input.OR2_tf[3].y"+ +"t.registers.val_input.OR2_tf[4].a"|"t.registers.val_input.OR2_tf[4].b"->"t.registers.val_input.OR2_tf[4]._y"- +~("t.registers.val_input.OR2_tf[4].a"|"t.registers.val_input.OR2_tf[4].b")->"t.registers.val_input.OR2_tf[4]._y"+ +"t.registers.val_input.OR2_tf[4]._y"->"t.registers.val_input.OR2_tf[4].y"- +~("t.registers.val_input.OR2_tf[4]._y")->"t.registers.val_input.OR2_tf[4].y"+ += "t.registers.val_input.supply.vss" "t.registers.val_input.ct.supply.vss" += "t.registers.val_input.supply.vdd" "t.registers.val_input.ct.supply.vdd" += "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[4].vdd" += "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[3].vdd" += "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[2].vdd" += "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[1].vdd" += "t.registers.val_input.supply.vdd" "t.registers.val_input.OR2_tf[0].vdd" += "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[4].vss" += "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[3].vss" += "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[2].vss" += "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[1].vss" += "t.registers.val_input.supply.vss" "t.registers.val_input.OR2_tf[0].vss" += "t.registers.val_input.out" "t.registers.val_input.ct.out" += "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.in.d[0].f" += "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.in.d[0].t" += "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.in.d[1].f" += "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.in.d[1].t" += "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.in.d[2].f" += "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.in.d[2].t" += "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.in.d[3].f" += "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.in.d[3].t" += "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.in.d[4].f" += "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.in.d[4].t" += "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.in.d[4].f" += "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.in.d[4].t" += "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.in.d[3].f" += "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.in.d[3].t" += "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.in.d[2].f" += "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.in.d[2].t" += "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.in.d[1].f" += "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.in.d[1].t" += "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.in.d[0].f" += "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.in.d[0].t" += "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.OR2_tf[4].b" += "t.registers.val_input.in.d[4].d[0]" "t.registers.val_input.in.d[4].f" += "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.OR2_tf[4].a" += "t.registers.val_input.in.d[4].d[1]" "t.registers.val_input.in.d[4].t" += "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.OR2_tf[3].b" += "t.registers.val_input.in.d[3].d[0]" "t.registers.val_input.in.d[3].f" += "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.OR2_tf[3].a" += "t.registers.val_input.in.d[3].d[1]" "t.registers.val_input.in.d[3].t" += "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.OR2_tf[2].b" += "t.registers.val_input.in.d[2].d[0]" "t.registers.val_input.in.d[2].f" += "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.OR2_tf[2].a" += "t.registers.val_input.in.d[2].d[1]" "t.registers.val_input.in.d[2].t" += "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.OR2_tf[1].b" += "t.registers.val_input.in.d[1].d[0]" "t.registers.val_input.in.d[1].f" += "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.OR2_tf[1].a" += "t.registers.val_input.in.d[1].d[1]" "t.registers.val_input.in.d[1].t" += "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.OR2_tf[0].b" += "t.registers.val_input.in.d[0].d[0]" "t.registers.val_input.in.d[0].f" += "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.OR2_tf[0].a" += "t.registers.val_input.in.d[0].d[1]" "t.registers.val_input.in.d[0].t" "t.registers.clk_dly.and2[0].a"&"t.registers.clk_dly.and2[0].b"->"t.registers.clk_dly.and2[0]._y"- ~("t.registers.clk_dly.and2[0].a"&"t.registers.clk_dly.and2[0].b")->"t.registers.clk_dly.and2[0]._y"+ "t.registers.clk_dly.and2[0]._y"->"t.registers.clk_dly.and2[0].y"- @@ -1332,24 +1574,97 @@ = "t.registers.clk_dly.in" "t.registers.clk_dly.mu2[0].a" = "t.registers.clk_dly.in" "t.registers.clk_dly.and2[0].a" = "t.registers.clk_dly.in" "t.registers.clk_dly._a[0]" -= "t.registers.clk_dly.in" "t.registers.val_input_write.out" -= "t.registers.clk_dly.in" "t.registers._in_write.v" -"t.registers.ff_val[0].a"|"t.registers.ff_val[0].b"->"t.registers.ff_val[0]._y"- -~("t.registers.ff_val[0].a"|"t.registers.ff_val[0].b")->"t.registers.ff_val[0]._y"+ -"t.registers.ff_val[0]._y"->"t.registers.ff_val[0].y"- -~("t.registers.ff_val[0]._y")->"t.registers.ff_val[0].y"+ -"t.registers.ff_val[1].a"|"t.registers.ff_val[1].b"->"t.registers.ff_val[1]._y"- -~("t.registers.ff_val[1].a"|"t.registers.ff_val[1].b")->"t.registers.ff_val[1]._y"+ -"t.registers.ff_val[1]._y"->"t.registers.ff_val[1].y"- -~("t.registers.ff_val[1]._y")->"t.registers.ff_val[1].y"+ += "t.registers._in_a_write_temp" "t.registers.ack_write_and.b" += "t.registers._in_a_write_temp" "t.registers.ack_dly.out" +"t.registers.address_propagator_f[0].a"&"t.registers.address_propagator_f[0].b"->"t.registers.address_propagator_f[0]._y"- +~("t.registers.address_propagator_f[0].a"&"t.registers.address_propagator_f[0].b")->"t.registers.address_propagator_f[0]._y"+ +"t.registers.address_propagator_f[0]._y"->"t.registers.address_propagator_f[0].y"- +~("t.registers.address_propagator_f[0]._y")->"t.registers.address_propagator_f[0].y"+ +"t.registers.address_propagator_f[1].a"&"t.registers.address_propagator_f[1].b"->"t.registers.address_propagator_f[1]._y"- +~("t.registers.address_propagator_f[1].a"&"t.registers.address_propagator_f[1].b")->"t.registers.address_propagator_f[1]._y"+ +"t.registers.address_propagator_f[1]._y"->"t.registers.address_propagator_f[1].y"- +~("t.registers.address_propagator_f[1]._y")->"t.registers.address_propagator_f[1].y"+ += "t.registers.address_propagator_f[1].y" "t.registers.output_buf.in.d.d[3].f" += "t.registers.address_propagator_f[1].y" "t.registers.output_buf.in.d.d[3].d[0]" += "t.registers.address_propagator_f[0].y" "t.registers.output_buf.in.d.d[2].f" += "t.registers.address_propagator_f[0].y" "t.registers.output_buf.in.d.d[2].d[0]" +"t.registers.word_selector_f[0].a"&"t.registers.word_selector_f[0].b"->"t.registers.word_selector_f[0]._y"- +~("t.registers.word_selector_f[0].a"&"t.registers.word_selector_f[0].b")->"t.registers.word_selector_f[0]._y"+ +"t.registers.word_selector_f[0]._y"->"t.registers.word_selector_f[0].y"- +~("t.registers.word_selector_f[0]._y")->"t.registers.word_selector_f[0].y"+ +"t.registers.word_selector_f[1].a"&"t.registers.word_selector_f[1].b"->"t.registers.word_selector_f[1]._y"- +~("t.registers.word_selector_f[1].a"&"t.registers.word_selector_f[1].b")->"t.registers.word_selector_f[1]._y"+ +"t.registers.word_selector_f[1]._y"->"t.registers.word_selector_f[1].y"- +~("t.registers.word_selector_f[1]._y")->"t.registers.word_selector_f[1].y"+ +"t.registers.word_selector_f[2].a"&"t.registers.word_selector_f[2].b"->"t.registers.word_selector_f[2]._y"- +~("t.registers.word_selector_f[2].a"&"t.registers.word_selector_f[2].b")->"t.registers.word_selector_f[2]._y"+ +"t.registers.word_selector_f[2]._y"->"t.registers.word_selector_f[2].y"- +~("t.registers.word_selector_f[2]._y")->"t.registers.word_selector_f[2].y"+ +"t.registers.word_selector_f[3].a"&"t.registers.word_selector_f[3].b"->"t.registers.word_selector_f[3]._y"- +~("t.registers.word_selector_f[3].a"&"t.registers.word_selector_f[3].b")->"t.registers.word_selector_f[3]._y"+ +"t.registers.word_selector_f[3]._y"->"t.registers.word_selector_f[3].y"- +~("t.registers.word_selector_f[3]._y")->"t.registers.word_selector_f[3].y"+ +"t.registers.word_selector_f[4].a"&"t.registers.word_selector_f[4].b"->"t.registers.word_selector_f[4]._y"- +~("t.registers.word_selector_f[4].a"&"t.registers.word_selector_f[4].b")->"t.registers.word_selector_f[4]._y"+ +"t.registers.word_selector_f[4]._y"->"t.registers.word_selector_f[4].y"- +~("t.registers.word_selector_f[4]._y")->"t.registers.word_selector_f[4].y"+ +"t.registers.word_selector_f[5].a"&"t.registers.word_selector_f[5].b"->"t.registers.word_selector_f[5]._y"- +~("t.registers.word_selector_f[5].a"&"t.registers.word_selector_f[5].b")->"t.registers.word_selector_f[5]._y"+ +"t.registers.word_selector_f[5]._y"->"t.registers.word_selector_f[5].y"- +~("t.registers.word_selector_f[5]._y")->"t.registers.word_selector_f[5].y"+ +"t.registers.word_selector_f[6].a"&"t.registers.word_selector_f[6].b"->"t.registers.word_selector_f[6]._y"- +~("t.registers.word_selector_f[6].a"&"t.registers.word_selector_f[6].b")->"t.registers.word_selector_f[6]._y"+ +"t.registers.word_selector_f[6]._y"->"t.registers.word_selector_f[6].y"- +~("t.registers.word_selector_f[6]._y")->"t.registers.word_selector_f[6].y"+ +"t.registers.word_selector_f[7].a"&"t.registers.word_selector_f[7].b"->"t.registers.word_selector_f[7]._y"- +~("t.registers.word_selector_f[7].a"&"t.registers.word_selector_f[7].b")->"t.registers.word_selector_f[7]._y"+ +"t.registers.word_selector_f[7]._y"->"t.registers.word_selector_f[7].y"- +~("t.registers.word_selector_f[7]._y")->"t.registers.word_selector_f[7].y"+ += "t.registers.word_selector_f[7].y" "t.registers.bitselector_f[1].in[3]" += "t.registers.word_selector_f[6].y" "t.registers.bitselector_f[0].in[3]" += "t.registers.word_selector_f[6].a" "t.registers.word_selector_f[7].a" += "t.registers.word_selector_f[6].a" "t.registers.word_selector_t[7].a" += "t.registers.word_selector_f[6].a" "t.registers.word_to_read_X[3].out[3]" += "t.registers.word_selector_f[6].a" "t.registers.word_to_read_X[3].out[2]" += "t.registers.word_selector_f[6].a" "t.registers.word_to_read_X[3].out[1]" += "t.registers.word_selector_f[6].a" "t.registers.word_to_read_X[3].out[0]" += "t.registers.word_selector_f[6].a" "t.registers.word_selector_t[6].a" += "t.registers.word_selector_f[5].y" "t.registers.bitselector_f[1].in[2]" += "t.registers.word_selector_f[4].y" "t.registers.bitselector_f[0].in[2]" += "t.registers.word_selector_f[4].a" "t.registers.word_selector_f[5].a" += "t.registers.word_selector_f[4].a" "t.registers.word_selector_t[5].a" += "t.registers.word_selector_f[4].a" "t.registers.word_to_read_X[2].out[3]" += "t.registers.word_selector_f[4].a" "t.registers.word_to_read_X[2].out[2]" += "t.registers.word_selector_f[4].a" "t.registers.word_to_read_X[2].out[1]" += "t.registers.word_selector_f[4].a" "t.registers.word_to_read_X[2].out[0]" += "t.registers.word_selector_f[4].a" "t.registers.word_selector_t[4].a" += "t.registers.word_selector_f[3].y" "t.registers.bitselector_f[1].in[1]" += "t.registers.word_selector_f[2].y" "t.registers.bitselector_f[0].in[1]" += "t.registers.word_selector_f[2].a" "t.registers.word_selector_f[3].a" += "t.registers.word_selector_f[2].a" "t.registers.word_selector_t[3].a" += "t.registers.word_selector_f[2].a" "t.registers.word_to_read_X[1].out[3]" += "t.registers.word_selector_f[2].a" "t.registers.word_to_read_X[1].out[2]" += "t.registers.word_selector_f[2].a" "t.registers.word_to_read_X[1].out[1]" += "t.registers.word_selector_f[2].a" "t.registers.word_to_read_X[1].out[0]" += "t.registers.word_selector_f[2].a" "t.registers.word_selector_t[2].a" += "t.registers.word_selector_f[1].y" "t.registers.bitselector_f[1].in[0]" += "t.registers.word_selector_f[0].y" "t.registers.bitselector_f[0].in[0]" += "t.registers.word_selector_f[0].a" "t.registers.word_selector_f[1].a" += "t.registers.word_selector_f[0].a" "t.registers.word_selector_t[1].a" += "t.registers.word_selector_f[0].a" "t.registers.word_to_read_X[0].out[3]" += "t.registers.word_selector_f[0].a" "t.registers.word_to_read_X[0].out[2]" += "t.registers.word_selector_f[0].a" "t.registers.word_to_read_X[0].out[1]" += "t.registers.word_selector_f[0].a" "t.registers.word_to_read_X[0].out[0]" += "t.registers.word_selector_f[0].a" "t.registers.word_selector_t[0].a" += "t.registers._in_v_temp" "t.registers.clk_switch.a" += "t.registers._in_v_temp" "t.registers.val_input_X.in" += "t.registers._in_v_temp" "t.registers.val_input.out" "t.registers.clock_buffer[0].buf1.a"->"t.registers.clock_buffer[0].buf1._y"- ~("t.registers.clock_buffer[0].buf1.a")->"t.registers.clock_buffer[0].buf1._y"+ "t.registers.clock_buffer[0].buf1._y"->"t.registers.clock_buffer[0].buf1.y"- ~("t.registers.clock_buffer[0].buf1._y")->"t.registers.clock_buffer[0].buf1.y"+ = "t.registers.clock_buffer[0].supply.vdd" "t.registers.clock_buffer[0].buf1.vdd" = "t.registers.clock_buffer[0].supply.vss" "t.registers.clock_buffer[0].buf1.vss" -= "t.registers.clock_buffer[0].out[0]" "t.registers.clock_buffer[0].out[3]" -= "t.registers.clock_buffer[0].out[0]" "t.registers.clock_buffer[0].out[2]" = "t.registers.clock_buffer[0].out[0]" "t.registers.clock_buffer[0].out[1]" = "t.registers.clock_buffer[0].out[0]" "t.registers.clock_buffer[0].buf1.y" = "t.registers.clock_buffer[0].in" "t.registers.clock_buffer[0].buf1.a" @@ -1359,8 +1674,6 @@ ~("t.registers.clock_buffer[1].buf1._y")->"t.registers.clock_buffer[1].buf1.y"+ = "t.registers.clock_buffer[1].supply.vdd" "t.registers.clock_buffer[1].buf1.vdd" = "t.registers.clock_buffer[1].supply.vss" "t.registers.clock_buffer[1].buf1.vss" -= "t.registers.clock_buffer[1].out[0]" "t.registers.clock_buffer[1].out[3]" -= "t.registers.clock_buffer[1].out[0]" "t.registers.clock_buffer[1].out[2]" = "t.registers.clock_buffer[1].out[0]" "t.registers.clock_buffer[1].out[1]" = "t.registers.clock_buffer[1].out[0]" "t.registers.clock_buffer[1].buf1.y" = "t.registers.clock_buffer[1].in" "t.registers.clock_buffer[1].buf1.a" @@ -1370,8 +1683,6 @@ ~("t.registers.clock_buffer[2].buf1._y")->"t.registers.clock_buffer[2].buf1.y"+ = "t.registers.clock_buffer[2].supply.vdd" "t.registers.clock_buffer[2].buf1.vdd" = "t.registers.clock_buffer[2].supply.vss" "t.registers.clock_buffer[2].buf1.vss" -= "t.registers.clock_buffer[2].out[0]" "t.registers.clock_buffer[2].out[3]" -= "t.registers.clock_buffer[2].out[0]" "t.registers.clock_buffer[2].out[2]" = "t.registers.clock_buffer[2].out[0]" "t.registers.clock_buffer[2].out[1]" = "t.registers.clock_buffer[2].out[0]" "t.registers.clock_buffer[2].buf1.y" = "t.registers.clock_buffer[2].in" "t.registers.clock_buffer[2].buf1.a" @@ -1381,827 +1692,34 @@ ~("t.registers.clock_buffer[3].buf1._y")->"t.registers.clock_buffer[3].buf1.y"+ = "t.registers.clock_buffer[3].supply.vdd" "t.registers.clock_buffer[3].buf1.vdd" = "t.registers.clock_buffer[3].supply.vss" "t.registers.clock_buffer[3].buf1.vss" -= "t.registers.clock_buffer[3].out[0]" "t.registers.clock_buffer[3].out[3]" -= "t.registers.clock_buffer[3].out[0]" "t.registers.clock_buffer[3].out[2]" = "t.registers.clock_buffer[3].out[0]" "t.registers.clock_buffer[3].out[1]" = "t.registers.clock_buffer[3].out[0]" "t.registers.clock_buffer[3].buf1.y" = "t.registers.clock_buffer[3].in" "t.registers.clock_buffer[3].buf1.a" -= "t.registers._clock" "t.registers.and_encoder[3].b" -= "t.registers._clock" "t.registers.and_encoder[2].b" -= "t.registers._clock" "t.registers.and_encoder[1].b" -= "t.registers._clock" "t.registers.and_encoder[0].b" -= "t.registers._clock" "t.registers.clk_X.out" -"t.registers.reading_activator_t[0].a"&"t.registers.reading_activator_t[0].b"&"t.registers.reading_activator_t[0].c"->"t.registers.reading_activator_t[0]._y"- -~("t.registers.reading_activator_t[0].a"&"t.registers.reading_activator_t[0].b"&"t.registers.reading_activator_t[0].c")->"t.registers.reading_activator_t[0]._y"+ -"t.registers.reading_activator_t[0]._y"->"t.registers.reading_activator_t[0].y"- -~("t.registers.reading_activator_t[0]._y")->"t.registers.reading_activator_t[0].y"+ -"t.registers.reading_activator_t[1].a"&"t.registers.reading_activator_t[1].b"&"t.registers.reading_activator_t[1].c"->"t.registers.reading_activator_t[1]._y"- -~("t.registers.reading_activator_t[1].a"&"t.registers.reading_activator_t[1].b"&"t.registers.reading_activator_t[1].c")->"t.registers.reading_activator_t[1]._y"+ -"t.registers.reading_activator_t[1]._y"->"t.registers.reading_activator_t[1].y"- -~("t.registers.reading_activator_t[1]._y")->"t.registers.reading_activator_t[1].y"+ -"t.registers.reading_activator_t[2].a"&"t.registers.reading_activator_t[2].b"&"t.registers.reading_activator_t[2].c"->"t.registers.reading_activator_t[2]._y"- -~("t.registers.reading_activator_t[2].a"&"t.registers.reading_activator_t[2].b"&"t.registers.reading_activator_t[2].c")->"t.registers.reading_activator_t[2]._y"+ -"t.registers.reading_activator_t[2]._y"->"t.registers.reading_activator_t[2].y"- -~("t.registers.reading_activator_t[2]._y")->"t.registers.reading_activator_t[2].y"+ -"t.registers.reading_activator_t[3].a"&"t.registers.reading_activator_t[3].b"&"t.registers.reading_activator_t[3].c"->"t.registers.reading_activator_t[3]._y"- -~("t.registers.reading_activator_t[3].a"&"t.registers.reading_activator_t[3].b"&"t.registers.reading_activator_t[3].c")->"t.registers.reading_activator_t[3]._y"+ -"t.registers.reading_activator_t[3]._y"->"t.registers.reading_activator_t[3].y"- -~("t.registers.reading_activator_t[3]._y")->"t.registers.reading_activator_t[3].y"+ -"t.registers.reading_activator_t[4].a"&"t.registers.reading_activator_t[4].b"&"t.registers.reading_activator_t[4].c"->"t.registers.reading_activator_t[4]._y"- -~("t.registers.reading_activator_t[4].a"&"t.registers.reading_activator_t[4].b"&"t.registers.reading_activator_t[4].c")->"t.registers.reading_activator_t[4]._y"+ -"t.registers.reading_activator_t[4]._y"->"t.registers.reading_activator_t[4].y"- -~("t.registers.reading_activator_t[4]._y")->"t.registers.reading_activator_t[4].y"+ -"t.registers.reading_activator_t[5].a"&"t.registers.reading_activator_t[5].b"&"t.registers.reading_activator_t[5].c"->"t.registers.reading_activator_t[5]._y"- -~("t.registers.reading_activator_t[5].a"&"t.registers.reading_activator_t[5].b"&"t.registers.reading_activator_t[5].c")->"t.registers.reading_activator_t[5]._y"+ -"t.registers.reading_activator_t[5]._y"->"t.registers.reading_activator_t[5].y"- -~("t.registers.reading_activator_t[5]._y")->"t.registers.reading_activator_t[5].y"+ -"t.registers.reading_activator_t[6].a"&"t.registers.reading_activator_t[6].b"&"t.registers.reading_activator_t[6].c"->"t.registers.reading_activator_t[6]._y"- -~("t.registers.reading_activator_t[6].a"&"t.registers.reading_activator_t[6].b"&"t.registers.reading_activator_t[6].c")->"t.registers.reading_activator_t[6]._y"+ -"t.registers.reading_activator_t[6]._y"->"t.registers.reading_activator_t[6].y"- -~("t.registers.reading_activator_t[6]._y")->"t.registers.reading_activator_t[6].y"+ -"t.registers.reading_activator_t[7].a"&"t.registers.reading_activator_t[7].b"&"t.registers.reading_activator_t[7].c"->"t.registers.reading_activator_t[7]._y"- -~("t.registers.reading_activator_t[7].a"&"t.registers.reading_activator_t[7].b"&"t.registers.reading_activator_t[7].c")->"t.registers.reading_activator_t[7]._y"+ -"t.registers.reading_activator_t[7]._y"->"t.registers.reading_activator_t[7].y"- -~("t.registers.reading_activator_t[7]._y")->"t.registers.reading_activator_t[7].y"+ -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" -= "t.registers.read_write_demux._out2_a_BX_t[1]" "t.registers.read_write_demux.out2_a_B_buf_f.out[1]" -= "t.registers.read_write_demux._out2_a_BX_t[2]" "t.registers.read_write_demux.out2_a_B_buf_f.out[2]" -= "t.registers.read_write_demux._out2_a_BX_t[3]" "t.registers.read_write_demux.out2_a_B_buf_f.out[3]" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[3].c2" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[2].c2" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[1].c2" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux.out2_t_buf_func[0].c2" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux._out2_a_BX_t[3]" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux._out2_a_BX_t[2]" -= "t.registers.read_write_demux._out2_a_BX_t[0]" "t.registers.read_write_demux._out2_a_BX_t[1]" -"t.registers.read_write_demux.out1_a_B_buf_f.buf1.a"->"t.registers.read_write_demux.out1_a_B_buf_f.buf1._y"- -~("t.registers.read_write_demux.out1_a_B_buf_f.buf1.a")->"t.registers.read_write_demux.out1_a_B_buf_f.buf1._y"+ -"t.registers.read_write_demux.out1_a_B_buf_f.buf1._y"->"t.registers.read_write_demux.out1_a_B_buf_f.buf1.y"- -~("t.registers.read_write_demux.out1_a_B_buf_f.buf1._y")->"t.registers.read_write_demux.out1_a_B_buf_f.buf1.y"+ -= "t.registers.read_write_demux.out1_a_B_buf_f.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.vdd" -= "t.registers.read_write_demux.out1_a_B_buf_f.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.vss" -= "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[3]" -= "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[2]" -= "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[1]" -= "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.y" -= "t.registers.read_write_demux.out1_a_B_buf_f.in" "t.registers.read_write_demux.out1_a_B_buf_f.buf1.a" -"t.registers.read_write_demux.reset_bufarray.buf3.a"->"t.registers.read_write_demux.reset_bufarray.buf3._y"- -~("t.registers.read_write_demux.reset_bufarray.buf3.a")->"t.registers.read_write_demux.reset_bufarray.buf3._y"+ -"t.registers.read_write_demux.reset_bufarray.buf3._y"->"t.registers.read_write_demux.reset_bufarray.buf3.y"- -~("t.registers.read_write_demux.reset_bufarray.buf3._y")->"t.registers.read_write_demux.reset_bufarray.buf3.y"+ -= "t.registers.read_write_demux.reset_bufarray.supply.vdd" "t.registers.read_write_demux.reset_bufarray.buf3.vdd" -= "t.registers.read_write_demux.reset_bufarray.supply.vss" "t.registers.read_write_demux.reset_bufarray.buf3.vss" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[7]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[6]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[5]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[4]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[3]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[2]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.out[1]" -= "t.registers.read_write_demux.reset_bufarray.out[0]" "t.registers.read_write_demux.reset_bufarray.buf3.y" -= "t.registers.read_write_demux.reset_bufarray.in" "t.registers.read_write_demux.reset_bufarray.buf3.a" -~"t.registers.read_write_demux.inack_ctl.c1"&~"t.registers.read_write_demux.inack_ctl.c2"&~"t.registers.read_write_demux.inack_ctl.c3"|~"t.registers.read_write_demux.inack_ctl.pr_B"->"t.registers.read_write_demux.inack_ctl._y"+ -"t.registers.read_write_demux.inack_ctl.c1"&"t.registers.read_write_demux.inack_ctl.c2"&"t.registers.read_write_demux.inack_ctl.c3"&"t.registers.read_write_demux.inack_ctl.sr_B"->"t.registers.read_write_demux.inack_ctl._y"- -"t.registers.read_write_demux.inack_ctl._y"->"t.registers.read_write_demux.inack_ctl.y"- -~("t.registers.read_write_demux.inack_ctl._y")->"t.registers.read_write_demux.inack_ctl.y"+ -= "t.registers.read_write_demux._c_v" "t.registers.read_write_demux.c_el.c1" -= "t.registers.read_write_demux._c_v" "t.registers.read_write_demux.c_f_c_t_or.y" -"t.registers.read_write_demux.out2_en_buf_f.buf1.a"->"t.registers.read_write_demux.out2_en_buf_f.buf1._y"- -~("t.registers.read_write_demux.out2_en_buf_f.buf1.a")->"t.registers.read_write_demux.out2_en_buf_f.buf1._y"+ -"t.registers.read_write_demux.out2_en_buf_f.buf1._y"->"t.registers.read_write_demux.out2_en_buf_f.buf1.y"- -~("t.registers.read_write_demux.out2_en_buf_f.buf1._y")->"t.registers.read_write_demux.out2_en_buf_f.buf1.y"+ -= "t.registers.read_write_demux.out2_en_buf_f.supply.vdd" "t.registers.read_write_demux.out2_en_buf_f.buf1.vdd" -= "t.registers.read_write_demux.out2_en_buf_f.supply.vss" "t.registers.read_write_demux.out2_en_buf_f.buf1.vss" -= "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.out[3]" -= "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.out[2]" -= "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.out[1]" -= "t.registers.read_write_demux.out2_en_buf_f.out[0]" "t.registers.read_write_demux.out2_en_buf_f.buf1.y" -= "t.registers.read_write_demux.out2_en_buf_f.in" "t.registers.read_write_demux.out2_en_buf_f.buf1.a" -= "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" -= "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" -= "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" -= "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" -= "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" -= "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" -= "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" -= "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" -= "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" -= "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" -= "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" -= "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" -= "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" -= "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" -= "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" -= "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" -= "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" -= "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" -= "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" -= "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" -= "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" -= "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" -= "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" -= "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" -= "t.registers.read_write_demux.out2.a" "t.registers.read_write_demux.out2_a_inv.a" -= "t.registers.read_write_demux.out2.v" "t.registers.read_write_demux.out_or.b" -= "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2_f_buf_func[3].y" -= "t.registers.read_write_demux.out2.d.d[3].d[0]" "t.registers.read_write_demux.out2.d.d[3].f" -= "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2_t_buf_func[3].y" -= "t.registers.read_write_demux.out2.d.d[3].d[1]" "t.registers.read_write_demux.out2.d.d[3].t" -= "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2_f_buf_func[2].y" -= "t.registers.read_write_demux.out2.d.d[2].d[0]" "t.registers.read_write_demux.out2.d.d[2].f" -= "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2_t_buf_func[2].y" -= "t.registers.read_write_demux.out2.d.d[2].d[1]" "t.registers.read_write_demux.out2.d.d[2].t" -= "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2_f_buf_func[1].y" -= "t.registers.read_write_demux.out2.d.d[1].d[0]" "t.registers.read_write_demux.out2.d.d[1].f" -= "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2_t_buf_func[1].y" -= "t.registers.read_write_demux.out2.d.d[1].d[1]" "t.registers.read_write_demux.out2.d.d[1].t" -= "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2_f_buf_func[0].y" -= "t.registers.read_write_demux.out2.d.d[0].d[0]" "t.registers.read_write_demux.out2.d.d[0].f" -= "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2_t_buf_func[0].y" -= "t.registers.read_write_demux.out2.d.d[0].d[1]" "t.registers.read_write_demux.out2.d.d[0].t" -= "t.registers.read_write_demux._en" "t.registers.read_write_demux.out2_en_buf_f.in" -= "t.registers.read_write_demux._en" "t.registers.read_write_demux.out2_en_buf_t.in" -= "t.registers.read_write_demux._en" "t.registers.read_write_demux.out1_en_buf_f.in" -= "t.registers.read_write_demux._en" "t.registers.read_write_demux.out1_en_buf_t.in" -= "t.registers.read_write_demux._en" "t.registers.read_write_demux.en_ctl.y" -= "t.registers.read_write_demux._en" "t.registers.read_write_demux.inack_ctl.c1" -"t.registers.read_write_demux.out2_a_inv.a"->"t.registers.read_write_demux.out2_a_inv.y"- -~("t.registers.read_write_demux.out2_a_inv.a")->"t.registers.read_write_demux.out2_a_inv.y"+ -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" -= "t.registers.read_write_demux.in.d.d[0].f" "t.registers.read_write_demux.vc.in.d[0].f" -= "t.registers.read_write_demux.in.d.d[0].t" "t.registers.read_write_demux.vc.in.d[0].t" -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].d[0]" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].d[1]" -= "t.registers.read_write_demux.in.d.d[1].f" "t.registers.read_write_demux.vc.in.d[1].f" -= "t.registers.read_write_demux.in.d.d[1].t" "t.registers.read_write_demux.vc.in.d[1].t" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].d[0]" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].d[1]" -= "t.registers.read_write_demux.in.d.d[2].f" "t.registers.read_write_demux.vc.in.d[2].f" -= "t.registers.read_write_demux.in.d.d[2].t" "t.registers.read_write_demux.vc.in.d[2].t" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].d[0]" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].d[1]" -= "t.registers.read_write_demux.in.d.d[3].f" "t.registers.read_write_demux.vc.in.d[3].f" -= "t.registers.read_write_demux.in.d.d[3].t" "t.registers.read_write_demux.vc.in.d[3].t" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].d[0]" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].d[1]" -= "t.registers.read_write_demux.in.a" "t.registers.read_write_demux.en_ctl.c1" -= "t.registers.read_write_demux.in.a" "t.registers.read_write_demux.cond.a" -= "t.registers.read_write_demux.in.a" "t.registers.read_write_demux.inack_ctl.y" -= "t.registers.read_write_demux.in.v" "t.registers.read_write_demux.in_v_buf.y" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.out2_f_buf_func[3].n1" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.out1_f_buf_func[3].n1" -= "t.registers.read_write_demux.in.d.d[3].d[0]" "t.registers.read_write_demux.in.d.d[3].f" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.out2_t_buf_func[3].n1" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.out1_t_buf_func[3].n1" -= "t.registers.read_write_demux.in.d.d[3].d[1]" "t.registers.read_write_demux.in.d.d[3].t" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.out2_f_buf_func[2].n1" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.out1_f_buf_func[2].n1" -= "t.registers.read_write_demux.in.d.d[2].d[0]" "t.registers.read_write_demux.in.d.d[2].f" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.out2_t_buf_func[2].n1" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.out1_t_buf_func[2].n1" -= "t.registers.read_write_demux.in.d.d[2].d[1]" "t.registers.read_write_demux.in.d.d[2].t" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.out2_f_buf_func[1].n1" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.out1_f_buf_func[1].n1" -= "t.registers.read_write_demux.in.d.d[1].d[0]" "t.registers.read_write_demux.in.d.d[1].f" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.out2_t_buf_func[1].n1" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.out1_t_buf_func[1].n1" -= "t.registers.read_write_demux.in.d.d[1].d[1]" "t.registers.read_write_demux.in.d.d[1].t" -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.out2_f_buf_func[0].n1" -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.out1_f_buf_func[0].n1" -= "t.registers.read_write_demux.in.d.d[0].d[0]" "t.registers.read_write_demux.in.d.d[0].f" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.out2_t_buf_func[0].n1" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.out1_t_buf_func[0].n1" -= "t.registers.read_write_demux.in.d.d[0].d[1]" "t.registers.read_write_demux.in.d.d[0].t" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.c_buf_f.out[0]" -= "t.registers.read_write_demux._c_f_buf[1]" "t.registers.read_write_demux.c_buf_f.out[1]" -= "t.registers.read_write_demux._c_f_buf[2]" "t.registers.read_write_demux.c_buf_f.out[2]" -= "t.registers.read_write_demux._c_f_buf[3]" "t.registers.read_write_demux.c_buf_f.out[3]" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[3].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[3].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[2].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[2].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[1].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[1].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_t_buf_func[0].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux.out2_f_buf_func[0].n2" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux._c_f_buf[3]" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux._c_f_buf[2]" -= "t.registers.read_write_demux._c_f_buf[0]" "t.registers.read_write_demux._c_f_buf[1]" -= "t.registers.read_write_demux._out1_a_B" "t.registers.read_write_demux.out1_a_B_buf_t.in" -= "t.registers.read_write_demux._out1_a_B" "t.registers.read_write_demux.out1_a_B_buf_f.in" -= "t.registers.read_write_demux._out1_a_B" "t.registers.read_write_demux.out1_a_inv.y" -"t.registers.read_write_demux.out1_en_buf_t.buf1.a"->"t.registers.read_write_demux.out1_en_buf_t.buf1._y"- -~("t.registers.read_write_demux.out1_en_buf_t.buf1.a")->"t.registers.read_write_demux.out1_en_buf_t.buf1._y"+ -"t.registers.read_write_demux.out1_en_buf_t.buf1._y"->"t.registers.read_write_demux.out1_en_buf_t.buf1.y"- -~("t.registers.read_write_demux.out1_en_buf_t.buf1._y")->"t.registers.read_write_demux.out1_en_buf_t.buf1.y"+ -= "t.registers.read_write_demux.out1_en_buf_t.supply.vdd" "t.registers.read_write_demux.out1_en_buf_t.buf1.vdd" -= "t.registers.read_write_demux.out1_en_buf_t.supply.vss" "t.registers.read_write_demux.out1_en_buf_t.buf1.vss" -= "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.out[3]" -= "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.out[2]" -= "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.out[1]" -= "t.registers.read_write_demux.out1_en_buf_t.out[0]" "t.registers.read_write_demux.out1_en_buf_t.buf1.y" -= "t.registers.read_write_demux.out1_en_buf_t.in" "t.registers.read_write_demux.out1_en_buf_t.buf1.a" -"t.registers.read_write_demux.reset_buf.a"->"t.registers.read_write_demux.reset_buf._y"- -~("t.registers.read_write_demux.reset_buf.a")->"t.registers.read_write_demux.reset_buf._y"+ -"t.registers.read_write_demux.reset_buf._y"->"t.registers.read_write_demux.reset_buf.y"- -~("t.registers.read_write_demux.reset_buf._y")->"t.registers.read_write_demux.reset_buf.y"+ -"t.registers.read_write_demux.out_or.a"|"t.registers.read_write_demux.out_or.b"->"t.registers.read_write_demux.out_or._y"- -~("t.registers.read_write_demux.out_or.a"|"t.registers.read_write_demux.out_or.b")->"t.registers.read_write_demux.out_or._y"+ -"t.registers.read_write_demux.out_or._y"->"t.registers.read_write_demux.out_or.y"- -~("t.registers.read_write_demux.out_or._y")->"t.registers.read_write_demux.out_or.y"+ -= "t.registers.read_write_demux._in_c_v_" "t.registers.read_write_demux.c_el.y" -= "t.registers.read_write_demux._in_c_v_" "t.registers.read_write_demux.inack_ctl.c2" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_a_B_buf_f.out[0]" -= "t.registers.read_write_demux._out1_a_BX_t[1]" "t.registers.read_write_demux.out1_a_B_buf_f.out[1]" -= "t.registers.read_write_demux._out1_a_BX_t[2]" "t.registers.read_write_demux.out1_a_B_buf_f.out[2]" -= "t.registers.read_write_demux._out1_a_BX_t[3]" "t.registers.read_write_demux.out1_a_B_buf_f.out[3]" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[3].c2" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[2].c2" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[1].c2" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux.out1_t_buf_func[0].c2" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux._out1_a_BX_t[3]" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux._out1_a_BX_t[2]" -= "t.registers.read_write_demux._out1_a_BX_t[0]" "t.registers.read_write_demux._out1_a_BX_t[1]" -"t.registers.read_write_demux.out2_en_buf_t.buf1.a"->"t.registers.read_write_demux.out2_en_buf_t.buf1._y"- -~("t.registers.read_write_demux.out2_en_buf_t.buf1.a")->"t.registers.read_write_demux.out2_en_buf_t.buf1._y"+ -"t.registers.read_write_demux.out2_en_buf_t.buf1._y"->"t.registers.read_write_demux.out2_en_buf_t.buf1.y"- -~("t.registers.read_write_demux.out2_en_buf_t.buf1._y")->"t.registers.read_write_demux.out2_en_buf_t.buf1.y"+ -= "t.registers.read_write_demux.out2_en_buf_t.supply.vdd" "t.registers.read_write_demux.out2_en_buf_t.buf1.vdd" -= "t.registers.read_write_demux.out2_en_buf_t.supply.vss" "t.registers.read_write_demux.out2_en_buf_t.buf1.vss" -= "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.out[3]" -= "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.out[2]" -= "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.out[1]" -= "t.registers.read_write_demux.out2_en_buf_t.out[0]" "t.registers.read_write_demux.out2_en_buf_t.buf1.y" -= "t.registers.read_write_demux.out2_en_buf_t.in" "t.registers.read_write_demux.out2_en_buf_t.buf1.a" -= "t.registers.read_write_demux.reset_B" "t.registers.read_write_demux.reset_buf.a" -= "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.reset_bufarray.in" -= "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.reset_buf.y" -= "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.inack_ctl.sr_B" -= "t.registers.read_write_demux._reset_BX" "t.registers.read_write_demux.inack_ctl.pr_B" -"t.registers.read_write_demux.c_buf_t.buf1.a"->"t.registers.read_write_demux.c_buf_t.buf1._y"- -~("t.registers.read_write_demux.c_buf_t.buf1.a")->"t.registers.read_write_demux.c_buf_t.buf1._y"+ -"t.registers.read_write_demux.c_buf_t.buf1._y"->"t.registers.read_write_demux.c_buf_t.buf1.y"- -~("t.registers.read_write_demux.c_buf_t.buf1._y")->"t.registers.read_write_demux.c_buf_t.buf1.y"+ -= "t.registers.read_write_demux.c_buf_t.supply.vdd" "t.registers.read_write_demux.c_buf_t.buf1.vdd" -= "t.registers.read_write_demux.c_buf_t.supply.vss" "t.registers.read_write_demux.c_buf_t.buf1.vss" -= "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.out[3]" -= "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.out[2]" -= "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.out[1]" -= "t.registers.read_write_demux.c_buf_t.out[0]" "t.registers.read_write_demux.c_buf_t.buf1.y" -= "t.registers.read_write_demux.c_buf_t.in" "t.registers.read_write_demux.c_buf_t.buf1.a" -~"t.registers.read_write_demux.out2_t_buf_func[0].c1"&~"t.registers.read_write_demux.out2_t_buf_func[0].c2"|~"t.registers.read_write_demux.out2_t_buf_func[0].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[0]._y"+ -"t.registers.read_write_demux.out2_t_buf_func[0].c1"&"t.registers.read_write_demux.out2_t_buf_func[0].c2"&"t.registers.read_write_demux.out2_t_buf_func[0].n1"&"t.registers.read_write_demux.out2_t_buf_func[0].n2"&"t.registers.read_write_demux.out2_t_buf_func[0].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[0]._y"- -"t.registers.read_write_demux.out2_t_buf_func[0]._y"->"t.registers.read_write_demux.out2_t_buf_func[0].y"- -~("t.registers.read_write_demux.out2_t_buf_func[0]._y")->"t.registers.read_write_demux.out2_t_buf_func[0].y"+ -~"t.registers.read_write_demux.out2_t_buf_func[1].c1"&~"t.registers.read_write_demux.out2_t_buf_func[1].c2"|~"t.registers.read_write_demux.out2_t_buf_func[1].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[1]._y"+ -"t.registers.read_write_demux.out2_t_buf_func[1].c1"&"t.registers.read_write_demux.out2_t_buf_func[1].c2"&"t.registers.read_write_demux.out2_t_buf_func[1].n1"&"t.registers.read_write_demux.out2_t_buf_func[1].n2"&"t.registers.read_write_demux.out2_t_buf_func[1].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[1]._y"- -"t.registers.read_write_demux.out2_t_buf_func[1]._y"->"t.registers.read_write_demux.out2_t_buf_func[1].y"- -~("t.registers.read_write_demux.out2_t_buf_func[1]._y")->"t.registers.read_write_demux.out2_t_buf_func[1].y"+ -~"t.registers.read_write_demux.out2_t_buf_func[2].c1"&~"t.registers.read_write_demux.out2_t_buf_func[2].c2"|~"t.registers.read_write_demux.out2_t_buf_func[2].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[2]._y"+ -"t.registers.read_write_demux.out2_t_buf_func[2].c1"&"t.registers.read_write_demux.out2_t_buf_func[2].c2"&"t.registers.read_write_demux.out2_t_buf_func[2].n1"&"t.registers.read_write_demux.out2_t_buf_func[2].n2"&"t.registers.read_write_demux.out2_t_buf_func[2].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[2]._y"- -"t.registers.read_write_demux.out2_t_buf_func[2]._y"->"t.registers.read_write_demux.out2_t_buf_func[2].y"- -~("t.registers.read_write_demux.out2_t_buf_func[2]._y")->"t.registers.read_write_demux.out2_t_buf_func[2].y"+ -~"t.registers.read_write_demux.out2_t_buf_func[3].c1"&~"t.registers.read_write_demux.out2_t_buf_func[3].c2"|~"t.registers.read_write_demux.out2_t_buf_func[3].pr_B"->"t.registers.read_write_demux.out2_t_buf_func[3]._y"+ -"t.registers.read_write_demux.out2_t_buf_func[3].c1"&"t.registers.read_write_demux.out2_t_buf_func[3].c2"&"t.registers.read_write_demux.out2_t_buf_func[3].n1"&"t.registers.read_write_demux.out2_t_buf_func[3].n2"&"t.registers.read_write_demux.out2_t_buf_func[3].sr_B"->"t.registers.read_write_demux.out2_t_buf_func[3]._y"- -"t.registers.read_write_demux.out2_t_buf_func[3]._y"->"t.registers.read_write_demux.out2_t_buf_func[3].y"- -~("t.registers.read_write_demux.out2_t_buf_func[3]._y")->"t.registers.read_write_demux.out2_t_buf_func[3].y"+ -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_en_buf_t.out[0]" -= "t.registers.read_write_demux._en2_X_t[1]" "t.registers.read_write_demux.out2_en_buf_t.out[1]" -= "t.registers.read_write_demux._en2_X_t[2]" "t.registers.read_write_demux.out2_en_buf_t.out[2]" -= "t.registers.read_write_demux._en2_X_t[3]" "t.registers.read_write_demux.out2_en_buf_t.out[3]" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[3].c1" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[2].c1" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[1].c1" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux.out2_t_buf_func[0].c1" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux._en2_X_t[3]" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux._en2_X_t[2]" -= "t.registers.read_write_demux._en2_X_t[0]" "t.registers.read_write_demux._en2_X_t[1]" -= "t.registers.read_write_demux._out_v" "t.registers.read_write_demux.en_ctl.p1" -= "t.registers.read_write_demux._out_v" "t.registers.read_write_demux.inack_ctl.c3" -= "t.registers.read_write_demux._out_v" "t.registers.read_write_demux.out_or.y" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.reset_bufarray.out[0]" -= "t.registers.read_write_demux._reset_BXX[1]" "t.registers.read_write_demux.reset_bufarray.out[1]" -= "t.registers.read_write_demux._reset_BXX[2]" "t.registers.read_write_demux.reset_bufarray.out[2]" -= "t.registers.read_write_demux._reset_BXX[3]" "t.registers.read_write_demux.reset_bufarray.out[3]" -= "t.registers.read_write_demux._reset_BXX[4]" "t.registers.read_write_demux.reset_bufarray.out[4]" -= "t.registers.read_write_demux._reset_BXX[5]" "t.registers.read_write_demux.reset_bufarray.out[5]" -= "t.registers.read_write_demux._reset_BXX[6]" "t.registers.read_write_demux.reset_bufarray.out[6]" -= "t.registers.read_write_demux._reset_BXX[7]" "t.registers.read_write_demux.reset_bufarray.out[7]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[3].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[3].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[3].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[3].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[2].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[2].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[2].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[2].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[1].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[1].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[1].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[1].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[0].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_f_buf_func[0].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[0].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out2_t_buf_func[0].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[3].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[3].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[3].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[3].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[2].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[2].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[2].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[2].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[1].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[1].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[1].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[1].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[0].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_f_buf_func[0].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[0].sr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux.out1_t_buf_func[0].pr_B" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[7]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[6]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[5]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[4]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[3]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[2]" -= "t.registers.read_write_demux._reset_BXX[0]" "t.registers.read_write_demux._reset_BXX[1]" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.c_buf_t.out[0]" -= "t.registers.read_write_demux._c_t_buf[1]" "t.registers.read_write_demux.c_buf_t.out[1]" -= "t.registers.read_write_demux._c_t_buf[2]" "t.registers.read_write_demux.c_buf_t.out[2]" -= "t.registers.read_write_demux._c_t_buf[3]" "t.registers.read_write_demux.c_buf_t.out[3]" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[3].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[3].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[2].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[2].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[1].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[1].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_t_buf_func[0].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux.out1_f_buf_func[0].n2" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux._c_t_buf[3]" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux._c_t_buf[2]" -= "t.registers.read_write_demux._c_t_buf[0]" "t.registers.read_write_demux._c_t_buf[1]" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_en_buf_f.out[0]" -= "t.registers.read_write_demux._en1_X_f[1]" "t.registers.read_write_demux.out1_en_buf_f.out[1]" -= "t.registers.read_write_demux._en1_X_f[2]" "t.registers.read_write_demux.out1_en_buf_f.out[2]" -= "t.registers.read_write_demux._en1_X_f[3]" "t.registers.read_write_demux.out1_en_buf_f.out[3]" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[3].c1" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[2].c1" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[1].c1" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux.out1_f_buf_func[0].c1" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux._en1_X_f[3]" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux._en1_X_f[2]" -= "t.registers.read_write_demux._en1_X_f[0]" "t.registers.read_write_demux._en1_X_f[1]" -~"t.registers.read_write_demux.out2_f_buf_func[0].c1"&~"t.registers.read_write_demux.out2_f_buf_func[0].c2"|~"t.registers.read_write_demux.out2_f_buf_func[0].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[0]._y"+ -"t.registers.read_write_demux.out2_f_buf_func[0].c1"&"t.registers.read_write_demux.out2_f_buf_func[0].c2"&"t.registers.read_write_demux.out2_f_buf_func[0].n1"&"t.registers.read_write_demux.out2_f_buf_func[0].n2"&"t.registers.read_write_demux.out2_f_buf_func[0].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[0]._y"- -"t.registers.read_write_demux.out2_f_buf_func[0]._y"->"t.registers.read_write_demux.out2_f_buf_func[0].y"- -~("t.registers.read_write_demux.out2_f_buf_func[0]._y")->"t.registers.read_write_demux.out2_f_buf_func[0].y"+ -~"t.registers.read_write_demux.out2_f_buf_func[1].c1"&~"t.registers.read_write_demux.out2_f_buf_func[1].c2"|~"t.registers.read_write_demux.out2_f_buf_func[1].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[1]._y"+ -"t.registers.read_write_demux.out2_f_buf_func[1].c1"&"t.registers.read_write_demux.out2_f_buf_func[1].c2"&"t.registers.read_write_demux.out2_f_buf_func[1].n1"&"t.registers.read_write_demux.out2_f_buf_func[1].n2"&"t.registers.read_write_demux.out2_f_buf_func[1].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[1]._y"- -"t.registers.read_write_demux.out2_f_buf_func[1]._y"->"t.registers.read_write_demux.out2_f_buf_func[1].y"- -~("t.registers.read_write_demux.out2_f_buf_func[1]._y")->"t.registers.read_write_demux.out2_f_buf_func[1].y"+ -~"t.registers.read_write_demux.out2_f_buf_func[2].c1"&~"t.registers.read_write_demux.out2_f_buf_func[2].c2"|~"t.registers.read_write_demux.out2_f_buf_func[2].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[2]._y"+ -"t.registers.read_write_demux.out2_f_buf_func[2].c1"&"t.registers.read_write_demux.out2_f_buf_func[2].c2"&"t.registers.read_write_demux.out2_f_buf_func[2].n1"&"t.registers.read_write_demux.out2_f_buf_func[2].n2"&"t.registers.read_write_demux.out2_f_buf_func[2].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[2]._y"- -"t.registers.read_write_demux.out2_f_buf_func[2]._y"->"t.registers.read_write_demux.out2_f_buf_func[2].y"- -~("t.registers.read_write_demux.out2_f_buf_func[2]._y")->"t.registers.read_write_demux.out2_f_buf_func[2].y"+ -~"t.registers.read_write_demux.out2_f_buf_func[3].c1"&~"t.registers.read_write_demux.out2_f_buf_func[3].c2"|~"t.registers.read_write_demux.out2_f_buf_func[3].pr_B"->"t.registers.read_write_demux.out2_f_buf_func[3]._y"+ -"t.registers.read_write_demux.out2_f_buf_func[3].c1"&"t.registers.read_write_demux.out2_f_buf_func[3].c2"&"t.registers.read_write_demux.out2_f_buf_func[3].n1"&"t.registers.read_write_demux.out2_f_buf_func[3].n2"&"t.registers.read_write_demux.out2_f_buf_func[3].sr_B"->"t.registers.read_write_demux.out2_f_buf_func[3]._y"- -"t.registers.read_write_demux.out2_f_buf_func[3]._y"->"t.registers.read_write_demux.out2_f_buf_func[3].y"- -~("t.registers.read_write_demux.out2_f_buf_func[3]._y")->"t.registers.read_write_demux.out2_f_buf_func[3].y"+ -"t.registers.read_write_demux.out1_en_buf_f.buf1.a"->"t.registers.read_write_demux.out1_en_buf_f.buf1._y"- -~("t.registers.read_write_demux.out1_en_buf_f.buf1.a")->"t.registers.read_write_demux.out1_en_buf_f.buf1._y"+ -"t.registers.read_write_demux.out1_en_buf_f.buf1._y"->"t.registers.read_write_demux.out1_en_buf_f.buf1.y"- -~("t.registers.read_write_demux.out1_en_buf_f.buf1._y")->"t.registers.read_write_demux.out1_en_buf_f.buf1.y"+ -= "t.registers.read_write_demux.out1_en_buf_f.supply.vdd" "t.registers.read_write_demux.out1_en_buf_f.buf1.vdd" -= "t.registers.read_write_demux.out1_en_buf_f.supply.vss" "t.registers.read_write_demux.out1_en_buf_f.buf1.vss" -= "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.out[3]" -= "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.out[2]" -= "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.out[1]" -= "t.registers.read_write_demux.out1_en_buf_f.out[0]" "t.registers.read_write_demux.out1_en_buf_f.buf1.y" -= "t.registers.read_write_demux.out1_en_buf_f.in" "t.registers.read_write_demux.out1_en_buf_f.buf1.a" -~"t.registers.read_write_demux.c_el.c1"&~"t.registers.read_write_demux.c_el.c2"->"t.registers.read_write_demux.c_el._y"+ -"t.registers.read_write_demux.c_el.c1"&"t.registers.read_write_demux.c_el.c2"->"t.registers.read_write_demux.c_el._y"- -"t.registers.read_write_demux.c_el._y"->"t.registers.read_write_demux.c_el.y"- -~("t.registers.read_write_demux.c_el._y")->"t.registers.read_write_demux.c_el.y"+ -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" -= "t.registers.read_write_demux._out1_a_BX_f[1]" "t.registers.read_write_demux.out1_a_B_buf_t.out[1]" -= "t.registers.read_write_demux._out1_a_BX_f[2]" "t.registers.read_write_demux.out1_a_B_buf_t.out[2]" -= "t.registers.read_write_demux._out1_a_BX_f[3]" "t.registers.read_write_demux.out1_a_B_buf_t.out[3]" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[3].c2" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[2].c2" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[1].c2" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux.out1_f_buf_func[0].c2" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux._out1_a_BX_f[3]" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux._out1_a_BX_f[2]" -= "t.registers.read_write_demux._out1_a_BX_f[0]" "t.registers.read_write_demux._out1_a_BX_f[1]" -= "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" -= "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" -= "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" -= "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" -= "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" -= "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" -= "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" -= "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" -= "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" -= "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" -= "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" -= "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" -= "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" -= "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" -= "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" -= "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" -= "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" -= "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" -= "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" -= "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" -= "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" -= "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" -= "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" -= "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" -= "t.registers.read_write_demux.out1.a" "t.registers.read_write_demux.out1_a_inv.a" -= "t.registers.read_write_demux.out1.v" "t.registers.read_write_demux.out_or.a" -= "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1_f_buf_func[3].y" -= "t.registers.read_write_demux.out1.d.d[3].d[0]" "t.registers.read_write_demux.out1.d.d[3].f" -= "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1_t_buf_func[3].y" -= "t.registers.read_write_demux.out1.d.d[3].d[1]" "t.registers.read_write_demux.out1.d.d[3].t" -= "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1_f_buf_func[2].y" -= "t.registers.read_write_demux.out1.d.d[2].d[0]" "t.registers.read_write_demux.out1.d.d[2].f" -= "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1_t_buf_func[2].y" -= "t.registers.read_write_demux.out1.d.d[2].d[1]" "t.registers.read_write_demux.out1.d.d[2].t" -= "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1_f_buf_func[1].y" -= "t.registers.read_write_demux.out1.d.d[1].d[0]" "t.registers.read_write_demux.out1.d.d[1].f" -= "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1_t_buf_func[1].y" -= "t.registers.read_write_demux.out1.d.d[1].d[1]" "t.registers.read_write_demux.out1.d.d[1].t" -= "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1_f_buf_func[0].y" -= "t.registers.read_write_demux.out1.d.d[0].d[0]" "t.registers.read_write_demux.out1.d.d[0].f" -= "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1_t_buf_func[0].y" -= "t.registers.read_write_demux.out1.d.d[0].d[1]" "t.registers.read_write_demux.out1.d.d[0].t" -"t.registers.read_write_demux.c_f_c_t_or.a"|"t.registers.read_write_demux.c_f_c_t_or.b"->"t.registers.read_write_demux.c_f_c_t_or._y"- -~("t.registers.read_write_demux.c_f_c_t_or.a"|"t.registers.read_write_demux.c_f_c_t_or.b")->"t.registers.read_write_demux.c_f_c_t_or._y"+ -"t.registers.read_write_demux.c_f_c_t_or._y"->"t.registers.read_write_demux.c_f_c_t_or.y"- -~("t.registers.read_write_demux.c_f_c_t_or._y")->"t.registers.read_write_demux.c_f_c_t_or.y"+ -"t.registers.read_write_demux.in_v_buf.a"->"t.registers.read_write_demux.in_v_buf._y"- -~("t.registers.read_write_demux.in_v_buf.a")->"t.registers.read_write_demux.in_v_buf._y"+ -"t.registers.read_write_demux.in_v_buf._y"->"t.registers.read_write_demux.in_v_buf.y"- -~("t.registers.read_write_demux.in_v_buf._y")->"t.registers.read_write_demux.in_v_buf.y"+ -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_en_buf_t.out[0]" -= "t.registers.read_write_demux._en1_X_t[1]" "t.registers.read_write_demux.out1_en_buf_t.out[1]" -= "t.registers.read_write_demux._en1_X_t[2]" "t.registers.read_write_demux.out1_en_buf_t.out[2]" -= "t.registers.read_write_demux._en1_X_t[3]" "t.registers.read_write_demux.out1_en_buf_t.out[3]" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[3].c1" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[2].c1" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[1].c1" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux.out1_t_buf_func[0].c1" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux._en1_X_t[3]" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux._en1_X_t[2]" -= "t.registers.read_write_demux._en1_X_t[0]" "t.registers.read_write_demux._en1_X_t[1]" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_en_buf_f.out[0]" -= "t.registers.read_write_demux._en2_X_f[1]" "t.registers.read_write_demux.out2_en_buf_f.out[1]" -= "t.registers.read_write_demux._en2_X_f[2]" "t.registers.read_write_demux.out2_en_buf_f.out[2]" -= "t.registers.read_write_demux._en2_X_f[3]" "t.registers.read_write_demux.out2_en_buf_f.out[3]" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[3].c1" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[2].c1" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[1].c1" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux.out2_f_buf_func[0].c1" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux._en2_X_f[3]" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux._en2_X_f[2]" -= "t.registers.read_write_demux._en2_X_f[0]" "t.registers.read_write_demux._en2_X_f[1]" -"t.registers.read_write_demux.out1_a_inv.a"->"t.registers.read_write_demux.out1_a_inv.y"- -~("t.registers.read_write_demux.out1_a_inv.a")->"t.registers.read_write_demux.out1_a_inv.y"+ -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_en_buf_f.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_en_buf_f.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_en_buf_t.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_en_buf_t.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_t.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_t.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_f.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_f.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_en_buf_f.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_en_buf_f.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_en_buf_t.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_en_buf_t.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.vc.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.vc.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_buf_f.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_buf_f.supply.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_buf_t.supply.vss" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_buf_t.supply.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[3].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[3].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[2].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[2].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[1].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[1].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_t_buf_func[0].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out2_f_buf_func[0].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[3].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[3].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[2].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[2].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[1].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[1].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_t_buf_func[0].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out1_f_buf_func[0].vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.in_v_buf.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_el.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.c_f_c_t_or.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.reset_buf.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.en_ctl.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.inack_ctl.vdd" -= "t.registers.read_write_demux.supply.vdd" "t.registers.read_write_demux.out_or.vdd" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[3].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[3].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[2].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[2].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[1].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[1].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_t_buf_func[0].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out2_f_buf_func[0].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[3].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[3].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[2].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[2].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[1].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[1].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_t_buf_func[0].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out1_f_buf_func[0].vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.in_v_buf.vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_el.vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.c_f_c_t_or.vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.reset_buf.vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.en_ctl.vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.inack_ctl.vss" -= "t.registers.read_write_demux.supply.vss" "t.registers.read_write_demux.out_or.vss" -~"t.registers.read_write_demux.vc.ct.C2Els[0].c1"&~"t.registers.read_write_demux.vc.ct.C2Els[0].c2"->"t.registers.read_write_demux.vc.ct.C2Els[0]._y"+ -"t.registers.read_write_demux.vc.ct.C2Els[0].c1"&"t.registers.read_write_demux.vc.ct.C2Els[0].c2"->"t.registers.read_write_demux.vc.ct.C2Els[0]._y"- -"t.registers.read_write_demux.vc.ct.C2Els[0]._y"->"t.registers.read_write_demux.vc.ct.C2Els[0].y"- -~("t.registers.read_write_demux.vc.ct.C2Els[0]._y")->"t.registers.read_write_demux.vc.ct.C2Els[0].y"+ -~"t.registers.read_write_demux.vc.ct.C2Els[1].c1"&~"t.registers.read_write_demux.vc.ct.C2Els[1].c2"->"t.registers.read_write_demux.vc.ct.C2Els[1]._y"+ -"t.registers.read_write_demux.vc.ct.C2Els[1].c1"&"t.registers.read_write_demux.vc.ct.C2Els[1].c2"->"t.registers.read_write_demux.vc.ct.C2Els[1]._y"- -"t.registers.read_write_demux.vc.ct.C2Els[1]._y"->"t.registers.read_write_demux.vc.ct.C2Els[1].y"- -~("t.registers.read_write_demux.vc.ct.C2Els[1]._y")->"t.registers.read_write_demux.vc.ct.C2Els[1].y"+ -~"t.registers.read_write_demux.vc.ct.C2Els[2].c1"&~"t.registers.read_write_demux.vc.ct.C2Els[2].c2"->"t.registers.read_write_demux.vc.ct.C2Els[2]._y"+ -"t.registers.read_write_demux.vc.ct.C2Els[2].c1"&"t.registers.read_write_demux.vc.ct.C2Els[2].c2"->"t.registers.read_write_demux.vc.ct.C2Els[2]._y"- -"t.registers.read_write_demux.vc.ct.C2Els[2]._y"->"t.registers.read_write_demux.vc.ct.C2Els[2].y"- -~("t.registers.read_write_demux.vc.ct.C2Els[2]._y")->"t.registers.read_write_demux.vc.ct.C2Els[2].y"+ -= "t.registers.read_write_demux.vc.ct.tmp[4]" "t.registers.read_write_demux.vc.ct.C2Els[2].c1" -= "t.registers.read_write_demux.vc.ct.tmp[4]" "t.registers.read_write_demux.vc.ct.C2Els[0].y" -= "t.registers.read_write_demux.vc.ct.tmp[5]" "t.registers.read_write_demux.vc.ct.C2Els[2].c2" -= "t.registers.read_write_demux.vc.ct.tmp[5]" "t.registers.read_write_demux.vc.ct.C2Els[1].y" -= "t.registers.read_write_demux.vc.ct.supply.vdd" "t.registers.read_write_demux.vc.ct.C2Els[2].vdd" -= "t.registers.read_write_demux.vc.ct.supply.vdd" "t.registers.read_write_demux.vc.ct.C2Els[1].vdd" -= "t.registers.read_write_demux.vc.ct.supply.vdd" "t.registers.read_write_demux.vc.ct.C2Els[0].vdd" -= "t.registers.read_write_demux.vc.ct.supply.vss" "t.registers.read_write_demux.vc.ct.C2Els[2].vss" -= "t.registers.read_write_demux.vc.ct.supply.vss" "t.registers.read_write_demux.vc.ct.C2Els[1].vss" -= "t.registers.read_write_demux.vc.ct.supply.vss" "t.registers.read_write_demux.vc.ct.C2Els[0].vss" -= "t.registers.read_write_demux.vc.ct.in[0]" "t.registers.read_write_demux.vc.ct.C2Els[0].c1" -= "t.registers.read_write_demux.vc.ct.in[0]" "t.registers.read_write_demux.vc.ct.tmp[0]" -= "t.registers.read_write_demux.vc.ct.in[1]" "t.registers.read_write_demux.vc.ct.C2Els[0].c2" -= "t.registers.read_write_demux.vc.ct.in[1]" "t.registers.read_write_demux.vc.ct.tmp[1]" -= "t.registers.read_write_demux.vc.ct.in[2]" "t.registers.read_write_demux.vc.ct.C2Els[1].c1" -= "t.registers.read_write_demux.vc.ct.in[2]" "t.registers.read_write_demux.vc.ct.tmp[2]" -= "t.registers.read_write_demux.vc.ct.in[3]" "t.registers.read_write_demux.vc.ct.C2Els[1].c2" -= "t.registers.read_write_demux.vc.ct.in[3]" "t.registers.read_write_demux.vc.ct.tmp[3]" -= "t.registers.read_write_demux.vc.ct.out" "t.registers.read_write_demux.vc.ct.C2Els[2].y" -= "t.registers.read_write_demux.vc.ct.out" "t.registers.read_write_demux.vc.ct.tmp[6]" -= "t.registers.read_write_demux.vc.ct.in[0]" "t.registers.read_write_demux.vc.OR2_tf[0].y" -= "t.registers.read_write_demux.vc.ct.in[1]" "t.registers.read_write_demux.vc.OR2_tf[1].y" -= "t.registers.read_write_demux.vc.ct.in[2]" "t.registers.read_write_demux.vc.OR2_tf[2].y" -= "t.registers.read_write_demux.vc.ct.in[3]" "t.registers.read_write_demux.vc.OR2_tf[3].y" -"t.registers.read_write_demux.vc.OR2_tf[0].a"|"t.registers.read_write_demux.vc.OR2_tf[0].b"->"t.registers.read_write_demux.vc.OR2_tf[0]._y"- -~("t.registers.read_write_demux.vc.OR2_tf[0].a"|"t.registers.read_write_demux.vc.OR2_tf[0].b")->"t.registers.read_write_demux.vc.OR2_tf[0]._y"+ -"t.registers.read_write_demux.vc.OR2_tf[0]._y"->"t.registers.read_write_demux.vc.OR2_tf[0].y"- -~("t.registers.read_write_demux.vc.OR2_tf[0]._y")->"t.registers.read_write_demux.vc.OR2_tf[0].y"+ -"t.registers.read_write_demux.vc.OR2_tf[1].a"|"t.registers.read_write_demux.vc.OR2_tf[1].b"->"t.registers.read_write_demux.vc.OR2_tf[1]._y"- -~("t.registers.read_write_demux.vc.OR2_tf[1].a"|"t.registers.read_write_demux.vc.OR2_tf[1].b")->"t.registers.read_write_demux.vc.OR2_tf[1]._y"+ -"t.registers.read_write_demux.vc.OR2_tf[1]._y"->"t.registers.read_write_demux.vc.OR2_tf[1].y"- -~("t.registers.read_write_demux.vc.OR2_tf[1]._y")->"t.registers.read_write_demux.vc.OR2_tf[1].y"+ -"t.registers.read_write_demux.vc.OR2_tf[2].a"|"t.registers.read_write_demux.vc.OR2_tf[2].b"->"t.registers.read_write_demux.vc.OR2_tf[2]._y"- -~("t.registers.read_write_demux.vc.OR2_tf[2].a"|"t.registers.read_write_demux.vc.OR2_tf[2].b")->"t.registers.read_write_demux.vc.OR2_tf[2]._y"+ -"t.registers.read_write_demux.vc.OR2_tf[2]._y"->"t.registers.read_write_demux.vc.OR2_tf[2].y"- -~("t.registers.read_write_demux.vc.OR2_tf[2]._y")->"t.registers.read_write_demux.vc.OR2_tf[2].y"+ -"t.registers.read_write_demux.vc.OR2_tf[3].a"|"t.registers.read_write_demux.vc.OR2_tf[3].b"->"t.registers.read_write_demux.vc.OR2_tf[3]._y"- -~("t.registers.read_write_demux.vc.OR2_tf[3].a"|"t.registers.read_write_demux.vc.OR2_tf[3].b")->"t.registers.read_write_demux.vc.OR2_tf[3]._y"+ -"t.registers.read_write_demux.vc.OR2_tf[3]._y"->"t.registers.read_write_demux.vc.OR2_tf[3].y"- -~("t.registers.read_write_demux.vc.OR2_tf[3]._y")->"t.registers.read_write_demux.vc.OR2_tf[3].y"+ -= "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.ct.supply.vss" -= "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.ct.supply.vdd" -= "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[3].vdd" -= "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[2].vdd" -= "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[1].vdd" -= "t.registers.read_write_demux.vc.supply.vdd" "t.registers.read_write_demux.vc.OR2_tf[0].vdd" -= "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[3].vss" -= "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[2].vss" -= "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[1].vss" -= "t.registers.read_write_demux.vc.supply.vss" "t.registers.read_write_demux.vc.OR2_tf[0].vss" -= "t.registers.read_write_demux.vc.out" "t.registers.read_write_demux.vc.ct.out" -= "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].f" -= "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].t" -= "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].f" -= "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].t" -= "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].f" -= "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].t" -= "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].f" -= "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].t" -= "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].f" -= "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].t" -= "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].f" -= "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].t" -= "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].f" -= "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].t" -= "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].f" -= "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].t" -= "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.OR2_tf[3].b" -= "t.registers.read_write_demux.vc.in.d[3].d[0]" "t.registers.read_write_demux.vc.in.d[3].f" -= "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.OR2_tf[3].a" -= "t.registers.read_write_demux.vc.in.d[3].d[1]" "t.registers.read_write_demux.vc.in.d[3].t" -= "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.OR2_tf[2].b" -= "t.registers.read_write_demux.vc.in.d[2].d[0]" "t.registers.read_write_demux.vc.in.d[2].f" -= "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.OR2_tf[2].a" -= "t.registers.read_write_demux.vc.in.d[2].d[1]" "t.registers.read_write_demux.vc.in.d[2].t" -= "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.OR2_tf[1].b" -= "t.registers.read_write_demux.vc.in.d[1].d[0]" "t.registers.read_write_demux.vc.in.d[1].f" -= "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.OR2_tf[1].a" -= "t.registers.read_write_demux.vc.in.d[1].d[1]" "t.registers.read_write_demux.vc.in.d[1].t" -= "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.OR2_tf[0].b" -= "t.registers.read_write_demux.vc.in.d[0].d[0]" "t.registers.read_write_demux.vc.in.d[0].f" -= "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.OR2_tf[0].a" -= "t.registers.read_write_demux.vc.in.d[0].d[1]" "t.registers.read_write_demux.vc.in.d[0].t" -"t.registers.read_write_demux.out2_a_B_buf_f.buf1.a"->"t.registers.read_write_demux.out2_a_B_buf_f.buf1._y"- -~("t.registers.read_write_demux.out2_a_B_buf_f.buf1.a")->"t.registers.read_write_demux.out2_a_B_buf_f.buf1._y"+ -"t.registers.read_write_demux.out2_a_B_buf_f.buf1._y"->"t.registers.read_write_demux.out2_a_B_buf_f.buf1.y"- -~("t.registers.read_write_demux.out2_a_B_buf_f.buf1._y")->"t.registers.read_write_demux.out2_a_B_buf_f.buf1.y"+ -= "t.registers.read_write_demux.out2_a_B_buf_f.supply.vdd" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.vdd" -= "t.registers.read_write_demux.out2_a_B_buf_f.supply.vss" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.vss" -= "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[3]" -= "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[2]" -= "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.out[1]" -= "t.registers.read_write_demux.out2_a_B_buf_f.out[0]" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.y" -= "t.registers.read_write_demux.out2_a_B_buf_f.in" "t.registers.read_write_demux.out2_a_B_buf_f.buf1.a" -"t.registers.read_write_demux.out1_a_B_buf_t.buf1.a"->"t.registers.read_write_demux.out1_a_B_buf_t.buf1._y"- -~("t.registers.read_write_demux.out1_a_B_buf_t.buf1.a")->"t.registers.read_write_demux.out1_a_B_buf_t.buf1._y"+ -"t.registers.read_write_demux.out1_a_B_buf_t.buf1._y"->"t.registers.read_write_demux.out1_a_B_buf_t.buf1.y"- -~("t.registers.read_write_demux.out1_a_B_buf_t.buf1._y")->"t.registers.read_write_demux.out1_a_B_buf_t.buf1.y"+ -= "t.registers.read_write_demux.out1_a_B_buf_t.supply.vdd" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.vdd" -= "t.registers.read_write_demux.out1_a_B_buf_t.supply.vss" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.vss" -= "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[3]" -= "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[2]" -= "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.out[1]" -= "t.registers.read_write_demux.out1_a_B_buf_t.out[0]" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.y" -= "t.registers.read_write_demux.out1_a_B_buf_t.in" "t.registers.read_write_demux.out1_a_B_buf_t.buf1.a" -~"t.registers.read_write_demux.en_ctl.p1"&~"t.registers.read_write_demux.en_ctl.c1"->"t.registers.read_write_demux.en_ctl.y"+ -"t.registers.read_write_demux.en_ctl.c1"->"t.registers.read_write_demux.en_ctl.y"- -= "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" -= "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" -= "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" -= "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" -= "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" -= "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" -= "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.c_f_c_t_or.b" -= "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.c_buf_f.in" -= "t.registers.read_write_demux.cond.d.d[0].d[0]" "t.registers.read_write_demux.cond.d.d[0].f" -= "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.c_f_c_t_or.a" -= "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.c_buf_t.in" -= "t.registers.read_write_demux.cond.d.d[0].d[1]" "t.registers.read_write_demux.cond.d.d[0].t" -"t.registers.read_write_demux.c_buf_f.buf1.a"->"t.registers.read_write_demux.c_buf_f.buf1._y"- -~("t.registers.read_write_demux.c_buf_f.buf1.a")->"t.registers.read_write_demux.c_buf_f.buf1._y"+ -"t.registers.read_write_demux.c_buf_f.buf1._y"->"t.registers.read_write_demux.c_buf_f.buf1.y"- -~("t.registers.read_write_demux.c_buf_f.buf1._y")->"t.registers.read_write_demux.c_buf_f.buf1.y"+ -= "t.registers.read_write_demux.c_buf_f.supply.vdd" "t.registers.read_write_demux.c_buf_f.buf1.vdd" -= "t.registers.read_write_demux.c_buf_f.supply.vss" "t.registers.read_write_demux.c_buf_f.buf1.vss" -= "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.out[3]" -= "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.out[2]" -= "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.out[1]" -= "t.registers.read_write_demux.c_buf_f.out[0]" "t.registers.read_write_demux.c_buf_f.buf1.y" -= "t.registers.read_write_demux.c_buf_f.in" "t.registers.read_write_demux.c_buf_f.buf1.a" -~"t.registers.read_write_demux.out1_f_buf_func[0].c1"&~"t.registers.read_write_demux.out1_f_buf_func[0].c2"|~"t.registers.read_write_demux.out1_f_buf_func[0].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[0]._y"+ -"t.registers.read_write_demux.out1_f_buf_func[0].c1"&"t.registers.read_write_demux.out1_f_buf_func[0].c2"&"t.registers.read_write_demux.out1_f_buf_func[0].n1"&"t.registers.read_write_demux.out1_f_buf_func[0].n2"&"t.registers.read_write_demux.out1_f_buf_func[0].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[0]._y"- -"t.registers.read_write_demux.out1_f_buf_func[0]._y"->"t.registers.read_write_demux.out1_f_buf_func[0].y"- -~("t.registers.read_write_demux.out1_f_buf_func[0]._y")->"t.registers.read_write_demux.out1_f_buf_func[0].y"+ -~"t.registers.read_write_demux.out1_f_buf_func[1].c1"&~"t.registers.read_write_demux.out1_f_buf_func[1].c2"|~"t.registers.read_write_demux.out1_f_buf_func[1].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[1]._y"+ -"t.registers.read_write_demux.out1_f_buf_func[1].c1"&"t.registers.read_write_demux.out1_f_buf_func[1].c2"&"t.registers.read_write_demux.out1_f_buf_func[1].n1"&"t.registers.read_write_demux.out1_f_buf_func[1].n2"&"t.registers.read_write_demux.out1_f_buf_func[1].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[1]._y"- -"t.registers.read_write_demux.out1_f_buf_func[1]._y"->"t.registers.read_write_demux.out1_f_buf_func[1].y"- -~("t.registers.read_write_demux.out1_f_buf_func[1]._y")->"t.registers.read_write_demux.out1_f_buf_func[1].y"+ -~"t.registers.read_write_demux.out1_f_buf_func[2].c1"&~"t.registers.read_write_demux.out1_f_buf_func[2].c2"|~"t.registers.read_write_demux.out1_f_buf_func[2].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[2]._y"+ -"t.registers.read_write_demux.out1_f_buf_func[2].c1"&"t.registers.read_write_demux.out1_f_buf_func[2].c2"&"t.registers.read_write_demux.out1_f_buf_func[2].n1"&"t.registers.read_write_demux.out1_f_buf_func[2].n2"&"t.registers.read_write_demux.out1_f_buf_func[2].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[2]._y"- -"t.registers.read_write_demux.out1_f_buf_func[2]._y"->"t.registers.read_write_demux.out1_f_buf_func[2].y"- -~("t.registers.read_write_demux.out1_f_buf_func[2]._y")->"t.registers.read_write_demux.out1_f_buf_func[2].y"+ -~"t.registers.read_write_demux.out1_f_buf_func[3].c1"&~"t.registers.read_write_demux.out1_f_buf_func[3].c2"|~"t.registers.read_write_demux.out1_f_buf_func[3].pr_B"->"t.registers.read_write_demux.out1_f_buf_func[3]._y"+ -"t.registers.read_write_demux.out1_f_buf_func[3].c1"&"t.registers.read_write_demux.out1_f_buf_func[3].c2"&"t.registers.read_write_demux.out1_f_buf_func[3].n1"&"t.registers.read_write_demux.out1_f_buf_func[3].n2"&"t.registers.read_write_demux.out1_f_buf_func[3].sr_B"->"t.registers.read_write_demux.out1_f_buf_func[3]._y"- -"t.registers.read_write_demux.out1_f_buf_func[3]._y"->"t.registers.read_write_demux.out1_f_buf_func[3].y"- -~("t.registers.read_write_demux.out1_f_buf_func[3]._y")->"t.registers.read_write_demux.out1_f_buf_func[3].y"+ -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" -= "t.registers.read_write_demux._out2_a_BX_f[1]" "t.registers.read_write_demux.out2_a_B_buf_t.out[1]" -= "t.registers.read_write_demux._out2_a_BX_f[2]" "t.registers.read_write_demux.out2_a_B_buf_t.out[2]" -= "t.registers.read_write_demux._out2_a_BX_f[3]" "t.registers.read_write_demux.out2_a_B_buf_t.out[3]" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[3].c2" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[2].c2" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[1].c2" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux.out2_f_buf_func[0].c2" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux._out2_a_BX_f[3]" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux._out2_a_BX_f[2]" -= "t.registers.read_write_demux._out2_a_BX_f[0]" "t.registers.read_write_demux._out2_a_BX_f[1]" -= "t.registers.read_write_demux._in_v" "t.registers.read_write_demux.in_v_buf.a" -= "t.registers.read_write_demux._in_v" "t.registers.read_write_demux.c_el.c2" -= "t.registers.read_write_demux._in_v" "t.registers.read_write_demux.vc.out" -~"t.registers.read_write_demux.out1_t_buf_func[0].c1"&~"t.registers.read_write_demux.out1_t_buf_func[0].c2"|~"t.registers.read_write_demux.out1_t_buf_func[0].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[0]._y"+ -"t.registers.read_write_demux.out1_t_buf_func[0].c1"&"t.registers.read_write_demux.out1_t_buf_func[0].c2"&"t.registers.read_write_demux.out1_t_buf_func[0].n1"&"t.registers.read_write_demux.out1_t_buf_func[0].n2"&"t.registers.read_write_demux.out1_t_buf_func[0].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[0]._y"- -"t.registers.read_write_demux.out1_t_buf_func[0]._y"->"t.registers.read_write_demux.out1_t_buf_func[0].y"- -~("t.registers.read_write_demux.out1_t_buf_func[0]._y")->"t.registers.read_write_demux.out1_t_buf_func[0].y"+ -~"t.registers.read_write_demux.out1_t_buf_func[1].c1"&~"t.registers.read_write_demux.out1_t_buf_func[1].c2"|~"t.registers.read_write_demux.out1_t_buf_func[1].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[1]._y"+ -"t.registers.read_write_demux.out1_t_buf_func[1].c1"&"t.registers.read_write_demux.out1_t_buf_func[1].c2"&"t.registers.read_write_demux.out1_t_buf_func[1].n1"&"t.registers.read_write_demux.out1_t_buf_func[1].n2"&"t.registers.read_write_demux.out1_t_buf_func[1].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[1]._y"- -"t.registers.read_write_demux.out1_t_buf_func[1]._y"->"t.registers.read_write_demux.out1_t_buf_func[1].y"- -~("t.registers.read_write_demux.out1_t_buf_func[1]._y")->"t.registers.read_write_demux.out1_t_buf_func[1].y"+ -~"t.registers.read_write_demux.out1_t_buf_func[2].c1"&~"t.registers.read_write_demux.out1_t_buf_func[2].c2"|~"t.registers.read_write_demux.out1_t_buf_func[2].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[2]._y"+ -"t.registers.read_write_demux.out1_t_buf_func[2].c1"&"t.registers.read_write_demux.out1_t_buf_func[2].c2"&"t.registers.read_write_demux.out1_t_buf_func[2].n1"&"t.registers.read_write_demux.out1_t_buf_func[2].n2"&"t.registers.read_write_demux.out1_t_buf_func[2].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[2]._y"- -"t.registers.read_write_demux.out1_t_buf_func[2]._y"->"t.registers.read_write_demux.out1_t_buf_func[2].y"- -~("t.registers.read_write_demux.out1_t_buf_func[2]._y")->"t.registers.read_write_demux.out1_t_buf_func[2].y"+ -~"t.registers.read_write_demux.out1_t_buf_func[3].c1"&~"t.registers.read_write_demux.out1_t_buf_func[3].c2"|~"t.registers.read_write_demux.out1_t_buf_func[3].pr_B"->"t.registers.read_write_demux.out1_t_buf_func[3]._y"+ -"t.registers.read_write_demux.out1_t_buf_func[3].c1"&"t.registers.read_write_demux.out1_t_buf_func[3].c2"&"t.registers.read_write_demux.out1_t_buf_func[3].n1"&"t.registers.read_write_demux.out1_t_buf_func[3].n2"&"t.registers.read_write_demux.out1_t_buf_func[3].sr_B"->"t.registers.read_write_demux.out1_t_buf_func[3]._y"- -"t.registers.read_write_demux.out1_t_buf_func[3]._y"->"t.registers.read_write_demux.out1_t_buf_func[3].y"- -~("t.registers.read_write_demux.out1_t_buf_func[3]._y")->"t.registers.read_write_demux.out1_t_buf_func[3].y"+ -"t.registers.read_write_demux.out2_a_B_buf_t.buf1.a"->"t.registers.read_write_demux.out2_a_B_buf_t.buf1._y"- -~("t.registers.read_write_demux.out2_a_B_buf_t.buf1.a")->"t.registers.read_write_demux.out2_a_B_buf_t.buf1._y"+ -"t.registers.read_write_demux.out2_a_B_buf_t.buf1._y"->"t.registers.read_write_demux.out2_a_B_buf_t.buf1.y"- -~("t.registers.read_write_demux.out2_a_B_buf_t.buf1._y")->"t.registers.read_write_demux.out2_a_B_buf_t.buf1.y"+ -= "t.registers.read_write_demux.out2_a_B_buf_t.supply.vdd" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.vdd" -= "t.registers.read_write_demux.out2_a_B_buf_t.supply.vss" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.vss" -= "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[3]" -= "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[2]" -= "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.out[1]" -= "t.registers.read_write_demux.out2_a_B_buf_t.out[0]" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.y" -= "t.registers.read_write_demux.out2_a_B_buf_t.in" "t.registers.read_write_demux.out2_a_B_buf_t.buf1.a" -= "t.registers.read_write_demux._out2_a_B" "t.registers.read_write_demux.out2_a_B_buf_t.in" -= "t.registers.read_write_demux._out2_a_B" "t.registers.read_write_demux.out2_a_B_buf_f.in" -= "t.registers.read_write_demux._out2_a_B" "t.registers.read_write_demux.out2_a_inv.y" -~"t.registers.ff_validator.ct.C2Els[0].c1"&~"t.registers.ff_validator.ct.C2Els[0].c2"->"t.registers.ff_validator.ct.C2Els[0]._y"+ -"t.registers.ff_validator.ct.C2Els[0].c1"&"t.registers.ff_validator.ct.C2Els[0].c2"->"t.registers.ff_validator.ct.C2Els[0]._y"- -"t.registers.ff_validator.ct.C2Els[0]._y"->"t.registers.ff_validator.ct.C2Els[0].y"- -~("t.registers.ff_validator.ct.C2Els[0]._y")->"t.registers.ff_validator.ct.C2Els[0].y"+ -= "t.registers.ff_validator.ct.supply.vdd" "t.registers.ff_validator.ct.C2Els[0].vdd" -= "t.registers.ff_validator.ct.supply.vss" "t.registers.ff_validator.ct.C2Els[0].vss" -= "t.registers.ff_validator.ct.in[0]" "t.registers.ff_validator.ct.C2Els[0].c1" -= "t.registers.ff_validator.ct.in[0]" "t.registers.ff_validator.ct.tmp[0]" -= "t.registers.ff_validator.ct.in[1]" "t.registers.ff_validator.ct.C2Els[0].c2" -= "t.registers.ff_validator.ct.in[1]" "t.registers.ff_validator.ct.tmp[1]" -= "t.registers.ff_validator.ct.out" "t.registers.ff_validator.ct.C2Els[0].y" -= "t.registers.ff_validator.ct.out" "t.registers.ff_validator.ct.tmp[2]" -= "t.registers.ff_validator.ct.in[0]" "t.registers.ff_validator.OR2_tf[0].y" -= "t.registers.ff_validator.ct.in[1]" "t.registers.ff_validator.OR2_tf[1].y" -"t.registers.ff_validator.OR2_tf[0].a"|"t.registers.ff_validator.OR2_tf[0].b"->"t.registers.ff_validator.OR2_tf[0]._y"- -~("t.registers.ff_validator.OR2_tf[0].a"|"t.registers.ff_validator.OR2_tf[0].b")->"t.registers.ff_validator.OR2_tf[0]._y"+ -"t.registers.ff_validator.OR2_tf[0]._y"->"t.registers.ff_validator.OR2_tf[0].y"- -~("t.registers.ff_validator.OR2_tf[0]._y")->"t.registers.ff_validator.OR2_tf[0].y"+ -"t.registers.ff_validator.OR2_tf[1].a"|"t.registers.ff_validator.OR2_tf[1].b"->"t.registers.ff_validator.OR2_tf[1]._y"- -~("t.registers.ff_validator.OR2_tf[1].a"|"t.registers.ff_validator.OR2_tf[1].b")->"t.registers.ff_validator.OR2_tf[1]._y"+ -"t.registers.ff_validator.OR2_tf[1]._y"->"t.registers.ff_validator.OR2_tf[1].y"- -~("t.registers.ff_validator.OR2_tf[1]._y")->"t.registers.ff_validator.OR2_tf[1].y"+ -= "t.registers.ff_validator.supply.vss" "t.registers.ff_validator.ct.supply.vss" -= "t.registers.ff_validator.supply.vdd" "t.registers.ff_validator.ct.supply.vdd" -= "t.registers.ff_validator.supply.vdd" "t.registers.ff_validator.OR2_tf[1].vdd" -= "t.registers.ff_validator.supply.vdd" "t.registers.ff_validator.OR2_tf[0].vdd" -= "t.registers.ff_validator.supply.vss" "t.registers.ff_validator.OR2_tf[1].vss" -= "t.registers.ff_validator.supply.vss" "t.registers.ff_validator.OR2_tf[0].vss" -= "t.registers.ff_validator.out" "t.registers.ff_validator.ct.out" -= "t.registers.ff_validator.in.d[0].d[0]" "t.registers.ff_validator.in.d[0].f" -= "t.registers.ff_validator.in.d[0].d[1]" "t.registers.ff_validator.in.d[0].t" -= "t.registers.ff_validator.in.d[1].d[0]" "t.registers.ff_validator.in.d[1].f" -= "t.registers.ff_validator.in.d[1].d[1]" "t.registers.ff_validator.in.d[1].t" -= "t.registers.ff_validator.in.d[1].d[0]" "t.registers.ff_validator.in.d[1].f" -= "t.registers.ff_validator.in.d[1].d[1]" "t.registers.ff_validator.in.d[1].t" -= "t.registers.ff_validator.in.d[0].d[0]" "t.registers.ff_validator.in.d[0].f" -= "t.registers.ff_validator.in.d[0].d[1]" "t.registers.ff_validator.in.d[0].t" -= "t.registers.ff_validator.in.d[1].d[0]" "t.registers.ff_validator.OR2_tf[1].b" -= "t.registers.ff_validator.in.d[1].d[0]" "t.registers.ff_validator.in.d[1].f" -= "t.registers.ff_validator.in.d[1].d[1]" "t.registers.ff_validator.OR2_tf[1].a" -= "t.registers.ff_validator.in.d[1].d[1]" "t.registers.ff_validator.in.d[1].t" -= "t.registers.ff_validator.in.d[0].d[0]" "t.registers.ff_validator.OR2_tf[0].b" -= "t.registers.ff_validator.in.d[0].d[0]" "t.registers.ff_validator.in.d[0].f" -= "t.registers.ff_validator.in.d[0].d[1]" "t.registers.ff_validator.OR2_tf[0].a" -= "t.registers.ff_validator.in.d[0].d[1]" "t.registers.ff_validator.in.d[0].t" +"t.registers.address_propagator_t[0].a"&"t.registers.address_propagator_t[0].b"->"t.registers.address_propagator_t[0]._y"- +~("t.registers.address_propagator_t[0].a"&"t.registers.address_propagator_t[0].b")->"t.registers.address_propagator_t[0]._y"+ +"t.registers.address_propagator_t[0]._y"->"t.registers.address_propagator_t[0].y"- +~("t.registers.address_propagator_t[0]._y")->"t.registers.address_propagator_t[0].y"+ +"t.registers.address_propagator_t[1].a"&"t.registers.address_propagator_t[1].b"->"t.registers.address_propagator_t[1]._y"- +~("t.registers.address_propagator_t[1].a"&"t.registers.address_propagator_t[1].b")->"t.registers.address_propagator_t[1]._y"+ +"t.registers.address_propagator_t[1]._y"->"t.registers.address_propagator_t[1].y"- +~("t.registers.address_propagator_t[1]._y")->"t.registers.address_propagator_t[1].y"+ += "t.registers.address_propagator_t[1].y" "t.registers.output_buf.in.d.d[3].t" += "t.registers.address_propagator_t[1].y" "t.registers.output_buf.in.d.d[3].d[1]" += "t.registers.address_propagator_t[0].y" "t.registers.output_buf.in.d.d[2].t" += "t.registers.address_propagator_t[0].y" "t.registers.output_buf.in.d.d[2].d[1]" += "t.registers._clock[0]" "t.registers.clk_X.out[0]" += "t.registers._clock[1]" "t.registers.clk_X.out[1]" += "t.registers._clock[2]" "t.registers.clk_X.out[2]" += "t.registers._clock[3]" "t.registers.clk_X.out[3]" += "t.registers._clock[0]" "t.registers.and_encoder[3].b" += "t.registers._clock[0]" "t.registers.and_encoder[2].b" += "t.registers._clock[0]" "t.registers.and_encoder[1].b" += "t.registers._clock[0]" "t.registers.and_encoder[0].b" += "t.registers._clock[0]" "t.registers._clock[3]" += "t.registers._clock[0]" "t.registers._clock[2]" += "t.registers._clock[0]" "t.registers._clock[1]" += "t.registers._in_v_temp_write" "t.registers.clk_dly.in" += "t.registers._in_v_temp_write" "t.registers.clk_switch.y" = "t.dly_cfg[0]" "t.registers.dly_cfg[0]" = "t.dly_cfg[1]" "t.registers.dly_cfg[1]" = "t.out.d.d[0].d[0]" "t.out.d.d[0].f" @@ -2248,6 +1766,8 @@ = "t.out.d.d[3].d[1]" "t.registers.out.d.d[3].d[1]" = "t.out.d.d[3].d[0]" "t.out.d.d[3].f" = "t.out.d.d[3].d[1]" "t.out.d.d[3].t" += "t.out.d.d[2].d[0]" "t.out.d.d[2].f" += "t.out.d.d[2].d[1]" "t.out.d.d[2].t" = "t.out.d.d[1].d[0]" "t.out.d.d[1].f" = "t.out.d.d[1].d[1]" "t.out.d.d[1].t" = "t.out.d.d[0].d[0]" "t.out.d.d[0].f" @@ -2304,19 +1824,11 @@ = "t.in.d.d[4].t" "t.registers.in.d.d[4].t" = "t.in.d.d[4].d[0]" "t.registers.in.d.d[4].d[0]" = "t.in.d.d[4].d[1]" "t.registers.in.d.d[4].d[1]" -= "t.in.d.d[2].f" "t.out.d.d[2].f" -= "t.in.d.d[2].t" "t.out.d.d[2].t" -= "t.in.d.d[2].d[0]" "t.out.d.d[2].d[0]" -= "t.in.d.d[2].d[1]" "t.out.d.d[2].d[1]" = "t.in.d.d[4].d[0]" "t.in.d.d[4].f" = "t.in.d.d[4].d[1]" "t.in.d.d[4].t" = "t.in.d.d[3].d[0]" "t.in.d.d[3].f" = "t.in.d.d[3].d[1]" "t.in.d.d[3].t" -= "t.in.d.d[2].d[0]" "t.out.d.d[2].f" -= "t.in.d.d[2].d[0]" "t.out.d.d[2].d[0]" = "t.in.d.d[2].d[0]" "t.in.d.d[2].f" -= "t.in.d.d[2].d[1]" "t.out.d.d[2].t" -= "t.in.d.d[2].d[1]" "t.out.d.d[2].d[1]" = "t.in.d.d[2].d[1]" "t.in.d.d[2].t" = "t.in.d.d[1].d[0]" "t.in.d.d[1].f" = "t.in.d.d[1].d[1]" "t.in.d.d[1].t" diff --git a/test/unit_tests/register_wrw/test.prsim b/test/unit_tests/register_wrw/test.prsim index 3b7db2b..bb66528 100644 --- a/test/unit_tests/register_wrw/test.prsim +++ b/test/unit_tests/register_wrw/test.prsim @@ -1,4 +1,4 @@ -#watchall +watchall system "echo '[0] start test'" system "echo '----------------------------------------------------------'" @@ -7,12 +7,18 @@ set t.data[0].d[0] 0 set t.data[0].d[1] 0 set t.data[1].d[0] 0 set t.data[1].d[1] 0 +set t.dly_cfg[0] 1 +set t.dly_cfg[1] 1 set t.out.a 0 +set t.out.v 0 +#set t.registers._in_write.a 0 set Reset 0 cycle status X -mode run -assert-qdi-channel-neutral "t.in" 5 +#mode run +cycle + +assert-qdi-channel-neutral "t.out" 4 assert t.data[0].d[0] 0 assert t.data[0].d[1] 0 assert t.data[1].d[0] 0 @@ -22,28 +28,44 @@ system "echo '[1] reset completed'" system "echo '----------------------------------------------------------'" # Set delay config lines -set t.dly_cfg[0] 1 -set t.dly_cfg[1] 1 + cycle system "echo '[2] delay line set'" system "echo '----------------------------------------------------------'" + set-qdi-channel-valid "t.in" 5 3 +# 3 -> 00011 -> writing mode, address 00, word 11 cycle -assert-qdi-channel-valid "t.registers._in_write" 4 3 -assert t.registers._clock 0 -assert t.registers._out_encoder[0] 1 -assert t.registers._out_encoder[1] 0 -assert t.registers._out_encoder[2] 0 -assert t.registers._out_encoder[3] 0 -cycle +assert t.in.a 1 +assert-qdi-channel-neutral "t.out" 4 set-qdi-channel-neutral "t.in" 5 cycle -assert t.registers._clock 1 -assert t.registers.ff_t[0].q 1 -assert t.registers.ff_t[1].q 1 +assert t.registers.ff[0].q 1 +assert t.registers.ff[1].q 1 +assert t.registers.ff[2].q 0 +assert t.registers.ff[3].q 0 + system "echo '[3] first writing done'" system "echo '----------------------------------------------------------'" +set-qdi-channel-valid "t.in" 5 16 +# 16 -> 10000 -> reading mode, address 00, word 00 (word doesn't needed here) +cycle +assert-qdi-channel-valid "t.out" 4 3 +set t.out.v 1 +cycle +set t.out.a 1 +cycle +assert t.in.a 1 +set-qdi-channel-neutral "t.in" 5 +cycle +assert t.registers.ff[0].q 1 +assert t.registers.ff[1].q 1 +assert t.registers.ff[2].q 0 +assert t.registers.ff[3].q 0 +assert-qdi-channel-neutral "t.out" 4 +system "echo '[4] reading done'" +system "echo '----------------------------------------------------------'"