module tmpl_0_0dataflow__neuro_0_0decoder__dualrail__refresh_36_760_4(Iin_d0_d0 , Iin_d0_d1 , Iin_d1_d0 , Iin_d1_d1 , Iin_d2_d0 , Iin_d2_d1 , Iin_d3_d0 , Iin_d3_d1 , Iin_d4_d0 , Iin_d4_d1 , Iin_d5_d0 , Iin_d5_d1 , Iout0 , Iout1 , Iout2 , Iout3 , Iout4 , Iout5 , Iout6 , Iout7 , Iout8 , Iout9 , Iout10 , Iout11 , Iout12 , Iout13 , Iout14 , Iout15 , Iout16 , Iout17 , Iout18 , Iout19 , Iout20 , Iout21 , Iout22 , Iout23 , Iout24 , Iout25 , Iout26 , Iout27 , Iout28 , Iout29 , Iout30 , Iout31 , Iout32 , Iout33 , Iout34 , Iout35 , Iout36 , Iout37 , Iout38 , Iout39 , Iout40 , Iout41 , Iout42 , Iout43 , Iout44 , Iout45 , Iout46 , Iout47 , Iout48 , Iout49 , Iout50 , Iout51 , Iout52 , Iout53 , Iout54 , Iout55 , Iout56 , Iout57 , Iout58 , Iout59 , Ifinal_refresh_d0_d0 , Ifinal_refresh_d0_d1 , Ifinal_refresh_d1_d0 , Ifinal_refresh_d1_d1 , Ifinal_refresh_d2_d0 , Ifinal_refresh_d2_d1 , Ifinal_refresh_d3_d0 , Ifinal_refresh_d3_d1 , Ifinal_refresh_d4_d0 , Ifinal_refresh_d4_d1 , Ifinal_refresh_d5_d0 , Ifinal_refresh_d5_d1 , vdd, vss); 
   input vdd;
   input vss;
   input Iin_d0_d0 ;
   input Iin_d0_d1 ;
   input Iin_d1_d0 ;
   input Iin_d1_d1 ;
   input Iin_d2_d0 ;
   input Iin_d2_d1 ;
   input Iin_d3_d0 ;
   input Iin_d3_d1 ;
   input Iin_d4_d0 ;
   input Iin_d4_d1 ;
   input Iin_d5_d0 ;
   input Iin_d5_d1 ;
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   

// -- signals ---
   output Iout57 ;
   output Iout30 ;
   wire Iin_d1_d1 ;
   output Iout15 ;
   output Iout2 ;
   output Iout49 ;
   output Iout40 ;
   output Iout38 ;
   output Iout43 ;
   output Iout25 ;
   output Iout19 ;
   output Iout12 ;
   output Ifinal_refresh_d5_d0 ;
   output Ifinal_refresh_d3_d0 ;
   wire Iin_d4_d1 ;
   output Iout28 ;
   output Iout3 ;
   output Ifinal_refresh_d2_d0 ;
   wire Iin_d0_d1 ;
   output Iout24 ;
   output Iout7 ;
   output Iout54 ;
   output Ifinal_refresh_d4_d0 ;
   output Iout46 ;
   output Iout41 ;
   output Iout35 ;
   output Iout23 ;
   output Ifinal_refresh_d4_d1 ;
   output Iout17 ;
   output Iout6 ;
   output Iout1 ;
   wire Iin_d4_d0 ;
   output Ifinal_refresh_d0_d0 ;
   wire Iin_d5_d0 ;
   output Iout48 ;
   output Iout33 ;
   output Iout20 ;
   output Iout10 ;
   output Ifinal_refresh_d2_d1 ;
   output Ifinal_refresh_d1_d1 ;
   wire Iin_d3_d0 ;
   output Iout52 ;
   output Ifinal_refresh_d3_d1 ;
   wire Iin_d1_d0 ;
   output Iout36 ;
   output Iout31 ;
   output Iout26 ;
   output Iout59 ;
   output Iout42 ;
   output Iout50 ;
   output Iout45 ;
   output Iout37 ;
   output Iout55 ;
   output Iout21 ;
   output Iout39 ;
   output Ifinal_refresh_d5_d1 ;
   output Iout8 ;
   output Ifinal_refresh_d1_d0 ;
   output Iout14 ;
   output Iout9 ;
   wire Iin_d3_d1 ;
   output Iout4 ;
   output Iout13 ;
   output Iout0 ;
   output Iout34 ;
   output Iout27 ;
   output Iout22 ;
   output Iout58 ;
   output Iout29 ;
   output Iout16 ;
   output Iout11 ;
   wire Iin_d2_d1 ;
   output Iout51 ;
   output Iout18 ;
   output Iout5 ;
   wire Iin_d5_d1 ;
   output Iout56 ;
   output Iout53 ;
   output Iout44 ;
   output Ifinal_refresh_d0_d1 ;
   output Iout32 ;
   wire Iin_d2_d0 ;
   wire Iin_d0_d0 ;
   output Iout47 ;

// --- instances
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree0  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout0 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree1  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout1 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree2  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout2 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree3  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout3 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree4  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout4 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree5  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout5 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree6  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout6 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree7  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout7 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree8  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout8 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree9  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout9 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree10  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout10 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree11  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout11 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree12  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout12 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree13  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout13 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree14  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout14 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree15  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout15 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree16  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout16 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree17  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout17 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree18  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout18 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree19  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout19 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree20  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout20 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree21  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout21 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree22  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout22 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree23  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout23 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree24  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout24 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree25  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout25 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree26  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout26 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree27  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout27 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree28  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout28 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree29  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout29 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree30  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout30 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree31  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d0 ), .out(Iout31 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree32  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout32 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree33  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout33 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree34  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout34 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree35  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout35 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree36  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout36 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree37  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout37 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree38  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout38 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree39  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout39 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree40  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout40 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree41  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout41 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree42  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout42 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree43  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout43 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree44  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout44 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree45  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout45 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree46  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout46 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree47  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d0 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout47 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree48  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout48 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree49  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout49 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree50  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout50 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree51  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout51 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree52  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout52 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree53  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout53 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree54  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout54 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree55  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d1 ), .Iin3 (Ifinal_refresh_d3_d0 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout55 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree56  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout56 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree57  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d0 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout57 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree58  (.Iin0 (Ifinal_refresh_d0_d0 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout58 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0andtree_36_4 Iatree59  (.Iin0 (Ifinal_refresh_d0_d1 ), .Iin1 (Ifinal_refresh_d1_d1 ), .Iin2 (Ifinal_refresh_d2_d0 ), .Iin3 (Ifinal_refresh_d3_d1 ), .Iin4 (Ifinal_refresh_d4_d1 ), .Iin5 (Ifinal_refresh_d5_d1 ), .out(Iout59 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_tX0  (.y(Ifinal_refresh_d0_d1 ), .a(Iin_d0_d1 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_tX1  (.y(Ifinal_refresh_d1_d1 ), .a(Iin_d1_d1 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_tX2  (.y(Ifinal_refresh_d2_d1 ), .a(Iin_d2_d1 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_tX3  (.y(Ifinal_refresh_d3_d1 ), .a(Iin_d3_d1 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_tX4  (.y(Ifinal_refresh_d4_d1 ), .a(Iin_d4_d1 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_tX5  (.y(Ifinal_refresh_d5_d1 ), .a(Iin_d5_d1 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_fX0  (.y(Ifinal_refresh_d0_d0 ), .a(Iin_d0_d0 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_fX1  (.y(Ifinal_refresh_d1_d0 ), .a(Iin_d1_d0 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_fX2  (.y(Ifinal_refresh_d2_d0 ), .a(Iin_d2_d0 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_fX3  (.y(Ifinal_refresh_d3_d0 ), .a(Iin_d3_d0 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_fX4  (.y(Ifinal_refresh_d4_d0 ), .a(Iin_d4_d0 ), .vdd(vdd), .vss(vss));
BUF_X12 Iin_fX5  (.y(Ifinal_refresh_d5_d0 ), .a(Iin_d5_d0 ), .vdd(vdd), .vss(vss));
endmodule