module tmpl_0_0dataflow__neuro_0_0register__acells__improved_323_4(Iin_d_d0_d0 , Iin_d_d0_d1 , Iin_d_d1_d0 , Iin_d_d1_d1 , Iin_d_d2_d0 , Iin_d_d2_d1 , Iin_d_d3_d0 , Iin_d_d3_d1 , Iin_d_d4_d0 , Iin_d_d4_d1 , Iin_d_d5_d0 , Iin_d_d5_d1 , Iin_d_d6_d0 , Iin_d_d6_d1 , Iin_d_d7_d0 , Iin_d_d7_d1 , Iin_d_d8_d0 , Iin_d_d8_d1 , Iin_d_d9_d0 , Iin_d_d9_d1 , Iin_d_d10_d0 , Iin_d_d10_d1 , Iin_d_d11_d0 , Iin_d_d11_d1 , Iin_d_d12_d0 , Iin_d_d12_d1 , Iin_d_d13_d0 , Iin_d_d13_d1 , Iin_d_d14_d0 , Iin_d_d14_d1 , Iin_d_d15_d0 , Iin_d_d15_d1 , Iin_d_d16_d0 , Iin_d_d16_d1 , Iin_d_d17_d0 , Iin_d_d17_d1 , Iin_d_d18_d0 , Iin_d_d18_d1 , Iin_d_d19_d0 , Iin_d_d19_d1 , Iin_d_d20_d0 , Iin_d_d20_d1 , Iin_d_d21_d0 , Iin_d_d21_d1 , Iin_d_d22_d0 , Iin_d_d22_d1 , Iin_d_d23_d1 , Iin_a , Iout_d0_d0 , Iout_d0_d1 , Iout_d1_d0 , Iout_d1_d1 , Iout_d2_d0 , Iout_d2_d1 , Iout_d3_d0 , Iout_d3_d1 , Iout_d4_d0 , Iout_d4_d1 , Iout_d5_d0 , Iout_d5_d1 , Iout_d6_d0 , Iout_d6_d1 , Iout_d7_d0 , Iout_d7_d1 , Iout_d8_d0 , Iout_d8_d1 , Iout_d9_d0 , Iout_d9_d1 , Iout_d10_d0 , Iout_d10_d1 , Iout_d11_d0 , Iout_d11_d1 , Iout_d12_d0 , Iout_d12_d1 , Iout_d13_d0 , Iout_d13_d1 , Iout_d14_d0 , Iout_d14_d1 , Iout_d15_d0 , Iout_d15_d1 , Iout_d16_d0 , Iout_d16_d1 , Iout_d17_d0 , Iout_d17_d1 , Iout_d18_d0 , Iout_d18_d1 , Iout_d19_d0 , Iout_d19_d1 , Iout_d20_d0 , Iout_d20_d1 , Iout_d21_d0 , Iout_d21_d1 , Iout_d22_d0 , Iout_d22_d1 , reset_B, vdd, vss); 
   input vdd;
   input vss;
   input Iin_d_d0_d0 ;
   input Iin_d_d0_d1 ;
   input Iin_d_d1_d0 ;
   input Iin_d_d1_d1 ;
   input Iin_d_d2_d0 ;
   input Iin_d_d2_d1 ;
   input Iin_d_d3_d0 ;
   input Iin_d_d3_d1 ;
   input Iin_d_d4_d0 ;
   input Iin_d_d4_d1 ;
   input Iin_d_d5_d0 ;
   input Iin_d_d5_d1 ;
   input Iin_d_d6_d0 ;
   input Iin_d_d6_d1 ;
   input Iin_d_d7_d0 ;
   input Iin_d_d7_d1 ;
   input Iin_d_d8_d0 ;
   input Iin_d_d8_d1 ;
   input Iin_d_d9_d0 ;
   input Iin_d_d9_d1 ;
   input Iin_d_d10_d0 ;
   input Iin_d_d10_d1 ;
   input Iin_d_d11_d0 ;
   input Iin_d_d11_d1 ;
   input Iin_d_d12_d0 ;
   input Iin_d_d12_d1 ;
   input Iin_d_d13_d0 ;
   input Iin_d_d13_d1 ;
   input Iin_d_d14_d0 ;
   input Iin_d_d14_d1 ;
   input Iin_d_d15_d0 ;
   input Iin_d_d15_d1 ;
   input Iin_d_d16_d0 ;
   input Iin_d_d16_d1 ;
   input Iin_d_d17_d0 ;
   input Iin_d_d17_d1 ;
   input Iin_d_d18_d0 ;
   input Iin_d_d18_d1 ;
   input Iin_d_d19_d0 ;
   input Iin_d_d19_d1 ;
   input Iin_d_d20_d0 ;
   input Iin_d_d20_d1 ;
   input Iin_d_d21_d0 ;
   input Iin_d_d21_d1 ;
   input Iin_d_d22_d0 ;
   input Iin_d_d22_d1 ;
   input Iin_d_d23_d1 ;
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   input reset_B;

// -- signals ---
   wire Iin_d_d8_d0 ;
   wire Iin_d_d1_d0 ;
   wire Iin_d_d1_d1 ;
   wire _flushBX ;
   output Iout_d20_d0 ;
   output Iout_d8_d0 ;
   output Iout_d7_d0 ;
   wire I_resetX0 ;
   wire Ireset_sb_in ;
   output Iout_d16_d0 ;
   output Iout_d15_d0 ;
   wire Iin_d_d9_d0 ;
   output Iout_d14_d1 ;
   output Iout_d4_d0 ;
   wire Iin_d_d22_d1 ;
   wire Iin_d_d21_d1 ;
   wire Iin_d_d14_d1 ;
   wire Iin_d_d23_d1 ;
   wire Iin_d_d21_d0 ;
   wire Iin_d_d20_d0 ;
   wire Iin_d_d16_d1 ;
   output Iout_d20_d1 ;
   output Iout_d19_d1 ;
   output Iout_d12_d0 ;
   output Iout_d10_d0 ;
   output Iout_d2_d1 ;
   wire Iin_d_d16_d0 ;
   wire Iin_d_d13_d0 ;
   wire Iin_d_d12_d0 ;
   wire Iin_d_d18_d1 ;
   wire Iin_d_d3_d0 ;
   wire Iin_d_d2_d1 ;
   output Iout_d18_d0 ;
   wire Iin_d_d7_d0 ;
   wire Iin_d_d5_d0 ;
   wire Iin_d_d19_d1 ;
   wire Iin_d_d17_d1 ;
   output Iout_d11_d0 ;
   output Iout_d17_d1 ;
   output Iout_d17_d0 ;
   output Iout_d16_d1 ;
   output Iout_d9_d1 ;
   output Iout_d4_d1 ;
   output Iout_d21_d0 ;
   output Iout_d5_d0 ;
   wire Iin_d_d19_d0 ;
   wire Iin_d_d18_d0 ;
   output Iout_d10_d1 ;
   output Iout_d3_d0 ;
   wire Iin_d_d8_d1 ;
   wire Iin_d_d4_d1 ;
   output Iout_d9_d0 ;
   wire _out_vB ;
   output Iout_d3_d1 ;
   wire _en ;
   wire Iin_d_d4_d0 ;
   wire Iin_d_d10_d1 ;
   wire Iin_d_d7_d1 ;
   wire Iin_d_d0_d1 ;
   output Iout_d12_d1 ;
   wire Iin_d_d5_d1 ;
   output Iin_a ;
   output Iout_d19_d0 ;
   output Iout_d0_d1 ;
   wire Iin_d_d20_d1 ;
   wire Iin_d_d12_d1 ;
   output Iout_d22_d0 ;
   output Iout_d1_d0 ;
   wire Ien_inv_y ;
   output Iout_d14_d0 ;
   wire Iin_d_d6_d1 ;
   wire Iin_d_d14_d0 ;
   wire Iin_d_d15_d1 ;
   output Iout_d6_d1 ;
   output Iout_d18_d1 ;
   output Iout_d1_d1 ;
   wire Iin_d_d15_d0 ;
   wire _flush ;
   output Iout_d15_d1 ;
   wire Iin_d_d6_d0 ;
   output Iout_d0_d0 ;
   wire Iin_d_d13_d1 ;
   wire Iflush_inv_y ;
   wire _enBX ;
   output Iout_d21_d1 ;
   wire _out_v ;
   wire Iin_d_d10_d0 ;
   wire Iin_d_d2_d0 ;
   wire Iin_d_d0_d0 ;
   output Iout_d11_d1 ;
   wire Iin_d_d17_d0 ;
   wire Iin_d_d11_d1 ;
   output Iout_d8_d1 ;
   wire Iin_d_d9_d1 ;
   output Iout_d2_d0 ;
   wire Iin_d_d22_d0 ;
   wire reset_B;
   wire Iin_d_d11_d0 ;
   output Iout_d13_d1 ;
   output Iout_d13_d0 ;
   wire Iin_d_d3_d1 ;
   wire IA_flush_sr_B ;
   output Iout_d22_d1 ;
   output Iout_d7_d1 ;
   output Iout_d6_d0 ;
   output Iout_d5_d1 ;

// --- instances
INV_X2 Iout_val_inv  (.y(_out_vB), .a(_out_v), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0vtree_323_4 Ivc  (.Iin_d0_d0 (Iout_d0_d0 ), .Iin_d0_d1 (Iout_d0_d1 ), .Iin_d1_d0 (Iout_d1_d0 ), .Iin_d1_d1 (Iout_d1_d1 ), .Iin_d2_d0 (Iout_d2_d0 ), .Iin_d2_d1 (Iout_d2_d1 ), .Iin_d3_d0 (Iout_d3_d0 ), .Iin_d3_d1 (Iout_d3_d1 ), .Iin_d4_d0 (Iout_d4_d0 ), .Iin_d4_d1 (Iout_d4_d1 ), .Iin_d5_d0 (Iout_d5_d0 ), .Iin_d5_d1 (Iout_d5_d1 ), .Iin_d6_d0 (Iout_d6_d0 ), .Iin_d6_d1 (Iout_d6_d1 ), .Iin_d7_d0 (Iout_d7_d0 ), .Iin_d7_d1 (Iout_d7_d1 ), .Iin_d8_d0 (Iout_d8_d0 ), .Iin_d8_d1 (Iout_d8_d1 ), .Iin_d9_d0 (Iout_d9_d0 ), .Iin_d9_d1 (Iout_d9_d1 ), .Iin_d10_d0 (Iout_d10_d0 ), .Iin_d10_d1 (Iout_d10_d1 ), .Iin_d11_d0 (Iout_d11_d0 ), .Iin_d11_d1 (Iout_d11_d1 ), .Iin_d12_d0 (Iout_d12_d0 ), .Iin_d12_d1 (Iout_d12_d1 ), .Iin_d13_d0 (Iout_d13_d0 ), .Iin_d13_d1 (Iout_d13_d1 ), .Iin_d14_d0 (Iout_d14_d0 ), .Iin_d14_d1 (Iout_d14_d1 ), .Iin_d15_d0 (Iout_d15_d0 ), .Iin_d15_d1 (Iout_d15_d1 ), .Iin_d16_d0 (Iout_d16_d0 ), .Iin_d16_d1 (Iout_d16_d1 ), .Iin_d17_d0 (Iout_d17_d0 ), .Iin_d17_d1 (Iout_d17_d1 ), .Iin_d18_d0 (Iout_d18_d0 ), .Iin_d18_d1 (Iout_d18_d1 ), .Iin_d19_d0 (Iout_d19_d0 ), .Iin_d19_d1 (Iout_d19_d1 ), .Iin_d20_d0 (Iout_d20_d0 ), .Iin_d20_d1 (Iout_d20_d1 ), .Iin_d21_d0 (Iout_d21_d0 ), .Iin_d21_d1 (Iout_d21_d1 ), .Iin_d22_d0 (Iout_d22_d0 ), .Iin_d22_d1 (Iout_d22_d1 ), .out(_out_v), .vdd(vdd), .vss(vss));
A_2C1N_RB_X1 IA_flush  (.y(_flush), .c1(_en), .c2(_out_v), .n1(Iin_d_d23_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0sigbuf_346_4 Isb_enB  (.in(Ien_inv_y ), .Iout0 (_enBX), .vdd(vdd), .vss(vss));
INV_X1 Ien_inv  (.y(Ien_inv_y ), .a(_en), .vdd(vdd), .vss(vss));
INV_X1 Ireset_inv  (.y(Ireset_sb_in ), .a(reset_B), .vdd(vdd), .vss(vss));
A_1C1P_X1 IA_ack  (.y(Iin_a ), .c1(_en), .p1(_out_vB), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0sigbuf_346_4 Isb_flushB  (.in(Iflush_inv_y ), .Iout0 (_flushBX), .vdd(vdd), .vss(vss));
INV_X1 Iflush_inv  (.y(Iflush_inv_y ), .a(_flush), .vdd(vdd), .vss(vss));
A_2C_X1 IA_en  (.y(_en), .c1(Iin_d_d23_d1 ), .c2(_out_vB), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0sigbuf_323_4 Ireset_sb  (.in(Ireset_sb_in ), .Iout0 (I_resetX0 ), .vdd(vdd), .vss(vss));
tmpl_0_0dataflow__neuro_0_0sigbuf_323_4 IresetB_sb  (.in(reset_B), .Iout0 (IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func0  (.y(Iout_d0_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d0_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func1  (.y(Iout_d1_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d1_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func2  (.y(Iout_d2_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d2_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func3  (.y(Iout_d3_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d3_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func4  (.y(Iout_d4_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d4_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func5  (.y(Iout_d5_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d5_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func6  (.y(Iout_d6_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d6_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func7  (.y(Iout_d7_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d7_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func8  (.y(Iout_d8_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d8_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func9  (.y(Iout_d9_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d9_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func10  (.y(Iout_d10_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d10_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func11  (.y(Iout_d11_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d11_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func12  (.y(Iout_d12_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d12_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func13  (.y(Iout_d13_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d13_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func14  (.y(Iout_d14_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d14_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func15  (.y(Iout_d15_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d15_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func16  (.y(Iout_d16_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d16_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func17  (.y(Iout_d17_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d17_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func18  (.y(Iout_d18_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d18_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func19  (.y(Iout_d19_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d19_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func20  (.y(Iout_d20_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d20_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func21  (.y(Iout_d21_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d21_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_RB_X4 It_buf_func22  (.y(Iout_d22_d1 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d22_d1 ), .pr_B(IA_flush_sr_B ), .sr_B(IA_flush_sr_B ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func0  (.y(Iout_d0_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d0_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func1  (.y(Iout_d1_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d1_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func2  (.y(Iout_d2_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d2_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func3  (.y(Iout_d3_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d3_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func4  (.y(Iout_d4_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d4_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func5  (.y(Iout_d5_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d5_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func6  (.y(Iout_d6_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d6_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func7  (.y(Iout_d7_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d7_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func8  (.y(Iout_d8_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d8_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func9  (.y(Iout_d9_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d9_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func10  (.y(Iout_d10_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d10_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func11  (.y(Iout_d11_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d11_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func12  (.y(Iout_d12_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d12_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func13  (.y(Iout_d13_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d13_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func14  (.y(Iout_d14_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d14_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func15  (.y(Iout_d15_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d15_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func16  (.y(Iout_d16_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d16_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func17  (.y(Iout_d17_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d17_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func18  (.y(Iout_d18_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d18_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func19  (.y(Iout_d19_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d19_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func20  (.y(Iout_d20_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d20_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func21  (.y(Iout_d21_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d21_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
A_2C1N_SB_X4 If_buf_func22  (.y(Iout_d22_d0 ), .c1(_flushBX), .c2(_enBX), .n1(Iin_d_d22_d0 ), .pr(I_resetX0 ), .sr(I_resetX0 ), .vdd(vdd), .vss(vss));
endmodule