/*************************************************************************
 *
 *  This file is part of ACT dataflow neuro library.
 *  It's the testing facility for cell_lib_std.act
 *
 *  Copyright (c) 2022 University of Groningen - Ole Richter  
 *  Copyright (c) 2022 University of Groningen - Hugh Greatorex
 *  Copyright (c) 2022 University of Groningen - Michele Mastella
 *  Copyright (c) 2022 University of Groningen - Madison Cotteret
 *
 *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
 *
 *  You may redistribute and modify this documentation and make products
 *  using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
 *  This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
 *  WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
 *  AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
 *  for applicable conditions.
 *
 *  Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
 *
 *  As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
 *  these sources, You must maintain the Source Location visible in its
 *  documentation.
 *
 **************************************************************************
 */

import "../../dataflow_neuro/primitives.act";
import globals;

open tmpl::dataflow_neuro;

defproc append_5_3_2(avMx1of2<5> in; avMx1of2<8> out)
{
  bool _reset_B; 
  prs {
    Reset => _reset_B-
  }

  fifo<5,4> fifo_pre(.in = in, .reset_B = _reset_B);
  append<5,3,3> app(.in = fifo_pre.out);
  fifo<5+3,4> fifo_post(.in = app.out, .out = out, .reset_B = _reset_B);

  app.supply.vdd = Vdd;
  app.supply.vss = GND;
  fifo_pre.supply.vdd = Vdd;
  fifo_pre.supply.vss = GND;
  fifo_post.supply.vdd = Vdd;
  fifo_post.supply.vss = GND;
}

append_5_3_2 b;