From 477261da2c27968c2233ce8850018033b2708d24 Mon Sep 17 00:00:00 2001 From: Michele Date: Fri, 11 Nov 2022 17:47:26 +0100 Subject: [PATCH] testbenchlib updated, found a possile bug, didnt't fix it --- act/actsim_test_bench_lib.conf | 20 +++++++++---------- act/test_bench_lib.act | 7 ++++--- act/test_bench_lib.c | 4 ++-- test/examples/helloworld.act | 36 ++++++++++++++++++++++++++++++++++ 4 files changed, 52 insertions(+), 15 deletions(-) create mode 100644 test/examples/helloworld.act diff --git a/act/actsim_test_bench_lib.conf b/act/actsim_test_bench_lib.conf index c34316e..0198ef4 100644 --- a/act/actsim_test_bench_lib.conf +++ b/act/actsim_test_bench_lib.conf @@ -4,16 +4,16 @@ begin sim string_tablex libs "test_bench_lib" begin test_bench_lib string path "${ACT_HOME}/lib/actsim_test_bench_lib.so" - string sim::testbench::finit "init_tb" - string sim::testbench::fsource_next "source_next" - string sim::testbench::fsource_get "source_get" - string sim::testbench::fcheck_out_of_order "check_out_of_order" - string sim::testbench::fcheck_in_order "check_in_order" - string sim::testbench::fcheck_next "check_next" - string sim::testbench::fdump_to_file "dump_to_file" - string sim::testbench::fcontrol_next "control_next" - string sim::testbench::fcontrol_get "control_get" - string sim::testbench::fcontrol_wait "control_wait" + string sim::test_bench_lib::finit "init_tb" + string sim::test_bench_lib::fsource_next "source_next" + string sim::test_bench_lib::fsource_get "source_get" + string sim::test_bench_lib::fcheck_out_of_order "check_out_of_order" + string sim::test_bench_lib::fcheck_in_order "check_in_order" + string sim::test_bench_lib::fcheck_next "check_next" + string sim::test_bench_lib::fdump_to_file "dump_to_file" + string sim::test_bench_lib::fcontrol_next "control_next" + string sim::test_bench_lib::fcontrol_get "control_get" + string sim::test_bench_lib::fcontrol_wait "control_wait" end end end diff --git a/act/test_bench_lib.act b/act/test_bench_lib.act index 8e28174..edb6dd9 100644 --- a/act/test_bench_lib.act +++ b/act/test_bench_lib.act @@ -96,9 +96,10 @@ defproc channel_dump(chan?(int) in; chan?(int) sim_step) int current_step, t,in_tmp; chp { - *[ [ #sim_step -> sim_step?current_step - [] #in -> in?in_tmp; t:=fdump_to_file(ID,current_step,in_tmp) //here should be non-deterministic but it doesn't work - ] + *[ [| #sim_step -> sim_step?current_step + [] #in -> in?in_tmp; log("Dumping a spike"); t:=fdump_to_file(ID,current_step,in_tmp);log("Dumped a spike") //here should be non-deterministic but it doesn't work + |]; + log("Waiting for next. sim_step: " ,#sim_step,", in: ",#in) ] } } diff --git a/act/test_bench_lib.c b/act/test_bench_lib.c index f6c8fb7..97d77aa 100644 --- a/act/test_bench_lib.c +++ b/act/test_bench_lib.c @@ -230,12 +230,12 @@ struct expr_res check_in_order (int num, struct expr_res *args) for (int i = 0; i < check_data_number[args[0].v]; i++){ if (check_data_used[args[0].v][i] == 0) { if (check_data_buffer[args[0].v][i] == args[1].v){ - fprintf(logfile,"[SUCCESS] got %d = %d on check %d - %d\n",check_data_buffer[args[0].v],args[1].v,args[0].v,i); fflush(logfile); + fprintf(logfile,"[SUCCESS] got %d = %d on check %d - %d\n",check_data_buffer[args[0].v][i],args[1].v,args[0].v,i); fflush(logfile); t.v = 1; } else { check_errors++; - fprintf(logfile,"[FAILURE] expected %d got %d on check %d - %d; Error count %d\n",check_data_buffer[args[0].v],args[1].v,args[0].v,i,check_errors); fflush(logfile); + fprintf(logfile,"[FAILURE] expected %d got %d on check %d - %d; Error count %d\n",check_data_buffer[args[0].v][i],args[1].v,args[0].v,i,check_errors); fflush(logfile); t.v = 0; } check_data_used[args[0].v][i] = 1; diff --git a/test/examples/helloworld.act b/test/examples/helloworld.act new file mode 100644 index 0000000..4c07792 --- /dev/null +++ b/test/examples/helloworld.act @@ -0,0 +1,36 @@ + +/************************************************************************* + * + * + * Copyright 2022 Ole Richter - University of Groningen + * Copyright 2022 Michele Mastella - University of Groningen + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + * + ************************************************************************** + */ + +import "../../../act/test_bench_lib.act"; +import globals; +open sim::testbench; + +defproc test(){ + chan(int<5>) channel; + control<1,1,0,true> control; + channel_source<5,0> source(.out=channel,.sim_step=control.sim_step_source[0],.done=control.done_source[0]); + channel_checker_in_order<5,0> sink(.in=channel,.sim_step=control.sim_step_checker[0],.done=control.done_checker[0]); + +}