actlib_dataflow_neuro/test/unit_tests/register_write/test.prsim

watchall
system "echo '[0] start test'"
set Reset 1
set-qdi-channel-neutral "t.in" 2
cycle
status X
mode run
system "echo '[1] reset completed'"
started testing the register_w (doesn't compile) 2022-03-04 21:13:10 +01:00			`watchall`
			`system "echo '[0] start test'"`
			`set Reset 1`
			`set-qdi-channel-neutral "t.in" 2`
			`cycle`
			`status X`
			`mode run`
			`system "echo '[1] reset completed'"`