actlib_dataflow_neuro/test/unit_tests/bd-fifo-register-fifo-bd/test.prsim

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2022-04-05 10:02:37 +02:00
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set-bd-channel-neutral "b.in" 9
# set b.in.r 0
set b.out.a 0
set b.dly_cfg[0] 1
set b.dly_cfg[1] 1
set b.dly_cfg[2] 1
set b.dly_cfg[3] 1
cycle
mode run
system "echo '[] Set reset 0'"
status X
set Reset 0
cycle
assert b.in.a 0
assert-bd-channel-neutral "b.out" 8
system "echo '[] Sending packet write 0s to reg0'"
set-bd-channel-valid "b.in" 9 256
cycle
assert b.in.a 1
# assert b.in.v 1
assert-var-int "b.data[0]" 5 0
system "echo '[] Removing input'"
set-bd-channel-neutral "b.in" 9
cycle
assert b.in.a 0
# assert b.in.v 0
assert-var-int "b.data[0]" 5 0
# system "echo '[] Sending packet write 0s to reg0'"
# set-qdi-channel-valid "b.in" 9 256
# cycle
# assert b.in.a 1
# assert b.in.v 1
# assert-var-int "b.data[0]" 5 0
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# assert-var-int "b.data[0]" 5 0
system "echo '[] Sending packet write 01100=12 to reg0'"
set-bd-channel-valid "b.in" 9 352
cycle
assert b.in.a 1
# assert b.in.v 1
assert-var-int "b.data[0]" 5 12
system "echo '[] Removing input'"
set-bd-channel-neutral "b.in" 9
cycle
assert b.in.a 0
# assert b.in.v 0
assert-var-int "b.data[0]" 5 12
# system "echo '[] Sending packet write 0s to reg1'"
# set-qdi-channel-valid "b.in" 9 257
# cycle
# assert b.in.a 1
# assert b.in.v 1
# assert-var-int "b.data[1]" 5 0
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# system "echo '[] Sending packet write 0s to reg2'"
# set-qdi-channel-valid "b.in" 9 258
# cycle
# assert b.in.a 1
# assert b.in.v 1
# assert-var-int "b.data[2]" 5 0
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# assert-var-int "b.data[2]" 5 0
# system "echo '[] Sending packet write 0s to reg3'"
# set-qdi-channel-valid "b.in" 9 259
# cycle
# assert b.in.a 1
# assert b.in.v 1
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# system "echo '[] Sending packet write 0s to reg4'"
# set-qdi-channel-valid "b.in" 9 260
# cycle
# assert b.in.a 1
# assert b.in.v 1
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# system "echo '[] Sending packet write 0s to reg5'"
# set-qdi-channel-valid "b.in" 9 261
# cycle
# assert b.in.a 1
# assert b.in.v 1
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# system "echo '[] Sending packet write 0s to reg6'"
# set-qdi-channel-valid "b.in" 9 262
# cycle
# assert b.in.a 1
# assert b.in.v 1
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# system "echo '[] Sending packet write 0s to reg7'"
# set-qdi-channel-valid "b.in" 9 263
# cycle
# assert b.in.a 1
# assert b.in.v 1
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert b.in.a 0
# assert b.in.v 0
# assert-var-int "b.data[2]" 5 0
# assert-var-int "b.data[3]" 5 0
# assert-var-int "b.data[4]" 5 0
# assert-var-int "b.data[5]" 5 0
# assert-var-int "b.data[6]" 5 0
# assert-var-int "b.data[7]" 5 0
system "echo '[] Reading register 0'"
set-bd-channel-valid "b.in" 9 0
cycle
assert-bd-channel-valid "b.out" 8 96
assert b.out.r 1
# assert b.in.v 1
assert b.in.a 1
set b.out.a 1
cycle
assert-bd-channel-neutral "b.out" 8
assert b.in.a 1
system "echo '[] Removing input'"
set-bd-channel-neutral "b.in" 9
cycle
assert b.in.a 0
set b.out.a 0
cycle
# system "echo '[] Reading register 1'"
# set-qdi-channel-valid "b.in" 9 1
# cycle
# assert-qdi-channel-valid "b.out" 8 1
# assert b.in.v 1
# assert b.in.a 1
# set b.out.a 1
# set b.out.v 1
# cycle
# assert b.in.a 1
# system "echo '[] Removing input'"
# set-qdi-channel-neutral "b.in" 9
# cycle
# assert-qdi-channel-neutral "b.out" 8
# set b.out.a 0
# set b.out.v 0
# cycle
# assert b.in.a 0
# assert b.in.v 0