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fixed timing bug in encoder

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alexmadison 2022-04-10 19:23:28 +02:00
parent 5647d4affe
commit 007859023f
1 changed files with 7 additions and 5 deletions
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dataflow_neuro/coders.act
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@ -703,8 +703,10 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
// X_req ORtree // X_req ORtree
bool _x_req_array[Nx], _x_v_B; bool _x_req_array[Nx], _x_v_B;
(i:Nx:_x_req_array[i] = inx[i].r;) (i:Nx:_x_req_array[i] = inx[i].r;)
ortree<Nx> x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply); //todo BUFF ortree<Nx> x_req_ortree(.in = _x_req_array, .supply = supply); //todo BUFF
INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B); INV_X1 not_x_req_ortree(.a = x_req_ortree.out, .y = _x_v_B);
INV_X1 not_x_req_ortree2(.a = _x_v_B,.y = _x_v);
//X_REQ validation //X_REQ validation
// bool _x_req_array[Nx],_x_v_B, _en; // bool _x_req_array[Nx],_x_v_B, _en;
@ -827,7 +829,7 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
export export
defproc nrn_line_end_pull_down (bool? in; bool? reset_B; power supply; bool! out) defproc nrn_line_end_pull_down (bool? in; bool? reset_B; power supply; bool! out)
{ {
bool _out, __out, nand_out; bool _out, __out, nand_out;
@ -882,14 +884,14 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
// Note that this should be generalised. // Note that this should be generalised.
// And probably won't even be done by ACT/innovus anwyay // And probably won't even be done by ACT/innovus anwyay
// TODO: do it properly with sigbufs? // TODO: do it properly with sigbufs?
BUF_X4 out_ack_buf_x[Nx]; BUF_X12 out_ack_buf_x[Nx];
(i:Nx: (i:Nx:
out_ack_buf_x[i].vss = supply.vss; out_ack_buf_x[i].vss = supply.vss;
out_ack_buf_x[i].vdd = supply.vdd; out_ack_buf_x[i].vdd = supply.vdd;
out_ack_buf_x[i].a = outx[i].a; out_ack_buf_x[i].a = outx[i].a;
out_ack_buf_x[i].y = _outx[i].a; out_ack_buf_x[i].y = _outx[i].a;
) )
BUF_X4 out_ack_buf_y[Ny]; BUF_X12 out_ack_buf_y[Ny];
(i:Ny: (i:Ny:
out_ack_buf_y[i].vss = supply.vss; out_ack_buf_y[i].vss = supply.vss;
out_ack_buf_y[i].vdd = supply.vdd; out_ack_buf_y[i].vdd = supply.vdd;