mapper test init
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alexmadison committed
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c.c1_reg_data[21].d[4].t c.c.core2.decoder.d_dr_y.in_tX[5].y c.c.core2.register.registers[1].buf.en_buf.out[0] c.c1_syn_grid._and_grid.ands[4245].b c.c.core1.register.and_reads_t[583].y c.c.core1.syn_mon_dec_y.decoder.in_fX[17].y c.c.core1.append_enc.sb.out[0] c.c2_syn_grid._and_grid.ands[13].a c.c2_dummy_neuron_core.blocks[18]._ortree.tmp[72] c.c.core2.register.read_selectorsX.sb[21].buf12._y c.c1_reg_data[60].d[1].t c.c2_dummy_neuron_core.blocks[48]._ortree.tmp[75] c.c.core1.register.registers[26].gandalf_f[16].y c.c.core2.fifo_dmx2dec.fifo_element[0]._out_a_BX[0] c.c2_dec_req_y[121] c.c.core1.register.registers[28].buf._resetX[0] c.c2_reg_data[62].d[15].t c.c.core2.register.input_valid.OR2_tf[18].b c.c2_synapses[4146].r c.c2_dec_req_y[10] c.c.core2.decoder.d_dr_y.atree[335].tmp[13] c.c2_synapses[2263].r c.c.core2.register.registers[31].buf.en_buf.out[0] c.c.core1.register.out_ortrees_t[19].tmp[75] c.c2_synapses[1694].r c.c1_reg_data[49].d[4].f c.c1_dec_req_y[8] c.c.core1.register.out_ortrees_f[10].tmp[115] c.c2_dec_req_y[197] c.c2_syn_mon_y[310] c.c1_reg_data[36].d[13].f c.c.core1.register.and_reads_t[405].y c.c2_reg_data[54].d[16].f c.c.core1.register.registers[44].out_valid.OR2_tf[15]._y c.c.core1.register.registers[36].buf.en_buf.out[0] c.c1_reg_data[1].d[9].f c.c1_syn_mon_y[236] c.c.core1.register.registers[35].out_valid.OR2_tf[18]._y c.c1_reg_data[20].d[3].t c.c.core1.fifo_reg2mrg.fifo_element[2]._reset_BXX[0] c.c1_syn_mon_y[254] c.c.core1.register.registers[58].buf.en_buf.out[0] c.c.core1.register.registers[13].buf.vc.ct.C2Els[15]._y c.c.core1.decoder.d_dr_y.atree[94].tmp[12] c.c.core2.decoder.dly.dly[11].bufchain[8].y c.c.core2.decoder.d_dr_y.in_tX[27].y c.c1_synapses[3692].r c.c2_synapses[156].r c.c2_dec_req_y[93] c.c.core2.register.registers[31].buf._resetX[0] c.c.core2.fifo_dmx2reg.fifo_element[1].vc.ct.in[5] c.c1_synapses[360].r c.c.fifo_fork2drop.fifo_element[1].f_buf_func[5].y c.c2_reg_data[37].d[7].f c.c1_nrn_pd_y[0].r c.c.core1.register.registers[41].gandalf_f[3].y c.c.core2.register.and_reads_f[1012].b c.c1_synapses[2466].r c.c.fifo_drop2mrg.fifo_element[1].f_buf_func[21].y c.c.core2.register.registers[7].buf.vc.ct.C2Els[13]._y c.c._qdi2bd.buf.t_buf_func[14].n1 c.c.core1.register.out_ortrees_f[2].tmp[89] c.c.core1.decoder.d_dr_y.atree[223].tmp[14] c.c.core1.fifo_in.fifo_element[2].en_buf.out[0] c.c1_dummy_neuron_core.blocks[33]._ortree.or2s[13]._y c.c1_dummy_neuron_core.blocks[57]._ortree.tmp[87] c.c1_reg_data[57].d[17].f c.c.core1.syn_mon_dec_y.decoder.atree[305].tmp[11] c.c.core1.register.registers[63].passX.out[0] c.c.core1.register.input_valid.OR2_tf[28].a c.c2_synapses[3832].r c.c2_syn_grid._and_grid.ybuf[212].buf12._y c.c2_reg_data[39].d[8].f c.c.core2.encoder.dly_x[13].dly[0].bufchain[8].y c.c1_syn_grid._and_grid.ands[2685].b c.reset_reg_B c.c.core1.syn_mon_dec_y.decoder.in_tX[9].y c.c2_reg_data[18].d[9].t c.c.fifo_fork2dmx.fifo_element[2]._out_a_BX[0] c.c.core1.register.registers[26].buf._flushBX[0] c.c.core2.syn_mon_dec_y.decoder.in_tX[21].y c.c.core1.register.registers[60].passX.out[0] c.c.core1.register.registers[59]._out_v c.c1_dummy_neuron_core.blocks[29]._ortree.tmp[62] c.c.core2.fifo_dmx2reg.fifo_element[2]._reset_BXX[0] c.c2_synapses[3781].r c.c.core2.register.registers[58].buf._resetX[0] c.c1_syn_mon_y[83] c.c.core1.register.registers[8].out_valid.ct.tmp[34] c.c1_dec_req_y[319] c.c2_reg_data[21].d[18].f c.c.core2.register.registers[53].buf._flushBX[0] c.c._reset_BX c.c.core2.register.registers[24].gandalf_t[14].y c.c.fifo_dmx2core2.fifo_element[2].en_buf.out[0] c.c.core1.register.registers[7].buf._reset_BX[0] c.c.core2.register.registers[44].passX.out[0] c.c.core1.decoder.d_dr_y.atree[313].tmp[12] c.c2_synapses[1955].r c.c1_syn_grid._and_grid.ands[4740].b c.c1_dummy_neuron_core.blocks[0]._ortree.tmp[109] c.c.core1.fifo_dmx2reg.fifo_element[1].t_buf_func[14].y c.c.core1.register.registers[21].out_valid.ct.in[1] c.c.core1.register.input_valid.OR2_tf[27].a c.c.core1.register.registers[52].gandalf_f[0].y c.c.core2.syn_AMZO_keeps[4].y c.c1_dummy_neuron_core.blocks[6]._ortree.tmp[93] c.c.core1.register.and_reads_f[207].b c.c1_syn_mon_y[246] c.c.core2.register.registers[22].buf.t_buf_func[14]._y c.c1_syn_mon_y[278] c.c.core2.register.out_ortrees_t[6].tmp[103] c.c.core1.encoder.dly_x[3].dly[0].bufchain[3].y c.c.fifo_dmx2core1.fifo_element[0]._out_a_BX[0] c.c2_reg_data[50].d[7].f c.c2_reg_data[6].d[15].t c.c1_synapses[782].r c.c2_reg_data[58].d[10].t c.c.core1.decoder.d_dr_y.in_fX[23].y c.c2_reg_data[50].d[15].f c.c.core2.syn_mon_dec_y.decoder.in_fX[11].y c.c1_synapses[1804].r c.c1_synapses[2838].r c.c1_reg_data[49].d[2].f c.c.core1.syn_mon_y_buf.in[170] c.c.fifo_in2fork._reset_BX c.c1_syn_grid._and_grid.ands[2805].b c.c1_synapses[1385].r c.c1_reg_data[15].d[7].f c.c.core2.register.registers[51].buf.vc.ct.in[13] c.c.core2.register.registers[3].gandalf_t[16].y c.c1_synapses[2979].r c.c.fifo_dmx2core2.fifo_element[1]._reset_BXX[0] c.c.core2.register.decoder.atree[0].in[2] c.c.core2Line truncated
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392894 c.c1_synapses[0].r : 0 [by c.c1_syn_grid._and_grid.ands[0]._y:=1]
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583886 c.c1_neurons[0].r : 0 [by c.c1_dummy_neuron_core.blocks[0]._ortree.or3s[2]._y:=1]
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c.c.core2.syn_AMZO_keeps[4].y c.c2_syn_mon_AMZI[29] c.c2_nrn_mon_AMZI[30] c.c1_syn_mon_AMZI[10] c.c2_syn_mon_AMZO[4] c.c1_syn_mon_AMZI[68] c.c1_nrn_mon_AMZI[3] c.c2_syn_mon_AMZO[3] c.c2_syn_mon_AMZI[7] c.c1_syn_mon_AMZO[1] c.c2_nrn_mon_AMZO[1] c.c1_nrn_mon_AMZO[2] c.c1_nrn_mon_AMZO[1] c.c2_nrn_mon_AMZO[2] c.c2_syn_mon_AMZI[69] c.c1_syn_mon_AMZI[63] c.c.core1.nrn_AMZO_keeps[0]._y c.c2_nrn_mon_AMZO[0] c.c1_syn_mon_AMZI[73] c.c2_nrn_mon_AMZI[31] c.c1_syn_mon_AMZI[58] c.c1_syn_mon_AMZI[45] c.c1_nrn_mon_AMZI[43] c.c1_syn_mon_AMZI[7] c.c.sram_dmx.out2_a_B_buf.out[0] c.c2_syn_mon_AMZI[12] c.c2_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[9] c.c.core1.nrn_AMZO_keeps[1].y c.c.core2.syn_AMZO_keeps[2].y c.c1_syn_mon_AMZI[59] c.c1_syn_mon_AMZI[37] c.c.core1.syn_AMZO_keeps[3].y c.c2_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[1] c.c1_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[72] c.c1_syn_mon_AMZI[39] c.c.core2.syn_AMZO_keeps[3].y c.c.core1.syn_AMZO_keeps[2].y c.c2_syn_mon_AMZI[35] c.c1_syn_mon_AMZI[6] c.c2_nrn_mon_AMZI[25] c.c1_syn_mon_AMZI[50] c.c.core2.syn_AMZO_keeps[1].y c.c2_syn_mon_AMZO[0] c.c2_syn_mon_AMZI[63] c.c1_syn_mon_AMZI[55] c.c2_syn_mon_AMZI[33] c.c1_syn_mon_AMZO[4] c.c2_nrn_mon_AMZI[41] c.c2_syn_mon_AMZI[24] c.c1_syn_mon_AMZO[0] c.c1_nrn_mon_AMZI[39] c.c2_syn_mon_AMZI[66] c.c.core2.nrn_AMZO_keeps[2].y c.c.core1.nrn_AMZO_keeps[2].y c.c2_nrn_mon_AMZI[3] c.c1_nrn_mon_AMZO[0] c.c1_syn_mon_AMZI[72] c.c2_nrn_mon_AMZI[20] c.c2_nrn_mon_AMZI[12] c.c2_syn_mon_AMZI[71] c.c1_syn_mon_AMZO[3] c.c1_syn_mon_AMZI[17] c.c1_nrn_mon_AMZI[1] c.c1_syn_mon_AMZI[64] c.c2_syn_mon_AMZI[32] c.c.core1.syn_AMZO_keeps[0]._y c.c.core1.syn_AMZO_keeps[4].y c.c2_syn_mon_AMZI[4] c.c2_syn_mon_AMZI[65] c.c2_nrn_mon_AMZI[24] c.c2_nrn_mon_AMZI[8] c.c2_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[41] c.c.core1.syn_AMZO_keeps[1].y c.c1_syn_mon_AMZI[51] c.c1_syn_mon_AMZI[31] c.c.core2.syn_mon_AMZO_sb.sb[1].buf12._y c.c2_nrn_mon_AMZI[16] c.c.core2.syn_AMZO_keeps[0].y c.c1_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[52] c.c.sram_dmx.out2.a c.c1_syn_mon_AMZI[47] c.c.core2.nrn_AMZO_keeps[0].y c.c2_nrn_mon_AMZI[27] c.c1_nrn_mon_AMZI[44] c.c1_nrn_mon_AMZI[34] c.c2_nrn_mon_AMZI[26] c.c2_nrn_mon_AMZI[32] c.c1_nrn_mon_AMZI[16] c.c1_nrn_mon_AMZI[8] c.c2_syn_mon_AMZO[1] c.c.core2.syn_AMZO_keeps[4]._y c.c1_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[0] c.c2_nrn_mon_AMZI[35] c.c1_syn_mon_AMZI[26] c.c2_syn_mon_AMZI[34] c.c2_syn_mon_AMZI[8] c.c2_syn_mon_AMZI[44] c.c2_syn_mon_AMZI[9] c.c1_nrn_mon_AMZI[11] c.c2_nrn_mon_AMZI[13] c.c1_nrn_mon_AMZI[19] c.c2_syn_mon_AMZI[18] c.c1_nrn_mon_AMZI[7] c.c1_syn_mon_AMZI[35] c.c2_syn_mon_AMZI[10] c.c1_syn_mon_AMZI[5] c.c2_syn_mon_AMZI[39] c.c2_nrn_mon_AMZI[2] c.c2_nrn_mon_AMZI[14] c.c2_nrn_mon_AMZI[7] c.c1_syn_mon_AMZI[25] c.c1_syn_mon_AMZI[3] c.c2_syn_mon_AMZI[26] c.c.core1.nrn_AMZO_keeps[0].y c.c1_nrn_mon_AMZI[4] c.c1_syn_mon_AMZI[56] c.c1_syn_mon_AMZI[20] c.c2_nrn_mon_AMZI[37] c.c1_nrn_mon_AMZI[35] c.c2_syn_mon_AMZI[0] c.c2_syn_mon_AMZI[38] c.c1_nrn_mon_AMZI[22] c.c2_syn_mon_AMZI[49] c.c1_syn_mon_AMZI[65] c.c2_syn_mon_AMZI[73] c.c1_syn_mon_AMZI[34] c.c1_syn_mon_AMZI[9] c.c.core1.syn_AMZO_keeps[0].y c.c.core2.syn_mon_AMZO_sb.sb[2].buf12._y c.c2_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[37] c.c2_syn_mon_AMZI[13] c.c2_syn_mon_AMZI[41] c.c1_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[25] c.c1_syn_mon_AMZI[66] c.c1_syn_mon_AMZI[62] c.c1_nrn_mon_AMZI[23] c.c.core2.nrn_mon_AMZO_sb.sb[0].buf12._y c.c1_nrn_mon_AMZI[40] c.c1_syn_mon_AMZI[8] c.c1_syn_mon_AMZI[30] c.c1_syn_mon_AMZI[1] c.c2_syn_mon_AMZI[62] c.c2_syn_mon_AMZI[15] c.c1_nrn_mon_AMZI[27] c.c2_nrn_mon_AMZI[39] c.c1_syn_mon_AMZI[15] c.c1_syn_mon_AMZI[24] c.c.core2.nrn_AMZO_keeps[1].y c.c2_syn_mon_AMZI[53] c.c2_syn_mon_AMZI[14] c.c1_syn_mon_AMZI[11] c.c1_syn_mon_AMZI[41] c.c2_syn_mon_AMZI[5] c.c1_syn_mon_AMZI[33] c.c1_nrn_mon_AMZI[32] c.c2_nrn_mon_AMZI[44] c.out_sram_wr.a c.c1_nrn_mon_AMZI[31] c.c2_syn_mon_AMZI[47] c.c.core1.nrn_mon_AMZO_sb.sb[1].buf12._y c.c2_nrn_mon_AMZI[28] c.c2_nrn_mon_AMZI[29] c.c.core1.syn_mon_AMZO_sb.sb[4].buf12._y c.c2_nrn_mon_AMZI[17] c.c2_syn_mon_AMZI[59] c.c1_syn_mon_AMZI[52] c.c2_nrn_mon_AMZI[10] c.c1_nrn_mon_AMZI[37] c.c1_syn_mon_AMZI[71] c.c1_syn_mon_AMZI[13] c.c2_nrn_mon_AMZI[18] c.c1_nrn_mon_AMZI[10] c.c.core1.nrn_AMZO_keeps[2]._y c.c2_nrn_mon_AMZI[43] c.c1_syn_mon_AMZI[54] c.c2_syn_mon_AMZI[60] c.c2_nrn_mon_AMZI[19] c.c2_syn_mon_AMZI[31] c.c2_nrn_mon_AMZI[6] c.c.core2.syn_AMZO_keeps[3]._y c.c2_nrn_mon_AMZI[40] c.c1_nrn_mon_AMZI[18] c.c1_syn_mon_AMZI[38] c.c2_nrn_mon_AMZI[0] c.c2_nrn_mon_AMZI[15] c.c1_syn_mon_AMZI[4] c.c2_syn_mon_AMZI[46] c.c2_syn_mon_AMZI[23] c.c1_nrn_mon_AMZI[13] c.c2_syn_mon_AMZI[25] c.c2_nrn_mon_AMZI[22] c.c1_syn_mon_AMZI[60] c.c1_nrn_mon_AMZI[36] c.c2_nrn_mon_AMZI[9] c.c2_syn_mon_AMZI[27] c.c2_nrn_mon_AMZI[38] c.c2_syn_mon_AMZI[28] c.c2_syn_mon_AMZI[20] c.c2_nrn_mon_AMZI[34] c.c1_syn_mon_AMZI[14] c.c1_nrn_mon_AMZI[30] c.c1_nrn_mon_AMZI[26] c.c2_nrn_mon_AMZI[36] c.c1_nrn_mon_AMZI[6] c.c2_syn_mon_AMZI[74] c.c1_nrn_mon_AMZI[42] c.c1_syn_mon_AMZI[0] c.c2_syn_mon_AMZI[51] c.c1_syn_mon_AMZI[12] cLine truncated
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[] Set reset 0
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c.c.core2.syn_AMZO_keeps[4].y c.c2_syn_mon_AMZI[29] c.c2_nrn_mon_AMZI[30] c.c1_syn_mon_AMZI[10] c.c2_syn_mon_AMZO[4] c.c1_syn_mon_AMZI[68] c.c1_nrn_mon_AMZI[3] c.c2_syn_mon_AMZO[3] c.c2_syn_mon_AMZI[7] c.c1_syn_mon_AMZO[1] c.c2_nrn_mon_AMZO[1] c.c1_nrn_mon_AMZO[2] c.c1_nrn_mon_AMZO[1] c.c2_nrn_mon_AMZO[2] c.c2_syn_mon_AMZI[69] c.c1_syn_mon_AMZI[63] c.c.core1.nrn_AMZO_keeps[0]._y c.c2_nrn_mon_AMZO[0] c.c1_syn_mon_AMZI[73] c.c2_nrn_mon_AMZI[31] c.c1_syn_mon_AMZI[58] c.c1_syn_mon_AMZI[45] c.c1_nrn_mon_AMZI[43] c.c1_syn_mon_AMZI[7] c.c.sram_dmx.out2_a_B_buf.out[0] c.c2_syn_mon_AMZI[12] c.c2_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[9] c.c.core1.nrn_AMZO_keeps[1].y c.c.core2.syn_AMZO_keeps[2].y c.c1_syn_mon_AMZI[59] c.c1_syn_mon_AMZI[37] c.c.core1.syn_AMZO_keeps[3].y c.c2_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[1] c.c1_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[72] c.c1_syn_mon_AMZI[39] c.c.core2.syn_AMZO_keeps[3].y c.c.core1.syn_AMZO_keeps[2].y c.c2_syn_mon_AMZI[35] c.c1_syn_mon_AMZI[6] c.c2_nrn_mon_AMZI[25] c.c1_syn_mon_AMZI[50] c.c.core2.syn_AMZO_keeps[1].y c.c2_syn_mon_AMZO[0] c.c2_syn_mon_AMZI[63] c.c1_syn_mon_AMZI[55] c.c2_syn_mon_AMZI[33] c.c1_syn_mon_AMZO[4] c.c2_nrn_mon_AMZI[41] c.c2_syn_mon_AMZI[24] c.c1_syn_mon_AMZO[0] c.c1_nrn_mon_AMZI[39] c.c2_syn_mon_AMZI[66] c.c.core2.nrn_AMZO_keeps[2].y c.c.core1.nrn_AMZO_keeps[2].y c.c2_nrn_mon_AMZI[3] c.c1_nrn_mon_AMZO[0] c.c1_syn_mon_AMZI[72] c.c2_nrn_mon_AMZI[20] c.c2_nrn_mon_AMZI[12] c.c2_syn_mon_AMZI[71] c.c1_syn_mon_AMZO[3] c.c1_syn_mon_AMZI[17] c.c1_nrn_mon_AMZI[1] c.c1_syn_mon_AMZI[64] c.c2_syn_mon_AMZI[32] c.c.core1.syn_AMZO_keeps[0]._y c.c.core1.syn_AMZO_keeps[4].y c.c2_syn_mon_AMZI[4] c.c2_syn_mon_AMZI[65] c.c2_nrn_mon_AMZI[24] c.c2_nrn_mon_AMZI[8] c.c2_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[41] c.c.core1.syn_AMZO_keeps[1].y c.c1_syn_mon_AMZI[51] c.c1_syn_mon_AMZI[31] c.c.core2.syn_mon_AMZO_sb.sb[1].buf12._y c.c2_nrn_mon_AMZI[16] c.c.core2.syn_AMZO_keeps[0].y c.c1_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[52] c.c.sram_dmx.out2.a c.c1_syn_mon_AMZI[47] c.c.core2.nrn_AMZO_keeps[0].y c.c2_nrn_mon_AMZI[27] c.c1_nrn_mon_AMZI[44] c.c1_nrn_mon_AMZI[34] c.c2_nrn_mon_AMZI[26] c.c2_nrn_mon_AMZI[32] c.c1_nrn_mon_AMZI[16] c.c1_nrn_mon_AMZI[8] c.c2_syn_mon_AMZO[1] c.c.core2.syn_AMZO_keeps[4]._y c.c1_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[0] c.c2_nrn_mon_AMZI[35] c.c1_syn_mon_AMZI[26] c.c2_syn_mon_AMZI[34] c.c2_syn_mon_AMZI[8] c.c2_syn_mon_AMZI[44] c.c2_syn_mon_AMZI[9] c.c1_nrn_mon_AMZI[11] c.c2_nrn_mon_AMZI[13] c.c1_nrn_mon_AMZI[19] c.c2_syn_mon_AMZI[18] c.c1_nrn_mon_AMZI[7] c.c1_syn_mon_AMZI[35] c.c2_syn_mon_AMZI[10] c.c1_syn_mon_AMZI[5] c.c2_syn_mon_AMZI[39] c.c2_nrn_mon_AMZI[2] c.c2_nrn_mon_AMZI[14] c.c2_nrn_mon_AMZI[7] c.c1_syn_mon_AMZI[25] c.c1_syn_mon_AMZI[3] c.c2_syn_mon_AMZI[26] c.c.core1.nrn_AMZO_keeps[0].y c.c1_nrn_mon_AMZI[4] c.c1_syn_mon_AMZI[56] c.c1_syn_mon_AMZI[20] c.c2_nrn_mon_AMZI[37] c.c1_nrn_mon_AMZI[35] c.c2_syn_mon_AMZI[0] c.c2_syn_mon_AMZI[38] c.c1_nrn_mon_AMZI[22] c.c2_syn_mon_AMZI[49] c.c1_syn_mon_AMZI[65] c.c2_syn_mon_AMZI[73] c.c1_syn_mon_AMZI[34] c.c1_syn_mon_AMZI[9] c.c.core1.syn_AMZO_keeps[0].y c.c.core2.syn_mon_AMZO_sb.sb[2].buf12._y c.c2_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[37] c.c2_syn_mon_AMZI[13] c.c2_syn_mon_AMZI[41] c.c1_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[25] c.c1_syn_mon_AMZI[66] c.c1_syn_mon_AMZI[62] c.c1_nrn_mon_AMZI[23] c.c.core2.nrn_mon_AMZO_sb.sb[0].buf12._y c.c1_nrn_mon_AMZI[40] c.c1_syn_mon_AMZI[8] c.c1_syn_mon_AMZI[30] c.c1_syn_mon_AMZI[1] c.c2_syn_mon_AMZI[62] c.c2_syn_mon_AMZI[15] c.c1_nrn_mon_AMZI[27] c.c2_nrn_mon_AMZI[39] c.c1_syn_mon_AMZI[15] c.c1_syn_mon_AMZI[24] c.c.core2.nrn_AMZO_keeps[1].y c.c2_syn_mon_AMZI[53] c.c2_syn_mon_AMZI[14] c.c1_syn_mon_AMZI[11] c.c1_syn_mon_AMZI[41] c.c2_syn_mon_AMZI[5] c.c1_syn_mon_AMZI[33] c.c1_nrn_mon_AMZI[32] c.c2_nrn_mon_AMZI[44] c.out_sram_wr.a c.c1_nrn_mon_AMZI[31] c.c2_syn_mon_AMZI[47] c.c.core1.nrn_mon_AMZO_sb.sb[1].buf12._y c.c2_nrn_mon_AMZI[28] c.c2_nrn_mon_AMZI[29] c.c.core1.syn_mon_AMZO_sb.sb[4].buf12._y c.c2_nrn_mon_AMZI[17] c.c2_syn_mon_AMZI[59] c.c1_syn_mon_AMZI[52] c.c2_nrn_mon_AMZI[10] c.c1_nrn_mon_AMZI[37] c.c1_syn_mon_AMZI[71] c.c1_syn_mon_AMZI[13] c.c2_nrn_mon_AMZI[18] c.c1_nrn_mon_AMZI[10] c.c.core1.nrn_AMZO_keeps[2]._y c.c2_nrn_mon_AMZI[43] c.c1_syn_mon_AMZI[54] c.c2_syn_mon_AMZI[60] c.c2_nrn_mon_AMZI[19] c.c2_syn_mon_AMZI[31] c.c2_nrn_mon_AMZI[6] c.c.core2.syn_AMZO_keeps[3]._y c.c2_nrn_mon_AMZI[40] c.c1_nrn_mon_AMZI[18] c.c1_syn_mon_AMZI[38] c.c2_nrn_mon_AMZI[0] c.c2_nrn_mon_AMZI[15] c.c1_syn_mon_AMZI[4] c.c2_syn_mon_AMZI[46] c.c2_syn_mon_AMZI[23] c.c1_nrn_mon_AMZI[13] c.c2_syn_mon_AMZI[25] c.c2_nrn_mon_AMZI[22] c.c1_syn_mon_AMZI[60] c.c1_nrn_mon_AMZI[36] c.c2_nrn_mon_AMZI[9] c.c2_syn_mon_AMZI[27] c.c2_nrn_mon_AMZI[38] c.c2_syn_mon_AMZI[28] c.c2_syn_mon_AMZI[20] c.c2_nrn_mon_AMZI[34] c.c1_syn_mon_AMZI[14] c.c1_nrn_mon_AMZI[30] c.c1_nrn_mon_AMZI[26] c.c2_nrn_mon_AMZI[36] c.c1_nrn_mon_AMZI[6] c.c2_syn_mon_AMZI[74] c.c1_nrn_mon_AMZI[42] c.c1_syn_mon_AMZI[0] c.c2_syn_mon_AMZI[51] c.c1_syn_mon_AMZI[12] cLine truncated
|
||||
[] Writing 300877 to core 0 address 7
|
||||
[] Removing input
|
||||
[] Writing 8168774 to core 0 address 8
|
||||
[] Removing input
|
||||
[] Writing 6819022 to core 0 address 9
|
||||
[] Removing input
|
||||
[] Writing 7066908 to core 0 address 10
|
||||
[] Removing input
|
||||
[] Writing 6007478 to core 0 address 11
|
||||
[] Removing input
|
||||
[] Writing 1796383 to core 0 address 12
|
||||
[] Removing input
|
||||
[] Writing 529499 to core 0 address 13
|
||||
[] Removing input
|
||||
[] Writing 8339184 to core 0 address 14
|
||||
[] Removing input
|
||||
[] Writing 4473171 to core 0 address 15
|
||||
[] Removing input
|
||||
[] Writing 4098327 to core 0 address 16
|
||||
[] Removing input
|
||||
[] Writing 7375816 to core 0 address 17
|
||||
[] Removing input
|
||||
[] Writing 1483731 to core 0 address 18
|
||||
[] Removing input
|
||||
[] Writing 124808 to core 0 address 19
|
||||
[] Removing input
|
||||
[] Writing 6345504 to core 0 address 20
|
||||
[] Removing input
|
||||
[] Writing 4703565 to core 0 address 21
|
||||
[] Removing input
|
||||
[] Writing 545667 to core 0 address 22
|
||||
[] Removing input
|
||||
[] Writing 2934273 to core 0 address 23
|
||||
[] Removing input
|
||||
[] Writing 8068256 to core 0 address 24
|
||||
[] Removing input
|
||||
[] Writing 362058 to core 0 address 25
|
||||
[] Removing input
|
||||
[] Writing 7133693 to core 0 address 26
|
||||
[] Removing input
|
||||
[] Writing 6208620 to core 0 address 27
|
||||
[] Removing input
|
||||
[] Writing 3246295 to core 0 address 28
|
||||
[] Removing input
|
||||
[] Writing 4950819 to core 0 address 29
|
||||
[] Removing input
|
||||
[] Writing 3427279 to core 0 address 30
|
||||
[] Removing input
|
||||
[] Writing 2161769 to core 0 address 31
|
||||
[] Removing input
|
||||
[] Writing 803373 to core 0 address 32
|
||||
[] Removing input
|
||||
[] Writing 3512045 to core 0 address 33
|
||||
[] Removing input
|
||||
[] Writing 5493302 to core 0 address 34
|
||||
[] Removing input
|
||||
[] Writing 8360505 to core 0 address 35
|
||||
[] Removing input
|
||||
[] Writing 3587872 to core 0 address 36
|
||||
[] Removing input
|
||||
[] Writing 2663456 to core 0 address 37
|
||||
[] Removing input
|
||||
[] Writing 7317802 to core 0 address 38
|
||||
[] Removing input
|
||||
[] Writing 7819386 to core 0 address 39
|
||||
[] Removing input
|
||||
[] Writing 4933143 to core 0 address 40
|
||||
[] Removing input
|
||||
[] Writing 977823 to core 0 address 41
|
||||
[] Removing input
|
||||
[] Writing 1264214 to core 0 address 42
|
||||
[] Removing input
|
||||
[] Writing 2486191 to core 0 address 43
|
||||
[] Removing input
|
||||
[] Writing 6442835 to core 0 address 44
|
||||
[] Removing input
|
||||
[] Writing 3170993 to core 0 address 45
|
||||
[] Removing input
|
||||
[] Writing 6668057 to core 0 address 46
|
||||
[] Removing input
|
||||
[] Writing 4318000 to core 0 address 47
|
||||
[] Removing input
|
||||
[] Writing 8011 to core 0 address 48
|
||||
[] Removing input
|
||||
[] Writing 7587516 to core 0 address 49
|
||||
[] Removing input
|
||||
[] Writing 7421115 to core 0 address 50
|
||||
[] Removing input
|
||||
[] Writing 1427337 to core 0 address 51
|
||||
[] Removing input
|
||||
[] Writing 5447713 to core 0 address 52
|
||||
[] Removing input
|
||||
[] Writing 4562783 to core 0 address 53
|
||||
[] Removing input
|
||||
[] Writing 129309 to core 0 address 54
|
||||
[] Removing input
|
||||
[] Writing 8162919 to core 0 address 55
|
||||
[] Removing input
|
||||
[] Writing 7209585 to core 0 address 56
|
||||
[] Removing input
|
||||
[] Writing 985012 to core 0 address 57
|
||||
[] Removing input
|
||||
[] Writing 269199 to core 0 address 58
|
||||
[] Removing input
|
||||
[] Writing 2817667 to core 0 address 59
|
||||
[] Removing input
|
||||
[] Writing 2771837 to core 0 address 60
|
||||
[] Removing input
|
||||
[] Writing 1588573 to core 0 address 61
|
||||
[] Removing input
|
||||
[] Writing 3092595 to core 0 address 62
|
||||
[] Removing input
|
||||
[] Writing 8138343 to core 0 address 63
|
||||
[] Removing input
|
||||
[] Writing 2993408 to core 1 address 7
|
||||
[] Removing input
|
||||
[] Writing 6012528 to core 1 address 8
|
||||
[] Removing input
|
||||
[] Writing 7667645 to core 1 address 9
|
||||
[] Removing input
|
||||
[] Writing 7943676 to core 1 address 10
|
||||
[] Removing input
|
||||
[] Writing 5944430 to core 1 address 11
|
||||
[] Removing input
|
||||
[] Writing 5096299 to core 1 address 12
|
||||
[] Removing input
|
||||
[] Writing 4202109 to core 1 address 13
|
||||
[] Removing input
|
||||
[] Writing 5685461 to core 1 address 14
|
||||
[] Removing input
|
||||
[] Writing 2770749 to core 1 address 15
|
||||
[] Removing input
|
||||
[] Writing 8059196 to core 1 address 16
|
||||
[] Removing input
|
||||
[] Writing 6488647 to core 1 address 17
|
||||
[] Removing input
|
||||
[] Writing 4471476 to core 1 address 18
|
||||
[] Removing input
|
||||
[] Writing 2326036 to core 1 address 19
|
||||
[] Removing input
|
||||
[] Writing 2198419 to core 1 address 20
|
||||
[] Removing input
|
||||
[] Writing 8031160 to core 1 address 21
|
||||
[] Removing input
|
||||
[] Writing 2158838 to core 1 address 22
|
||||
[] Removing input
|
||||
[] Writing 1621672 to core 1 address 23
|
||||
[] Removing input
|
||||
[] Writing 3819036 to core 1 address 24
|
||||
[] Removing input
|
||||
[] Writing 4857680 to core 1 address 25
|
||||
[] Removing input
|
||||
[] Writing 1164285 to core 1 address 26
|
||||
[] Removing input
|
||||
[] Writing 1816084 to core 1 address 27
|
||||
[] Removing input
|
||||
[] Writing 6794001 to core 1 address 28
|
||||
[] Removing input
|
||||
[] Writing 8055516 to core 1 address 29
|
||||
[] Removing input
|
||||
[] Writing 1903302 to core 1 address 30
|
||||
[] Removing input
|
||||
[] Writing 1512973 to core 1 address 31
|
||||
[] Removing input
|
||||
[] Writing 6365867 to core 1 address 32
|
||||
[] Removing input
|
||||
[] Writing 315176 to core 1 address 33
|
||||
[] Removing input
|
||||
[] Writing 5480951 to core 1 address 34
|
||||
[] Removing input
|
||||
[] Writing 6176549 to core 1 address 35
|
||||
[] Removing input
|
||||
[] Writing 360901 to core 1 address 36
|
||||
[] Removing input
|
||||
[] Writing 5805656 to core 1 address 37
|
||||
[] Removing input
|
||||
[] Writing 8079434 to core 1 address 38
|
||||
[] Removing input
|
||||
[] Writing 5656698 to core 1 address 39
|
||||
[] Removing input
|
||||
[] Writing 293288 to core 1 address 40
|
||||
[] Removing input
|
||||
[] Writing 618263 to core 1 address 41
|
||||
[] Removing input
|
||||
[] Writing 4764604 to core 1 address 42
|
||||
[] Removing input
|
||||
[] Writing 3710081 to core 1 address 43
|
||||
[] Removing input
|
||||
[] Writing 3568756 to core 1 address 44
|
||||
[] Removing input
|
||||
[] Writing 7975113 to core 1 address 45
|
||||
[] Removing input
|
||||
[] Writing 6975302 to core 1 address 46
|
||||
[] Removing input
|
||||
[] Writing 2858147 to core 1 address 47
|
||||
[] Removing input
|
||||
[] Writing 3333423 to core 1 address 48
|
||||
[] Removing input
|
||||
[] Writing 3592276 to core 1 address 49
|
||||
[] Removing input
|
||||
[] Writing 349968 to core 1 address 50
|
||||
[] Removing input
|
||||
[] Writing 244972 to core 1 address 51
|
||||
[] Removing input
|
||||
[] Writing 7010796 to core 1 address 52
|
||||
[] Removing input
|
||||
[] Writing 7204557 to core 1 address 53
|
||||
[] Removing input
|
||||
[] Writing 5858103 to core 1 address 54
|
||||
[] Removing input
|
||||
[] Writing 6909525 to core 1 address 55
|
||||
[] Removing input
|
||||
[] Writing 8130905 to core 1 address 56
|
||||
[] Removing input
|
||||
[] Writing 4877284 to core 1 address 57
|
||||
[] Removing input
|
||||
[] Writing 3384251 to core 1 address 58
|
||||
[] Removing input
|
||||
[] Writing 2819200 to core 1 address 59
|
||||
[] Removing input
|
||||
[] Writing 1126121 to core 1 address 60
|
||||
[] Removing input
|
||||
[] Writing 3722713 to core 1 address 61
|
||||
[] Removing input
|
||||
[] Writing 1683718 to core 1 address 62
|
||||
[] Removing input
|
||||
[] Writing 4969626 to core 1 address 63
|
||||
[] Removing input
|
||||
[] Reading core 0 address 7
|
||||
[] Removing input
|
||||
[] Receiving output 300877 from core 0 register 7
|
||||
[] Reading core 0 address 8
|
||||
[] Removing input
|
||||
[] Receiving output 8168774 from core 0 register 8
|
||||
[] Reading core 0 address 9
|
||||
[] Removing input
|
||||
[] Receiving output 6819022 from core 0 register 9
|
||||
[] Reading core 0 address 10
|
||||
[] Removing input
|
||||
[] Receiving output 7066908 from core 0 register 10
|
||||
[] Reading core 0 address 11
|
||||
[] Removing input
|
||||
[] Receiving output 6007478 from core 0 register 11
|
||||
[] Reading core 0 address 12
|
||||
[] Removing input
|
||||
[] Receiving output 1796383 from core 0 register 12
|
||||
[] Reading core 0 address 13
|
||||
[] Removing input
|
||||
[] Receiving output 529499 from core 0 register 13
|
||||
[] Reading core 0 address 14
|
||||
[] Removing input
|
||||
[] Receiving output 8339184 from core 0 register 14
|
||||
[] Reading core 0 address 15
|
||||
[] Removing input
|
||||
[] Receiving output 4473171 from core 0 register 15
|
||||
[] Reading core 0 address 16
|
||||
[] Removing input
|
||||
[] Receiving output 4098327 from core 0 register 16
|
||||
[] Reading core 0 address 17
|
||||
[] Removing input
|
||||
[] Receiving output 7375816 from core 0 register 17
|
||||
[] Reading core 0 address 18
|
||||
[] Removing input
|
||||
[] Receiving output 1483731 from core 0 register 18
|
||||
[] Reading core 0 address 19
|
||||
[] Removing input
|
||||
[] Receiving output 124808 from core 0 register 19
|
||||
[] Reading core 0 address 20
|
||||
[] Removing input
|
||||
[] Receiving output 6345504 from core 0 register 20
|
||||
[] Reading core 0 address 21
|
||||
[] Removing input
|
||||
[] Receiving output 4703565 from core 0 register 21
|
||||
[] Reading core 0 address 22
|
||||
[] Removing input
|
||||
[] Receiving output 545667 from core 0 register 22
|
||||
[] Reading core 0 address 23
|
||||
[] Removing input
|
||||
[] Receiving output 2934273 from core 0 register 23
|
||||
[] Reading core 0 address 24
|
||||
[] Removing input
|
||||
[] Receiving output 8068256 from core 0 register 24
|
||||
[] Reading core 0 address 25
|
||||
[] Removing input
|
||||
[] Receiving output 362058 from core 0 register 25
|
||||
[] Reading core 0 address 26
|
||||
[] Removing input
|
||||
[] Receiving output 7133693 from core 0 register 26
|
||||
[] Reading core 0 address 27
|
||||
[] Removing input
|
||||
[] Receiving output 6208620 from core 0 register 27
|
||||
[] Reading core 0 address 28
|
||||
[] Removing input
|
||||
[] Receiving output 3246295 from core 0 register 28
|
||||
[] Reading core 0 address 29
|
||||
[] Removing input
|
||||
[] Receiving output 4950819 from core 0 register 29
|
||||
[] Reading core 0 address 30
|
||||
[] Removing input
|
||||
[] Receiving output 3427279 from core 0 register 30
|
||||
[] Reading core 0 address 31
|
||||
[] Removing input
|
||||
[] Receiving output 2161769 from core 0 register 31
|
||||
[] Reading core 0 address 32
|
||||
[] Removing input
|
||||
[] Receiving output 803373 from core 0 register 32
|
||||
[] Reading core 0 address 33
|
||||
[] Removing input
|
||||
[] Receiving output 3512045 from core 0 register 33
|
||||
[] Reading core 0 address 34
|
||||
[] Removing input
|
||||
[] Receiving output 5493302 from core 0 register 34
|
||||
[] Reading core 0 address 35
|
||||
[] Removing input
|
||||
[] Receiving output 8360505 from core 0 register 35
|
||||
[] Reading core 0 address 36
|
||||
[] Removing input
|
||||
[] Receiving output 3587872 from core 0 register 36
|
||||
[] Reading core 0 address 37
|
||||
[] Removing input
|
||||
[] Receiving output 2663456 from core 0 register 37
|
||||
[] Reading core 0 address 38
|
||||
[] Removing input
|
||||
[] Receiving output 7317802 from core 0 register 38
|
||||
[] Reading core 0 address 39
|
||||
[] Removing input
|
||||
[] Receiving output 7819386 from core 0 register 39
|
||||
[] Reading core 0 address 40
|
||||
[] Removing input
|
||||
[] Receiving output 4933143 from core 0 register 40
|
||||
[] Reading core 0 address 41
|
||||
[] Removing input
|
||||
[] Receiving output 977823 from core 0 register 41
|
||||
[] Reading core 0 address 42
|
||||
[] Removing input
|
||||
[] Receiving output 1264214 from core 0 register 42
|
||||
[] Reading core 0 address 43
|
||||
[] Removing input
|
||||
[] Receiving output 2486191 from core 0 register 43
|
||||
[] Reading core 0 address 44
|
||||
[] Removing input
|
||||
[] Receiving output 6442835 from core 0 register 44
|
||||
[] Reading core 0 address 45
|
||||
[] Removing input
|
||||
[] Receiving output 3170993 from core 0 register 45
|
||||
[] Reading core 0 address 46
|
||||
[] Removing input
|
||||
[] Receiving output 6668057 from core 0 register 46
|
||||
[] Reading core 0 address 47
|
||||
[] Removing input
|
||||
[] Receiving output 4318000 from core 0 register 47
|
||||
[] Reading core 0 address 48
|
||||
[] Removing input
|
||||
[] Receiving output 8011 from core 0 register 48
|
||||
[] Reading core 0 address 49
|
||||
[] Removing input
|
||||
[] Receiving output 7587516 from core 0 register 49
|
||||
[] Reading core 0 address 50
|
||||
[] Removing input
|
||||
[] Receiving output 7421115 from core 0 register 50
|
||||
[] Reading core 0 address 51
|
||||
[] Removing input
|
||||
[] Receiving output 1427337 from core 0 register 51
|
||||
[] Reading core 0 address 52
|
||||
[] Removing input
|
||||
[] Receiving output 5447713 from core 0 register 52
|
||||
[] Reading core 0 address 53
|
||||
[] Removing input
|
||||
[] Receiving output 4562783 from core 0 register 53
|
||||
[] Reading core 0 address 54
|
||||
[] Removing input
|
||||
[] Receiving output 129309 from core 0 register 54
|
||||
[] Reading core 0 address 55
|
||||
[] Removing input
|
||||
[] Receiving output 8162919 from core 0 register 55
|
||||
[] Reading core 0 address 56
|
||||
[] Removing input
|
||||
[] Receiving output 7209585 from core 0 register 56
|
||||
[] Reading core 0 address 57
|
||||
[] Removing input
|
||||
[] Receiving output 985012 from core 0 register 57
|
||||
[] Reading core 0 address 58
|
||||
[] Removing input
|
||||
[] Receiving output 269199 from core 0 register 58
|
||||
[] Reading core 0 address 59
|
||||
[] Removing input
|
||||
[] Receiving output 2817667 from core 0 register 59
|
||||
[] Reading core 0 address 60
|
||||
[] Removing input
|
||||
[] Receiving output 2771837 from core 0 register 60
|
||||
[] Reading core 0 address 61
|
||||
[] Removing input
|
||||
[] Receiving output 1588573 from core 0 register 61
|
||||
[] Reading core 0 address 62
|
||||
[] Removing input
|
||||
[] Receiving output 3092595 from core 0 register 62
|
||||
[] Reading core 0 address 63
|
||||
[] Removing input
|
||||
[] Receiving output 8138343 from core 0 register 63
|
||||
[] Reading core 1 address 7
|
||||
[] Removing input
|
||||
[] Receiving output 2993408 from core 1 register 7
|
||||
[] Reading core 1 address 8
|
||||
[] Removing input
|
||||
[] Receiving output 6012528 from core 1 register 8
|
||||
[] Reading core 1 address 9
|
||||
[] Removing input
|
||||
[] Receiving output 7667645 from core 1 register 9
|
||||
[] Reading core 1 address 10
|
||||
[] Removing input
|
||||
[] Receiving output 7943676 from core 1 register 10
|
||||
[] Reading core 1 address 11
|
||||
[] Removing input
|
||||
[] Receiving output 5944430 from core 1 register 11
|
||||
[] Reading core 1 address 12
|
||||
[] Removing input
|
||||
[] Receiving output 5096299 from core 1 register 12
|
||||
[] Reading core 1 address 13
|
||||
[] Removing input
|
||||
[] Receiving output 4202109 from core 1 register 13
|
||||
[] Reading core 1 address 14
|
||||
[] Removing input
|
||||
[] Receiving output 5685461 from core 1 register 14
|
||||
[] Reading core 1 address 15
|
||||
[] Removing input
|
||||
[] Receiving output 2770749 from core 1 register 15
|
||||
[] Reading core 1 address 16
|
||||
[] Removing input
|
||||
[] Receiving output 8059196 from core 1 register 16
|
||||
[] Reading core 1 address 17
|
||||
[] Removing input
|
||||
[] Receiving output 6488647 from core 1 register 17
|
||||
[] Reading core 1 address 18
|
||||
[] Removing input
|
||||
[] Receiving output 4471476 from core 1 register 18
|
||||
[] Reading core 1 address 19
|
||||
[] Removing input
|
||||
[] Receiving output 2326036 from core 1 register 19
|
||||
[] Reading core 1 address 20
|
||||
[] Removing input
|
||||
[] Receiving output 2198419 from core 1 register 20
|
||||
[] Reading core 1 address 21
|
||||
[] Removing input
|
||||
[] Receiving output 8031160 from core 1 register 21
|
||||
[] Reading core 1 address 22
|
||||
[] Removing input
|
||||
[] Receiving output 2158838 from core 1 register 22
|
||||
[] Reading core 1 address 23
|
||||
[] Removing input
|
||||
[] Receiving output 1621672 from core 1 register 23
|
||||
[] Reading core 1 address 24
|
||||
[] Removing input
|
||||
[] Receiving output 3819036 from core 1 register 24
|
||||
[] Reading core 1 address 25
|
||||
[] Removing input
|
||||
[] Receiving output 4857680 from core 1 register 25
|
||||
[] Reading core 1 address 26
|
||||
[] Removing input
|
||||
[] Receiving output 1164285 from core 1 register 26
|
||||
[] Reading core 1 address 27
|
||||
[] Removing input
|
||||
[] Receiving output 1816084 from core 1 register 27
|
||||
[] Reading core 1 address 28
|
||||
[] Removing input
|
||||
[] Receiving output 6794001 from core 1 register 28
|
||||
[] Reading core 1 address 29
|
||||
[] Removing input
|
||||
[] Receiving output 8055516 from core 1 register 29
|
||||
[] Reading core 1 address 30
|
||||
[] Removing input
|
||||
[] Receiving output 1903302 from core 1 register 30
|
||||
[] Reading core 1 address 31
|
||||
[] Removing input
|
||||
[] Receiving output 1512973 from core 1 register 31
|
||||
[] Reading core 1 address 32
|
||||
[] Removing input
|
||||
[] Receiving output 6365867 from core 1 register 32
|
||||
[] Reading core 1 address 33
|
||||
[] Removing input
|
||||
[] Receiving output 315176 from core 1 register 33
|
||||
[] Reading core 1 address 34
|
||||
[] Removing input
|
||||
[] Receiving output 5480951 from core 1 register 34
|
||||
[] Reading core 1 address 35
|
||||
[] Removing input
|
||||
[] Receiving output 6176549 from core 1 register 35
|
||||
[] Reading core 1 address 36
|
||||
[] Removing input
|
||||
[] Receiving output 360901 from core 1 register 36
|
||||
[] Reading core 1 address 37
|
||||
[] Removing input
|
||||
[] Receiving output 5805656 from core 1 register 37
|
||||
[] Reading core 1 address 38
|
||||
[] Removing input
|
||||
[] Receiving output 8079434 from core 1 register 38
|
||||
[] Reading core 1 address 39
|
||||
[] Removing input
|
||||
[] Receiving output 5656698 from core 1 register 39
|
||||
[] Reading core 1 address 40
|
||||
[] Removing input
|
||||
[] Receiving output 293288 from core 1 register 40
|
||||
[] Reading core 1 address 41
|
||||
[] Removing input
|
||||
[] Receiving output 618263 from core 1 register 41
|
||||
[] Reading core 1 address 42
|
||||
[] Removing input
|
||||
[] Receiving output 4764604 from core 1 register 42
|
||||
[] Reading core 1 address 43
|
||||
[] Removing input
|
||||
[] Receiving output 3710081 from core 1 register 43
|
||||
[] Reading core 1 address 44
|
||||
[] Removing input
|
||||
[] Receiving output 3568756 from core 1 register 44
|
||||
[] Reading core 1 address 45
|
||||
[] Removing input
|
||||
[] Receiving output 7975113 from core 1 register 45
|
||||
[] Reading core 1 address 46
|
||||
[] Removing input
|
||||
[] Receiving output 6975302 from core 1 register 46
|
||||
[] Reading core 1 address 47
|
||||
[] Removing input
|
||||
[] Receiving output 2858147 from core 1 register 47
|
||||
[] Reading core 1 address 48
|
||||
[] Removing input
|
||||
[] Receiving output 3333423 from core 1 register 48
|
||||
[] Reading core 1 address 49
|
||||
[] Removing input
|
||||
[] Receiving output 3592276 from core 1 register 49
|
||||
[] Reading core 1 address 50
|
||||
[] Removing input
|
||||
[] Receiving output 349968 from core 1 register 50
|
||||
[] Reading core 1 address 51
|
||||
[] Removing input
|
||||
[] Receiving output 244972 from core 1 register 51
|
||||
[] Reading core 1 address 52
|
||||
[] Removing input
|
||||
[] Receiving output 7010796 from core 1 register 52
|
||||
[] Reading core 1 address 53
|
||||
[] Removing input
|
||||
[] Receiving output 7204557 from core 1 register 53
|
||||
[] Reading core 1 address 54
|
||||
[] Removing input
|
||||
[] Receiving output 5858103 from core 1 register 54
|
||||
[] Reading core 1 address 55
|
||||
[] Removing input
|
||||
[] Receiving output 6909525 from core 1 register 55
|
||||
[] Reading core 1 address 56
|
||||
[] Removing input
|
||||
[] Receiving output 8130905 from core 1 register 56
|
||||
[] Reading core 1 address 57
|
||||
[] Removing input
|
||||
[] Receiving output 4877284 from core 1 register 57
|
||||
[] Reading core 1 address 58
|
||||
[] Removing input
|
||||
[] Receiving output 3384251 from core 1 register 58
|
||||
[] Reading core 1 address 59
|
||||
[] Removing input
|
||||
[] Receiving output 2819200 from core 1 register 59
|
||||
[] Reading core 1 address 60
|
||||
[] Removing input
|
||||
[] Receiving output 1126121 from core 1 register 60
|
||||
[] Reading core 1 address 61
|
||||
[] Removing input
|
||||
[] Receiving output 3722713 from core 1 register 61
|
||||
[] Reading core 1 address 62
|
||||
[] Removing input
|
||||
[] Receiving output 1683718 from core 1 register 62
|
||||
[] Reading core 1 address 63
|
||||
[] Removing input
|
||||
[] Receiving output 4969626 from core 1 register 63
|
||||
[] Writing 121 to core 0 address 2
|
||||
[] Removing input
|
||||
[] Writing 1 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Writing 0 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Writing 7 to core 0 address 4
|
||||
[] Removing input
|
||||
[] Writing 5 to core 0 address 3
|
||||
[] Removing input
|
||||
[] Writing 2 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Writing 33 to core 0 address 0
|
||||
[] Removing input
|
||||
[] Removing input
|
||||
[] Writing 1 to core 0 address 0
|
||||
[] Removing input
|
||||
[] Writing 1 to core 1 address 0
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [0,0]
|
||||
2649706056 c.c1_synapses[0].r : 1 [by c.c1_syn_grid._and_grid.ands[0]._y:=0]
|
||||
2649728538 c.c1_neurons[0].r : 1 [by c.c1_dummy_neuron_core.blocks[0]._ortree.or3s[2]._y:=0]
|
||||
2649735153 c.c1_neurons[0].a : 1 [by c.c1_nrn_grid.neurons[0].A_ack._y:=0]
|
||||
2649739592 c.c1_synapses[0].a : 1 [by c.c1_dummy_neuron_core.blocks[0].ands[0]._y:=0]
|
||||
2652313755 c.c1_synapses[0].r : 0 [by c.c1_syn_grid._and_grid.ands[0]._y:=1]
|
||||
2652317214 c.c1_synapses[0].a : 0 [by c.c1_dummy_neuron_core.blocks[0].ands[0]._y:=1]
|
||||
2652405087 c.c1_neurons[0].r : 0 [by c.c1_dummy_neuron_core.blocks[0]._ortree.or3s[2]._y:=1]
|
||||
2652425644 c.c1_neurons[0].a : 0 [by c.c1_nrn_grid.neurons[0].A_ack._y:=1]
|
||||
[] Removing input
|
||||
[] Receiving output spike [0,0]
|
||||
[] Sending spike to core 0 synapse [9,40]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,0]
|
||||
[] Sending spike to core 0 synapse [14,108]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,1]
|
||||
[] Sending spike to core 1 synapse [5,138]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,2]
|
||||
[] Sending spike to core 0 synapse [3,334]
|
||||
[] Removing input
|
||||
[] Receiving output spike [3,5]
|
||||
[] Sending spike to core 1 synapse [6,44]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,0]
|
||||
[] Sending spike to core 1 synapse [6,249]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,4]
|
||||
[] Sending spike to core 1 synapse [14,174]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,3]
|
||||
[] Sending spike to core 0 synapse [9,276]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,4]
|
||||
[] Sending spike to core 0 synapse [14,213]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,3]
|
||||
[] Sending spike to core 0 synapse [12,341]
|
||||
[] Removing input
|
||||
[] Receiving output spike [12,5]
|
||||
[] Sending spike to core 0 synapse [1,324]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,5]
|
||||
[] Sending spike to core 1 synapse [7,157]
|
||||
[] Removing input
|
||||
[] Receiving output spike [7,2]
|
||||
[] Sending spike to core 0 synapse [5,250]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,4]
|
||||
[] Sending spike to core 0 synapse [4,24]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,0]
|
||||
[] Sending spike to core 0 synapse [1,17]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,0]
|
||||
[] Sending spike to core 1 synapse [10,67]
|
||||
[] Removing input
|
||||
[] Receiving output spike [10,1]
|
||||
[] Sending spike to core 1 synapse [2,244]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,4]
|
||||
[] Sending spike to core 1 synapse [3,267]
|
||||
[] Removing input
|
||||
[] Receiving output spike [3,4]
|
||||
[] Sending spike to core 0 synapse [4,258]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,4]
|
||||
[] Sending spike to core 0 synapse [14,313]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,5]
|
||||
[] Sending spike to core 0 synapse [2,164]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,2]
|
||||
[] Sending spike to core 1 synapse [7,105]
|
||||
[] Removing input
|
||||
[] Receiving output spike [7,1]
|
||||
[] Sending spike to core 0 synapse [2,229]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,3]
|
||||
[] Sending spike to core 1 synapse [9,298]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,5]
|
||||
[] Sending spike to core 1 synapse [4,87]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,1]
|
||||
[] Sending spike to core 0 synapse [14,313]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,5]
|
||||
[] Sending spike to core 1 synapse [4,98]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,1]
|
||||
[] Sending spike to core 0 synapse [1,244]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,4]
|
||||
[] Sending spike to core 1 synapse [8,297]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,5]
|
||||
[] Sending spike to core 0 synapse [13,303]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,5]
|
||||
[] Sending spike to core 1 synapse [9,28]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,0]
|
||||
[] Sending spike to core 1 synapse [6,168]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,2]
|
||||
[] Sending spike to core 1 synapse [4,343]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,5]
|
||||
[] Sending spike to core 1 synapse [13,25]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,0]
|
||||
[] Sending spike to core 1 synapse [7,120]
|
||||
[] Removing input
|
||||
[] Receiving output spike [7,2]
|
||||
[] Sending spike to core 0 synapse [8,126]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,2]
|
||||
[] Sending spike to core 1 synapse [7,187]
|
||||
[] Removing input
|
||||
[] Receiving output spike [7,3]
|
||||
[] Sending spike to core 0 synapse [6,211]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,3]
|
||||
[] Sending spike to core 0 synapse [11,217]
|
||||
[] Removing input
|
||||
[] Receiving output spike [11,3]
|
||||
[] Sending spike to core 1 synapse [5,291]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,5]
|
||||
[] Sending spike to core 0 synapse [0,177]
|
||||
[] Removing input
|
||||
[] Receiving output spike [0,3]
|
||||
[] Sending spike to core 1 synapse [12,20]
|
||||
[] Removing input
|
||||
[] Receiving output spike [12,0]
|
||||
[] Sending spike to core 0 synapse [13,117]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,2]
|
||||
[] Sending spike to core 1 synapse [8,93]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,1]
|
||||
[] Sending spike to core 1 synapse [5,2]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,0]
|
||||
[] Sending spike to core 0 synapse [6,261]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,4]
|
||||
[] Sending spike to core 0 synapse [1,120]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,2]
|
||||
[] Sending spike to core 1 synapse [5,303]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,5]
|
||||
[] Sending spike to core 1 synapse [8,283]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,4]
|
||||
[] Sending spike to core 1 synapse [7,286]
|
||||
[] Removing input
|
||||
[] Receiving output spike [7,4]
|
||||
[] Sending spike to core 1 synapse [14,337]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,5]
|
||||
[] Sending spike to core 0 synapse [11,345]
|
||||
[] Removing input
|
||||
[] Receiving output spike [11,5]
|
||||
[] Sending spike to core 0 synapse [2,180]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,3]
|
||||
[] Sending spike to core 0 synapse [2,62]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,1]
|
||||
[] Sending spike to core 1 synapse [13,0]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,0]
|
||||
[] Sending spike to core 1 synapse [6,83]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,1]
|
||||
[] Sending spike to core 0 synapse [7,273]
|
||||
[] Removing input
|
||||
[] Receiving output spike [7,4]
|
||||
[] Sending spike to core 1 synapse [12,171]
|
||||
[] Removing input
|
||||
[] Receiving output spike [12,2]
|
||||
[] Sending spike to core 0 synapse [9,259]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,4]
|
||||
[] Sending spike to core 0 synapse [11,219]
|
||||
[] Removing input
|
||||
[] Receiving output spike [11,3]
|
||||
[] Sending spike to core 0 synapse [6,47]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,0]
|
||||
[] Sending spike to core 1 synapse [13,34]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,0]
|
||||
[] Sending spike to core 1 synapse [1,173]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,2]
|
||||
[] Sending spike to core 1 synapse [0,73]
|
||||
[] Removing input
|
||||
[] Receiving output spike [0,1]
|
||||
[] Sending spike to core 0 synapse [14,340]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,5]
|
||||
[] Sending spike to core 1 synapse [6,139]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,2]
|
||||
[] Sending spike to core 1 synapse [14,80]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,1]
|
||||
[] Sending spike to core 1 synapse [2,69]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,1]
|
||||
[] Sending spike to core 0 synapse [12,255]
|
||||
[] Removing input
|
||||
[] Receiving output spike [12,4]
|
||||
[] Sending spike to core 1 synapse [1,23]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,0]
|
||||
[] Sending spike to core 1 synapse [8,86]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,1]
|
||||
[] Sending spike to core 0 synapse [8,153]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,2]
|
||||
[] Sending spike to core 1 synapse [6,324]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,5]
|
||||
[] Sending spike to core 1 synapse [8,242]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,4]
|
||||
[] Sending spike to core 1 synapse [1,310]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,5]
|
||||
[] Sending spike to core 1 synapse [11,264]
|
||||
[] Removing input
|
||||
[] Receiving output spike [11,4]
|
||||
[] Sending spike to core 0 synapse [4,334]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,5]
|
||||
[] Sending spike to core 1 synapse [2,62]
|
||||
[] Removing input
|
||||
[] Receiving output spike [2,1]
|
||||
[] Sending spike to core 1 synapse [8,344]
|
||||
[] Removing input
|
||||
[] Receiving output spike [8,5]
|
||||
[] Sending spike to core 1 synapse [6,197]
|
||||
[] Removing input
|
||||
[] Receiving output spike [6,3]
|
||||
[] Sending spike to core 1 synapse [1,323]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,5]
|
||||
[] Sending spike to core 0 synapse [10,247]
|
||||
[] Removing input
|
||||
[] Receiving output spike [10,4]
|
||||
[] Sending spike to core 1 synapse [1,88]
|
||||
[] Removing input
|
||||
[] Receiving output spike [1,1]
|
||||
[] Sending spike to core 0 synapse [14,264]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,4]
|
||||
[] Sending spike to core 1 synapse [5,44]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,0]
|
||||
[] Sending spike to core 1 synapse [14,223]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,3]
|
||||
[] Sending spike to core 1 synapse [13,189]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,3]
|
||||
[] Sending spike to core 1 synapse [0,273]
|
||||
[] Removing input
|
||||
[] Receiving output spike [0,4]
|
||||
[] Sending spike to core 0 synapse [11,73]
|
||||
[] Removing input
|
||||
[] Receiving output spike [11,1]
|
||||
[] Sending spike to core 0 synapse [9,56]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,0]
|
||||
[] Sending spike to core 1 synapse [10,341]
|
||||
[] Removing input
|
||||
[] Receiving output spike [10,5]
|
||||
[] Sending spike to core 1 synapse [4,94]
|
||||
[] Removing input
|
||||
[] Receiving output spike [4,1]
|
||||
[] Sending spike to core 1 synapse [10,94]
|
||||
[] Removing input
|
||||
[] Receiving output spike [10,1]
|
||||
[] Sending spike to core 1 synapse [5,268]
|
||||
[] Removing input
|
||||
[] Receiving output spike [5,4]
|
||||
[] Sending spike to core 0 synapse [10,243]
|
||||
[] Removing input
|
||||
[] Receiving output spike [10,4]
|
||||
[] Sending spike to core 1 synapse [9,249]
|
||||
[] Removing input
|
||||
[] Receiving output spike [9,4]
|
||||
[] Sending spike to core 0 synapse [13,202]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,3]
|
||||
[] Sending spike to core 1 synapse [0,209]
|
||||
[] Removing input
|
||||
[] Receiving output spike [0,3]
|
||||
[] Sending spike to core 1 synapse [13,336]
|
||||
[] Removing input
|
||||
[] Receiving output spike [13,5]
|
||||
[] Sending spike to core 0 synapse [14,299]
|
||||
[] Removing input
|
||||
[] Receiving output spike [14,5]
|
||||
[] Writing 69420 to core 0 address 2
|
||||
[] Removing input
|
||||
[] Reading core 0 address 2
|
||||
[] Removing input
|
||||
[] Receiving output 69420 from core 0 register 2
|
||||
[] Reading core 0 address 2
|
||||
[] Removing input
|
||||
[] Receiving output 0 from core 0 register 2
|
||||
[] Writing 64 to core 0 address 0
|
||||
[] Removing input
|
||||
[] Writing 64 to core 1 address 0
|
||||
[] Removing input
|
||||
[] Writing 0 to core 0 address 0
|
||||
[] Removing input
|
||||
[] Writing 0 to core 1 address 0
|
||||
[] Removing input
|
||||
File diff suppressed because it is too large.
Load diff
@@ -0,0 +1,201 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/coders.act";
|
||||
import "../../dataflow_neuro/primitives.act";
|
||||
import "../../dataflow_neuro/chips.act";
|
||||
import "../../dataflow_neuro/dummy.act";
|
||||
|
||||
import globals;
|
||||
import std::data;
|
||||
|
||||
open std::data;
|
||||
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
|
||||
|
||||
pint N_IN = 32;
|
||||
|
||||
pint N_NRN_X = 15;
|
||||
pint N_NRN_Y = 6;
|
||||
pint NC_NRN_X = 4;
|
||||
pint NC_NRN_Y = 3;
|
||||
|
||||
pint N_SYN_X = 15;
|
||||
pint N_SYN_Y = 348;
|
||||
pint NC_SYN_X = 4;
|
||||
pint NC_SYN_Y = 9;
|
||||
|
||||
pint N_SYN_DLY_CFG = 4;
|
||||
pint N_BD_DLY_CFG = 4;
|
||||
pint N_BD_DLY_CFG2 = 2;
|
||||
|
||||
pint N_NRN_MON_X = N_NRN_X*2; // [mon,kill]*N
|
||||
pint N_NRN_MON_Y = N_NRN_Y; // [mon]*N
|
||||
|
||||
pint N_SYN_MON_X = N_SYN_X*4; // [mon, dev_mon, set, reset]*N
|
||||
pint N_SYN_MON_Y = N_SYN_Y; // [mon]*N
|
||||
|
||||
pint N_MON_AMZO_PER_SYN = 5;
|
||||
pint N_MON_AMZO_PER_NRN = 3;
|
||||
|
||||
pint N_FLAGS_PER_SYN = 5; // Syn: Must be at least 3 (since those ones have special safety)
|
||||
pint N_FLAGS_PER_NRN = 3; // and leq than the number of bits in a reg, since have presumed only needs one.
|
||||
|
||||
pint N_BUFFERS = 3;
|
||||
|
||||
pint N_LINE_PD_DLY = 3;
|
||||
|
||||
pint REG_NCA = 6;
|
||||
pint REG_M = 1<<REG_NCA;
|
||||
pint REG_NCW = 23;
|
||||
|
||||
|
||||
defproc chip_texel_dualcore (bd<N_IN> in, out;
|
||||
|
||||
Mx1of2<REG_NCW> c1_reg_data[REG_M];
|
||||
|
||||
a1of1 c1_synapses[N_SYN_X * N_SYN_Y];
|
||||
a1of1 c1_neurons[N_NRN_X * N_NRN_Y];
|
||||
|
||||
bool! c1_dec_req_x[N_SYN_X], c1_dec_req_y[N_SYN_Y];
|
||||
bool? c1_dec_ackB[N_SYN_X];
|
||||
a1of1 c1_syn_pu[N_SYN_X];
|
||||
|
||||
a1of1 c1_enc_inx[N_NRN_X], c1_enc_iny[N_NRN_Y];
|
||||
a1of1 c1_nrn_pd_x[N_NRN_X], c1_nrn_pd_y[N_NRN_Y];
|
||||
|
||||
bool! c1_nrn_mon_x[N_NRN_MON_X], c1_nrn_mon_y[N_NRN_MON_Y];
|
||||
bool! c1_syn_mon_x[N_SYN_MON_X], c1_syn_mon_y[N_SYN_MON_Y];
|
||||
bool? c1_syn_mon_AMZI[N_SYN_X * N_MON_AMZO_PER_SYN], c1_nrn_mon_AMZI[N_NRN_X * N_MON_AMZO_PER_NRN];
|
||||
bool! c1_syn_mon_AMZO[N_MON_AMZO_PER_SYN], c1_nrn_mon_AMZO[N_MON_AMZO_PER_NRN];
|
||||
bool! c1_syn_flags_EFO[N_FLAGS_PER_SYN], c1_nrn_flags_EFO[N_FLAGS_PER_NRN];
|
||||
|
||||
bool! c1_reset_nrn_hs_BO[N_NRN_X], c1_reset_syn_hs_BO[N_SYN_X],
|
||||
c1_reset_nrn_stge_BO[N_NRN_X], c1_reset_syn_stge_BO[N_SYN_X];
|
||||
|
||||
Mx1of2<REG_NCW> c2_reg_data[REG_M];
|
||||
|
||||
a1of1 c2_synapses[N_SYN_X * N_SYN_Y];
|
||||
a1of1 c2_neurons[N_NRN_X * N_NRN_Y];
|
||||
|
||||
bool! c2_dec_req_x[N_SYN_X], c2_dec_req_y[N_SYN_Y];
|
||||
bool? c2_dec_ackB[N_SYN_X];
|
||||
a1of1 c2_syn_pu[N_SYN_X];
|
||||
|
||||
a1of1 c2_enc_inx[N_NRN_X], c2_enc_iny[N_NRN_Y];
|
||||
a1of1 c2_nrn_pd_x[N_NRN_X], c2_nrn_pd_y[N_NRN_Y];
|
||||
|
||||
bool! c2_nrn_mon_x[N_NRN_MON_X], c2_nrn_mon_y[N_NRN_MON_Y];
|
||||
bool! c2_syn_mon_x[N_SYN_MON_X], c2_syn_mon_y[N_SYN_MON_Y];
|
||||
bool? c2_syn_mon_AMZI[N_SYN_X * N_MON_AMZO_PER_SYN], c2_nrn_mon_AMZI[N_NRN_X * N_MON_AMZO_PER_NRN];
|
||||
bool! c2_syn_mon_AMZO[N_MON_AMZO_PER_SYN], c2_nrn_mon_AMZO[N_MON_AMZO_PER_NRN];
|
||||
bool! c2_syn_flags_EFO[N_FLAGS_PER_SYN], c2_nrn_flags_EFO[N_FLAGS_PER_NRN];
|
||||
|
||||
bool! c2_reset_nrn_hs_BO[N_NRN_X], c2_reset_syn_hs_BO[N_SYN_X],
|
||||
c2_reset_nrn_stge_BO[N_NRN_X], c2_reset_syn_stge_BO[N_SYN_X];
|
||||
|
||||
bool! reset_B, reset_reg_B, reset_syn_stge_BI;
|
||||
|
||||
bool? bd_dly_cfg[N_BD_DLY_CFG], bd_dly_cfg2[N_BD_DLY_CFG2];
|
||||
bool? loopback_en;
|
||||
|
||||
avMx1of2<30> out_sram_wr; // Input packets to go to SRAM (rw word addr)
|
||||
avMx1of2<8> out_sram_spk; // Spike packets from enc to go to SRAM (core-nrn addr)
|
||||
avMx1of2<15> in_sram_r; // Readout packets from SRAM (data only)
|
||||
avMx1of2<14> in_sram_spk // Spike packets from SRAM (core-syn addr)
|
||||
|
||||
|
||||
){
|
||||
|
||||
bool _reset_B;
|
||||
prs {
|
||||
Reset => _reset_B-
|
||||
}
|
||||
power supply;
|
||||
supply.vdd = Vdd;
|
||||
supply.vss = GND;
|
||||
|
||||
texel_dualcore_mapper<N_IN,
|
||||
N_NRN_X, N_NRN_Y, N_SYN_X, N_SYN_Y,
|
||||
NC_NRN_X, NC_NRN_Y, NC_SYN_X, NC_SYN_Y,
|
||||
N_SYN_DLY_CFG,
|
||||
N_NRN_MON_X, N_NRN_MON_Y, N_SYN_MON_X, N_SYN_MON_Y,
|
||||
N_MON_AMZO_PER_SYN, N_MON_AMZO_PER_NRN,
|
||||
N_FLAGS_PER_SYN, N_FLAGS_PER_NRN,
|
||||
N_BUFFERS,
|
||||
N_LINE_PD_DLY,
|
||||
N_BD_DLY_CFG, N_BD_DLY_CFG2,
|
||||
REG_NCA, REG_NCW, REG_M> c(.in = in, .out = out,
|
||||
.c1_reg_data = c1_reg_data, .c1_dec_req_x = c1_dec_req_x, .c1_dec_req_y = c1_dec_req_y, .c1_dec_ackB = c1_dec_ackB, .c1_syn_pu = c1_syn_pu, .c1_enc_inx = c1_enc_inx, .c1_enc_iny = c1_enc_iny, .c1_nrn_pd_x = c1_nrn_pd_x, .c1_nrn_pd_y = c1_nrn_pd_y, .c1_nrn_mon_x = c1_nrn_mon_x, .c1_nrn_mon_y = c1_nrn_mon_y, .c1_syn_mon_x = c1_syn_mon_x, .c1_syn_mon_y = c1_syn_mon_y, .c1_syn_mon_AMZI = c1_syn_mon_AMZI, .c1_nrn_mon_AMZI = c1_nrn_mon_AMZI, .c1_syn_mon_AMZO = c1_syn_mon_AMZO, .c1_nrn_mon_AMZO = c1_nrn_mon_AMZO, .c1_syn_flags_EFO = c1_syn_flags_EFO, .c1_nrn_flags_EFO = c1_nrn_flags_EFO, .c1_reset_nrn_hs_BO = c1_reset_nrn_hs_BO, .c1_reset_syn_hs_BO = c1_reset_syn_hs_BO, .c1_reset_nrn_stge_BO = c1_reset_nrn_stge_BO, .c1_reset_syn_stge_BO = c1_reset_syn_stge_BO, .c2_reg_data = c2_reg_data, .c2_dec_req_x = c2_dec_req_x, .c2_dec_req_y = c2_dec_req_y, .c2_dec_ackB = c2_dec_ackB, .c2_syn_pu = c2_syn_pu, .c2_enc_inx = c2_enc_inx, .c2_enc_iny = c2_enc_iny, .c2_nrn_pd_x = c2_nrn_pd_x, .c2_nrn_pd_y = c2_nrn_pd_y, .c2_nrn_mon_x = c2_nrn_mon_x, .c2_nrn_mon_y = c2_nrn_mon_y, .c2_syn_mon_x = c2_syn_mon_x, .c2_syn_mon_y = c2_syn_mon_y, .c2_syn_mon_AMZI = c2_syn_mon_AMZI, .c2_nrn_mon_AMZI = c2_nrn_mon_AMZI, .c2_syn_mon_AMZO = c2_syn_mon_AMZO, .c2_nrn_mon_AMZO = c2_nrn_mon_AMZO, .c2_syn_flags_EFO = c2_syn_flags_EFO, .c2_nrn_flags_EFO = c2_nrn_flags_EFO, .c2_reset_nrn_hs_BO = c2_reset_nrn_hs_BO, .c2_reset_syn_hs_BO = c2_reset_syn_hs_BO, .c2_reset_nrn_stge_BO = c2_reset_nrn_stge_BO, .c2_reset_syn_stge_BO = c2_reset_syn_stge_BO,
|
||||
.bd_dly_cfg = bd_dly_cfg, .bd_dly_cfg2 = bd_dly_cfg2,
|
||||
.loopback_en = loopback_en,
|
||||
.out_sram_wr = out_sram_wr, .out_sram_spk = out_sram_spk,
|
||||
.in_sram_r = in_sram_r, .in_sram_spk = in_sram_spk,
|
||||
.reset_B = reset_B, .reset_reg_B = reset_reg_B, .reset_syn_stge_BI = reset_syn_stge_BI,
|
||||
.supply = supply);
|
||||
|
||||
pint N_NRN = N_NRN_X * N_NRN_Y;
|
||||
pint N_SYN_PER_NRN = (N_SYN_X * N_SYN_Y)/N_NRN;
|
||||
dummy_neuron_core<N_SYN_PER_NRN, N_NRN, N_NRN_X> c1_dummy_neuron_core(.synapses = c1_synapses, .neurons = c1_neurons,
|
||||
.supply = supply);
|
||||
dummy_neuron_core<N_SYN_PER_NRN, N_NRN, N_NRN_X> c2_dummy_neuron_core(.synapses = c2_synapses, .neurons = c2_neurons,
|
||||
.supply = supply);
|
||||
|
||||
decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> c1_syn_grid(
|
||||
.synapses = c1_synapses,
|
||||
.in_req_x = c1_dec_req_x, .in_req_y = c1_dec_req_y,
|
||||
.to_pu = c1_syn_pu,
|
||||
.out_ackB_decoder = c1_dec_ackB,
|
||||
.supply = supply);
|
||||
|
||||
nrn_hs_2d_array<N_NRN_X,N_NRN_Y> c1_nrn_grid(.in = c1_neurons,
|
||||
.outx = c1_enc_inx, .outy = c1_enc_iny,
|
||||
.to_pd_x = c1_nrn_pd_x, .to_pd_y = c1_nrn_pd_y,
|
||||
.supply = supply, .reset_B = _reset_B);
|
||||
|
||||
decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> c2_syn_grid(
|
||||
.synapses = c2_synapses,
|
||||
.in_req_x = c2_dec_req_x, .in_req_y = c2_dec_req_y,
|
||||
.to_pu = c2_syn_pu,
|
||||
.out_ackB_decoder = c2_dec_ackB,
|
||||
.supply = supply);
|
||||
|
||||
nrn_hs_2d_array<N_NRN_X,N_NRN_Y> c2_nrn_grid(.in = c2_neurons,
|
||||
.outx = c2_enc_inx, .outy = c2_enc_iny,
|
||||
.to_pd_x = c2_nrn_pd_x, .to_pd_y = c2_nrn_pd_y,
|
||||
.supply = supply, .reset_B = _reset_B);
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
// fifo_decoder_neurons_encoder_fifo e;
|
||||
chip_texel_dualcore c;
|
||||
File diff suppressed because it is too large.
Load diff
Reference in new issue
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