merged w michele
This commit is contained in:
alexmadison
commit
1510746bfa
@ -492,24 +492,38 @@ namespace tmpl {
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p_n_mode <- 1;
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y {-1}}
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}
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// export defcell arbiter_handshake(bool in1_r, in1_a,in2_r, in2_a out_r, out_a)
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// {
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// bool _u, _v;
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// A_2C_B_X1 cel1(.c1 = out_a,.c2 = v,.y = in1_a);
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// A_2C_B_X1 cel2(.c1 = out_a,.c2 = u,.y = in2_a);
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// prs {
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// [keeper=0] in1_v & _v -> _u-
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// [keeper=0] ~in1_v | ~_v -> _u+
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// [keeper=0] in2_v & _u -> _v-
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// [keeper=0] ~in2_v | ~_u -> _v+
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// [keeper=0] ~_u | ~in2_a => u+
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// [keeper=0] ~_v | ~in1_a => v+
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// [keeper=0] u | v => out_r
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// }
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// spec {
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// mk_excllo(_u, _v)
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// }
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// }
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//Rajit example
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defproc arbiter_Rajit (bool a, b, u, v)
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{
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bool _u, _v;
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prs {
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[keeper=0] a & _v -> _u-
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[keeper=0] ~a | ~_v -> _u+
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[keeper=0] b & _u -> _v-
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[keeper=0] ~b | ~_u -> _v+
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[keeper=0] _u => u-
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[keeper=0] _v => v-
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}
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spec {
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mk_excllo(_u, _v)
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}
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}
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defproc ARBITER (bool? a, b, c, d; bool! y1,y2; bool? vdd, vss)
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{
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bool _y1, _y2;
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prs {
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[keeper=0] a & _y2 -> _y1-
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[keeper=0] ~a | ~_y2 -> _y1+
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[keeper=0] b & _y1 -> _y2-
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[keeper=0] ~b | ~_y1 -> _y2+
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[keeper=0] _y1 | c => y1-
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[keeper=0] _y2 | d => y2-
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}
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spec {
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mk_excllo(_y1, _y2)
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}
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}
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}}
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@ -151,27 +151,25 @@ namespace tmpl {
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}
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export template<pint N>
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defproc demux (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<N> out2; bool? reset_B, c_t, c_f; power supply) {
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defproc demux (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<N> out2; bool? reset_B; avMx1of2<1> cond; power supply) {
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//control
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bool _en, _reset_BX,_reset_BXX[N], _out_v;
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bool _en, _reset_BX,_reset_BXX[2*N], _out_v, _in_c_v_;
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OR2_X1 out_or(.a=out1.v, .b=out2.v, .y=_out_v,.vdd=supply.vdd,.vss=supply.vss);
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A_3C_RB_X4 inack_ctl(.c1=_en,.c2=_in_c_v_,.c3= _out_v,.y=in.a,.pr_B=_reset_BXX,.sr_B=_reset_BXX,.vdd=supply.vdd,.vss=supply.vss);
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A_3C_RB_X4 inack_ctl(.c1=_en,.c2=_in_c_v_,.c3= _out_v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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A_1C1P_X1 en_ctl(.c1=in.a,.p1=_out_v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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sigbuf<2*N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
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A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
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//validity
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bool _in_v, _c_f_buf, _c_t_buf, _c_v, _in_c_v_;
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bool _in_v, _c_f_buf[N], _c_t_buf[N], _c_v;
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sigbuf<N> c_buf_t(.in=c_t, .out=_c_t_buf);
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sigbuf<N> c_buf_f(.in=c_f, .out=_c_f_buf);
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sigbuf<N> c_buf_t(.in=cond.d.d[0].t, .out=_c_t_buf);
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sigbuf<N> c_buf_f(.in=cond.d.d[0].f, .out=_c_f_buf);
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OR2_X1 c_f_c_t_or(.a=c_t, .b=c_f, .y=_c_v,.vdd=supply.vdd,.vss=supply.vss);
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OR2_X1 c_f_c_t_or(.a=cond.d.d[0].t, .b=cond.d.d[0].f, .y=_c_v,.vdd=supply.vdd,.vss=supply.vss);
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ctree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
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A_2C_RB_X4 c_el(.c1=_c_v, .c2=_in_v, .y=_in_c_v_,.vdd=supply.vdd,.vss=supply.vss);
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A_2C_B_X1 c_el(.c1=_c_v, .c2=_in_v, .y=_in_c_v_,.vdd=supply.vdd,.vss=supply.vss);
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BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
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@ -202,9 +200,10 @@ namespace tmpl {
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out1_t_buf_func[i].sr_B = _reset_BXX[i];
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out1_f_buf_func[i].pr_B = _reset_BXX[i];
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out1_f_buf_func[i].sr_B = _reset_BXX[i];
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out1_f_buf_func[i].n2=_c_t_buf;
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out1_t_buf_func[i].n2=_c_t_buf;
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out1_f_buf_func[i].n2=_c_t_buf[i];
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out1_t_buf_func[i].n2=_c_t_buf[i];
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)
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//func buffer out2
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bool _out2_a_BX_t[N],_out2_a_BX_f[N],_out2_a_B,_en2_X_t[N],_en2_X_f[N];
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A_2C2N_RB_X4 out2_f_buf_func[N];
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@ -231,13 +230,11 @@ namespace tmpl {
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out2_t_buf_func[i].sr_B = _reset_BXX[i+N-1];
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out2_f_buf_func[i].pr_B = _reset_BXX[i+N-1];
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out2_f_buf_func[i].sr_B = _reset_BXX[i+N-1];
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out2_f_buf_func[i].n2=_c_f_buf;
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out2_t_buf_func[i].n2=_c_f_buf;
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out2_f_buf_func[i].n2=_c_f_buf[i];
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out2_t_buf_func[i].n2=_c_f_buf[i];
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)
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}
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export template<pint N>
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defproc fork (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<N> out2 ; bool? reset_B; power supply) {
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@ -313,16 +310,177 @@ namespace tmpl {
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out2_f_buf_func[i].sr_B = _reset_BXX[i+N-1];
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)
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}
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export template<pint N, pbool invout>
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defproc demux_td (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<1> token; bool? reset_B; avMx1of2<1> cond; power supply) {
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//control
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bool _en, _reset_BX,_reset_BXX[2*N], _out_v, _in_c_v_;
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OR2_X1 out_or(.a=out1.v, .b=out2.v, .y=_out_v,.vdd=supply.vdd,.vss=supply.vss);
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A_3C_RB_X4 inack_ctl(.c1=_en,.c2=_in_c_v_,.c3= _out_v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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A_1C1P_X1 en_ctl(.c1=in.a,.p1=_out_v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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sigbuf<2*N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
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//validity
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bool _in_v, _c_f_buf[N], _c_t_buf[N], _c_v;
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sigbuf<N> c_buf_t(.in=cond.d.d[0].t, .out=_c_t_buf);
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sigbuf<N> c_buf_f(.in=cond.d.d[0].f, .out=_c_f_buf);
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//orientation of condition
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[ invout < 0 ->
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OR2_X1 c_f_c_t_or(.a=cond.d.d[0].t, .b=cond.d.d[0].f, .y=_c_v,.vdd=supply.vdd,.vss=supply.vss);
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[] invout > 0 ->
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OR2_X1 c_f_c_t_or(.a=cond.d.d[0].f, .b=cond.d.d[0].t, .y=_c_v,.vdd=supply.vdd,.vss=supply.vss);
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]
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ctree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
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A_2C_B_X1 c_el(.c1=_c_v, .c2=_in_v, .y=_in_c_v_,.vdd=supply.vdd,.vss=supply.vss);
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BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
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//function
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//func buffer out1
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bool _out1_a_BX_t[N],_out1_a_BX_f[N],_out1_a_B,_en1_X_t[N],_en1_X_f[N];
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A_2C2N_RB_X4 out1_f_buf_func[N];
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A_2C2N_RB_X4 out1_t_buf_func[N];
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sigbuf<N> out1_en_buf_t(.in=_en, .out=_en1_X_t, .supply=supply);
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sigbuf<N> out1_en_buf_f(.in=_en, .out=_en1_X_f, .supply=supply);
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INV_X1 out1_a_inv(.a=out1.a,.y=_out1_a_B);
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sigbuf<N> out1_a_B_buf_f(.in=_out1_a_B,.out=_out1_a_BX_t);
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sigbuf<N> out1_a_B_buf_t(.in=_out1_a_B,.out=_out1_a_BX_f);
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(i:N:
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out1_f_buf_func[i].y=out1.d.d[i].f;
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out1_t_buf_func[i].y=out1.d.d[i].t;
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out1_f_buf_func[i].c1=_en1_X_f[i];
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out1_t_buf_func[i].c1=_en1_X_t[i];
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out1_f_buf_func[i].c2=_out1_a_BX_f[i];
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out1_t_buf_func[i].c2=_out1_a_BX_t[i];
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out1_f_buf_func[i].n1=in.d.d[i].f;
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out1_t_buf_func[i].n1=in.d.d[i].t;
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out1_f_buf_func[i].vdd=supply.vdd;
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out1_t_buf_func[i].vdd=supply.vdd;
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out1_f_buf_func[i].vss=supply.vss;
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out1_t_buf_func[i].vss=supply.vss;
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out1_t_buf_func[i].pr_B = _reset_BXX[i];
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out1_t_buf_func[i].sr_B = _reset_BXX[i];
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out1_f_buf_func[i].pr_B = _reset_BXX[i];
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out1_f_buf_func[i].sr_B = _reset_BXX[i];
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out1_f_buf_func[i].n2=_c_t_buf[i];
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out1_t_buf_func[i].n2=_c_t_buf[i];
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)
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//token out
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A_2C2N_RB_X4 token_buf;
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token_buf.y = ;
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token_buf.c1 = ;
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token_buf.c2 = ;
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token_buf.n1 = ;
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token_buf.n2 = ;
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token_buf.vdd = supply.vdd;
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token_buf.vss = supply.vss;
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token_buf.pr_B ;
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token_buf.sr_b ;
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}
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// export template<pint N>
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// defproc merge (avMx1of2<N> in1; avMx1of2<N> in2; avMx1of2<N> out ; bool? reset_B; power supply) {
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// //control
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// bool _en, _reset_BX,_reset_BXX[N];
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// A_4C_RB_X4 in1ack_ctl(.c1=in1arb,.c2=_en,.c3=in1.v,.c4=out.v,.y=in1.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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// A_4C_RB_X4 in2ack_ctl(.c1=in2arb,.c2=_en,.c3=in2.v,.c4=out.v,.y=in2.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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// A_4P_1N1N en_ctl(.p1 = in1.a,.p2=in2.a,.p3=out_a_X,.p4 = out.v, .n1 = in1.a,.y = _en,.vdd=supply.vdd,.vss=supply.vss);
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// //reset_buffers
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// BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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// sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
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// //validity
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// bool _in1_v,_in2_v;
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// a1of1 _in1_temp,_in2_temp,_out_temp;
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// ctree<N> vc1(.in=in1.d,.out=in1.v,.supply=supply);
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// ctree<N> vc2(.in=in2.d,.out=in2.v,.supply=supply);
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// arbiter_handshake validity_arb(.in1 = _in1_temp,.in2 = _in2_temp,.out =_out_temp)
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// _in1_temp.r = in1.v
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// _in2_temp.r = in2.v
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// _in1_temp.a =
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// _in1_temp.a =
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// _out_temp.r = _out_temp.a
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//function
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// }
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export
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defproc arbiter_handshake(a1of1 in1; a1of1 in2; a1of1 out; power supply)
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{
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bool _y1_arb,_y2_arb;
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A_2C_B_X1 ack_cell1(.c1 = out.a,.c2 = _y1_arb,.y = in1.a,.vdd = supply.vdd, .vss = supply.vss);
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A_2C_B_X1 ack_cell2(.c1 = out.a,.c2 = _y2_arb,.y = in2.a,.vdd = supply.vdd, .vss = supply.vss);
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OR2_X1 or_cell(.a = _y1_arb, .b = _y2_arb, .y = out.r,.vdd = supply.vdd, .vss = supply.vss);
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ARBITER arbiter(.a = in1.r, .b = in2.r, .c = in2.a, .d = in1.a, .y1 = _y1_arb, .y2 = _y2_arb, .vdd = supply.vdd, .vss = supply.vss);
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}
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export
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defproc buffer_t_tmsc(a1of1 in; a1of1 out; bool? reset_B; power supply)
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{
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//control
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bool _en, _reset_BX;
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A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.r,.c3=out.r,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.r,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
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//function
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bool _out_a_B;
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INV_X1 inv_outa(.a = out.a,.y=_out_a_B,.vdd = supply.vdd,.vss=supply.vss);
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A_2C1N_RB_X4 buf_func(.c1 = _en,.c2 = _out_a_B, .n1 = in.r,.y = out.r, .pr_B = _reset_BX, .sr_B = _reset_BX,.vdd = supply.vdd,.vss=supply.vss);
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//reset buffers
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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}
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export
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defproc buffer_t(a1of1 in; a1of1 out; bool? reset_B; power supply)
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{
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//control
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bool _en, _reset_BX;
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A_2C1N_RB_X4 inack_ctl(.c1=_en,.c2=in.r,.n1=out.r,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.r,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
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//function
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bool _out_a_B;
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INV_X1 inv_outa(.a = out.a,.y=_out_a_B,.vdd = supply.vdd,.vss=supply.vss);
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A_2C1N_RB_X4 buf_func(.c1 = _en,.c2 = _out_a_B, .n1 = in.r,.y = out.r, .pr_B = _reset_BX, .sr_B = _reset_BX,.vdd = supply.vdd,.vss=supply.vss);
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//reset buffers
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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}
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export template<pint N>
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defproc merge (avMx1of2<N> in1; avMx1of2<N> in2; avMx1of2<N> out ; bool? reset_B; power supply) {
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defproc fifo_t(a1of1 in; a1of1 out; bool? reset_B; power supply)
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{
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buffer_t fifo_element[N];
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bool _reset_BXX[N];
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fifo_element[0].in.r = in.r;
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fifo_element[0].in.a = in.a;
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fifo_element[0].supply = supply;
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fifo_element[0].reset_B = _reset_BXX[0];
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(i:1..N-1:
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fifo_element[i].in.r = fifo_element[i-1].out.r;
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fifo_element[i].in.a = fifo_element[i-1].out.a;
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fifo_element[i].supply = supply;
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fifo_element[i].reset_B = _reset_BXX[i];
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)
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fifo_element[N-1].out.r = out.r;
|
||||
fifo_element[N-1].out.a = out.a;
|
||||
|
||||
//control
|
||||
|
||||
|
||||
//reset_buffers
|
||||
|
||||
//validity
|
||||
|
||||
//function
|
||||
}
|
||||
}
|
||||
// reset buffers
|
||||
bool _reset_BX;
|
||||
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
|
||||
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
|
||||
}
|
||||
}}
|
||||
|
||||
@ -78,8 +78,14 @@ defproc ortree (bool? in[N]; bool! out; power supply)
|
||||
(k:N:tmp[k] = in[k];)
|
||||
|
||||
/* array to hold the actual C-elments, either A2C or A3C */
|
||||
OR2_X1 C2Els[lenTree2Count];
|
||||
OR3_X1 C3Els[lenTree3Count];
|
||||
|
||||
[lenTree2Count > 0 ->
|
||||
OR2_X1 C2Els[lenTree2Count];
|
||||
]
|
||||
|
||||
[lenTree3Count > 0 ->
|
||||
OR3_X1 C3Els[lenTree3Count];
|
||||
]
|
||||
|
||||
(h:lenTree2Count:C2Els[h].vdd = supply.vdd;)
|
||||
(h:lenTree3Count:C3Els[h].vdd = supply.vdd;)
|
||||
@ -196,8 +202,14 @@ defproc ctree (std::data::Mx1of2?<N> in; bool! out; power supply)
|
||||
//(k:N:tmp[k] = in[k];)
|
||||
|
||||
/* array to hold the actual C-elments, either A2C or A3C */
|
||||
A_2C_B_X1 C2Els[lenTree2Count];
|
||||
A_3C_B_X1 C3Els[lenTree3Count];
|
||||
[lenTree2Count > 0 ->
|
||||
A_2C_B_X1 C2Els[lenTree2Count];
|
||||
]
|
||||
|
||||
[lenTree3Count > 0 ->
|
||||
A_3C_B_X1 C3Els[lenTree3Count];
|
||||
]
|
||||
|
||||
|
||||
(h:lenTree2Count:C2Els[h].vdd = supply.vdd;)
|
||||
(h:lenTree3Count:C3Els[h].vdd = supply.vdd;)
|
||||
|
||||
@ -31,16 +31,20 @@ Use -exclude='regex' to specify signals to exclude (or -ex).""")
|
||||
assert len(entries) >= 1, "Could not find signal info in prsim.out!"
|
||||
|
||||
# Check if user gave a colour specification
|
||||
colour_undefined = (255,0,0)
|
||||
colour_high = (252, 186, 3)
|
||||
colour_low = (20, 184, 186)
|
||||
colour_undefined = (100,100,100)
|
||||
colour_high = (98, 187, 93)
|
||||
colour_low = (233, 115, 115)
|
||||
for arg in argv:
|
||||
r = re.findall(r'-c=(.+)', arg)
|
||||
if len(r) >= 1:
|
||||
if r[0] == "michele":
|
||||
colour_undefined = (100,100,100)
|
||||
colour_high = (105, 204, 86)
|
||||
colour_low = (209, 86, 48)
|
||||
if r[0] == "ole":
|
||||
colour_undefined = (233, 115, 115)
|
||||
colour_high = (98, 187, 93)
|
||||
colour_low = (90, 111, 199)
|
||||
if r[0] == "og":
|
||||
colour_undefined = (255,0,0)
|
||||
colour_high = (252, 186, 3)
|
||||
colour_low = (20, 184, 186)
|
||||
else:
|
||||
raise Exception("Unknown colour given. I cba to code up general colours atm.")
|
||||
|
||||
|
||||
3
test/unit_tests/arbiter/run/test.prs
Normal file
3
test/unit_tests/arbiter/run/test.prs
Normal file
@ -0,0 +1,3 @@
|
||||
= "GND" "GND"
|
||||
= "Vdd" "Vdd"
|
||||
= "Reset" "Reset"
|
||||
39
test/unit_tests/arbiter_2/run/prsim.out
Normal file
39
test/unit_tests/arbiter_2/run/prsim.out
Normal file
@ -0,0 +1,39 @@
|
||||
a._v a.a a.u a.v a._u a.b
|
||||
reset done
|
||||
0 a.a : 0
|
||||
0 a.b : 0
|
||||
1 a._u : 1 [by a.a:=0]
|
||||
7092 a._v : 1 [by a.b:=0]
|
||||
7094 a.v : 0 [by a._v:=1]
|
||||
10468 a.u : 0 [by a._u:=1]
|
||||
|
||||
step 1.1 finished
|
||||
10468 a.a : 1
|
||||
10468 a.b : 1
|
||||
15221 a._u : 0 [by a.a:=1]
|
||||
15335 a.u : 1 [by a._u:=0]
|
||||
|
||||
step 1.2 finished
|
||||
15335 a.a : 0
|
||||
15335 a.b : 0
|
||||
80701 a._u : 1 [by a.a:=0]
|
||||
82427 a.u : 0 [by a._u:=1]
|
||||
|
||||
step 2.1 finished
|
||||
82427 a.a : 1
|
||||
82427 a.b : 1
|
||||
82466 a._u : 0 [by a.a:=1]
|
||||
82957 a.u : 1 [by a._u:=0]
|
||||
|
||||
step 2.2 finished
|
||||
82957 a.a : 0
|
||||
82957 a.b : 0
|
||||
82970 a._u : 1 [by a.a:=0]
|
||||
83010 a.u : 0 [by a._u:=1]
|
||||
|
||||
step 3.1 finished
|
||||
83010 a.b : 1
|
||||
83425 a._v : 0 [by a.b:=1]
|
||||
83445 a.v : 1 [by a._v:=0]
|
||||
|
||||
step 3.2 finished
|
||||
BIN
test/unit_tests/arbiter_2/run/prsim.pdf
Normal file
BIN
test/unit_tests/arbiter_2/run/prsim.pdf
Normal file
Binary file not shown.
12
test/unit_tests/arbiter_2/run/test.prs
Normal file
12
test/unit_tests/arbiter_2/run/test.prs
Normal file
@ -0,0 +1,12 @@
|
||||
= "GND" "GND"
|
||||
= "Vdd" "Vdd"
|
||||
= "Reset" "Reset"
|
||||
"a.a"&"a._v"->"a._u"-
|
||||
~"a.a"|~"a._v"->"a._u"+
|
||||
"a.b"&"a._u"->"a._v"-
|
||||
~"a.b"|~"a._u"->"a._v"+
|
||||
"a._u"->"a.u"-
|
||||
~("a._u")->"a.u"+
|
||||
"a._v"->"a.v"-
|
||||
~("a._v")->"a.v"+
|
||||
mk_excllo("a._u","a._v")
|
||||
@ -14,20 +14,5 @@ defproc arbiter (bool a, b, u, v)
|
||||
}
|
||||
}
|
||||
|
||||
bool Reset;
|
||||
|
||||
defproc driver(bool r, a)
|
||||
{
|
||||
prs {
|
||||
Reset | a => r-
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
defproc test()
|
||||
{
|
||||
driver d1, d2;
|
||||
arbiter a(d1.r, d2.r, d1.a, d2.a);
|
||||
}
|
||||
|
||||
test t;
|
||||
arbiter a;
|
||||
|
||||
@ -1,8 +1,39 @@
|
||||
watchall
|
||||
cycle
|
||||
set Reset 0
|
||||
cycle
|
||||
|
||||
system "echo 'reset done'"
|
||||
set a.a 0
|
||||
set a.b 0
|
||||
advance 1000000
|
||||
status X
|
||||
mode run
|
||||
system "echo 'finished'"
|
||||
system "echo 'step 1.1 finished'"
|
||||
set a.a 1
|
||||
set a.b 1
|
||||
advance 1000000
|
||||
status X
|
||||
mode run
|
||||
system "echo 'step 1.2 finished'"
|
||||
set a.a 0
|
||||
set a.b 0
|
||||
advance 1000000
|
||||
status X
|
||||
mode run
|
||||
system "echo 'step 2.1 finished'"
|
||||
set a.a 1
|
||||
set a.b 1
|
||||
advance 1000000
|
||||
status X
|
||||
mode run
|
||||
system "echo 'step 2.2 finished'"
|
||||
set a.a 0
|
||||
set a.b 0
|
||||
advance 1000000
|
||||
status X
|
||||
mode run
|
||||
system "echo 'step 3.1 finished'"
|
||||
set a.a 0
|
||||
set a.b 1
|
||||
advance 1000000
|
||||
status X
|
||||
mode run
|
||||
system "echo 'step 3.2 finished'"
|
||||
|
||||
58
test/unit_tests/arbiter_handshake/run/prsim.out
Normal file
58
test/unit_tests/arbiter_handshake/run/prsim.out
Normal file
@ -0,0 +1,58 @@
|
||||
t.in1.r t.in2.r t.out.r t.a.arbiter._y1 t.a.arbiter._y2 t.out.a t.in1.a t.a._y1_arb t.a._y2_arb t.in2.a t.a.or_cell._y t.a.ack_cell1._y t.a.ack_cell2._y
|
||||
[0] code starts
|
||||
0 t.in1.r : 0
|
||||
0 t.out.a : 0
|
||||
0 t.in2.r : 0
|
||||
1 t.a.arbiter._y1 : 1 [by t.in1.r:=0]
|
||||
7092 t.a.arbiter._y2 : 1 [by t.in2.r:=0]
|
||||
7094 t.a._y2_arb : 0 [by t.a.arbiter._y2:=1]
|
||||
10468 t.a._y1_arb : 0 [by t.a.arbiter._y1:=1]
|
||||
10582 t.a.or_cell._y : 1 [by t.a._y1_arb:=0]
|
||||
11605 t.a.ack_cell1._y : 1 [by t.a._y1_arb:=0]
|
||||
11847 t.a.ack_cell2._y : 1 [by t.a._y2_arb:=0]
|
||||
11886 t.in2.a : 0 [by t.a.ack_cell2._y:=1]
|
||||
13331 t.in1.a : 0 [by t.a.ack_cell1._y:=1]
|
||||
75948 t.out.r : 0 [by t.a.or_cell._y:=1]
|
||||
|
||||
[1] reset done
|
||||
----------------------------------------------------------------------------------------------------
|
||||
75948 t.in1.r : 1
|
||||
75963 t.a.arbiter._y1 : 0 [by t.in1.r:=1]
|
||||
76454 t.a._y1_arb : 1 [by t.a.arbiter._y1:=0]
|
||||
76467 t.a.or_cell._y : 0 [by t.a._y1_arb:=1]
|
||||
76507 t.out.r : 1 [by t.a.or_cell._y:=0]
|
||||
76507 t.out.a : 1
|
||||
76922 t.a.ack_cell1._y : 0 [by t.out.a:=1]
|
||||
76942 t.in1.a : 1 [by t.a.ack_cell1._y:=0]
|
||||
[2] test in1 done
|
||||
----------------------------------------------------------------------------------------------------
|
||||
76942 t.in1.r : 0
|
||||
83003 t.a.arbiter._y1 : 1 [by t.in1.r:=0]
|
||||
83050 t.a._y1_arb : 0 [by t.a.arbiter._y1:=1]
|
||||
83066 t.a.or_cell._y : 1 [by t.a._y1_arb:=0]
|
||||
127164 t.out.r : 0 [by t.a.or_cell._y:=1]
|
||||
127164 t.out.a : 0
|
||||
140888 t.a.ack_cell1._y : 1 [by t.out.a:=0]
|
||||
140892 t.in1.a : 0 [by t.a.ack_cell1._y:=1]
|
||||
[3] reset done
|
||||
----------------------------------------------------------------------------------------------------
|
||||
140892 t.in2.r : 1
|
||||
150021 t.a.arbiter._y2 : 0 [by t.in2.r:=1]
|
||||
150036 t.a._y2_arb : 1 [by t.a.arbiter._y2:=0]
|
||||
193284 t.a.or_cell._y : 0 [by t.a._y2_arb:=1]
|
||||
230215 t.out.r : 1 [by t.a.or_cell._y:=0]
|
||||
230215 t.out.a : 1
|
||||
230270 t.a.ack_cell2._y : 0 [by t.out.a:=1]
|
||||
281923 t.in2.a : 1 [by t.a.ack_cell2._y:=0]
|
||||
[4] test in2 done
|
||||
----------------------------------------------------------------------------------------------------
|
||||
281923 t.in2.r : 0
|
||||
311703 t.a.arbiter._y2 : 1 [by t.in2.r:=0]
|
||||
325552 t.a._y2_arb : 0 [by t.a.arbiter._y2:=1]
|
||||
350364 t.a.or_cell._y : 1 [by t.a._y2_arb:=0]
|
||||
364707 t.out.r : 0 [by t.a.or_cell._y:=1]
|
||||
364707 t.out.a : 0
|
||||
365129 t.a.ack_cell2._y : 1 [by t.out.a:=0]
|
||||
413843 t.in2.a : 0 [by t.a.ack_cell2._y:=1]
|
||||
[5] reset done
|
||||
----------------------------------------------------------------------------------------------------
|
||||
70
test/unit_tests/arbiter_handshake/run/test.prs
Normal file
70
test/unit_tests/arbiter_handshake/run/test.prs
Normal file
@ -0,0 +1,70 @@
|
||||
= "GND" "GND"
|
||||
= "Vdd" "Vdd"
|
||||
= "Reset" "Reset"
|
||||
= "t.a.in1.d.d[0]" "t.a.in1.r"
|
||||
= "t.a.in1.a" "t.a.arbiter.d"
|
||||
= "t.a.in1.a" "t.a.ack_cell1.y"
|
||||
= "t.a.in1.d.d[0]" "t.a.arbiter.a"
|
||||
= "t.a.in1.d.d[0]" "t.a.in1.r"
|
||||
~"t.a.ack_cell1.c1"&~"t.a.ack_cell1.c2"->"t.a.ack_cell1._y"+
|
||||
"t.a.ack_cell1.c1"&"t.a.ack_cell1.c2"->"t.a.ack_cell1._y"-
|
||||
"t.a.ack_cell1._y"->"t.a.ack_cell1.y"-
|
||||
~("t.a.ack_cell1._y")->"t.a.ack_cell1.y"+
|
||||
= "t.a.in2.d.d[0]" "t.a.in2.r"
|
||||
= "t.a.in2.a" "t.a.arbiter.c"
|
||||
= "t.a.in2.a" "t.a.ack_cell2.y"
|
||||
= "t.a.in2.d.d[0]" "t.a.arbiter.b"
|
||||
= "t.a.in2.d.d[0]" "t.a.in2.r"
|
||||
= "t.a.supply.vdd" "t.a.arbiter.vdd"
|
||||
= "t.a.supply.vdd" "t.a.or_cell.vdd"
|
||||
= "t.a.supply.vdd" "t.a.ack_cell2.vdd"
|
||||
= "t.a.supply.vdd" "t.a.ack_cell1.vdd"
|
||||
= "t.a.supply.vss" "t.a.arbiter.vss"
|
||||
= "t.a.supply.vss" "t.a.or_cell.vss"
|
||||
= "t.a.supply.vss" "t.a.ack_cell2.vss"
|
||||
= "t.a.supply.vss" "t.a.ack_cell1.vss"
|
||||
"t.a.arbiter.a"&"t.a.arbiter._y2"->"t.a.arbiter._y1"-
|
||||
~"t.a.arbiter.a"|~"t.a.arbiter._y2"->"t.a.arbiter._y1"+
|
||||
"t.a.arbiter.b"&"t.a.arbiter._y1"->"t.a.arbiter._y2"-
|
||||
~"t.a.arbiter.b"|~"t.a.arbiter._y1"->"t.a.arbiter._y2"+
|
||||
"t.a.arbiter._y1"|"t.a.arbiter.c"->"t.a.arbiter.y1"-
|
||||
~("t.a.arbiter._y1"|"t.a.arbiter.c")->"t.a.arbiter.y1"+
|
||||
"t.a.arbiter._y2"|"t.a.arbiter.d"->"t.a.arbiter.y2"-
|
||||
~("t.a.arbiter._y2"|"t.a.arbiter.d")->"t.a.arbiter.y2"+
|
||||
mk_excllo("t.a.arbiter._y1","t.a.arbiter._y2")
|
||||
= "t.a._y1_arb" "t.a.arbiter.y1"
|
||||
= "t.a._y1_arb" "t.a.or_cell.a"
|
||||
= "t.a._y1_arb" "t.a.ack_cell1.c2"
|
||||
~"t.a.ack_cell2.c1"&~"t.a.ack_cell2.c2"->"t.a.ack_cell2._y"+
|
||||
"t.a.ack_cell2.c1"&"t.a.ack_cell2.c2"->"t.a.ack_cell2._y"-
|
||||
"t.a.ack_cell2._y"->"t.a.ack_cell2.y"-
|
||||
~("t.a.ack_cell2._y")->"t.a.ack_cell2.y"+
|
||||
"t.a.or_cell.a"|"t.a.or_cell.b"->"t.a.or_cell._y"-
|
||||
~("t.a.or_cell.a"|"t.a.or_cell.b")->"t.a.or_cell._y"+
|
||||
"t.a.or_cell._y"->"t.a.or_cell.y"-
|
||||
~("t.a.or_cell._y")->"t.a.or_cell.y"+
|
||||
= "t.a.out.d.d[0]" "t.a.out.r"
|
||||
= "t.a.out.a" "t.a.ack_cell2.c1"
|
||||
= "t.a.out.a" "t.a.ack_cell1.c1"
|
||||
= "t.a.out.d.d[0]" "t.a.or_cell.y"
|
||||
= "t.a.out.d.d[0]" "t.a.out.r"
|
||||
= "t.a._y2_arb" "t.a.arbiter.y2"
|
||||
= "t.a._y2_arb" "t.a.or_cell.b"
|
||||
= "t.a._y2_arb" "t.a.ack_cell2.c2"
|
||||
= "Vdd" "t.a.supply.vdd"
|
||||
= "GND" "t.a.supply.vss"
|
||||
= "t.in1.d.d[0]" "t.in1.r"
|
||||
= "t.in1.r" "t.a.in1.r"
|
||||
= "t.in1.a" "t.a.in1.a"
|
||||
= "t.in1.d.d[0]" "t.a.in1.d.d[0]"
|
||||
= "t.in1.d.d[0]" "t.in1.r"
|
||||
= "t.out.d.d[0]" "t.out.r"
|
||||
= "t.out.r" "t.a.out.r"
|
||||
= "t.out.a" "t.a.out.a"
|
||||
= "t.out.d.d[0]" "t.a.out.d.d[0]"
|
||||
= "t.out.d.d[0]" "t.out.r"
|
||||
= "t.in2.d.d[0]" "t.in2.r"
|
||||
= "t.in2.r" "t.a.in2.r"
|
||||
= "t.in2.a" "t.a.in2.a"
|
||||
= "t.in2.d.d[0]" "t.a.in2.d.d[0]"
|
||||
= "t.in2.d.d[0]" "t.in2.r"
|
||||
41
test/unit_tests/arbiter_handshake/test.act
Normal file
41
test/unit_tests/arbiter_handshake/test.act
Normal file
@ -0,0 +1,41 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/primitives.act";
|
||||
import globals;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
defproc arbiter_test(a1of1 in1; a1of1 in2; a1of1 out)
|
||||
{
|
||||
arbiter_handshake a(.in1 = in1, .in2 = in2, .out = out);
|
||||
a.supply.vdd = Vdd;
|
||||
a.supply.vss = GND;
|
||||
}
|
||||
|
||||
arbiter_test t;
|
||||
42
test/unit_tests/arbiter_handshake/test.prsim
Normal file
42
test/unit_tests/arbiter_handshake/test.prsim
Normal file
@ -0,0 +1,42 @@
|
||||
watchall
|
||||
system "echo '[0] code starts'"
|
||||
set t.in1.r 0
|
||||
set t.in2.r 0
|
||||
set t.out.a 0
|
||||
cycle
|
||||
status X
|
||||
mode run
|
||||
system "echo '[1] reset done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
set t.in1.r 1
|
||||
cycle
|
||||
assert t.out.r 1
|
||||
set t.out.a 1
|
||||
cycle
|
||||
assert t.in1.a 1
|
||||
system "echo '[2] test in1 done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
set t.in1.r 0
|
||||
cycle
|
||||
assert t.out.r 0
|
||||
set t.out.a 0
|
||||
cycle
|
||||
assert t.in1.a 0
|
||||
system "echo '[3] reset done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
set t.in2.r 1
|
||||
cycle
|
||||
assert t.out.r 1
|
||||
set t.out.a 1
|
||||
cycle
|
||||
assert t.in2.a 1
|
||||
system "echo '[4] test in2 done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
set t.in2.r 0
|
||||
cycle
|
||||
assert t.out.r 0
|
||||
set t.out.a 0
|
||||
cycle
|
||||
assert t.in2.a 0
|
||||
system "echo '[5] reset done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
29
test/unit_tests/buffer_token/run/prsim.out
Normal file
29
test/unit_tests/buffer_token/run/prsim.out
Normal file
@ -0,0 +1,29 @@
|
||||
t.a._out_a_B t.in.r t.in.a t.out.r t.a._en t.a.inack_ctl._y t.out.a t.a.buf_func._y
|
||||
[0] code starts
|
||||
7093 t.in.r : 0
|
||||
7093 t.out.a : 0
|
||||
17560 t.a._out_a_B : 1 [by t.out.a:=0]
|
||||
17560 Reset : 0
|
||||
17562 t.a.reset_buf._y : 1 [by Reset:=0]
|
||||
22315 t.a._reset_BX : 0 [by t.a.reset_buf._y:=1]
|
||||
22429 t.a.inack_ctl._y : 1 [by t.a._reset_BX:=0]
|
||||
23452 t.a.buf_func._y : 1 [by t.a._reset_BX:=0]
|
||||
25178 t.out.r : 0 [by t.a.buf_func._y:=1]
|
||||
87795 t.in.a : 0 [by t.a.inack_ctl._y:=1]
|
||||
87834 t.a._en : 1 [by t.in.a:=0]
|
||||
|
||||
87834 Reset : 1
|
||||
87849 t.a.reset_buf._y : 0 [by Reset:=1]
|
||||
88340 t.a._reset_BX : 1 [by t.a.reset_buf._y:=0]
|
||||
[1] reset done
|
||||
----------------------------------------------------------------------------------------------------
|
||||
88340 t.in.r : 1
|
||||
88353 t.a.buf_func._y : 0 [by t.in.r:=1]
|
||||
88393 t.out.r : 1 [by t.a.buf_func._y:=0]
|
||||
88808 t.a.inack_ctl._y : 0 [by t.out.r:=1]
|
||||
88828 t.in.a : 1 [by t.a.inack_ctl._y:=0]
|
||||
94889 t.a._en : 0 [by t.in.a:=1]
|
||||
94889 t.out.a : 1
|
||||
94936 t.a._out_a_B : 0 [by t.out.a:=1]
|
||||
94952 t.a.buf_func._y : 1 [by t.a._out_a_B:=0]
|
||||
139050 t.out.r : 0 [by t.a.buf_func._y:=1]
|
||||
43
test/unit_tests/buffer_token/test.act
Normal file
43
test/unit_tests/buffer_token/test.act
Normal file
@ -0,0 +1,43 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/primitives.act";
|
||||
import globals;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
defproc buffer_token_test(a1of1 in; a1of1 out)
|
||||
{
|
||||
buffer_t a(.in = in, .out = out);
|
||||
a.supply.vdd = Vdd;
|
||||
a.supply.vss = GND;
|
||||
a.reset_B = Reset;
|
||||
|
||||
}
|
||||
|
||||
buffer_token_test t;
|
||||
20
test/unit_tests/buffer_token/test.prsim
Normal file
20
test/unit_tests/buffer_token/test.prsim
Normal file
@ -0,0 +1,20 @@
|
||||
watchall
|
||||
system "echo '[0] code starts'"
|
||||
set t.in.r 0
|
||||
set t.out.a 0
|
||||
cycle
|
||||
set Reset 0
|
||||
cycle
|
||||
status X
|
||||
mode run
|
||||
set Reset 1
|
||||
cycle
|
||||
system "echo '[1] reset done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
assert t.out.r 1
|
||||
set t.out.a 1
|
||||
cycle
|
||||
assert t.in.a 1
|
||||
|
||||
330
test/unit_tests/demux_7/run/prsim.out
Normal file
330
test/unit_tests/demux_7/run/prsim.out
Normal file
@ -0,0 +1,330 @@
|
||||
my_demux.my_demux._c_f_buf[0] my_demux.my_demux._out1_a_BX_f[0] my_demux.my_demux.out1_f_buf_func[1].n1 my_demux.my_demux._en my_demux.my_demux._en2_X_t[0] my_demux.my_demux.vc.OR2_tf[2]._y my_demux.my_demux.out1_f_buf_func[5].n1 my_demux.my_demux.out1_t_buf_func[2].n1 my_demux.my_demux._c_t_buf[0] my_demux.my_demux._out2_a_BX_t[0] my_demux.my_demux.out1_f_buf_func[6].n1 my_demux.my_demux.out1_t_buf_func[4].n1 my_demux.my_demux._out1_a_B my_demux.my_demux.vc.tmp[9] my_demux.my_demux._out1_a_BX_t[0] my_demux.my_demux._en1_X_t[0] my_demux.my_demux.c_buf_f.in my_demux.my_demux.vc.tmp[7] my_demux.my_demux._out2_a_BX_f[0] my_demux.my_demux._en2_X_f[0] my_demux.my_demux.c_buf_t.in my_demux.my_demux.out1_t_buf_func[1].n1 my_demux.my_demux.out1_f_buf_func[0].n1 my_demux.out1.a my_demux.my_demux.out1_t_buf_func[0].n1 my_demux.my_demux.out1_f_buf_func[2].n1 my_demux.my_demux.c_buf_t.buf2._y my_demux.my_demux.vc.C2Els[1]._y my_demux.my_demux._en1_X_f[0] my_demux.my_demux.out1_f_buf_func[4].n1 my_demux.my_demux.vc.tmp[6] my_demux.my_demux.vc.tmp[1] my_demux.my_demux.out_or._y my_demux.my_demux.out1_f_buf_func[3].n1 my_demux.my_demux.vc.OR2_tf[5]._y my_demux.my_demux.vc.OR2_tf[0]._y my_demux.my_demux.out1_t_buf_func[3].n1 my_demux.my_demux.vc.C2Els[0]._y my_demux.my_demux.out1_t_buf_func[6].n1 my_demux.my_demux.vc.tmp[8] my_demux.my_demux._c_v my_demux.out2.a my_demux.my_demux.out2_a_B_buf_t.buf2._y my_demux.my_demux.out1_t_buf_func[5].n1 my_demux.my_demux._in_c_v_ my_demux.out2.v my_demux.my_demux._in_v my_demux.my_demux.vc.tmp[4] my_demux.my_demux.out1_en_buf_f.buf2._y my_demux.my_demux.out2_en_buf_f.buf2._y my_demux.my_demux.vc.tmp[0] my_demux.my_demux.vc.OR2_tf[3]._y my_demux.my_demux._out2_a_B my_demux.my_demux.vc.tmp[5] my_demux.out1.v my_demux.my_demux.c_buf_f.buf2._y my_demux.my_demux.out1_a_B_buf_t.buf2._y my_demux.my_demux._out_v my_demux.my_demux.vc.C3Els[0]._y my_demux.in.v my_demux.my_demux.vc.C3Els[1]._y my_demux.my_demux.out2_en_buf_t.buf2._y my_demux.my_demux.out2_a_B_buf_f.buf2._y my_demux.my_demux.in_v_buf._y my_demux.my_demux.vc.tmp[3] my_demux.my_demux.vc.OR2_tf[1]._y my_demux.my_demux.vc.OR2_tf[6]._y my_demux.my_demux.vc.tmp[2] my_demux.my_demux.out1_a_B_buf_f.buf2._y my_demux.my_demux.c_f_c_t_or._y my_demux.my_demux.out1_en_buf_t.buf2._y my_demux.my_demux.vc.OR2_tf[4]._y my_demux.my_demux.c_el._y
|
||||
119199 my_demux.my_demux.out1_f_buf_func[0].n1 : 0
|
||||
119199 my_demux.my_demux.c_buf_f.in : 0
|
||||
119199 my_demux.my_demux.c_buf_t.in : 0
|
||||
119199 my_demux.my_demux.out1_f_buf_func[1].n1 : 0
|
||||
119199 my_demux.my_demux.out1_f_buf_func[3].n1 : 0
|
||||
119199 my_demux.out1.a : 0
|
||||
119199 my_demux.out2.v : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[6].n1 : 0
|
||||
119199 my_demux.out2.a : 0
|
||||
119199 my_demux.out1.v : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[2].n1 : 0
|
||||
119199 my_demux.my_demux.out1_f_buf_func[6].n1 : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[5].n1 : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
|
||||
119199 my_demux.my_demux.out1_f_buf_func[2].n1 : 0
|
||||
119199 my_demux.my_demux.out1_f_buf_func[5].n1 : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[4].n1 : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
|
||||
119199 my_demux.my_demux.out1_f_buf_func[4].n1 : 0
|
||||
119199 my_demux.my_demux.out1_t_buf_func[3].n1 : 0
|
||||
119200 my_demux.my_demux.c_buf_f.buf2._y : 1 [by my_demux.my_demux.c_buf_f.in:=0]
|
||||
119200 my_demux.my_demux.vc.OR2_tf[5]._y : 1 [by my_demux.my_demux.out1_f_buf_func[5].n1:=0]
|
||||
119236 my_demux.my_demux.c_buf_t.buf2._y : 1 [by my_demux.my_demux.c_buf_t.in:=0]
|
||||
119239 my_demux.my_demux.out_or._y : 1 [by my_demux.out1.v:=0]
|
||||
119286 my_demux.my_demux.vc.OR2_tf[0]._y : 1 [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
|
||||
119311 my_demux.my_demux._out1_a_B : 1 [by my_demux.out1.a:=0]
|
||||
119333 my_demux.my_demux.out1_a_B_buf_f.buf2._y : 0 [by my_demux.my_demux._out1_a_B:=1]
|
||||
119378 my_demux.my_demux.vc.tmp[5] : 0 [by my_demux.my_demux.vc.OR2_tf[5]._y:=1]
|
||||
119403 my_demux.my_demux._out_v : 0 [by my_demux.my_demux.out_or._y:=1]
|
||||
119456 my_demux.my_demux.vc.OR2_tf[6]._y : 1 [by my_demux.my_demux.out1_f_buf_func[6].n1:=0]
|
||||
119493 my_demux.my_demux.vc.OR2_tf[2]._y : 1 [by my_demux.my_demux.out1_f_buf_func[2].n1:=0]
|
||||
119536 my_demux.my_demux._en : 1 [by my_demux.my_demux._out_v:=0]
|
||||
119543 my_demux.my_demux.out2_en_buf_t.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
119566 my_demux.my_demux.out1_en_buf_f.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
119757 my_demux.my_demux.out1_en_buf_t.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
119790 my_demux.my_demux._c_f_buf[0] : 0 [by my_demux.my_demux.c_buf_f.buf2._y:=1]
|
||||
119848 my_demux.my_demux._en1_X_t[0] : 1 [by my_demux.my_demux.out1_en_buf_t.buf2._y:=0]
|
||||
119852 my_demux.my_demux.vc.tmp[2] : 0 [by my_demux.my_demux.vc.OR2_tf[2]._y:=1]
|
||||
119938 my_demux.my_demux.c_f_c_t_or._y : 1 [by my_demux.my_demux.c_buf_t.in:=0]
|
||||
120039 my_demux.my_demux._c_t_buf[0] : 0 [by my_demux.my_demux.c_buf_t.buf2._y:=1]
|
||||
120158 my_demux.my_demux.out1_a_B_buf_t.buf2._y : 0 [by my_demux.my_demux._out1_a_B:=1]
|
||||
120165 my_demux.my_demux._out1_a_BX_f[0] : 1 [by my_demux.my_demux.out1_a_B_buf_t.buf2._y:=0]
|
||||
120408 my_demux.my_demux.vc.OR2_tf[3]._y : 1 [by my_demux.my_demux.out1_t_buf_func[3].n1:=0]
|
||||
121005 my_demux.my_demux.vc.OR2_tf[1]._y : 1 [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
|
||||
121111 my_demux.my_demux.vc.tmp[1] : 0 [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
|
||||
121206 my_demux.my_demux.vc.OR2_tf[4]._y : 1 [by my_demux.my_demux.out1_f_buf_func[4].n1:=0]
|
||||
121284 my_demux.my_demux.vc.tmp[4] : 0 [by my_demux.my_demux.vc.OR2_tf[4]._y:=1]
|
||||
121481 my_demux.my_demux.vc.tmp[0] : 0 [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
|
||||
121756 my_demux.my_demux.vc.C2Els[0]._y : 1 [by my_demux.my_demux.vc.tmp[0]:=0]
|
||||
122127 my_demux.my_demux._c_v : 0 [by my_demux.my_demux.c_f_c_t_or._y:=1]
|
||||
123195 my_demux.my_demux.vc.tmp[3] : 0 [by my_demux.my_demux.vc.OR2_tf[3]._y:=1]
|
||||
123650 my_demux.my_demux.vc.C2Els[1]._y : 1 [by my_demux.my_demux.vc.tmp[3]:=0]
|
||||
123662 my_demux.my_demux.vc.tmp[8] : 0 [by my_demux.my_demux.vc.C2Els[1]._y:=1]
|
||||
126256 my_demux.my_demux._en2_X_t[0] : 1 [by my_demux.my_demux.out2_en_buf_t.buf2._y:=0]
|
||||
133652 my_demux.my_demux.out2_en_buf_f.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
134056 my_demux.my_demux._en2_X_f[0] : 1 [by my_demux.my_demux.out2_en_buf_f.buf2._y:=0]
|
||||
135118 my_demux.my_demux.vc.tmp[6] : 0 [by my_demux.my_demux.vc.OR2_tf[6]._y:=1]
|
||||
135130 my_demux.my_demux.vc.C3Els[0]._y : 1 [by my_demux.my_demux.vc.tmp[6]:=0]
|
||||
140752 my_demux.my_demux.vc.tmp[7] : 0 [by my_demux.my_demux.vc.C2Els[0]._y:=1]
|
||||
141046 my_demux.my_demux.vc.tmp[9] : 0 [by my_demux.my_demux.vc.C3Els[0]._y:=1]
|
||||
145322 my_demux.my_demux.vc.C3Els[1]._y : 1 [by my_demux.my_demux.vc.tmp[9]:=0]
|
||||
148221 my_demux.my_demux._in_v : 0 [by my_demux.my_demux.vc.C3Els[1]._y:=1]
|
||||
148223 my_demux.my_demux.c_el._y : 1 [by my_demux.my_demux._in_v:=0]
|
||||
149461 my_demux.my_demux._out1_a_BX_t[0] : 1 [by my_demux.my_demux.out1_a_B_buf_f.buf2._y:=0]
|
||||
152516 my_demux.my_demux.in_v_buf._y : 1 [by my_demux.my_demux._in_v:=0]
|
||||
152758 my_demux.my_demux._in_c_v_ : 0 [by my_demux.my_demux.c_el._y:=1]
|
||||
153765 my_demux.in.v : 0 [by my_demux.my_demux.in_v_buf._y:=1]
|
||||
166711 my_demux.my_demux._out2_a_B : 1 [by my_demux.out2.a:=0]
|
||||
166877 my_demux.my_demux.out2_a_B_buf_f.buf2._y : 0 [by my_demux.my_demux._out2_a_B:=1]
|
||||
166952 my_demux.my_demux._out2_a_BX_t[0] : 1 [by my_demux.my_demux.out2_a_B_buf_f.buf2._y:=0]
|
||||
170210 my_demux.my_demux.out2_a_B_buf_t.buf2._y : 0 [by my_demux.my_demux._out2_a_B:=1]
|
||||
170555 my_demux.my_demux._out2_a_BX_f[0] : 1 [by my_demux.my_demux.out2_a_B_buf_t.buf2._y:=0]
|
||||
177027 my_demux.my_demux._en1_X_f[0] : 1 [by my_demux.my_demux.out1_en_buf_f.buf2._y:=0]
|
||||
System initialized
|
||||
177027 Reset : 0
|
||||
177165 my_demux._reset_B : 1 [by Reset:=0]
|
||||
182428 my_demux.my_demux.reset_buf._y : 0 [by my_demux._reset_B:=1]
|
||||
182430 my_demux.my_demux._reset_BX : 1 [by my_demux.my_demux.reset_buf._y:=0]
|
||||
226347 my_demux.my_demux.reset_bufarray.buf4._y : 0 [by my_demux.my_demux._reset_BX:=1]
|
||||
226348 my_demux.my_demux._reset_BXX[0] : 1 [by my_demux.my_demux.reset_bufarray.buf4._y:=0]
|
||||
System reset completed
|
||||
|
||||
Output neutral checked
|
||||
226348 my_demux.my_demux.c_buf_t.in : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[6].n1 : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[1].n1 : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[5].n1 : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[4].n1 : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[0].n1 : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[3].n1 : 1
|
||||
226348 my_demux.my_demux.out1_t_buf_func[2].n1 : 1
|
||||
226359 my_demux.my_demux.c_f_c_t_or._y : 0 [by my_demux.my_demux.c_buf_t.in:=1]
|
||||
226364 my_demux.my_demux.vc.OR2_tf[4]._y : 0 [by my_demux.my_demux.out1_t_buf_func[4].n1:=1]
|
||||
226415 my_demux.my_demux.vc.OR2_tf[1]._y : 0 [by my_demux.my_demux.out1_t_buf_func[1].n1:=1]
|
||||
226718 my_demux.my_demux.vc.OR2_tf[6]._y : 0 [by my_demux.my_demux.out1_t_buf_func[6].n1:=1]
|
||||
226720 my_demux.my_demux.vc.tmp[6] : 1 [by my_demux.my_demux.vc.OR2_tf[6]._y:=0]
|
||||
226876 my_demux.my_demux.vc.OR2_tf[3]._y : 0 [by my_demux.my_demux.out1_t_buf_func[3].n1:=1]
|
||||
226896 my_demux.my_demux.c_buf_t.buf2._y : 0 [by my_demux.my_demux.c_buf_t.in:=1]
|
||||
226899 my_demux.my_demux._c_t_buf[0] : 1 [by my_demux.my_demux.c_buf_t.buf2._y:=0]
|
||||
226928 my_demux.my_demux.out1_t_buf_func[0]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
226929 my_demux.my_demux.out1_t_buf_func[0].y : 1 [by my_demux.my_demux.out1_t_buf_func[0]._y:=0]
|
||||
226943 my_demux.my_demux.out1_t_buf_func[4]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
227052 my_demux.my_demux.out1_t_buf_func[3]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
227074 my_demux.my_demux.out1_t_buf_func[3].y : 1 [by my_demux.my_demux.out1_t_buf_func[3]._y:=0]
|
||||
227160 my_demux.my_demux.out1_t_buf_func[4].y : 1 [by my_demux.my_demux.out1_t_buf_func[4]._y:=0]
|
||||
227216 my_demux.my_demux.out1_t_buf_func[1]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
227217 my_demux.my_demux.out1_t_buf_func[1].y : 1 [by my_demux.my_demux.out1_t_buf_func[1]._y:=0]
|
||||
228500 my_demux.my_demux.out1_t_buf_func[2]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
228783 my_demux.my_demux.vc.OR2_tf[2]._y : 0 [by my_demux.my_demux.out1_t_buf_func[2].n1:=1]
|
||||
228989 my_demux.my_demux.vc.OR2_tf[5]._y : 0 [by my_demux.my_demux.out1_t_buf_func[5].n1:=1]
|
||||
229148 my_demux.my_demux.vc.tmp[5] : 1 [by my_demux.my_demux.vc.OR2_tf[5]._y:=0]
|
||||
229660 my_demux.my_demux.out1_t_buf_func[5]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
230081 my_demux.my_demux.out1_t_buf_func[2].y : 1 [by my_demux.my_demux.out1_t_buf_func[2]._y:=0]
|
||||
230910 my_demux.my_demux.vc.OR2_tf[0]._y : 0 [by my_demux.my_demux.out1_t_buf_func[0].n1:=1]
|
||||
232197 my_demux.my_demux.vc.tmp[0] : 1 [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
|
||||
238128 my_demux.my_demux.vc.tmp[2] : 1 [by my_demux.my_demux.vc.OR2_tf[2]._y:=0]
|
||||
239456 my_demux.my_demux.vc.tmp[1] : 1 [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
|
||||
240582 my_demux.my_demux.out1_t_buf_func[6]._y : 0 [by my_demux.my_demux._c_t_buf[0]:=1]
|
||||
240727 my_demux.my_demux.out1_t_buf_func[6].y : 1 [by my_demux.my_demux.out1_t_buf_func[6]._y:=0]
|
||||
241688 my_demux.my_demux.vc.C2Els[0]._y : 0 [by my_demux.my_demux.vc.tmp[1]:=1]
|
||||
244520 my_demux.my_demux.vc.tmp[7] : 1 [by my_demux.my_demux.vc.C2Els[0]._y:=0]
|
||||
249336 my_demux.my_demux.out1_t_buf_func[5].y : 1 [by my_demux.my_demux.out1_t_buf_func[5]._y:=0]
|
||||
250289 my_demux.my_demux.vc.tmp[4] : 1 [by my_demux.my_demux.vc.OR2_tf[4]._y:=0]
|
||||
253239 my_demux.my_demux._c_v : 1 [by my_demux.my_demux.c_f_c_t_or._y:=0]
|
||||
256643 my_demux.my_demux.vc.C3Els[0]._y : 0 [by my_demux.my_demux.vc.tmp[4]:=1]
|
||||
256644 my_demux.my_demux.vc.tmp[9] : 1 [by my_demux.my_demux.vc.C3Els[0]._y:=0]
|
||||
287834 my_demux.my_demux.vc.tmp[3] : 1 [by my_demux.my_demux.vc.OR2_tf[3]._y:=0]
|
||||
327118 my_demux.my_demux.vc.C2Els[1]._y : 0 [by my_demux.my_demux.vc.tmp[3]:=1]
|
||||
327280 my_demux.my_demux.vc.tmp[8] : 1 [by my_demux.my_demux.vc.C2Els[1]._y:=0]
|
||||
334649 my_demux.my_demux.vc.C3Els[1]._y : 0 [by my_demux.my_demux.vc.tmp[8]:=1]
|
||||
334663 my_demux.my_demux._in_v : 1 [by my_demux.my_demux.vc.C3Els[1]._y:=0]
|
||||
334670 my_demux.my_demux.in_v_buf._y : 0 [by my_demux.my_demux._in_v:=1]
|
||||
334823 my_demux.my_demux.c_el._y : 0 [by my_demux.my_demux._in_v:=1]
|
||||
334824 my_demux.my_demux._in_c_v_ : 1 [by my_demux.my_demux.c_el._y:=0]
|
||||
356227 my_demux.in.v : 1 [by my_demux.my_demux.in_v_buf._y:=0]
|
||||
356227 my_demux.out1.v : 1
|
||||
356228 my_demux.my_demux.out_or._y : 0 [by my_demux.out1.v:=1]
|
||||
356229 my_demux.my_demux._out_v : 1 [by my_demux.my_demux.out_or._y:=0]
|
||||
358472 my_demux.my_demux.inack_ctl._y : 0 [by my_demux.my_demux._out_v:=1]
|
||||
358659 my_demux.in.a : 1 [by my_demux.my_demux.inack_ctl._y:=0]
|
||||
358660 my_demux.my_demux._en : 0 [by my_demux.in.a:=1]
|
||||
358661 my_demux.my_demux.out2_en_buf_t.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
358666 my_demux.my_demux._en2_X_t[0] : 0 [by my_demux.my_demux.out2_en_buf_t.buf2._y:=1]
|
||||
359513 my_demux.my_demux.out1_en_buf_f.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
360404 my_demux.my_demux._en1_X_f[0] : 0 [by my_demux.my_demux.out1_en_buf_f.buf2._y:=1]
|
||||
362842 my_demux.my_demux.out2_en_buf_f.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
362843 my_demux.my_demux._en2_X_f[0] : 0 [by my_demux.my_demux.out2_en_buf_f.buf2._y:=1]
|
||||
393442 my_demux.my_demux.out1_en_buf_t.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
393459 my_demux.my_demux._en1_X_t[0] : 0 [by my_demux.my_demux.out1_en_buf_t.buf2._y:=1]
|
||||
393459 my_demux.my_demux.out1_t_buf_func[0].n1 : 0
|
||||
393459 my_demux.my_demux.out1_t_buf_func[6].n1 : 0
|
||||
393459 my_demux.my_demux.out1_t_buf_func[2].n1 : 0
|
||||
393459 my_demux.my_demux.out1_t_buf_func[5].n1 : 0
|
||||
393459 my_demux.my_demux.out1_t_buf_func[1].n1 : 0
|
||||
393459 my_demux.my_demux.out1_t_buf_func[4].n1 : 0
|
||||
393459 my_demux.my_demux.out1_t_buf_func[3].n1 : 0
|
||||
393460 my_demux.my_demux.vc.OR2_tf[4]._y : 1 [by my_demux.my_demux.out1_t_buf_func[4].n1:=0]
|
||||
393462 my_demux.my_demux.vc.OR2_tf[2]._y : 1 [by my_demux.my_demux.out1_t_buf_func[2].n1:=0]
|
||||
393501 my_demux.my_demux.vc.OR2_tf[3]._y : 1 [by my_demux.my_demux.out1_t_buf_func[3].n1:=0]
|
||||
393596 my_demux.my_demux.vc.tmp[3] : 0 [by my_demux.my_demux.vc.OR2_tf[3]._y:=1]
|
||||
394400 my_demux.my_demux.vc.OR2_tf[5]._y : 1 [by my_demux.my_demux.out1_t_buf_func[5].n1:=0]
|
||||
394735 my_demux.my_demux.vc.tmp[5] : 0 [by my_demux.my_demux.vc.OR2_tf[5]._y:=1]
|
||||
396032 my_demux.my_demux.vc.OR2_tf[0]._y : 1 [by my_demux.my_demux.out1_t_buf_func[0].n1:=0]
|
||||
396040 my_demux.my_demux.vc.tmp[0] : 0 [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
|
||||
396277 my_demux.my_demux.vc.tmp[4] : 0 [by my_demux.my_demux.vc.OR2_tf[4]._y:=1]
|
||||
401820 my_demux.my_demux.vc.OR2_tf[6]._y : 1 [by my_demux.my_demux.out1_t_buf_func[6].n1:=0]
|
||||
401854 my_demux.my_demux.vc.tmp[6] : 0 [by my_demux.my_demux.vc.OR2_tf[6]._y:=1]
|
||||
407195 my_demux.my_demux.vc.tmp[2] : 0 [by my_demux.my_demux.vc.OR2_tf[2]._y:=1]
|
||||
408113 my_demux.my_demux.vc.C2Els[1]._y : 1 [by my_demux.my_demux.vc.tmp[2]:=0]
|
||||
408117 my_demux.my_demux.vc.tmp[8] : 0 [by my_demux.my_demux.vc.C2Els[1]._y:=1]
|
||||
415741 my_demux.my_demux.vc.C3Els[0]._y : 1 [by my_demux.my_demux.vc.tmp[6]:=0]
|
||||
452421 my_demux.my_demux.vc.OR2_tf[1]._y : 1 [by my_demux.my_demux.out1_t_buf_func[1].n1:=0]
|
||||
454819 my_demux.my_demux.vc.tmp[1] : 0 [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
|
||||
458034 my_demux.my_demux.vc.C2Els[0]._y : 1 [by my_demux.my_demux.vc.tmp[1]:=0]
|
||||
462119 my_demux.my_demux.vc.tmp[9] : 0 [by my_demux.my_demux.vc.C3Els[0]._y:=1]
|
||||
505153 my_demux.my_demux.vc.tmp[7] : 0 [by my_demux.my_demux.vc.C2Els[0]._y:=1]
|
||||
505201 my_demux.my_demux.vc.C3Els[1]._y : 1 [by my_demux.my_demux.vc.tmp[7]:=0]
|
||||
505204 my_demux.my_demux._in_v : 0 [by my_demux.my_demux.vc.C3Els[1]._y:=1]
|
||||
505382 my_demux.my_demux.in_v_buf._y : 1 [by my_demux.my_demux._in_v:=0]
|
||||
526359 my_demux.in.v : 0 [by my_demux.my_demux.in_v_buf._y:=1]
|
||||
First Cond Checked
|
||||
526359 my_demux.out1.a : 1
|
||||
538258 my_demux.my_demux._out1_a_B : 0 [by my_demux.out1.a:=1]
|
||||
544209 my_demux.my_demux.out1_a_B_buf_f.buf2._y : 1 [by my_demux.my_demux._out1_a_B:=0]
|
||||
545036 my_demux.my_demux._out1_a_BX_t[0] : 0 [by my_demux.my_demux.out1_a_B_buf_f.buf2._y:=1]
|
||||
545037 my_demux.my_demux.out1_t_buf_func[2]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
545040 my_demux.my_demux.out1_t_buf_func[4]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
545041 my_demux.my_demux.out1_t_buf_func[4].y : 0 [by my_demux.my_demux.out1_t_buf_func[4]._y:=1]
|
||||
545109 my_demux.my_demux.out1_t_buf_func[3]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
545132 my_demux.my_demux.out1_t_buf_func[6]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
545173 my_demux.my_demux.out1_t_buf_func[2].y : 0 [by my_demux.my_demux.out1_t_buf_func[2]._y:=1]
|
||||
545209 my_demux.my_demux.out1_t_buf_func[0]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
545220 my_demux.my_demux.out1_t_buf_func[1]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
545232 my_demux.my_demux.out1_t_buf_func[1].y : 0 [by my_demux.my_demux.out1_t_buf_func[1]._y:=1]
|
||||
545373 my_demux.my_demux.out1_t_buf_func[6].y : 0 [by my_demux.my_demux.out1_t_buf_func[6]._y:=1]
|
||||
549168 my_demux.my_demux.out1_t_buf_func[0].y : 0 [by my_demux.my_demux.out1_t_buf_func[0]._y:=1]
|
||||
564155 my_demux.my_demux.out1_t_buf_func[3].y : 0 [by my_demux.my_demux.out1_t_buf_func[3]._y:=1]
|
||||
577743 my_demux.my_demux.out1_a_B_buf_t.buf2._y : 1 [by my_demux.my_demux._out1_a_B:=0]
|
||||
581643 my_demux.my_demux._out1_a_BX_f[0] : 0 [by my_demux.my_demux.out1_a_B_buf_t.buf2._y:=1]
|
||||
582324 my_demux.my_demux.out1_t_buf_func[5]._y : 1 [by my_demux.my_demux._out1_a_BX_t[0]:=0]
|
||||
583353 my_demux.my_demux.out1_t_buf_func[5].y : 0 [by my_demux.my_demux.out1_t_buf_func[5]._y:=1]
|
||||
System reset completed
|
||||
|
||||
Output neutral checked
|
||||
583353 my_demux.my_demux.c_buf_t.in : 0
|
||||
583353 my_demux.out1.v : 0
|
||||
583353 my_demux.out1.a : 0
|
||||
583354 my_demux.my_demux.c_buf_t.buf2._y : 1 [by my_demux.my_demux.c_buf_t.in:=0]
|
||||
583354 my_demux.my_demux._out1_a_B : 1 [by my_demux.out1.a:=0]
|
||||
583355 my_demux.my_demux.out1_a_B_buf_t.buf2._y : 0 [by my_demux.my_demux._out1_a_B:=1]
|
||||
583391 my_demux.my_demux._c_t_buf[0] : 0 [by my_demux.my_demux.c_buf_t.buf2._y:=1]
|
||||
583409 my_demux.my_demux.c_f_c_t_or._y : 1 [by my_demux.my_demux.c_buf_t.in:=0]
|
||||
585101 my_demux.my_demux._c_v : 0 [by my_demux.my_demux.c_f_c_t_or._y:=1]
|
||||
585114 my_demux.my_demux.c_el._y : 1 [by my_demux.my_demux._c_v:=0]
|
||||
586919 my_demux.my_demux._out1_a_BX_f[0] : 1 [by my_demux.my_demux.out1_a_B_buf_t.buf2._y:=0]
|
||||
602098 my_demux.my_demux._in_c_v_ : 0 [by my_demux.my_demux.c_el._y:=1]
|
||||
606729 my_demux.my_demux.out1_a_B_buf_f.buf2._y : 0 [by my_demux.my_demux._out1_a_B:=1]
|
||||
607086 my_demux.my_demux._out1_a_BX_t[0] : 1 [by my_demux.my_demux.out1_a_B_buf_f.buf2._y:=0]
|
||||
628359 my_demux.my_demux.out_or._y : 1 [by my_demux.out1.v:=0]
|
||||
628384 my_demux.my_demux._out_v : 0 [by my_demux.my_demux.out_or._y:=1]
|
||||
628405 my_demux.my_demux.inack_ctl._y : 1 [by my_demux.my_demux._out_v:=0]
|
||||
628406 my_demux.in.a : 0 [by my_demux.my_demux.inack_ctl._y:=1]
|
||||
638054 my_demux.my_demux._en : 1 [by my_demux.in.a:=0]
|
||||
638055 my_demux.my_demux.out2_en_buf_f.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
638055 my_demux.my_demux.out1_en_buf_t.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
638060 my_demux.my_demux._en2_X_f[0] : 1 [by my_demux.my_demux.out2_en_buf_f.buf2._y:=0]
|
||||
638215 my_demux.my_demux.out2_en_buf_t.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
638623 my_demux.my_demux._en2_X_t[0] : 1 [by my_demux.my_demux.out2_en_buf_t.buf2._y:=0]
|
||||
638636 my_demux.my_demux._en1_X_t[0] : 1 [by my_demux.my_demux.out1_en_buf_t.buf2._y:=0]
|
||||
639091 my_demux.my_demux.out1_en_buf_f.buf2._y : 0 [by my_demux.my_demux._en:=1]
|
||||
639102 my_demux.my_demux._en1_X_f[0] : 1 [by my_demux.my_demux.out1_en_buf_f.buf2._y:=0]
|
||||
639102 my_demux.my_demux.c_buf_f.in : 1
|
||||
639102 my_demux.my_demux.out1_t_buf_func[6].n1 : 1
|
||||
639102 my_demux.my_demux.out1_f_buf_func[1].n1 : 1
|
||||
639102 my_demux.my_demux.out1_t_buf_func[5].n1 : 1
|
||||
639102 my_demux.my_demux.out1_f_buf_func[4].n1 : 1
|
||||
639102 my_demux.my_demux.out1_f_buf_func[0].n1 : 1
|
||||
639102 my_demux.my_demux.out1_f_buf_func[3].n1 : 1
|
||||
639102 my_demux.my_demux.out1_t_buf_func[2].n1 : 1
|
||||
639106 my_demux.my_demux.vc.OR2_tf[1]._y : 0 [by my_demux.my_demux.out1_f_buf_func[1].n1:=1]
|
||||
639116 my_demux.my_demux.c_buf_f.buf2._y : 0 [by my_demux.my_demux.c_buf_f.in:=1]
|
||||
639120 my_demux.my_demux.vc.OR2_tf[6]._y : 0 [by my_demux.my_demux.out1_t_buf_func[6].n1:=1]
|
||||
639190 my_demux.my_demux.vc.tmp[6] : 1 [by my_demux.my_demux.vc.OR2_tf[6]._y:=0]
|
||||
639206 my_demux.my_demux.vc.OR2_tf[5]._y : 0 [by my_demux.my_demux.out1_t_buf_func[5].n1:=1]
|
||||
639330 my_demux.my_demux.vc.OR2_tf[2]._y : 0 [by my_demux.my_demux.out1_t_buf_func[2].n1:=1]
|
||||
639341 my_demux.my_demux.vc.tmp[2] : 1 [by my_demux.my_demux.vc.OR2_tf[2]._y:=0]
|
||||
639949 my_demux.my_demux.vc.tmp[1] : 1 [by my_demux.my_demux.vc.OR2_tf[1]._y:=0]
|
||||
640149 my_demux.my_demux.c_f_c_t_or._y : 0 [by my_demux.my_demux.c_buf_f.in:=1]
|
||||
640152 my_demux.my_demux._c_v : 1 [by my_demux.my_demux.c_f_c_t_or._y:=0]
|
||||
640306 my_demux.my_demux.vc.OR2_tf[0]._y : 0 [by my_demux.my_demux.out1_f_buf_func[0].n1:=1]
|
||||
640360 my_demux.my_demux.vc.tmp[0] : 1 [by my_demux.my_demux.vc.OR2_tf[0]._y:=0]
|
||||
640575 my_demux.my_demux._c_f_buf[0] : 1 [by my_demux.my_demux.c_buf_f.buf2._y:=0]
|
||||
640656 my_demux.my_demux.out2_t_buf_func[6]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
640667 my_demux.my_demux.out2_f_buf_func[3]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
641280 my_demux.my_demux.out2_f_buf_func[3].y : 1 [by my_demux.my_demux.out2_f_buf_func[3]._y:=0]
|
||||
641508 my_demux.my_demux.vc.C2Els[0]._y : 0 [by my_demux.my_demux.vc.tmp[0]:=1]
|
||||
641736 my_demux.my_demux.out2_t_buf_func[2]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
641781 my_demux.my_demux.out2_t_buf_func[2].y : 1 [by my_demux.my_demux.out2_t_buf_func[2]._y:=0]
|
||||
642400 my_demux.my_demux.out2_t_buf_func[6].y : 1 [by my_demux.my_demux.out2_t_buf_func[6]._y:=0]
|
||||
647557 my_demux.my_demux.vc.OR2_tf[3]._y : 0 [by my_demux.my_demux.out1_f_buf_func[3].n1:=1]
|
||||
648554 my_demux.my_demux.vc.tmp[3] : 1 [by my_demux.my_demux.vc.OR2_tf[3]._y:=0]
|
||||
648886 my_demux.my_demux.out2_f_buf_func[4]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
649227 my_demux.my_demux.out2_t_buf_func[5]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
649411 my_demux.my_demux.out2_f_buf_func[4].y : 1 [by my_demux.my_demux.out2_f_buf_func[4]._y:=0]
|
||||
650127 my_demux.my_demux.out2_t_buf_func[5].y : 1 [by my_demux.my_demux.out2_t_buf_func[5]._y:=0]
|
||||
650203 my_demux.my_demux.vc.C2Els[1]._y : 0 [by my_demux.my_demux.vc.tmp[3]:=1]
|
||||
650255 my_demux.my_demux.vc.tmp[8] : 1 [by my_demux.my_demux.vc.C2Els[1]._y:=0]
|
||||
651652 my_demux.my_demux.out2_f_buf_func[0]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
651659 my_demux.my_demux.out2_f_buf_func[0].y : 1 [by my_demux.my_demux.out2_f_buf_func[0]._y:=0]
|
||||
655530 my_demux.my_demux.vc.tmp[7] : 1 [by my_demux.my_demux.vc.C2Els[0]._y:=0]
|
||||
658558 my_demux.my_demux.out2_f_buf_func[1]._y : 0 [by my_demux.my_demux._c_f_buf[0]:=1]
|
||||
670546 my_demux.my_demux.vc.OR2_tf[4]._y : 0 [by my_demux.my_demux.out1_f_buf_func[4].n1:=1]
|
||||
674170 my_demux.my_demux.out2_f_buf_func[1].y : 1 [by my_demux.my_demux.out2_f_buf_func[1]._y:=0]
|
||||
677013 my_demux.my_demux.vc.tmp[4] : 1 [by my_demux.my_demux.vc.OR2_tf[4]._y:=0]
|
||||
689628 my_demux.my_demux.vc.tmp[5] : 1 [by my_demux.my_demux.vc.OR2_tf[5]._y:=0]
|
||||
689630 my_demux.my_demux.vc.C3Els[0]._y : 0 [by my_demux.my_demux.vc.tmp[5]:=1]
|
||||
689984 my_demux.my_demux.vc.tmp[9] : 1 [by my_demux.my_demux.vc.C3Els[0]._y:=0]
|
||||
690117 my_demux.my_demux.vc.C3Els[1]._y : 0 [by my_demux.my_demux.vc.tmp[9]:=1]
|
||||
690118 my_demux.my_demux._in_v : 1 [by my_demux.my_demux.vc.C3Els[1]._y:=0]
|
||||
690122 my_demux.my_demux.in_v_buf._y : 0 [by my_demux.my_demux._in_v:=1]
|
||||
690664 my_demux.my_demux.c_el._y : 0 [by my_demux.my_demux._in_v:=1]
|
||||
690665 my_demux.my_demux._in_c_v_ : 1 [by my_demux.my_demux.c_el._y:=0]
|
||||
735685 my_demux.in.v : 1 [by my_demux.my_demux.in_v_buf._y:=0]
|
||||
735685 my_demux.out2.v : 1
|
||||
748063 my_demux.my_demux.out_or._y : 0 [by my_demux.out2.v:=1]
|
||||
748142 my_demux.my_demux._out_v : 1 [by my_demux.my_demux.out_or._y:=0]
|
||||
750575 my_demux.my_demux.inack_ctl._y : 0 [by my_demux.my_demux._out_v:=1]
|
||||
750663 my_demux.in.a : 1 [by my_demux.my_demux.inack_ctl._y:=0]
|
||||
758445 my_demux.my_demux._en : 0 [by my_demux.in.a:=1]
|
||||
758475 my_demux.my_demux.out2_en_buf_t.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
758504 my_demux.my_demux.out1_en_buf_t.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
759912 my_demux.my_demux.out1_en_buf_f.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
760597 my_demux.my_demux._en1_X_f[0] : 0 [by my_demux.my_demux.out1_en_buf_f.buf2._y:=1]
|
||||
777888 my_demux.my_demux._en1_X_t[0] : 0 [by my_demux.my_demux.out1_en_buf_t.buf2._y:=1]
|
||||
786772 my_demux.my_demux.out2_en_buf_f.buf2._y : 1 [by my_demux.my_demux._en:=0]
|
||||
803487 my_demux.my_demux._en2_X_f[0] : 0 [by my_demux.my_demux.out2_en_buf_f.buf2._y:=1]
|
||||
817979 my_demux.my_demux._en2_X_t[0] : 0 [by my_demux.my_demux.out2_en_buf_t.buf2._y:=1]
|
||||
817979 my_demux.my_demux.out1_f_buf_func[0].n1 : 0
|
||||
817979 my_demux.my_demux.out1_t_buf_func[6].n1 : 0
|
||||
817979 my_demux.my_demux.out1_t_buf_func[2].n1 : 0
|
||||
817979 my_demux.my_demux.out1_t_buf_func[5].n1 : 0
|
||||
817979 my_demux.my_demux.out1_f_buf_func[1].n1 : 0
|
||||
817979 my_demux.my_demux.out1_f_buf_func[4].n1 : 0
|
||||
817979 my_demux.my_demux.out1_f_buf_func[3].n1 : 0
|
||||
817982 my_demux.my_demux.vc.OR2_tf[3]._y : 1 [by my_demux.my_demux.out1_f_buf_func[3].n1:=0]
|
||||
817991 my_demux.my_demux.vc.OR2_tf[5]._y : 1 [by my_demux.my_demux.out1_t_buf_func[5].n1:=0]
|
||||
817992 my_demux.my_demux.vc.tmp[5] : 0 [by my_demux.my_demux.vc.OR2_tf[5]._y:=1]
|
||||
818020 my_demux.my_demux.vc.tmp[3] : 0 [by my_demux.my_demux.vc.OR2_tf[3]._y:=1]
|
||||
818022 my_demux.my_demux.vc.OR2_tf[2]._y : 1 [by my_demux.my_demux.out1_t_buf_func[2].n1:=0]
|
||||
818106 my_demux.my_demux.vc.OR2_tf[0]._y : 1 [by my_demux.my_demux.out1_f_buf_func[0].n1:=0]
|
||||
818148 my_demux.my_demux.vc.OR2_tf[6]._y : 1 [by my_demux.my_demux.out1_t_buf_func[6].n1:=0]
|
||||
818198 my_demux.my_demux.vc.tmp[0] : 0 [by my_demux.my_demux.vc.OR2_tf[0]._y:=1]
|
||||
818212 my_demux.my_demux.vc.OR2_tf[4]._y : 1 [by my_demux.my_demux.out1_f_buf_func[4].n1:=0]
|
||||
818214 my_demux.my_demux.vc.tmp[4] : 0 [by my_demux.my_demux.vc.OR2_tf[4]._y:=1]
|
||||
819258 my_demux.my_demux.vc.OR2_tf[1]._y : 1 [by my_demux.my_demux.out1_f_buf_func[1].n1:=0]
|
||||
819259 my_demux.my_demux.vc.tmp[1] : 0 [by my_demux.my_demux.vc.OR2_tf[1]._y:=1]
|
||||
820760 my_demux.my_demux.vc.C2Els[0]._y : 1 [by my_demux.my_demux.vc.tmp[1]:=0]
|
||||
820762 my_demux.my_demux.vc.tmp[7] : 0 [by my_demux.my_demux.vc.C2Els[0]._y:=1]
|
||||
820875 my_demux.my_demux.vc.tmp[6] : 0 [by my_demux.my_demux.vc.OR2_tf[6]._y:=1]
|
||||
820893 my_demux.my_demux.vc.C3Els[0]._y : 1 [by my_demux.my_demux.vc.tmp[6]:=0]
|
||||
821012 my_demux.my_demux.vc.tmp[9] : 0 [by my_demux.my_demux.vc.C3Els[0]._y:=1]
|
||||
830774 my_demux.my_demux.vc.tmp[2] : 0 [by my_demux.my_demux.vc.OR2_tf[2]._y:=1]
|
||||
836494 my_demux.my_demux.vc.C2Els[1]._y : 1 [by my_demux.my_demux.vc.tmp[2]:=0]
|
||||
836502 my_demux.my_demux.vc.tmp[8] : 0 [by my_demux.my_demux.vc.C2Els[1]._y:=1]
|
||||
836556 my_demux.my_demux.vc.C3Els[1]._y : 1 [by my_demux.my_demux.vc.tmp[8]:=0]
|
||||
887094 my_demux.my_demux._in_v : 0 [by my_demux.my_demux.vc.C3Els[1]._y:=1]
|
||||
887099 my_demux.my_demux.in_v_buf._y : 1 [by my_demux.my_demux._in_v:=0]
|
||||
888166 my_demux.in.v : 0 [by my_demux.my_demux.in_v_buf._y:=1]
|
||||
Second Cond Checked
|
||||
BIN
test/unit_tests/demux_7/run/prsim.pdf
Normal file
BIN
test/unit_tests/demux_7/run/prsim.pdf
Normal file
Binary file not shown.
1402
test/unit_tests/demux_7/run/test.prs
Normal file
1402
test/unit_tests/demux_7/run/test.prs
Normal file
File diff suppressed because it is too large
Load Diff
49
test/unit_tests/demux_7/test.act
Normal file
49
test/unit_tests/demux_7/test.act
Normal file
@ -0,0 +1,49 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/primitives.act";
|
||||
import globals;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
|
||||
defproc demux_7 (avMx1of2<7> in; avMx1of2<7> out1; avMx1of2<7> out2; avMx1of2<1> cond){
|
||||
|
||||
demux<7> my_demux(.in=in, .out1=out1,.out2 = out2, .cond = cond);
|
||||
//Low active Reset
|
||||
bool _reset_B;
|
||||
prs {
|
||||
Reset => _reset_B-
|
||||
}
|
||||
my_demux.supply.vss = GND;
|
||||
my_demux.supply.vdd = Vdd;
|
||||
my_demux.reset_B = _reset_B;
|
||||
|
||||
}
|
||||
|
||||
demux_7 my_demux;
|
||||
82
test/unit_tests/demux_7/test.prsim
Normal file
82
test/unit_tests/demux_7/test.prsim
Normal file
@ -0,0 +1,82 @@
|
||||
watchall
|
||||
set-qdi-channel-neutral "my_demux.in" 7
|
||||
set my_demux.out1.a 0
|
||||
set my_demux.out1.v 0
|
||||
set my_demux.out2.a 0
|
||||
set my_demux.out2.v 0
|
||||
set my_demux.cond.d.d[0].t 0
|
||||
set my_demux.cond.d.d[0].f 0
|
||||
cycle
|
||||
system "echo 'System initialized'"
|
||||
|
||||
set Reset 0
|
||||
cycle
|
||||
system "echo 'System reset completed'"
|
||||
status X
|
||||
mode run
|
||||
|
||||
assert-qdi-channel-neutral "my_demux.out1" 7
|
||||
assert-qdi-channel-neutral "my_demux.out2" 7
|
||||
assert-qdi-channel-neutral "my_demux.in" 7
|
||||
cycle
|
||||
|
||||
system "echo 'Output neutral checked'"
|
||||
|
||||
set my_demux.cond.d.d[0].t 1
|
||||
set my_demux.cond.d.d[0].f 0
|
||||
set-qdi-channel-valid "my_demux.in" 7 127
|
||||
cycle
|
||||
assert my_demux.in.v 1
|
||||
assert my_demux.in.a 0
|
||||
|
||||
assert-qdi-channel-valid "my_demux.out1" 7 127
|
||||
set my_demux.out1.v 1
|
||||
cycle
|
||||
assert my_demux.in.a 1
|
||||
set-qdi-channel-neutral "my_demux.in" 7
|
||||
cycle
|
||||
set my_demux.out1.a 1
|
||||
|
||||
|
||||
system "echo 'First Cond Checked'"
|
||||
|
||||
|
||||
set Reset 0
|
||||
cycle
|
||||
system "echo 'System reset completed'"
|
||||
status X
|
||||
mode run
|
||||
|
||||
assert-qdi-channel-neutral "my_demux.out1" 7
|
||||
assert-qdi-channel-neutral "my_demux.out2" 7
|
||||
assert-qdi-channel-neutral "my_demux.in" 7
|
||||
cycle
|
||||
|
||||
system "echo 'Output neutral checked'"
|
||||
|
||||
set my_demux.cond.d.d[0].t 0
|
||||
set my_demux.cond.d.d[0].f 0
|
||||
set my_demux.out1.a 0
|
||||
set my_demux.out1.v 0
|
||||
set my_demux.out2.a 0
|
||||
set my_demux.out2.v 0
|
||||
cycle
|
||||
|
||||
set my_demux.cond.d.d[0].t 0
|
||||
set my_demux.cond.d.d[0].f 1
|
||||
set-qdi-channel-valid "my_demux.in" 7 100
|
||||
cycle
|
||||
assert my_demux.in.v 1
|
||||
assert my_demux.in.a 0
|
||||
|
||||
assert-qdi-channel-valid "my_demux.out2" 7 100
|
||||
set my_demux.out2.v 1
|
||||
cycle
|
||||
assert my_demux.in.a 1
|
||||
set-qdi-channel-neutral "my_demux.in" 7
|
||||
cycle
|
||||
|
||||
|
||||
system "echo 'Second Cond Checked'"
|
||||
|
||||
|
||||
1161
test/unit_tests/fifo_t_15/run/prsim.out
Normal file
1161
test/unit_tests/fifo_t_15/run/prsim.out
Normal file
File diff suppressed because it is too large
Load Diff
BIN
test/unit_tests/fifo_t_15/run/prsim.pdf
Normal file
BIN
test/unit_tests/fifo_t_15/run/prsim.pdf
Normal file
Binary file not shown.
922
test/unit_tests/fifo_t_15/run/test.prs
Normal file
922
test/unit_tests/fifo_t_15/run/test.prs
Normal file
@ -0,0 +1,922 @@
|
||||
= "GND" "GND"
|
||||
= "Vdd" "Vdd"
|
||||
= "Reset" "Reset"
|
||||
"t.a.reset_bufarray.buf6.a"->"t.a.reset_bufarray.buf6._y"-
|
||||
~("t.a.reset_bufarray.buf6.a")->"t.a.reset_bufarray.buf6._y"+
|
||||
"t.a.reset_bufarray.buf6._y"->"t.a.reset_bufarray.buf6.y"-
|
||||
~("t.a.reset_bufarray.buf6._y")->"t.a.reset_bufarray.buf6.y"+
|
||||
= "t.a.reset_bufarray.supply.vdd" "t.a.reset_bufarray.buf6.vdd"
|
||||
= "t.a.reset_bufarray.supply.vss" "t.a.reset_bufarray.buf6.vss"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[14]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[13]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[12]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[11]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[10]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[9]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[8]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[7]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[6]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[5]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[4]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[3]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[2]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.out[1]"
|
||||
= "t.a.reset_bufarray.out[0]" "t.a.reset_bufarray.buf6.y"
|
||||
= "t.a.reset_bufarray.in" "t.a.reset_bufarray.buf6.a"
|
||||
"t.a.reset_buf.a"->"t.a.reset_buf._y"-
|
||||
~("t.a.reset_buf.a")->"t.a.reset_buf._y"+
|
||||
"t.a.reset_buf._y"->"t.a.reset_buf.y"-
|
||||
~("t.a.reset_buf._y")->"t.a.reset_buf.y"+
|
||||
= "t.a.reset_B" "t.a.reset_buf.a"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[14].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[14].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[13].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[13].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[12].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[12].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[11].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[11].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[10].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[10].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[9].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[9].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[8].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[8].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[7].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[7].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[6].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[6].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[5].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[5].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[4].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[4].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[3].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[3].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[2].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[2].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[1].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[1].supply.vdd"
|
||||
= "t.a.supply.vss" "t.a.fifo_element[0].supply.vss"
|
||||
= "t.a.supply.vdd" "t.a.fifo_element[0].supply.vdd"
|
||||
= "t.a.supply.vdd" "t.a.reset_buf.vdd"
|
||||
= "t.a.supply.vss" "t.a.reset_buf.vss"
|
||||
= "t.a._reset_BX" "t.a.reset_bufarray.in"
|
||||
= "t.a._reset_BX" "t.a.reset_buf.y"
|
||||
"t.a.fifo_element[0].reset_buf.a"->"t.a.fifo_element[0].reset_buf._y"-
|
||||
~("t.a.fifo_element[0].reset_buf.a")->"t.a.fifo_element[0].reset_buf._y"+
|
||||
"t.a.fifo_element[0].reset_buf._y"->"t.a.fifo_element[0].reset_buf.y"-
|
||||
~("t.a.fifo_element[0].reset_buf._y")->"t.a.fifo_element[0].reset_buf.y"+
|
||||
"t.a.fifo_element[0].inv_outa.a"->"t.a.fifo_element[0].inv_outa.y"-
|
||||
~("t.a.fifo_element[0].inv_outa.a")->"t.a.fifo_element[0].inv_outa.y"+
|
||||
~"t.a.fifo_element[0].inack_ctl.c1"&~"t.a.fifo_element[0].inack_ctl.c2"|~"t.a.fifo_element[0].inack_ctl.pr_B"->"t.a.fifo_element[0].inack_ctl._y"+
|
||||
"t.a.fifo_element[0].inack_ctl.c1"&"t.a.fifo_element[0].inack_ctl.c2"&"t.a.fifo_element[0].inack_ctl.n1"&"t.a.fifo_element[0].inack_ctl.sr_B"->"t.a.fifo_element[0].inack_ctl._y"-
|
||||
"t.a.fifo_element[0].inack_ctl._y"->"t.a.fifo_element[0].inack_ctl.y"-
|
||||
~("t.a.fifo_element[0].inack_ctl._y")->"t.a.fifo_element[0].inack_ctl.y"+
|
||||
~"t.a.fifo_element[0].buf_func.c1"&~"t.a.fifo_element[0].buf_func.c2"|~"t.a.fifo_element[0].buf_func.pr_B"->"t.a.fifo_element[0].buf_func._y"+
|
||||
"t.a.fifo_element[0].buf_func.c1"&"t.a.fifo_element[0].buf_func.c2"&"t.a.fifo_element[0].buf_func.n1"&"t.a.fifo_element[0].buf_func.sr_B"->"t.a.fifo_element[0].buf_func._y"-
|
||||
"t.a.fifo_element[0].buf_func._y"->"t.a.fifo_element[0].buf_func.y"-
|
||||
~("t.a.fifo_element[0].buf_func._y")->"t.a.fifo_element[0].buf_func.y"+
|
||||
= "t.a.fifo_element[0].reset_B" "t.a.fifo_element[0].reset_buf.a"
|
||||
= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].reset_buf.vdd"
|
||||
= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].buf_func.vdd"
|
||||
= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].inv_outa.vdd"
|
||||
= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].en_ctl.vdd"
|
||||
= "t.a.fifo_element[0].supply.vdd" "t.a.fifo_element[0].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].reset_buf.vss"
|
||||
= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].buf_func.vss"
|
||||
= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].inv_outa.vss"
|
||||
= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].en_ctl.vss"
|
||||
= "t.a.fifo_element[0].supply.vss" "t.a.fifo_element[0].inack_ctl.vss"
|
||||
= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].reset_buf.y"
|
||||
= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].buf_func.sr_B"
|
||||
= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].buf_func.pr_B"
|
||||
= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[0]._reset_BX" "t.a.fifo_element[0].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].buf_func.c1"
|
||||
= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].en_ctl.y"
|
||||
= "t.a.fifo_element[0]._en" "t.a.fifo_element[0].inack_ctl.c1"
|
||||
~"t.a.fifo_element[0].en_ctl.p1"&~"t.a.fifo_element[0].en_ctl.c1"->"t.a.fifo_element[0].en_ctl.y"+
|
||||
"t.a.fifo_element[0].en_ctl.c1"->"t.a.fifo_element[0].en_ctl.y"-
|
||||
= "t.a.fifo_element[0]._out_a_B" "t.a.fifo_element[0].buf_func.c2"
|
||||
= "t.a.fifo_element[0]._out_a_B" "t.a.fifo_element[0].inv_outa.y"
|
||||
= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].in.r"
|
||||
= "t.a.fifo_element[0].in.a" "t.a.fifo_element[0].en_ctl.c1"
|
||||
= "t.a.fifo_element[0].in.a" "t.a.fifo_element[0].inack_ctl.y"
|
||||
= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].buf_func.n1"
|
||||
= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].inack_ctl.c2"
|
||||
= "t.a.fifo_element[0].in.d.d[0]" "t.a.fifo_element[0].in.r"
|
||||
= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].out.r"
|
||||
= "t.a.fifo_element[0].out.a" "t.a.fifo_element[0].inv_outa.a"
|
||||
= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].buf_func.y"
|
||||
= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].en_ctl.p1"
|
||||
= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].inack_ctl.n1"
|
||||
= "t.a.fifo_element[0].out.d.d[0]" "t.a.fifo_element[0].out.r"
|
||||
"t.a.fifo_element[1].reset_buf.a"->"t.a.fifo_element[1].reset_buf._y"-
|
||||
~("t.a.fifo_element[1].reset_buf.a")->"t.a.fifo_element[1].reset_buf._y"+
|
||||
"t.a.fifo_element[1].reset_buf._y"->"t.a.fifo_element[1].reset_buf.y"-
|
||||
~("t.a.fifo_element[1].reset_buf._y")->"t.a.fifo_element[1].reset_buf.y"+
|
||||
"t.a.fifo_element[1].inv_outa.a"->"t.a.fifo_element[1].inv_outa.y"-
|
||||
~("t.a.fifo_element[1].inv_outa.a")->"t.a.fifo_element[1].inv_outa.y"+
|
||||
~"t.a.fifo_element[1].inack_ctl.c1"&~"t.a.fifo_element[1].inack_ctl.c2"|~"t.a.fifo_element[1].inack_ctl.pr_B"->"t.a.fifo_element[1].inack_ctl._y"+
|
||||
"t.a.fifo_element[1].inack_ctl.c1"&"t.a.fifo_element[1].inack_ctl.c2"&"t.a.fifo_element[1].inack_ctl.n1"&"t.a.fifo_element[1].inack_ctl.sr_B"->"t.a.fifo_element[1].inack_ctl._y"-
|
||||
"t.a.fifo_element[1].inack_ctl._y"->"t.a.fifo_element[1].inack_ctl.y"-
|
||||
~("t.a.fifo_element[1].inack_ctl._y")->"t.a.fifo_element[1].inack_ctl.y"+
|
||||
~"t.a.fifo_element[1].buf_func.c1"&~"t.a.fifo_element[1].buf_func.c2"|~"t.a.fifo_element[1].buf_func.pr_B"->"t.a.fifo_element[1].buf_func._y"+
|
||||
"t.a.fifo_element[1].buf_func.c1"&"t.a.fifo_element[1].buf_func.c2"&"t.a.fifo_element[1].buf_func.n1"&"t.a.fifo_element[1].buf_func.sr_B"->"t.a.fifo_element[1].buf_func._y"-
|
||||
"t.a.fifo_element[1].buf_func._y"->"t.a.fifo_element[1].buf_func.y"-
|
||||
~("t.a.fifo_element[1].buf_func._y")->"t.a.fifo_element[1].buf_func.y"+
|
||||
= "t.a.fifo_element[1].reset_B" "t.a.fifo_element[1].reset_buf.a"
|
||||
= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].reset_buf.vdd"
|
||||
= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].buf_func.vdd"
|
||||
= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].inv_outa.vdd"
|
||||
= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].en_ctl.vdd"
|
||||
= "t.a.fifo_element[1].supply.vdd" "t.a.fifo_element[1].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].reset_buf.vss"
|
||||
= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].buf_func.vss"
|
||||
= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].inv_outa.vss"
|
||||
= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].en_ctl.vss"
|
||||
= "t.a.fifo_element[1].supply.vss" "t.a.fifo_element[1].inack_ctl.vss"
|
||||
= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].reset_buf.y"
|
||||
= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].buf_func.sr_B"
|
||||
= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].buf_func.pr_B"
|
||||
= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[1]._reset_BX" "t.a.fifo_element[1].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].buf_func.c1"
|
||||
= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].en_ctl.y"
|
||||
= "t.a.fifo_element[1]._en" "t.a.fifo_element[1].inack_ctl.c1"
|
||||
~"t.a.fifo_element[1].en_ctl.p1"&~"t.a.fifo_element[1].en_ctl.c1"->"t.a.fifo_element[1].en_ctl.y"+
|
||||
"t.a.fifo_element[1].en_ctl.c1"->"t.a.fifo_element[1].en_ctl.y"-
|
||||
= "t.a.fifo_element[1]._out_a_B" "t.a.fifo_element[1].buf_func.c2"
|
||||
= "t.a.fifo_element[1]._out_a_B" "t.a.fifo_element[1].inv_outa.y"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
|
||||
= "t.a.fifo_element[1].in.a" "t.a.fifo_element[1].en_ctl.c1"
|
||||
= "t.a.fifo_element[1].in.a" "t.a.fifo_element[1].inack_ctl.y"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].buf_func.n1"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].inack_ctl.c2"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
|
||||
= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].out.r"
|
||||
= "t.a.fifo_element[1].out.a" "t.a.fifo_element[1].inv_outa.a"
|
||||
= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].buf_func.y"
|
||||
= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].en_ctl.p1"
|
||||
= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].inack_ctl.n1"
|
||||
= "t.a.fifo_element[1].out.d.d[0]" "t.a.fifo_element[1].out.r"
|
||||
"t.a.fifo_element[2].reset_buf.a"->"t.a.fifo_element[2].reset_buf._y"-
|
||||
~("t.a.fifo_element[2].reset_buf.a")->"t.a.fifo_element[2].reset_buf._y"+
|
||||
"t.a.fifo_element[2].reset_buf._y"->"t.a.fifo_element[2].reset_buf.y"-
|
||||
~("t.a.fifo_element[2].reset_buf._y")->"t.a.fifo_element[2].reset_buf.y"+
|
||||
"t.a.fifo_element[2].inv_outa.a"->"t.a.fifo_element[2].inv_outa.y"-
|
||||
~("t.a.fifo_element[2].inv_outa.a")->"t.a.fifo_element[2].inv_outa.y"+
|
||||
~"t.a.fifo_element[2].inack_ctl.c1"&~"t.a.fifo_element[2].inack_ctl.c2"|~"t.a.fifo_element[2].inack_ctl.pr_B"->"t.a.fifo_element[2].inack_ctl._y"+
|
||||
"t.a.fifo_element[2].inack_ctl.c1"&"t.a.fifo_element[2].inack_ctl.c2"&"t.a.fifo_element[2].inack_ctl.n1"&"t.a.fifo_element[2].inack_ctl.sr_B"->"t.a.fifo_element[2].inack_ctl._y"-
|
||||
"t.a.fifo_element[2].inack_ctl._y"->"t.a.fifo_element[2].inack_ctl.y"-
|
||||
~("t.a.fifo_element[2].inack_ctl._y")->"t.a.fifo_element[2].inack_ctl.y"+
|
||||
~"t.a.fifo_element[2].buf_func.c1"&~"t.a.fifo_element[2].buf_func.c2"|~"t.a.fifo_element[2].buf_func.pr_B"->"t.a.fifo_element[2].buf_func._y"+
|
||||
"t.a.fifo_element[2].buf_func.c1"&"t.a.fifo_element[2].buf_func.c2"&"t.a.fifo_element[2].buf_func.n1"&"t.a.fifo_element[2].buf_func.sr_B"->"t.a.fifo_element[2].buf_func._y"-
|
||||
"t.a.fifo_element[2].buf_func._y"->"t.a.fifo_element[2].buf_func.y"-
|
||||
~("t.a.fifo_element[2].buf_func._y")->"t.a.fifo_element[2].buf_func.y"+
|
||||
= "t.a.fifo_element[2].reset_B" "t.a.fifo_element[2].reset_buf.a"
|
||||
= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].reset_buf.vdd"
|
||||
= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].buf_func.vdd"
|
||||
= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].inv_outa.vdd"
|
||||
= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].en_ctl.vdd"
|
||||
= "t.a.fifo_element[2].supply.vdd" "t.a.fifo_element[2].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].reset_buf.vss"
|
||||
= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].buf_func.vss"
|
||||
= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].inv_outa.vss"
|
||||
= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].en_ctl.vss"
|
||||
= "t.a.fifo_element[2].supply.vss" "t.a.fifo_element[2].inack_ctl.vss"
|
||||
= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].reset_buf.y"
|
||||
= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].buf_func.sr_B"
|
||||
= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].buf_func.pr_B"
|
||||
= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[2]._reset_BX" "t.a.fifo_element[2].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].buf_func.c1"
|
||||
= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].en_ctl.y"
|
||||
= "t.a.fifo_element[2]._en" "t.a.fifo_element[2].inack_ctl.c1"
|
||||
~"t.a.fifo_element[2].en_ctl.p1"&~"t.a.fifo_element[2].en_ctl.c1"->"t.a.fifo_element[2].en_ctl.y"+
|
||||
"t.a.fifo_element[2].en_ctl.c1"->"t.a.fifo_element[2].en_ctl.y"-
|
||||
= "t.a.fifo_element[2]._out_a_B" "t.a.fifo_element[2].buf_func.c2"
|
||||
= "t.a.fifo_element[2]._out_a_B" "t.a.fifo_element[2].inv_outa.y"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
|
||||
= "t.a.fifo_element[2].in.a" "t.a.fifo_element[2].en_ctl.c1"
|
||||
= "t.a.fifo_element[2].in.a" "t.a.fifo_element[2].inack_ctl.y"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].buf_func.n1"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].inack_ctl.c2"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
|
||||
= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].out.r"
|
||||
= "t.a.fifo_element[2].out.a" "t.a.fifo_element[2].inv_outa.a"
|
||||
= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].buf_func.y"
|
||||
= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].en_ctl.p1"
|
||||
= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].inack_ctl.n1"
|
||||
= "t.a.fifo_element[2].out.d.d[0]" "t.a.fifo_element[2].out.r"
|
||||
"t.a.fifo_element[3].reset_buf.a"->"t.a.fifo_element[3].reset_buf._y"-
|
||||
~("t.a.fifo_element[3].reset_buf.a")->"t.a.fifo_element[3].reset_buf._y"+
|
||||
"t.a.fifo_element[3].reset_buf._y"->"t.a.fifo_element[3].reset_buf.y"-
|
||||
~("t.a.fifo_element[3].reset_buf._y")->"t.a.fifo_element[3].reset_buf.y"+
|
||||
"t.a.fifo_element[3].inv_outa.a"->"t.a.fifo_element[3].inv_outa.y"-
|
||||
~("t.a.fifo_element[3].inv_outa.a")->"t.a.fifo_element[3].inv_outa.y"+
|
||||
~"t.a.fifo_element[3].inack_ctl.c1"&~"t.a.fifo_element[3].inack_ctl.c2"|~"t.a.fifo_element[3].inack_ctl.pr_B"->"t.a.fifo_element[3].inack_ctl._y"+
|
||||
"t.a.fifo_element[3].inack_ctl.c1"&"t.a.fifo_element[3].inack_ctl.c2"&"t.a.fifo_element[3].inack_ctl.n1"&"t.a.fifo_element[3].inack_ctl.sr_B"->"t.a.fifo_element[3].inack_ctl._y"-
|
||||
"t.a.fifo_element[3].inack_ctl._y"->"t.a.fifo_element[3].inack_ctl.y"-
|
||||
~("t.a.fifo_element[3].inack_ctl._y")->"t.a.fifo_element[3].inack_ctl.y"+
|
||||
~"t.a.fifo_element[3].buf_func.c1"&~"t.a.fifo_element[3].buf_func.c2"|~"t.a.fifo_element[3].buf_func.pr_B"->"t.a.fifo_element[3].buf_func._y"+
|
||||
"t.a.fifo_element[3].buf_func.c1"&"t.a.fifo_element[3].buf_func.c2"&"t.a.fifo_element[3].buf_func.n1"&"t.a.fifo_element[3].buf_func.sr_B"->"t.a.fifo_element[3].buf_func._y"-
|
||||
"t.a.fifo_element[3].buf_func._y"->"t.a.fifo_element[3].buf_func.y"-
|
||||
~("t.a.fifo_element[3].buf_func._y")->"t.a.fifo_element[3].buf_func.y"+
|
||||
= "t.a.fifo_element[3].reset_B" "t.a.fifo_element[3].reset_buf.a"
|
||||
= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].reset_buf.vdd"
|
||||
= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].buf_func.vdd"
|
||||
= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].inv_outa.vdd"
|
||||
= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].en_ctl.vdd"
|
||||
= "t.a.fifo_element[3].supply.vdd" "t.a.fifo_element[3].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].reset_buf.vss"
|
||||
= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].buf_func.vss"
|
||||
= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].inv_outa.vss"
|
||||
= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].en_ctl.vss"
|
||||
= "t.a.fifo_element[3].supply.vss" "t.a.fifo_element[3].inack_ctl.vss"
|
||||
= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].reset_buf.y"
|
||||
= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].buf_func.sr_B"
|
||||
= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].buf_func.pr_B"
|
||||
= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[3]._reset_BX" "t.a.fifo_element[3].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].buf_func.c1"
|
||||
= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].en_ctl.y"
|
||||
= "t.a.fifo_element[3]._en" "t.a.fifo_element[3].inack_ctl.c1"
|
||||
~"t.a.fifo_element[3].en_ctl.p1"&~"t.a.fifo_element[3].en_ctl.c1"->"t.a.fifo_element[3].en_ctl.y"+
|
||||
"t.a.fifo_element[3].en_ctl.c1"->"t.a.fifo_element[3].en_ctl.y"-
|
||||
= "t.a.fifo_element[3]._out_a_B" "t.a.fifo_element[3].buf_func.c2"
|
||||
= "t.a.fifo_element[3]._out_a_B" "t.a.fifo_element[3].inv_outa.y"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
|
||||
= "t.a.fifo_element[3].in.a" "t.a.fifo_element[3].en_ctl.c1"
|
||||
= "t.a.fifo_element[3].in.a" "t.a.fifo_element[3].inack_ctl.y"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].buf_func.n1"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].inack_ctl.c2"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
|
||||
= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].out.r"
|
||||
= "t.a.fifo_element[3].out.a" "t.a.fifo_element[3].inv_outa.a"
|
||||
= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].buf_func.y"
|
||||
= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].en_ctl.p1"
|
||||
= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].inack_ctl.n1"
|
||||
= "t.a.fifo_element[3].out.d.d[0]" "t.a.fifo_element[3].out.r"
|
||||
"t.a.fifo_element[4].reset_buf.a"->"t.a.fifo_element[4].reset_buf._y"-
|
||||
~("t.a.fifo_element[4].reset_buf.a")->"t.a.fifo_element[4].reset_buf._y"+
|
||||
"t.a.fifo_element[4].reset_buf._y"->"t.a.fifo_element[4].reset_buf.y"-
|
||||
~("t.a.fifo_element[4].reset_buf._y")->"t.a.fifo_element[4].reset_buf.y"+
|
||||
"t.a.fifo_element[4].inv_outa.a"->"t.a.fifo_element[4].inv_outa.y"-
|
||||
~("t.a.fifo_element[4].inv_outa.a")->"t.a.fifo_element[4].inv_outa.y"+
|
||||
~"t.a.fifo_element[4].inack_ctl.c1"&~"t.a.fifo_element[4].inack_ctl.c2"|~"t.a.fifo_element[4].inack_ctl.pr_B"->"t.a.fifo_element[4].inack_ctl._y"+
|
||||
"t.a.fifo_element[4].inack_ctl.c1"&"t.a.fifo_element[4].inack_ctl.c2"&"t.a.fifo_element[4].inack_ctl.n1"&"t.a.fifo_element[4].inack_ctl.sr_B"->"t.a.fifo_element[4].inack_ctl._y"-
|
||||
"t.a.fifo_element[4].inack_ctl._y"->"t.a.fifo_element[4].inack_ctl.y"-
|
||||
~("t.a.fifo_element[4].inack_ctl._y")->"t.a.fifo_element[4].inack_ctl.y"+
|
||||
~"t.a.fifo_element[4].buf_func.c1"&~"t.a.fifo_element[4].buf_func.c2"|~"t.a.fifo_element[4].buf_func.pr_B"->"t.a.fifo_element[4].buf_func._y"+
|
||||
"t.a.fifo_element[4].buf_func.c1"&"t.a.fifo_element[4].buf_func.c2"&"t.a.fifo_element[4].buf_func.n1"&"t.a.fifo_element[4].buf_func.sr_B"->"t.a.fifo_element[4].buf_func._y"-
|
||||
"t.a.fifo_element[4].buf_func._y"->"t.a.fifo_element[4].buf_func.y"-
|
||||
~("t.a.fifo_element[4].buf_func._y")->"t.a.fifo_element[4].buf_func.y"+
|
||||
= "t.a.fifo_element[4].reset_B" "t.a.fifo_element[4].reset_buf.a"
|
||||
= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].reset_buf.vdd"
|
||||
= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].buf_func.vdd"
|
||||
= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].inv_outa.vdd"
|
||||
= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].en_ctl.vdd"
|
||||
= "t.a.fifo_element[4].supply.vdd" "t.a.fifo_element[4].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].reset_buf.vss"
|
||||
= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].buf_func.vss"
|
||||
= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].inv_outa.vss"
|
||||
= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].en_ctl.vss"
|
||||
= "t.a.fifo_element[4].supply.vss" "t.a.fifo_element[4].inack_ctl.vss"
|
||||
= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].reset_buf.y"
|
||||
= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].buf_func.sr_B"
|
||||
= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].buf_func.pr_B"
|
||||
= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[4]._reset_BX" "t.a.fifo_element[4].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].buf_func.c1"
|
||||
= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].en_ctl.y"
|
||||
= "t.a.fifo_element[4]._en" "t.a.fifo_element[4].inack_ctl.c1"
|
||||
~"t.a.fifo_element[4].en_ctl.p1"&~"t.a.fifo_element[4].en_ctl.c1"->"t.a.fifo_element[4].en_ctl.y"+
|
||||
"t.a.fifo_element[4].en_ctl.c1"->"t.a.fifo_element[4].en_ctl.y"-
|
||||
= "t.a.fifo_element[4]._out_a_B" "t.a.fifo_element[4].buf_func.c2"
|
||||
= "t.a.fifo_element[4]._out_a_B" "t.a.fifo_element[4].inv_outa.y"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
|
||||
= "t.a.fifo_element[4].in.a" "t.a.fifo_element[4].en_ctl.c1"
|
||||
= "t.a.fifo_element[4].in.a" "t.a.fifo_element[4].inack_ctl.y"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].buf_func.n1"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].inack_ctl.c2"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
|
||||
= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].out.r"
|
||||
= "t.a.fifo_element[4].out.a" "t.a.fifo_element[4].inv_outa.a"
|
||||
= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].buf_func.y"
|
||||
= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].en_ctl.p1"
|
||||
= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].inack_ctl.n1"
|
||||
= "t.a.fifo_element[4].out.d.d[0]" "t.a.fifo_element[4].out.r"
|
||||
"t.a.fifo_element[5].reset_buf.a"->"t.a.fifo_element[5].reset_buf._y"-
|
||||
~("t.a.fifo_element[5].reset_buf.a")->"t.a.fifo_element[5].reset_buf._y"+
|
||||
"t.a.fifo_element[5].reset_buf._y"->"t.a.fifo_element[5].reset_buf.y"-
|
||||
~("t.a.fifo_element[5].reset_buf._y")->"t.a.fifo_element[5].reset_buf.y"+
|
||||
"t.a.fifo_element[5].inv_outa.a"->"t.a.fifo_element[5].inv_outa.y"-
|
||||
~("t.a.fifo_element[5].inv_outa.a")->"t.a.fifo_element[5].inv_outa.y"+
|
||||
~"t.a.fifo_element[5].inack_ctl.c1"&~"t.a.fifo_element[5].inack_ctl.c2"|~"t.a.fifo_element[5].inack_ctl.pr_B"->"t.a.fifo_element[5].inack_ctl._y"+
|
||||
"t.a.fifo_element[5].inack_ctl.c1"&"t.a.fifo_element[5].inack_ctl.c2"&"t.a.fifo_element[5].inack_ctl.n1"&"t.a.fifo_element[5].inack_ctl.sr_B"->"t.a.fifo_element[5].inack_ctl._y"-
|
||||
"t.a.fifo_element[5].inack_ctl._y"->"t.a.fifo_element[5].inack_ctl.y"-
|
||||
~("t.a.fifo_element[5].inack_ctl._y")->"t.a.fifo_element[5].inack_ctl.y"+
|
||||
~"t.a.fifo_element[5].buf_func.c1"&~"t.a.fifo_element[5].buf_func.c2"|~"t.a.fifo_element[5].buf_func.pr_B"->"t.a.fifo_element[5].buf_func._y"+
|
||||
"t.a.fifo_element[5].buf_func.c1"&"t.a.fifo_element[5].buf_func.c2"&"t.a.fifo_element[5].buf_func.n1"&"t.a.fifo_element[5].buf_func.sr_B"->"t.a.fifo_element[5].buf_func._y"-
|
||||
"t.a.fifo_element[5].buf_func._y"->"t.a.fifo_element[5].buf_func.y"-
|
||||
~("t.a.fifo_element[5].buf_func._y")->"t.a.fifo_element[5].buf_func.y"+
|
||||
= "t.a.fifo_element[5].reset_B" "t.a.fifo_element[5].reset_buf.a"
|
||||
= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].reset_buf.vdd"
|
||||
= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].buf_func.vdd"
|
||||
= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].inv_outa.vdd"
|
||||
= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].en_ctl.vdd"
|
||||
= "t.a.fifo_element[5].supply.vdd" "t.a.fifo_element[5].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].reset_buf.vss"
|
||||
= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].buf_func.vss"
|
||||
= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].inv_outa.vss"
|
||||
= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].en_ctl.vss"
|
||||
= "t.a.fifo_element[5].supply.vss" "t.a.fifo_element[5].inack_ctl.vss"
|
||||
= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].reset_buf.y"
|
||||
= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].buf_func.sr_B"
|
||||
= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].buf_func.pr_B"
|
||||
= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[5]._reset_BX" "t.a.fifo_element[5].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[5]._en" "t.a.fifo_element[5].buf_func.c1"
|
||||
= "t.a.fifo_element[5]._en" "t.a.fifo_element[5].en_ctl.y"
|
||||
= "t.a.fifo_element[5]._en" "t.a.fifo_element[5].inack_ctl.c1"
|
||||
~"t.a.fifo_element[5].en_ctl.p1"&~"t.a.fifo_element[5].en_ctl.c1"->"t.a.fifo_element[5].en_ctl.y"+
|
||||
"t.a.fifo_element[5].en_ctl.c1"->"t.a.fifo_element[5].en_ctl.y"-
|
||||
= "t.a.fifo_element[5]._out_a_B" "t.a.fifo_element[5].buf_func.c2"
|
||||
= "t.a.fifo_element[5]._out_a_B" "t.a.fifo_element[5].inv_outa.y"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].in.r"
|
||||
= "t.a.fifo_element[5].in.a" "t.a.fifo_element[5].en_ctl.c1"
|
||||
= "t.a.fifo_element[5].in.a" "t.a.fifo_element[5].inack_ctl.y"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].buf_func.n1"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].inack_ctl.c2"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].in.r"
|
||||
= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].out.r"
|
||||
= "t.a.fifo_element[5].out.a" "t.a.fifo_element[5].inv_outa.a"
|
||||
= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].buf_func.y"
|
||||
= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].en_ctl.p1"
|
||||
= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].inack_ctl.n1"
|
||||
= "t.a.fifo_element[5].out.d.d[0]" "t.a.fifo_element[5].out.r"
|
||||
"t.a.fifo_element[6].reset_buf.a"->"t.a.fifo_element[6].reset_buf._y"-
|
||||
~("t.a.fifo_element[6].reset_buf.a")->"t.a.fifo_element[6].reset_buf._y"+
|
||||
"t.a.fifo_element[6].reset_buf._y"->"t.a.fifo_element[6].reset_buf.y"-
|
||||
~("t.a.fifo_element[6].reset_buf._y")->"t.a.fifo_element[6].reset_buf.y"+
|
||||
"t.a.fifo_element[6].inv_outa.a"->"t.a.fifo_element[6].inv_outa.y"-
|
||||
~("t.a.fifo_element[6].inv_outa.a")->"t.a.fifo_element[6].inv_outa.y"+
|
||||
~"t.a.fifo_element[6].inack_ctl.c1"&~"t.a.fifo_element[6].inack_ctl.c2"|~"t.a.fifo_element[6].inack_ctl.pr_B"->"t.a.fifo_element[6].inack_ctl._y"+
|
||||
"t.a.fifo_element[6].inack_ctl.c1"&"t.a.fifo_element[6].inack_ctl.c2"&"t.a.fifo_element[6].inack_ctl.n1"&"t.a.fifo_element[6].inack_ctl.sr_B"->"t.a.fifo_element[6].inack_ctl._y"-
|
||||
"t.a.fifo_element[6].inack_ctl._y"->"t.a.fifo_element[6].inack_ctl.y"-
|
||||
~("t.a.fifo_element[6].inack_ctl._y")->"t.a.fifo_element[6].inack_ctl.y"+
|
||||
~"t.a.fifo_element[6].buf_func.c1"&~"t.a.fifo_element[6].buf_func.c2"|~"t.a.fifo_element[6].buf_func.pr_B"->"t.a.fifo_element[6].buf_func._y"+
|
||||
"t.a.fifo_element[6].buf_func.c1"&"t.a.fifo_element[6].buf_func.c2"&"t.a.fifo_element[6].buf_func.n1"&"t.a.fifo_element[6].buf_func.sr_B"->"t.a.fifo_element[6].buf_func._y"-
|
||||
"t.a.fifo_element[6].buf_func._y"->"t.a.fifo_element[6].buf_func.y"-
|
||||
~("t.a.fifo_element[6].buf_func._y")->"t.a.fifo_element[6].buf_func.y"+
|
||||
= "t.a.fifo_element[6].reset_B" "t.a.fifo_element[6].reset_buf.a"
|
||||
= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].reset_buf.vdd"
|
||||
= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].buf_func.vdd"
|
||||
= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].inv_outa.vdd"
|
||||
= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].en_ctl.vdd"
|
||||
= "t.a.fifo_element[6].supply.vdd" "t.a.fifo_element[6].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].reset_buf.vss"
|
||||
= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].buf_func.vss"
|
||||
= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].inv_outa.vss"
|
||||
= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].en_ctl.vss"
|
||||
= "t.a.fifo_element[6].supply.vss" "t.a.fifo_element[6].inack_ctl.vss"
|
||||
= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].reset_buf.y"
|
||||
= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].buf_func.sr_B"
|
||||
= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].buf_func.pr_B"
|
||||
= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[6]._reset_BX" "t.a.fifo_element[6].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[6]._en" "t.a.fifo_element[6].buf_func.c1"
|
||||
= "t.a.fifo_element[6]._en" "t.a.fifo_element[6].en_ctl.y"
|
||||
= "t.a.fifo_element[6]._en" "t.a.fifo_element[6].inack_ctl.c1"
|
||||
~"t.a.fifo_element[6].en_ctl.p1"&~"t.a.fifo_element[6].en_ctl.c1"->"t.a.fifo_element[6].en_ctl.y"+
|
||||
"t.a.fifo_element[6].en_ctl.c1"->"t.a.fifo_element[6].en_ctl.y"-
|
||||
= "t.a.fifo_element[6]._out_a_B" "t.a.fifo_element[6].buf_func.c2"
|
||||
= "t.a.fifo_element[6]._out_a_B" "t.a.fifo_element[6].inv_outa.y"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].in.r"
|
||||
= "t.a.fifo_element[6].in.a" "t.a.fifo_element[6].en_ctl.c1"
|
||||
= "t.a.fifo_element[6].in.a" "t.a.fifo_element[6].inack_ctl.y"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].buf_func.n1"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].inack_ctl.c2"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].in.r"
|
||||
= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].out.r"
|
||||
= "t.a.fifo_element[6].out.a" "t.a.fifo_element[6].inv_outa.a"
|
||||
= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].buf_func.y"
|
||||
= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].en_ctl.p1"
|
||||
= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].inack_ctl.n1"
|
||||
= "t.a.fifo_element[6].out.d.d[0]" "t.a.fifo_element[6].out.r"
|
||||
"t.a.fifo_element[7].reset_buf.a"->"t.a.fifo_element[7].reset_buf._y"-
|
||||
~("t.a.fifo_element[7].reset_buf.a")->"t.a.fifo_element[7].reset_buf._y"+
|
||||
"t.a.fifo_element[7].reset_buf._y"->"t.a.fifo_element[7].reset_buf.y"-
|
||||
~("t.a.fifo_element[7].reset_buf._y")->"t.a.fifo_element[7].reset_buf.y"+
|
||||
"t.a.fifo_element[7].inv_outa.a"->"t.a.fifo_element[7].inv_outa.y"-
|
||||
~("t.a.fifo_element[7].inv_outa.a")->"t.a.fifo_element[7].inv_outa.y"+
|
||||
~"t.a.fifo_element[7].inack_ctl.c1"&~"t.a.fifo_element[7].inack_ctl.c2"|~"t.a.fifo_element[7].inack_ctl.pr_B"->"t.a.fifo_element[7].inack_ctl._y"+
|
||||
"t.a.fifo_element[7].inack_ctl.c1"&"t.a.fifo_element[7].inack_ctl.c2"&"t.a.fifo_element[7].inack_ctl.n1"&"t.a.fifo_element[7].inack_ctl.sr_B"->"t.a.fifo_element[7].inack_ctl._y"-
|
||||
"t.a.fifo_element[7].inack_ctl._y"->"t.a.fifo_element[7].inack_ctl.y"-
|
||||
~("t.a.fifo_element[7].inack_ctl._y")->"t.a.fifo_element[7].inack_ctl.y"+
|
||||
~"t.a.fifo_element[7].buf_func.c1"&~"t.a.fifo_element[7].buf_func.c2"|~"t.a.fifo_element[7].buf_func.pr_B"->"t.a.fifo_element[7].buf_func._y"+
|
||||
"t.a.fifo_element[7].buf_func.c1"&"t.a.fifo_element[7].buf_func.c2"&"t.a.fifo_element[7].buf_func.n1"&"t.a.fifo_element[7].buf_func.sr_B"->"t.a.fifo_element[7].buf_func._y"-
|
||||
"t.a.fifo_element[7].buf_func._y"->"t.a.fifo_element[7].buf_func.y"-
|
||||
~("t.a.fifo_element[7].buf_func._y")->"t.a.fifo_element[7].buf_func.y"+
|
||||
= "t.a.fifo_element[7].reset_B" "t.a.fifo_element[7].reset_buf.a"
|
||||
= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].reset_buf.vdd"
|
||||
= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].buf_func.vdd"
|
||||
= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].inv_outa.vdd"
|
||||
= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].en_ctl.vdd"
|
||||
= "t.a.fifo_element[7].supply.vdd" "t.a.fifo_element[7].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].reset_buf.vss"
|
||||
= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].buf_func.vss"
|
||||
= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].inv_outa.vss"
|
||||
= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].en_ctl.vss"
|
||||
= "t.a.fifo_element[7].supply.vss" "t.a.fifo_element[7].inack_ctl.vss"
|
||||
= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].reset_buf.y"
|
||||
= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].buf_func.sr_B"
|
||||
= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].buf_func.pr_B"
|
||||
= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[7]._reset_BX" "t.a.fifo_element[7].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[7]._en" "t.a.fifo_element[7].buf_func.c1"
|
||||
= "t.a.fifo_element[7]._en" "t.a.fifo_element[7].en_ctl.y"
|
||||
= "t.a.fifo_element[7]._en" "t.a.fifo_element[7].inack_ctl.c1"
|
||||
~"t.a.fifo_element[7].en_ctl.p1"&~"t.a.fifo_element[7].en_ctl.c1"->"t.a.fifo_element[7].en_ctl.y"+
|
||||
"t.a.fifo_element[7].en_ctl.c1"->"t.a.fifo_element[7].en_ctl.y"-
|
||||
= "t.a.fifo_element[7]._out_a_B" "t.a.fifo_element[7].buf_func.c2"
|
||||
= "t.a.fifo_element[7]._out_a_B" "t.a.fifo_element[7].inv_outa.y"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].in.r"
|
||||
= "t.a.fifo_element[7].in.a" "t.a.fifo_element[7].en_ctl.c1"
|
||||
= "t.a.fifo_element[7].in.a" "t.a.fifo_element[7].inack_ctl.y"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].buf_func.n1"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].inack_ctl.c2"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].in.r"
|
||||
= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].out.r"
|
||||
= "t.a.fifo_element[7].out.a" "t.a.fifo_element[7].inv_outa.a"
|
||||
= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].buf_func.y"
|
||||
= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].en_ctl.p1"
|
||||
= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].inack_ctl.n1"
|
||||
= "t.a.fifo_element[7].out.d.d[0]" "t.a.fifo_element[7].out.r"
|
||||
"t.a.fifo_element[8].reset_buf.a"->"t.a.fifo_element[8].reset_buf._y"-
|
||||
~("t.a.fifo_element[8].reset_buf.a")->"t.a.fifo_element[8].reset_buf._y"+
|
||||
"t.a.fifo_element[8].reset_buf._y"->"t.a.fifo_element[8].reset_buf.y"-
|
||||
~("t.a.fifo_element[8].reset_buf._y")->"t.a.fifo_element[8].reset_buf.y"+
|
||||
"t.a.fifo_element[8].inv_outa.a"->"t.a.fifo_element[8].inv_outa.y"-
|
||||
~("t.a.fifo_element[8].inv_outa.a")->"t.a.fifo_element[8].inv_outa.y"+
|
||||
~"t.a.fifo_element[8].inack_ctl.c1"&~"t.a.fifo_element[8].inack_ctl.c2"|~"t.a.fifo_element[8].inack_ctl.pr_B"->"t.a.fifo_element[8].inack_ctl._y"+
|
||||
"t.a.fifo_element[8].inack_ctl.c1"&"t.a.fifo_element[8].inack_ctl.c2"&"t.a.fifo_element[8].inack_ctl.n1"&"t.a.fifo_element[8].inack_ctl.sr_B"->"t.a.fifo_element[8].inack_ctl._y"-
|
||||
"t.a.fifo_element[8].inack_ctl._y"->"t.a.fifo_element[8].inack_ctl.y"-
|
||||
~("t.a.fifo_element[8].inack_ctl._y")->"t.a.fifo_element[8].inack_ctl.y"+
|
||||
~"t.a.fifo_element[8].buf_func.c1"&~"t.a.fifo_element[8].buf_func.c2"|~"t.a.fifo_element[8].buf_func.pr_B"->"t.a.fifo_element[8].buf_func._y"+
|
||||
"t.a.fifo_element[8].buf_func.c1"&"t.a.fifo_element[8].buf_func.c2"&"t.a.fifo_element[8].buf_func.n1"&"t.a.fifo_element[8].buf_func.sr_B"->"t.a.fifo_element[8].buf_func._y"-
|
||||
"t.a.fifo_element[8].buf_func._y"->"t.a.fifo_element[8].buf_func.y"-
|
||||
~("t.a.fifo_element[8].buf_func._y")->"t.a.fifo_element[8].buf_func.y"+
|
||||
= "t.a.fifo_element[8].reset_B" "t.a.fifo_element[8].reset_buf.a"
|
||||
= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].reset_buf.vdd"
|
||||
= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].buf_func.vdd"
|
||||
= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].inv_outa.vdd"
|
||||
= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].en_ctl.vdd"
|
||||
= "t.a.fifo_element[8].supply.vdd" "t.a.fifo_element[8].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].reset_buf.vss"
|
||||
= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].buf_func.vss"
|
||||
= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].inv_outa.vss"
|
||||
= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].en_ctl.vss"
|
||||
= "t.a.fifo_element[8].supply.vss" "t.a.fifo_element[8].inack_ctl.vss"
|
||||
= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].reset_buf.y"
|
||||
= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].buf_func.sr_B"
|
||||
= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].buf_func.pr_B"
|
||||
= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[8]._reset_BX" "t.a.fifo_element[8].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[8]._en" "t.a.fifo_element[8].buf_func.c1"
|
||||
= "t.a.fifo_element[8]._en" "t.a.fifo_element[8].en_ctl.y"
|
||||
= "t.a.fifo_element[8]._en" "t.a.fifo_element[8].inack_ctl.c1"
|
||||
~"t.a.fifo_element[8].en_ctl.p1"&~"t.a.fifo_element[8].en_ctl.c1"->"t.a.fifo_element[8].en_ctl.y"+
|
||||
"t.a.fifo_element[8].en_ctl.c1"->"t.a.fifo_element[8].en_ctl.y"-
|
||||
= "t.a.fifo_element[8]._out_a_B" "t.a.fifo_element[8].buf_func.c2"
|
||||
= "t.a.fifo_element[8]._out_a_B" "t.a.fifo_element[8].inv_outa.y"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].in.r"
|
||||
= "t.a.fifo_element[8].in.a" "t.a.fifo_element[8].en_ctl.c1"
|
||||
= "t.a.fifo_element[8].in.a" "t.a.fifo_element[8].inack_ctl.y"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].buf_func.n1"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].inack_ctl.c2"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].in.r"
|
||||
= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].out.r"
|
||||
= "t.a.fifo_element[8].out.a" "t.a.fifo_element[8].inv_outa.a"
|
||||
= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].buf_func.y"
|
||||
= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].en_ctl.p1"
|
||||
= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].inack_ctl.n1"
|
||||
= "t.a.fifo_element[8].out.d.d[0]" "t.a.fifo_element[8].out.r"
|
||||
"t.a.fifo_element[9].reset_buf.a"->"t.a.fifo_element[9].reset_buf._y"-
|
||||
~("t.a.fifo_element[9].reset_buf.a")->"t.a.fifo_element[9].reset_buf._y"+
|
||||
"t.a.fifo_element[9].reset_buf._y"->"t.a.fifo_element[9].reset_buf.y"-
|
||||
~("t.a.fifo_element[9].reset_buf._y")->"t.a.fifo_element[9].reset_buf.y"+
|
||||
"t.a.fifo_element[9].inv_outa.a"->"t.a.fifo_element[9].inv_outa.y"-
|
||||
~("t.a.fifo_element[9].inv_outa.a")->"t.a.fifo_element[9].inv_outa.y"+
|
||||
~"t.a.fifo_element[9].inack_ctl.c1"&~"t.a.fifo_element[9].inack_ctl.c2"|~"t.a.fifo_element[9].inack_ctl.pr_B"->"t.a.fifo_element[9].inack_ctl._y"+
|
||||
"t.a.fifo_element[9].inack_ctl.c1"&"t.a.fifo_element[9].inack_ctl.c2"&"t.a.fifo_element[9].inack_ctl.n1"&"t.a.fifo_element[9].inack_ctl.sr_B"->"t.a.fifo_element[9].inack_ctl._y"-
|
||||
"t.a.fifo_element[9].inack_ctl._y"->"t.a.fifo_element[9].inack_ctl.y"-
|
||||
~("t.a.fifo_element[9].inack_ctl._y")->"t.a.fifo_element[9].inack_ctl.y"+
|
||||
~"t.a.fifo_element[9].buf_func.c1"&~"t.a.fifo_element[9].buf_func.c2"|~"t.a.fifo_element[9].buf_func.pr_B"->"t.a.fifo_element[9].buf_func._y"+
|
||||
"t.a.fifo_element[9].buf_func.c1"&"t.a.fifo_element[9].buf_func.c2"&"t.a.fifo_element[9].buf_func.n1"&"t.a.fifo_element[9].buf_func.sr_B"->"t.a.fifo_element[9].buf_func._y"-
|
||||
"t.a.fifo_element[9].buf_func._y"->"t.a.fifo_element[9].buf_func.y"-
|
||||
~("t.a.fifo_element[9].buf_func._y")->"t.a.fifo_element[9].buf_func.y"+
|
||||
= "t.a.fifo_element[9].reset_B" "t.a.fifo_element[9].reset_buf.a"
|
||||
= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].reset_buf.vdd"
|
||||
= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].buf_func.vdd"
|
||||
= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].inv_outa.vdd"
|
||||
= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].en_ctl.vdd"
|
||||
= "t.a.fifo_element[9].supply.vdd" "t.a.fifo_element[9].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].reset_buf.vss"
|
||||
= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].buf_func.vss"
|
||||
= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].inv_outa.vss"
|
||||
= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].en_ctl.vss"
|
||||
= "t.a.fifo_element[9].supply.vss" "t.a.fifo_element[9].inack_ctl.vss"
|
||||
= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].reset_buf.y"
|
||||
= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].buf_func.sr_B"
|
||||
= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].buf_func.pr_B"
|
||||
= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[9]._reset_BX" "t.a.fifo_element[9].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[9]._en" "t.a.fifo_element[9].buf_func.c1"
|
||||
= "t.a.fifo_element[9]._en" "t.a.fifo_element[9].en_ctl.y"
|
||||
= "t.a.fifo_element[9]._en" "t.a.fifo_element[9].inack_ctl.c1"
|
||||
~"t.a.fifo_element[9].en_ctl.p1"&~"t.a.fifo_element[9].en_ctl.c1"->"t.a.fifo_element[9].en_ctl.y"+
|
||||
"t.a.fifo_element[9].en_ctl.c1"->"t.a.fifo_element[9].en_ctl.y"-
|
||||
= "t.a.fifo_element[9]._out_a_B" "t.a.fifo_element[9].buf_func.c2"
|
||||
= "t.a.fifo_element[9]._out_a_B" "t.a.fifo_element[9].inv_outa.y"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].in.r"
|
||||
= "t.a.fifo_element[9].in.a" "t.a.fifo_element[9].en_ctl.c1"
|
||||
= "t.a.fifo_element[9].in.a" "t.a.fifo_element[9].inack_ctl.y"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].buf_func.n1"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].inack_ctl.c2"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].in.r"
|
||||
= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].out.r"
|
||||
= "t.a.fifo_element[9].out.a" "t.a.fifo_element[9].inv_outa.a"
|
||||
= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].buf_func.y"
|
||||
= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].en_ctl.p1"
|
||||
= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].inack_ctl.n1"
|
||||
= "t.a.fifo_element[9].out.d.d[0]" "t.a.fifo_element[9].out.r"
|
||||
"t.a.fifo_element[10].reset_buf.a"->"t.a.fifo_element[10].reset_buf._y"-
|
||||
~("t.a.fifo_element[10].reset_buf.a")->"t.a.fifo_element[10].reset_buf._y"+
|
||||
"t.a.fifo_element[10].reset_buf._y"->"t.a.fifo_element[10].reset_buf.y"-
|
||||
~("t.a.fifo_element[10].reset_buf._y")->"t.a.fifo_element[10].reset_buf.y"+
|
||||
"t.a.fifo_element[10].inv_outa.a"->"t.a.fifo_element[10].inv_outa.y"-
|
||||
~("t.a.fifo_element[10].inv_outa.a")->"t.a.fifo_element[10].inv_outa.y"+
|
||||
~"t.a.fifo_element[10].inack_ctl.c1"&~"t.a.fifo_element[10].inack_ctl.c2"|~"t.a.fifo_element[10].inack_ctl.pr_B"->"t.a.fifo_element[10].inack_ctl._y"+
|
||||
"t.a.fifo_element[10].inack_ctl.c1"&"t.a.fifo_element[10].inack_ctl.c2"&"t.a.fifo_element[10].inack_ctl.n1"&"t.a.fifo_element[10].inack_ctl.sr_B"->"t.a.fifo_element[10].inack_ctl._y"-
|
||||
"t.a.fifo_element[10].inack_ctl._y"->"t.a.fifo_element[10].inack_ctl.y"-
|
||||
~("t.a.fifo_element[10].inack_ctl._y")->"t.a.fifo_element[10].inack_ctl.y"+
|
||||
~"t.a.fifo_element[10].buf_func.c1"&~"t.a.fifo_element[10].buf_func.c2"|~"t.a.fifo_element[10].buf_func.pr_B"->"t.a.fifo_element[10].buf_func._y"+
|
||||
"t.a.fifo_element[10].buf_func.c1"&"t.a.fifo_element[10].buf_func.c2"&"t.a.fifo_element[10].buf_func.n1"&"t.a.fifo_element[10].buf_func.sr_B"->"t.a.fifo_element[10].buf_func._y"-
|
||||
"t.a.fifo_element[10].buf_func._y"->"t.a.fifo_element[10].buf_func.y"-
|
||||
~("t.a.fifo_element[10].buf_func._y")->"t.a.fifo_element[10].buf_func.y"+
|
||||
= "t.a.fifo_element[10].reset_B" "t.a.fifo_element[10].reset_buf.a"
|
||||
= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].reset_buf.vdd"
|
||||
= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].buf_func.vdd"
|
||||
= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].inv_outa.vdd"
|
||||
= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].en_ctl.vdd"
|
||||
= "t.a.fifo_element[10].supply.vdd" "t.a.fifo_element[10].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].reset_buf.vss"
|
||||
= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].buf_func.vss"
|
||||
= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].inv_outa.vss"
|
||||
= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].en_ctl.vss"
|
||||
= "t.a.fifo_element[10].supply.vss" "t.a.fifo_element[10].inack_ctl.vss"
|
||||
= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].reset_buf.y"
|
||||
= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].buf_func.sr_B"
|
||||
= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].buf_func.pr_B"
|
||||
= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[10]._reset_BX" "t.a.fifo_element[10].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[10]._en" "t.a.fifo_element[10].buf_func.c1"
|
||||
= "t.a.fifo_element[10]._en" "t.a.fifo_element[10].en_ctl.y"
|
||||
= "t.a.fifo_element[10]._en" "t.a.fifo_element[10].inack_ctl.c1"
|
||||
~"t.a.fifo_element[10].en_ctl.p1"&~"t.a.fifo_element[10].en_ctl.c1"->"t.a.fifo_element[10].en_ctl.y"+
|
||||
"t.a.fifo_element[10].en_ctl.c1"->"t.a.fifo_element[10].en_ctl.y"-
|
||||
= "t.a.fifo_element[10]._out_a_B" "t.a.fifo_element[10].buf_func.c2"
|
||||
= "t.a.fifo_element[10]._out_a_B" "t.a.fifo_element[10].inv_outa.y"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].in.r"
|
||||
= "t.a.fifo_element[10].in.a" "t.a.fifo_element[10].en_ctl.c1"
|
||||
= "t.a.fifo_element[10].in.a" "t.a.fifo_element[10].inack_ctl.y"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].buf_func.n1"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].inack_ctl.c2"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].in.r"
|
||||
= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].out.r"
|
||||
= "t.a.fifo_element[10].out.a" "t.a.fifo_element[10].inv_outa.a"
|
||||
= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].buf_func.y"
|
||||
= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].en_ctl.p1"
|
||||
= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].inack_ctl.n1"
|
||||
= "t.a.fifo_element[10].out.d.d[0]" "t.a.fifo_element[10].out.r"
|
||||
"t.a.fifo_element[11].reset_buf.a"->"t.a.fifo_element[11].reset_buf._y"-
|
||||
~("t.a.fifo_element[11].reset_buf.a")->"t.a.fifo_element[11].reset_buf._y"+
|
||||
"t.a.fifo_element[11].reset_buf._y"->"t.a.fifo_element[11].reset_buf.y"-
|
||||
~("t.a.fifo_element[11].reset_buf._y")->"t.a.fifo_element[11].reset_buf.y"+
|
||||
"t.a.fifo_element[11].inv_outa.a"->"t.a.fifo_element[11].inv_outa.y"-
|
||||
~("t.a.fifo_element[11].inv_outa.a")->"t.a.fifo_element[11].inv_outa.y"+
|
||||
~"t.a.fifo_element[11].inack_ctl.c1"&~"t.a.fifo_element[11].inack_ctl.c2"|~"t.a.fifo_element[11].inack_ctl.pr_B"->"t.a.fifo_element[11].inack_ctl._y"+
|
||||
"t.a.fifo_element[11].inack_ctl.c1"&"t.a.fifo_element[11].inack_ctl.c2"&"t.a.fifo_element[11].inack_ctl.n1"&"t.a.fifo_element[11].inack_ctl.sr_B"->"t.a.fifo_element[11].inack_ctl._y"-
|
||||
"t.a.fifo_element[11].inack_ctl._y"->"t.a.fifo_element[11].inack_ctl.y"-
|
||||
~("t.a.fifo_element[11].inack_ctl._y")->"t.a.fifo_element[11].inack_ctl.y"+
|
||||
~"t.a.fifo_element[11].buf_func.c1"&~"t.a.fifo_element[11].buf_func.c2"|~"t.a.fifo_element[11].buf_func.pr_B"->"t.a.fifo_element[11].buf_func._y"+
|
||||
"t.a.fifo_element[11].buf_func.c1"&"t.a.fifo_element[11].buf_func.c2"&"t.a.fifo_element[11].buf_func.n1"&"t.a.fifo_element[11].buf_func.sr_B"->"t.a.fifo_element[11].buf_func._y"-
|
||||
"t.a.fifo_element[11].buf_func._y"->"t.a.fifo_element[11].buf_func.y"-
|
||||
~("t.a.fifo_element[11].buf_func._y")->"t.a.fifo_element[11].buf_func.y"+
|
||||
= "t.a.fifo_element[11].reset_B" "t.a.fifo_element[11].reset_buf.a"
|
||||
= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].reset_buf.vdd"
|
||||
= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].buf_func.vdd"
|
||||
= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].inv_outa.vdd"
|
||||
= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].en_ctl.vdd"
|
||||
= "t.a.fifo_element[11].supply.vdd" "t.a.fifo_element[11].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].reset_buf.vss"
|
||||
= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].buf_func.vss"
|
||||
= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].inv_outa.vss"
|
||||
= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].en_ctl.vss"
|
||||
= "t.a.fifo_element[11].supply.vss" "t.a.fifo_element[11].inack_ctl.vss"
|
||||
= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].reset_buf.y"
|
||||
= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].buf_func.sr_B"
|
||||
= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].buf_func.pr_B"
|
||||
= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[11]._reset_BX" "t.a.fifo_element[11].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[11]._en" "t.a.fifo_element[11].buf_func.c1"
|
||||
= "t.a.fifo_element[11]._en" "t.a.fifo_element[11].en_ctl.y"
|
||||
= "t.a.fifo_element[11]._en" "t.a.fifo_element[11].inack_ctl.c1"
|
||||
~"t.a.fifo_element[11].en_ctl.p1"&~"t.a.fifo_element[11].en_ctl.c1"->"t.a.fifo_element[11].en_ctl.y"+
|
||||
"t.a.fifo_element[11].en_ctl.c1"->"t.a.fifo_element[11].en_ctl.y"-
|
||||
= "t.a.fifo_element[11]._out_a_B" "t.a.fifo_element[11].buf_func.c2"
|
||||
= "t.a.fifo_element[11]._out_a_B" "t.a.fifo_element[11].inv_outa.y"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].in.r"
|
||||
= "t.a.fifo_element[11].in.a" "t.a.fifo_element[11].en_ctl.c1"
|
||||
= "t.a.fifo_element[11].in.a" "t.a.fifo_element[11].inack_ctl.y"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].buf_func.n1"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].inack_ctl.c2"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].in.r"
|
||||
= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].out.r"
|
||||
= "t.a.fifo_element[11].out.a" "t.a.fifo_element[11].inv_outa.a"
|
||||
= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].buf_func.y"
|
||||
= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].en_ctl.p1"
|
||||
= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].inack_ctl.n1"
|
||||
= "t.a.fifo_element[11].out.d.d[0]" "t.a.fifo_element[11].out.r"
|
||||
"t.a.fifo_element[12].reset_buf.a"->"t.a.fifo_element[12].reset_buf._y"-
|
||||
~("t.a.fifo_element[12].reset_buf.a")->"t.a.fifo_element[12].reset_buf._y"+
|
||||
"t.a.fifo_element[12].reset_buf._y"->"t.a.fifo_element[12].reset_buf.y"-
|
||||
~("t.a.fifo_element[12].reset_buf._y")->"t.a.fifo_element[12].reset_buf.y"+
|
||||
"t.a.fifo_element[12].inv_outa.a"->"t.a.fifo_element[12].inv_outa.y"-
|
||||
~("t.a.fifo_element[12].inv_outa.a")->"t.a.fifo_element[12].inv_outa.y"+
|
||||
~"t.a.fifo_element[12].inack_ctl.c1"&~"t.a.fifo_element[12].inack_ctl.c2"|~"t.a.fifo_element[12].inack_ctl.pr_B"->"t.a.fifo_element[12].inack_ctl._y"+
|
||||
"t.a.fifo_element[12].inack_ctl.c1"&"t.a.fifo_element[12].inack_ctl.c2"&"t.a.fifo_element[12].inack_ctl.n1"&"t.a.fifo_element[12].inack_ctl.sr_B"->"t.a.fifo_element[12].inack_ctl._y"-
|
||||
"t.a.fifo_element[12].inack_ctl._y"->"t.a.fifo_element[12].inack_ctl.y"-
|
||||
~("t.a.fifo_element[12].inack_ctl._y")->"t.a.fifo_element[12].inack_ctl.y"+
|
||||
~"t.a.fifo_element[12].buf_func.c1"&~"t.a.fifo_element[12].buf_func.c2"|~"t.a.fifo_element[12].buf_func.pr_B"->"t.a.fifo_element[12].buf_func._y"+
|
||||
"t.a.fifo_element[12].buf_func.c1"&"t.a.fifo_element[12].buf_func.c2"&"t.a.fifo_element[12].buf_func.n1"&"t.a.fifo_element[12].buf_func.sr_B"->"t.a.fifo_element[12].buf_func._y"-
|
||||
"t.a.fifo_element[12].buf_func._y"->"t.a.fifo_element[12].buf_func.y"-
|
||||
~("t.a.fifo_element[12].buf_func._y")->"t.a.fifo_element[12].buf_func.y"+
|
||||
= "t.a.fifo_element[12].reset_B" "t.a.fifo_element[12].reset_buf.a"
|
||||
= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].reset_buf.vdd"
|
||||
= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].buf_func.vdd"
|
||||
= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].inv_outa.vdd"
|
||||
= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].en_ctl.vdd"
|
||||
= "t.a.fifo_element[12].supply.vdd" "t.a.fifo_element[12].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].reset_buf.vss"
|
||||
= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].buf_func.vss"
|
||||
= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].inv_outa.vss"
|
||||
= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].en_ctl.vss"
|
||||
= "t.a.fifo_element[12].supply.vss" "t.a.fifo_element[12].inack_ctl.vss"
|
||||
= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].reset_buf.y"
|
||||
= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].buf_func.sr_B"
|
||||
= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].buf_func.pr_B"
|
||||
= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[12]._reset_BX" "t.a.fifo_element[12].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[12]._en" "t.a.fifo_element[12].buf_func.c1"
|
||||
= "t.a.fifo_element[12]._en" "t.a.fifo_element[12].en_ctl.y"
|
||||
= "t.a.fifo_element[12]._en" "t.a.fifo_element[12].inack_ctl.c1"
|
||||
~"t.a.fifo_element[12].en_ctl.p1"&~"t.a.fifo_element[12].en_ctl.c1"->"t.a.fifo_element[12].en_ctl.y"+
|
||||
"t.a.fifo_element[12].en_ctl.c1"->"t.a.fifo_element[12].en_ctl.y"-
|
||||
= "t.a.fifo_element[12]._out_a_B" "t.a.fifo_element[12].buf_func.c2"
|
||||
= "t.a.fifo_element[12]._out_a_B" "t.a.fifo_element[12].inv_outa.y"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].in.r"
|
||||
= "t.a.fifo_element[12].in.a" "t.a.fifo_element[12].en_ctl.c1"
|
||||
= "t.a.fifo_element[12].in.a" "t.a.fifo_element[12].inack_ctl.y"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].buf_func.n1"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].inack_ctl.c2"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].in.r"
|
||||
= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].out.r"
|
||||
= "t.a.fifo_element[12].out.a" "t.a.fifo_element[12].inv_outa.a"
|
||||
= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].buf_func.y"
|
||||
= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].en_ctl.p1"
|
||||
= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].inack_ctl.n1"
|
||||
= "t.a.fifo_element[12].out.d.d[0]" "t.a.fifo_element[12].out.r"
|
||||
"t.a.fifo_element[13].reset_buf.a"->"t.a.fifo_element[13].reset_buf._y"-
|
||||
~("t.a.fifo_element[13].reset_buf.a")->"t.a.fifo_element[13].reset_buf._y"+
|
||||
"t.a.fifo_element[13].reset_buf._y"->"t.a.fifo_element[13].reset_buf.y"-
|
||||
~("t.a.fifo_element[13].reset_buf._y")->"t.a.fifo_element[13].reset_buf.y"+
|
||||
"t.a.fifo_element[13].inv_outa.a"->"t.a.fifo_element[13].inv_outa.y"-
|
||||
~("t.a.fifo_element[13].inv_outa.a")->"t.a.fifo_element[13].inv_outa.y"+
|
||||
~"t.a.fifo_element[13].inack_ctl.c1"&~"t.a.fifo_element[13].inack_ctl.c2"|~"t.a.fifo_element[13].inack_ctl.pr_B"->"t.a.fifo_element[13].inack_ctl._y"+
|
||||
"t.a.fifo_element[13].inack_ctl.c1"&"t.a.fifo_element[13].inack_ctl.c2"&"t.a.fifo_element[13].inack_ctl.n1"&"t.a.fifo_element[13].inack_ctl.sr_B"->"t.a.fifo_element[13].inack_ctl._y"-
|
||||
"t.a.fifo_element[13].inack_ctl._y"->"t.a.fifo_element[13].inack_ctl.y"-
|
||||
~("t.a.fifo_element[13].inack_ctl._y")->"t.a.fifo_element[13].inack_ctl.y"+
|
||||
~"t.a.fifo_element[13].buf_func.c1"&~"t.a.fifo_element[13].buf_func.c2"|~"t.a.fifo_element[13].buf_func.pr_B"->"t.a.fifo_element[13].buf_func._y"+
|
||||
"t.a.fifo_element[13].buf_func.c1"&"t.a.fifo_element[13].buf_func.c2"&"t.a.fifo_element[13].buf_func.n1"&"t.a.fifo_element[13].buf_func.sr_B"->"t.a.fifo_element[13].buf_func._y"-
|
||||
"t.a.fifo_element[13].buf_func._y"->"t.a.fifo_element[13].buf_func.y"-
|
||||
~("t.a.fifo_element[13].buf_func._y")->"t.a.fifo_element[13].buf_func.y"+
|
||||
= "t.a.fifo_element[13].reset_B" "t.a.fifo_element[13].reset_buf.a"
|
||||
= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].reset_buf.vdd"
|
||||
= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].buf_func.vdd"
|
||||
= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].inv_outa.vdd"
|
||||
= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].en_ctl.vdd"
|
||||
= "t.a.fifo_element[13].supply.vdd" "t.a.fifo_element[13].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].reset_buf.vss"
|
||||
= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].buf_func.vss"
|
||||
= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].inv_outa.vss"
|
||||
= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].en_ctl.vss"
|
||||
= "t.a.fifo_element[13].supply.vss" "t.a.fifo_element[13].inack_ctl.vss"
|
||||
= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].reset_buf.y"
|
||||
= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].buf_func.sr_B"
|
||||
= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].buf_func.pr_B"
|
||||
= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[13]._reset_BX" "t.a.fifo_element[13].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[13]._en" "t.a.fifo_element[13].buf_func.c1"
|
||||
= "t.a.fifo_element[13]._en" "t.a.fifo_element[13].en_ctl.y"
|
||||
= "t.a.fifo_element[13]._en" "t.a.fifo_element[13].inack_ctl.c1"
|
||||
~"t.a.fifo_element[13].en_ctl.p1"&~"t.a.fifo_element[13].en_ctl.c1"->"t.a.fifo_element[13].en_ctl.y"+
|
||||
"t.a.fifo_element[13].en_ctl.c1"->"t.a.fifo_element[13].en_ctl.y"-
|
||||
= "t.a.fifo_element[13]._out_a_B" "t.a.fifo_element[13].buf_func.c2"
|
||||
= "t.a.fifo_element[13]._out_a_B" "t.a.fifo_element[13].inv_outa.y"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].in.r"
|
||||
= "t.a.fifo_element[13].in.a" "t.a.fifo_element[13].en_ctl.c1"
|
||||
= "t.a.fifo_element[13].in.a" "t.a.fifo_element[13].inack_ctl.y"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].buf_func.n1"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].inack_ctl.c2"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].in.r"
|
||||
= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].out.r"
|
||||
= "t.a.fifo_element[13].out.a" "t.a.fifo_element[13].inv_outa.a"
|
||||
= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].buf_func.y"
|
||||
= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].en_ctl.p1"
|
||||
= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].inack_ctl.n1"
|
||||
= "t.a.fifo_element[13].out.d.d[0]" "t.a.fifo_element[13].out.r"
|
||||
"t.a.fifo_element[14].reset_buf.a"->"t.a.fifo_element[14].reset_buf._y"-
|
||||
~("t.a.fifo_element[14].reset_buf.a")->"t.a.fifo_element[14].reset_buf._y"+
|
||||
"t.a.fifo_element[14].reset_buf._y"->"t.a.fifo_element[14].reset_buf.y"-
|
||||
~("t.a.fifo_element[14].reset_buf._y")->"t.a.fifo_element[14].reset_buf.y"+
|
||||
"t.a.fifo_element[14].inv_outa.a"->"t.a.fifo_element[14].inv_outa.y"-
|
||||
~("t.a.fifo_element[14].inv_outa.a")->"t.a.fifo_element[14].inv_outa.y"+
|
||||
~"t.a.fifo_element[14].inack_ctl.c1"&~"t.a.fifo_element[14].inack_ctl.c2"|~"t.a.fifo_element[14].inack_ctl.pr_B"->"t.a.fifo_element[14].inack_ctl._y"+
|
||||
"t.a.fifo_element[14].inack_ctl.c1"&"t.a.fifo_element[14].inack_ctl.c2"&"t.a.fifo_element[14].inack_ctl.n1"&"t.a.fifo_element[14].inack_ctl.sr_B"->"t.a.fifo_element[14].inack_ctl._y"-
|
||||
"t.a.fifo_element[14].inack_ctl._y"->"t.a.fifo_element[14].inack_ctl.y"-
|
||||
~("t.a.fifo_element[14].inack_ctl._y")->"t.a.fifo_element[14].inack_ctl.y"+
|
||||
~"t.a.fifo_element[14].buf_func.c1"&~"t.a.fifo_element[14].buf_func.c2"|~"t.a.fifo_element[14].buf_func.pr_B"->"t.a.fifo_element[14].buf_func._y"+
|
||||
"t.a.fifo_element[14].buf_func.c1"&"t.a.fifo_element[14].buf_func.c2"&"t.a.fifo_element[14].buf_func.n1"&"t.a.fifo_element[14].buf_func.sr_B"->"t.a.fifo_element[14].buf_func._y"-
|
||||
"t.a.fifo_element[14].buf_func._y"->"t.a.fifo_element[14].buf_func.y"-
|
||||
~("t.a.fifo_element[14].buf_func._y")->"t.a.fifo_element[14].buf_func.y"+
|
||||
= "t.a.fifo_element[14].reset_B" "t.a.fifo_element[14].reset_buf.a"
|
||||
= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].reset_buf.vdd"
|
||||
= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].buf_func.vdd"
|
||||
= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].inv_outa.vdd"
|
||||
= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].en_ctl.vdd"
|
||||
= "t.a.fifo_element[14].supply.vdd" "t.a.fifo_element[14].inack_ctl.vdd"
|
||||
= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].reset_buf.vss"
|
||||
= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].buf_func.vss"
|
||||
= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].inv_outa.vss"
|
||||
= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].en_ctl.vss"
|
||||
= "t.a.fifo_element[14].supply.vss" "t.a.fifo_element[14].inack_ctl.vss"
|
||||
= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].reset_buf.y"
|
||||
= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].buf_func.sr_B"
|
||||
= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].buf_func.pr_B"
|
||||
= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].inack_ctl.sr_B"
|
||||
= "t.a.fifo_element[14]._reset_BX" "t.a.fifo_element[14].inack_ctl.pr_B"
|
||||
= "t.a.fifo_element[14]._en" "t.a.fifo_element[14].buf_func.c1"
|
||||
= "t.a.fifo_element[14]._en" "t.a.fifo_element[14].en_ctl.y"
|
||||
= "t.a.fifo_element[14]._en" "t.a.fifo_element[14].inack_ctl.c1"
|
||||
~"t.a.fifo_element[14].en_ctl.p1"&~"t.a.fifo_element[14].en_ctl.c1"->"t.a.fifo_element[14].en_ctl.y"+
|
||||
"t.a.fifo_element[14].en_ctl.c1"->"t.a.fifo_element[14].en_ctl.y"-
|
||||
= "t.a.fifo_element[14]._out_a_B" "t.a.fifo_element[14].buf_func.c2"
|
||||
= "t.a.fifo_element[14]._out_a_B" "t.a.fifo_element[14].inv_outa.y"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].in.r"
|
||||
= "t.a.fifo_element[14].in.a" "t.a.fifo_element[14].en_ctl.c1"
|
||||
= "t.a.fifo_element[14].in.a" "t.a.fifo_element[14].inack_ctl.y"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].buf_func.n1"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].inack_ctl.c2"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].in.r"
|
||||
= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].out.r"
|
||||
= "t.a.fifo_element[14].out.a" "t.a.fifo_element[14].inv_outa.a"
|
||||
= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].buf_func.y"
|
||||
= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].en_ctl.p1"
|
||||
= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].inack_ctl.n1"
|
||||
= "t.a.fifo_element[14].out.d.d[0]" "t.a.fifo_element[14].out.r"
|
||||
= "t.a.fifo_element[14].in.a" "t.a.fifo_element[13].out.a"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[13].out.r"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[13].out.d.d[0]"
|
||||
= "t.a.fifo_element[14].in.d.d[0]" "t.a.fifo_element[14].in.r"
|
||||
= "t.a.fifo_element[13].in.a" "t.a.fifo_element[12].out.a"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[12].out.r"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[12].out.d.d[0]"
|
||||
= "t.a.fifo_element[13].in.d.d[0]" "t.a.fifo_element[13].in.r"
|
||||
= "t.a.fifo_element[12].in.a" "t.a.fifo_element[11].out.a"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[11].out.r"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[11].out.d.d[0]"
|
||||
= "t.a.fifo_element[12].in.d.d[0]" "t.a.fifo_element[12].in.r"
|
||||
= "t.a.fifo_element[11].in.a" "t.a.fifo_element[10].out.a"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[10].out.r"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[10].out.d.d[0]"
|
||||
= "t.a.fifo_element[11].in.d.d[0]" "t.a.fifo_element[11].in.r"
|
||||
= "t.a.fifo_element[10].in.a" "t.a.fifo_element[9].out.a"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[9].out.r"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[9].out.d.d[0]"
|
||||
= "t.a.fifo_element[10].in.d.d[0]" "t.a.fifo_element[10].in.r"
|
||||
= "t.a.fifo_element[9].in.a" "t.a.fifo_element[8].out.a"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[8].out.r"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[8].out.d.d[0]"
|
||||
= "t.a.fifo_element[9].in.d.d[0]" "t.a.fifo_element[9].in.r"
|
||||
= "t.a.fifo_element[8].in.a" "t.a.fifo_element[7].out.a"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[7].out.r"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[7].out.d.d[0]"
|
||||
= "t.a.fifo_element[8].in.d.d[0]" "t.a.fifo_element[8].in.r"
|
||||
= "t.a.fifo_element[7].in.a" "t.a.fifo_element[6].out.a"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[6].out.r"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[6].out.d.d[0]"
|
||||
= "t.a.fifo_element[7].in.d.d[0]" "t.a.fifo_element[7].in.r"
|
||||
= "t.a.fifo_element[6].in.a" "t.a.fifo_element[5].out.a"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[5].out.r"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[5].out.d.d[0]"
|
||||
= "t.a.fifo_element[6].in.d.d[0]" "t.a.fifo_element[6].in.r"
|
||||
= "t.a.fifo_element[5].in.a" "t.a.fifo_element[4].out.a"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[4].out.r"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[4].out.d.d[0]"
|
||||
= "t.a.fifo_element[5].in.d.d[0]" "t.a.fifo_element[5].in.r"
|
||||
= "t.a.fifo_element[4].in.a" "t.a.fifo_element[3].out.a"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[3].out.r"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[3].out.d.d[0]"
|
||||
= "t.a.fifo_element[4].in.d.d[0]" "t.a.fifo_element[4].in.r"
|
||||
= "t.a.fifo_element[3].in.a" "t.a.fifo_element[2].out.a"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[2].out.r"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[2].out.d.d[0]"
|
||||
= "t.a.fifo_element[3].in.d.d[0]" "t.a.fifo_element[3].in.r"
|
||||
= "t.a.fifo_element[2].in.a" "t.a.fifo_element[1].out.a"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[1].out.r"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[1].out.d.d[0]"
|
||||
= "t.a.fifo_element[2].in.d.d[0]" "t.a.fifo_element[2].in.r"
|
||||
= "t.a.fifo_element[1].in.a" "t.a.fifo_element[0].out.a"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[0].out.r"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[0].out.d.d[0]"
|
||||
= "t.a.fifo_element[1].in.d.d[0]" "t.a.fifo_element[1].in.r"
|
||||
= "t.a._reset_BXX[0]" "t.a.reset_bufarray.out[0]"
|
||||
= "t.a._reset_BXX[1]" "t.a.reset_bufarray.out[1]"
|
||||
= "t.a._reset_BXX[2]" "t.a.reset_bufarray.out[2]"
|
||||
= "t.a._reset_BXX[3]" "t.a.reset_bufarray.out[3]"
|
||||
= "t.a._reset_BXX[4]" "t.a.reset_bufarray.out[4]"
|
||||
= "t.a._reset_BXX[5]" "t.a.reset_bufarray.out[5]"
|
||||
= "t.a._reset_BXX[6]" "t.a.reset_bufarray.out[6]"
|
||||
= "t.a._reset_BXX[7]" "t.a.reset_bufarray.out[7]"
|
||||
= "t.a._reset_BXX[8]" "t.a.reset_bufarray.out[8]"
|
||||
= "t.a._reset_BXX[9]" "t.a.reset_bufarray.out[9]"
|
||||
= "t.a._reset_BXX[10]" "t.a.reset_bufarray.out[10]"
|
||||
= "t.a._reset_BXX[11]" "t.a.reset_bufarray.out[11]"
|
||||
= "t.a._reset_BXX[12]" "t.a.reset_bufarray.out[12]"
|
||||
= "t.a._reset_BXX[13]" "t.a.reset_bufarray.out[13]"
|
||||
= "t.a._reset_BXX[14]" "t.a.reset_bufarray.out[14]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[13].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[13]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[12].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[12]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[11].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[11]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[10].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[10]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[9].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[9]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[8].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[8]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[7].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[7]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[6].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[6]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[5].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[5]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[4].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[4]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[3].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[3]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[2].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[2]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[1].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[1]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[0].reset_B"
|
||||
= "t.a._reset_BXX[14]" "t.a._reset_BXX[0]"
|
||||
= "t.a._reset_BXX[14]" "t.a.fifo_element[14].reset_B"
|
||||
= "t.a.in.d.d[0]" "t.a.in.r"
|
||||
= "t.a.in.a" "t.a.fifo_element[0].in.a"
|
||||
= "t.a.in.d.d[0]" "t.a.fifo_element[0].in.r"
|
||||
= "t.a.in.d.d[0]" "t.a.fifo_element[0].in.d.d[0]"
|
||||
= "t.a.in.d.d[0]" "t.a.in.r"
|
||||
= "t.a.out.d.d[0]" "t.a.out.r"
|
||||
= "t.a.out.a" "t.a.fifo_element[14].out.a"
|
||||
= "t.a.out.d.d[0]" "t.a.fifo_element[14].out.r"
|
||||
= "t.a.out.d.d[0]" "t.a.fifo_element[14].out.d.d[0]"
|
||||
= "t.a.out.d.d[0]" "t.a.out.r"
|
||||
= "Reset" "t.a.reset_B"
|
||||
= "Vdd" "t.a.supply.vdd"
|
||||
= "GND" "t.a.supply.vss"
|
||||
= "t.out.d.d[0]" "t.out.r"
|
||||
= "t.out.r" "t.a.out.r"
|
||||
= "t.out.a" "t.a.out.a"
|
||||
= "t.out.d.d[0]" "t.a.out.d.d[0]"
|
||||
= "t.out.d.d[0]" "t.out.r"
|
||||
= "t.in.d.d[0]" "t.in.r"
|
||||
= "t.in.r" "t.a.in.r"
|
||||
= "t.in.a" "t.a.in.a"
|
||||
= "t.in.d.d[0]" "t.a.in.d.d[0]"
|
||||
= "t.in.d.d[0]" "t.in.r"
|
||||
43
test/unit_tests/fifo_t_15/test.act
Normal file
43
test/unit_tests/fifo_t_15/test.act
Normal file
@ -0,0 +1,43 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/primitives.act";
|
||||
import globals;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
defproc fifo_test(a1of1 in; a1of1 out)
|
||||
{
|
||||
fifo_t<15> a(.in = in, .out = out);
|
||||
a.supply.vdd = Vdd;
|
||||
a.supply.vss = GND;
|
||||
a.reset_B = Reset;
|
||||
|
||||
}
|
||||
|
||||
fifo_test t;
|
||||
50
test/unit_tests/fifo_t_15/test.prsim
Normal file
50
test/unit_tests/fifo_t_15/test.prsim
Normal file
@ -0,0 +1,50 @@
|
||||
watchall
|
||||
system "echo '[0] code starts'"
|
||||
set t.in.r 0
|
||||
set t.out.a 0
|
||||
cycle
|
||||
set Reset 0
|
||||
cycle
|
||||
status X
|
||||
mode run
|
||||
set Reset 1
|
||||
cycle
|
||||
system "echo '[1] reset done'"
|
||||
system "echo '----------------------------------------------------------------------------------------------------'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '1 bit inside'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '2 bit inside'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '3 bit inside'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '4 bit inside'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '5 bit inside'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '6 bit inside'"
|
||||
set t.in.r 1
|
||||
cycle
|
||||
set t.in.r 0
|
||||
cycle
|
||||
system "echo '7 bit inside'"
|
||||
assert t.out.r 1
|
||||
|
||||
Binary file not shown.
Loading…
Reference in New Issue
Block a user