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completely cut out the neuron and synapse hs from core

This commit is contained in:
alexmadison 2022-04-21 14:07:15 +02:00
parent 41f240726c
commit 3443d46b9b
4 changed files with 323699 additions and 429994 deletions
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48
dataflow_neuro/chips.act
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@ -59,8 +59,8 @@ defproc texel_core (avMx1of2<N_IN> in, out;
// Dummy synapses and neurons in the handshake blocks
// should be removed pre-innovus, else they are floating.
a1of1 synapses[N_SYN_X * N_SYN_Y];
a1of1 neurons[N_NRN_X * N_NRN_Y];
// a1of1 synapses[N_SYN_X * N_SYN_Y];
// a1of1 neurons[N_NRN_X * N_NRN_Y];
// Synapse decoder stuff
// The analogue core and connects to these to replace the above synapses.
@ -119,12 +119,12 @@ defproc texel_core (avMx1of2<N_IN> in, out;
)
// Synapse handshake circuits, to be removed for innovus
decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> _synapses(
.synapses = synapses,
.in_req_x = dec_req_x, .in_req_y = dec_req_y,
.to_pu = syn_pu,
.out_ackB_decoder = dec_ackB,
.supply = supply);
// decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> _synapses(
// .synapses = synapses,
// .in_req_x = dec_req_x, .in_req_y = dec_req_y,
// .to_pu = syn_pu,
// .out_ackB_decoder = dec_ackB,
// .supply = supply);
// Neurons + encoder
pint NC_NRN;
@ -137,10 +137,10 @@ defproc texel_core (avMx1of2<N_IN> in, out;
.reset_B = _reset_BX, .supply = supply);
// Neuron handshake circuits, to be removed for innovus
nrn_hs_2d_array<N_NRN_X,N_NRN_Y> nrn_grid(.in = neurons,
.outx = enc_inx, .outy = enc_iny,
.to_pd_x = nrn_pd_x, .to_pd_y = nrn_pd_y,
.supply = supply, .reset_B = _reset_BX);
// nrn_hs_2d_array<N_NRN_X,N_NRN_Y> nrn_grid(.in = neurons,
// .outx = enc_inx, .outy = enc_iny,
// .to_pd_x = nrn_pd_x, .to_pd_y = nrn_pd_y,
// .supply = supply, .reset_B = _reset_BX);
@ -286,8 +286,8 @@ REG_NCA, REG_NCW, REG_M>
defproc texel_singlecore (bd<N_IN> in, out;
Mx1of2<REG_NCW> reg_data[REG_M];
a1of1 synapses[N_SYN_X * N_SYN_Y];
a1of1 neurons[N_NRN_X * N_NRN_Y];
// a1of1 synapses[N_SYN_X * N_SYN_Y];
// a1of1 neurons[N_NRN_X * N_NRN_Y];
bool! nrn_mon_x[N_NRN_MON_X], nrn_mon_y[N_NRN_MON_Y];
bool! syn_mon_x[N_SYN_MON_X], syn_mon_y[N_SYN_MON_Y];
@ -324,8 +324,8 @@ defproc texel_singlecore (bd<N_IN> in, out;
texel_core<N_IN,N_NRN_X, N_NRN_Y, N_SYN_X, N_SYN_Y,NC_NRN_X, NC_NRN_Y, NC_SYN_X, NC_SYN_Y,N_SYN_DLY_CFG,N_NRN_MON_X, N_NRN_MON_Y, N_SYN_MON_X, N_SYN_MON_Y,N_MON_AMZO_PER_SYN, N_MON_AMZO_PER_NRN,N_FLAGS_PER_SYN, N_FLAGS_PER_NRN,N_BUFFERS,N_LINE_PD_DLY, REG_NCA, REG_NCW, REG_M>
core(.in = fifo_fork2core.out,
.reg_data = reg_data,
.synapses = synapses,
.neurons = neurons,
// .synapses = synapses,
// .neurons = neurons,
.nrn_mon_x = nrn_mon_x, .nrn_mon_y = nrn_mon_y,
.syn_mon_x = syn_mon_x, .syn_mon_y = syn_mon_y,
.syn_mon_AMZI = syn_mon_AMZI, .nrn_mon_AMZI = nrn_mon_AMZI,
@ -371,8 +371,8 @@ defproc texel_dualcore (bd<N_IN> in, out;
Mx1of2<REG_NCW> c1_reg_data[REG_M];
a1of1 c1_synapses[N_SYN_X * N_SYN_Y];
a1of1 c1_neurons[N_NRN_X * N_NRN_Y];
// a1of1 c1_synapses[N_SYN_X * N_SYN_Y];
// a1of1 c1_neurons[N_NRN_X * N_NRN_Y];
bool! c1_dec_req_x[N_SYN_X], c1_dec_req_y[N_SYN_Y];
bool? c1_dec_ackB[N_SYN_X];
@ -389,8 +389,8 @@ defproc texel_dualcore (bd<N_IN> in, out;
Mx1of2<REG_NCW> c2_reg_data[REG_M];
a1of1 c2_synapses[N_SYN_X * N_SYN_Y];
a1of1 c2_neurons[N_NRN_X * N_NRN_Y];
// a1of1 c2_synapses[N_SYN_X * N_SYN_Y];
// a1of1 c2_neurons[N_NRN_X * N_NRN_Y];
bool! c2_dec_req_x[N_SYN_X], c2_dec_req_y[N_SYN_Y];
bool? c2_dec_ackB[N_SYN_X];
@ -438,8 +438,8 @@ defproc texel_dualcore (bd<N_IN> in, out;
core1(.in = fifo_dmx2core1.out,
.reg_data = c1_reg_data,
.synapses = c1_synapses,
.neurons = c1_neurons,
// .synapses = c1_synapses,
// .neurons = c1_neurons,
.dec_req_x = c1_dec_req_x, .dec_req_y = c1_dec_req_y,
.dec_ackB = c1_dec_ackB,
@ -463,8 +463,8 @@ defproc texel_dualcore (bd<N_IN> in, out;
core2(.in = fifo_dmx2core2.out,
.reg_data = c2_reg_data,
.synapses = c2_synapses,
.neurons = c2_neurons,
// .synapses = c2_synapses,
// .neurons = c2_neurons,
.dec_req_x = c2_dec_req_x, .dec_req_y = c2_dec_req_y,
.dec_ackB = c2_dec_ackB,

6
test/unit_tests/texel_dualcore/run/prsim.out
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test/unit_tests/texel_dualcore/run/test.prs
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27
test/unit_tests/texel_dualcore/test.act
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@ -137,10 +137,35 @@ defproc chip_texel_dualcore (bd<N_IN> in, out;
N_LINE_PD_DLY,
N_BD_DLY_CFG, N_BD_DLY_CFG2,
REG_NCA, REG_NCW, REG_M> c(.in = in, .out = out,
.c1_reg_data = c1_reg_data, .c1_synapses = c1_synapses, .c1_neurons = c1_neurons, .c1_dec_req_x = c1_dec_req_x, .c1_dec_req_y = c1_dec_req_y, .c1_dec_ackB = c1_dec_ackB, .c1_syn_pu = c1_syn_pu, .c1_enc_inx = c1_enc_inx, .c1_enc_iny = c1_enc_iny, .c1_nrn_pd_x = c1_nrn_pd_x, .c1_nrn_pd_y = c1_nrn_pd_y, .c1_nrn_mon_x = c1_nrn_mon_x, .c1_nrn_mon_y = c1_nrn_mon_y, .c1_syn_mon_x = c1_syn_mon_x, .c1_syn_mon_y = c1_syn_mon_y, .c1_syn_mon_AMZI = c1_syn_mon_AMZI, .c1_nrn_mon_AMZI = c1_nrn_mon_AMZI, .c1_syn_mon_AMZO = c1_syn_mon_AMZO, .c1_nrn_mon_AMZO = c1_nrn_mon_AMZO, .c1_syn_flags_EFO = c1_syn_flags_EFO, .c1_nrn_flags_EFO = c1_nrn_flags_EFO, .c2_reg_data = c2_reg_data, .c2_synapses = c2_synapses, .c2_neurons = c2_neurons, .c2_dec_req_x = c2_dec_req_x, .c2_dec_req_y = c2_dec_req_y, .c2_dec_ackB = c2_dec_ackB, .c2_syn_pu = c2_syn_pu, .c2_enc_inx = c2_enc_inx, .c2_enc_iny = c2_enc_iny, .c2_nrn_pd_x = c2_nrn_pd_x, .c2_nrn_pd_y = c2_nrn_pd_y, .c2_nrn_mon_x = c2_nrn_mon_x, .c2_nrn_mon_y = c2_nrn_mon_y, .c2_syn_mon_x = c2_syn_mon_x, .c2_syn_mon_y = c2_syn_mon_y, .c2_syn_mon_AMZI = c2_syn_mon_AMZI, .c2_nrn_mon_AMZI = c2_nrn_mon_AMZI, .c2_syn_mon_AMZO = c2_syn_mon_AMZO, .c2_nrn_mon_AMZO = c2_nrn_mon_AMZO, .c2_syn_flags_EFO = c2_syn_flags_EFO, .c2_nrn_flags_EFO = c2_nrn_flags_EFO, .bd_dly_cfg = bd_dly_cfg, .bd_dly_cfg2 = bd_dly_cfg2,
.c1_reg_data = c1_reg_data, .c1_dec_req_x = c1_dec_req_x, .c1_dec_req_y = c1_dec_req_y, .c1_dec_ackB = c1_dec_ackB, .c1_syn_pu = c1_syn_pu, .c1_enc_inx = c1_enc_inx, .c1_enc_iny = c1_enc_iny, .c1_nrn_pd_x = c1_nrn_pd_x, .c1_nrn_pd_y = c1_nrn_pd_y, .c1_nrn_mon_x = c1_nrn_mon_x, .c1_nrn_mon_y = c1_nrn_mon_y, .c1_syn_mon_x = c1_syn_mon_x, .c1_syn_mon_y = c1_syn_mon_y, .c1_syn_mon_AMZI = c1_syn_mon_AMZI, .c1_nrn_mon_AMZI = c1_nrn_mon_AMZI, .c1_syn_mon_AMZO = c1_syn_mon_AMZO, .c1_nrn_mon_AMZO = c1_nrn_mon_AMZO, .c1_syn_flags_EFO = c1_syn_flags_EFO, .c1_nrn_flags_EFO = c1_nrn_flags_EFO, .c2_reg_data = c2_reg_data, .c2_dec_req_x = c2_dec_req_x, .c2_dec_req_y = c2_dec_req_y, .c2_dec_ackB = c2_dec_ackB, .c2_syn_pu = c2_syn_pu, .c2_enc_inx = c2_enc_inx, .c2_enc_iny = c2_enc_iny, .c2_nrn_pd_x = c2_nrn_pd_x, .c2_nrn_pd_y = c2_nrn_pd_y, .c2_nrn_mon_x = c2_nrn_mon_x, .c2_nrn_mon_y = c2_nrn_mon_y, .c2_syn_mon_x = c2_syn_mon_x, .c2_syn_mon_y = c2_syn_mon_y, .c2_syn_mon_AMZI = c2_syn_mon_AMZI, .c2_nrn_mon_AMZI = c2_nrn_mon_AMZI, .c2_syn_mon_AMZO = c2_syn_mon_AMZO, .c2_nrn_mon_AMZO = c2_nrn_mon_AMZO, .c2_syn_flags_EFO = c2_syn_flags_EFO, .c2_nrn_flags_EFO = c2_nrn_flags_EFO, .bd_dly_cfg = bd_dly_cfg, .bd_dly_cfg2 = bd_dly_cfg2,
.loopback_en = loopback_en, .supply = supply, .reset_B = _reset_B);
decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> c1_syn_grid(
.synapses = c1_synapses,
.in_req_x = c1_dec_req_x, .in_req_y = c1_dec_req_y,
.to_pu = c1_syn_pu,
.out_ackB_decoder = c1_dec_ackB,
.supply = supply);
nrn_hs_2d_array<N_NRN_X,N_NRN_Y> c1_nrn_grid(.in = c1_neurons,
.outx = c1_enc_inx, .outy = c1_enc_iny,
.to_pd_x = c1_nrn_pd_x, .to_pd_y = c1_nrn_pd_y,
.supply = supply, .reset_B = _reset_B);
decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> c2_syn_grid(
.synapses = c2_synapses,
.in_req_x = c2_dec_req_x, .in_req_y = c2_dec_req_y,
.to_pu = c2_syn_pu,
.out_ackB_decoder = c2_dec_ackB,
.supply = supply);
nrn_hs_2d_array<N_NRN_X,N_NRN_Y> c2_nrn_grid(.in = c2_neurons,
.outx = c2_enc_inx, .outy = c2_enc_iny,
.to_pd_x = c2_nrn_pd_x, .to_pd_y = c2_nrn_pd_y,
.supply = supply, .reset_B = _reset_B);
}