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Merge remote-tracking branch 'origin/dev' into dev

This commit is contained in:
M. Mastella 2022-02-23 11:36:27 +01:00
parent 84cc93d2e1 04baa491eb
commit 4bf13b4859
3 changed files with 75 additions and 9 deletions
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76
dataflow_neuro/primitives.act
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@ -104,15 +104,15 @@ namespace tmpl {
*
*/
export template<pint N>
defproc buffer (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
defproc buffer (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B, c_f, c_t; power supply) {
//control
bool _en, _reset_BX,_reset_BXX[N];
A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=reset_B,.sr_B=reset_B,.vdd=supply.vdd,.vss=supply.vss);
A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
//reset_buffers
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
//validity
bool _in_v;
@ -150,17 +150,81 @@ namespace tmpl {
)
}
export template<pint N>
defproc demux (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
//control
bool _en, _reset_BX,_reset_BXX[N];
OR2_X1 out_or(.a=out.v1, .b=out.v2,.vdd=supply.vdd,.vss=supply.vss)
A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=_reset_BXX,.sr_B=_reset_BXX,.vdd=supply.vdd,.vss=supply.vss);
//validity
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
//validity
bool _in_v, _c_f_buf, _c_t_buf, _c_v;
sigbuf<N> c_buf_t(.in=c_t, .out=_c_t_buf)
sigbuf<N> c_buf_f(.in=c_f, .out=_c_f_buf)
OR2_X1 c_f_c_t_or(.a=_c_t_buf, .b=_c_f_buf, out._c_v)
ctree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
//function
bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
A_2C1N_RB_X4 f_buf_func[N];
A_2C1N_RB_X4 t_buf_func[N];
sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
INV_X1 out_a_inv(.a=out.a,.y=_out_a_B);
sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t);
sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f);
// check if you can also do single var to array connect a=b[N]
// and remove them from the loop
(i:N:
f_buf_func[i].y=out.d.d[i].f;
t_buf_func[i].y=out.d.d[i].t;
f_buf_func[i].c1=_en_X_f[i];
t_buf_func[i].c1=_en_X_t[i];
f_buf_func[i].c2=_out_a_BX_f[i];
t_buf_func[i].c2=_out_a_BX_t[i];
f_buf_func[i].n1=in.d.d[i].f;
t_buf_func[i].n1=in.d.d[i].t;
f_buf_func[i].vdd=supply.vdd;
t_buf_func[i].vdd=supply.vdd;
f_buf_func[i].vss=supply.vss;
t_buf_func[i].vss=supply.vss;
t_buf_func[i].pr_B = _reset_BXX[i];
t_buf_func[i].sr_B = _reset_BXX[i];
f_buf_func[i].pr_B = _reset_BXX[i];
f_buf_func[i].sr_B = _reset_BXX[i];
)
}
export template<pint N>
defproc fork (avMx1of2<N> in; avMx1of2<N> out1; avMx1of2<N> out2 ; bool? reset_B; power supply) {
// control
bool _en, _reset_BX,_reset_BXX[N*2];
A_4C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out1.v,.c4=out2.v,.y=in.a,.pr_B=reset_B,.sr_B=reset_B,.vdd=supply.vdd,.vss=supply.vss);
A_4C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out1.v,.c4=out2.v,.y=in.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
A_1C2P_X1 en_ctl(.c1=in.a,.p1=out1.v,.p2=out2.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
//reset_buffers
sigbuf<N*2> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N*2> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
//validity
bool _in_v;

1
test/unit_tests/ctree_15/run/test.prs
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@ -1,5 +1,6 @@
= "GND" "GND"
= "Vdd" "Vdd"
= "Reset" "Reset"
~"t.ctree_test.C2Els[0].c1"&~"t.ctree_test.C2Els[0].c2"->"t.ctree_test.C2Els[0]._y"+
"t.ctree_test.C2Els[0].c1"&"t.ctree_test.C2Els[0].c2"->"t.ctree_test.C2Els[0]._y"-
"t.ctree_test.C2Els[0]._y"->"t.ctree_test.C2Els[0].y"-

1
test/unit_tests/ctree_15/test.prsim
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@ -17,6 +17,7 @@ set t.in[12] 1
set t.in[13] 1
set t.in[14] 1
system "echo '1'"
cycle