bics/actlib_dataflow_neuro
21
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Async buffer test fully working

Browse Source
This commit is contained in:
M. Mastella 2022-02-22 18:04:21 +01:00
parent 7e86815e28
commit 53d11963fb
10 changed files with 1758 additions and 39 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
dataflow_neuro/cell_lib_async.act
View File

@ -287,7 +287,32 @@ namespace tmpl {
p_n_mode <- 1;
y {-1}}
}
export defcell A_2C1N_RB_X1(bool ! y; bool? c1, c2, n1, pr_B, sr_B; bool? vdd, vss)
{
bool _y;
prs{
(~c1 & ~c2) | ~pr_B -> _y+
c1 & c2 & n1 & sr_B -> _y-
_y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}}
}
export defcell A_2C1N_RB_X4(bool ! y; bool? c1, c2, n1, pr_B, sr_B; bool? vdd, vss)
{
bool _y;
prs{
(~c1 & ~c2) | ~pr_B -> _y+
c1 & c2 & n1 & sr_B -> _y-
_y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-4}; _y{-1}}
}
export defcell A_2C_X1 (bool ! y; bool? c1, c2; bool? vdd, vss)
{
prs{

40
dataflow_neuro/primitives.act
View File

@ -106,42 +106,44 @@ namespace tmpl {
export template<pint N>
defproc buffer (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
//control
bool _en,_en_X, _reset_BX,_reset_BXX[N];
A_3C_RB_X4 inack_ctl(.c1=_en_X,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=reset_B,.sr_B=reset_B,.vdd=supply.vdd,.vss=supply.vss);
bool _en, _reset_BX,_reset_BXX[N];
A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=reset_B,.sr_B=reset_B,.vdd=supply.vdd,.vss=supply.vss);
A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N*2> en_buf(.in=_en, .out=_en_X, .supply=supply);
sigbuf<N> reset_bufarray(.in=reset_BX, .out=_reset_BXX);
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX);
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
//validity
bool _in_v;
ctree<N> vc(.in=in.d,.y=_in_v,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<12> in_v_buf(.in=_in_v, .out=in.v,.vdd=supply.vdd,.vss=supply.vss);
ctree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
//function
bool _out_a_BX, _out_a_B;
A_2C1N_RB_X4 f_buf_func[N](.pr_B = reset_BXX,.sr_B = reset_BXX);
bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
A_2C1N_RB_X4 f_buf_func[N];
A_2C1N_RB_X4 t_buf_func[N];
sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
INV_X1 out_a_inv(.a=out.a,.y=_out_a_B);
sigbuf<N*2> out_a_B_buf(.a=_out_a_B,.y=_out_a_BX);
sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t);
sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f);
// check if you can also do single var to array connect a=b[N]
// and remove them from the loop
(i:N:
f_buf_func[i].y=out.d.d[i].f;
t_buf_func[i].y=out.d.d[i].t;
f_buf_func[i].c1=_en_X;
t_buf_func[i].c1=_en_X;
f_buf_func[i].c2=_out_a_BX;
t_buf_func[i].c2=_out_a_BX;
f_buf_func[i].c1=_en_X_f[i];
t_buf_func[i].c1=_en_X_t[i];
f_buf_func[i].c2=_out_a_BX_f[i];
t_buf_func[i].c2=_out_a_BX_t[i];
f_buf_func[i].n1=in.d.d[i].f;
t_buf_func[i].n1=in.d.d[i].t;
f_buf_func[i].pr_B=reset_B;
t_buf_func[i].pr_B=reset_B;
f_buf_func[i].sr_B=reset_B;
t_buf_func[i].sr_B=reset_B;
f_buf_func[i].vdd=supply.vdd;
t_buf_func[i].vdd=supply.vdd;
f_buf_func[i].vss=supply.vss;
t_buf_func[i].vss=supply.vss;
t_buf_func[i].pr_B = _reset_BXX[i];
t_buf_func[i].sr_B = _reset_BXX[i];
f_buf_func[i].pr_B = _reset_BXX[i];
f_buf_func[i].sr_B = _reset_BXX[i];
)
}
}

21
dataflow_neuro/treegates.act
View File

@ -23,7 +23,8 @@
**************************************************************************/
import "../../dataflow_neuro/cell_lib_async.act";
import "../../dataflow_neuro/cell_lib_std.act";
import std::channel;
open std::channel;
namespace tmpl {
namespace dataflow_neuro {
@ -144,7 +145,7 @@ defproc ortree (bool? in[N]; bool! out; power supply)
* C-elements
*/
export template<pint N>
defproc ctree (bool? in[N]; bool! out; power supply)
defproc ctree (std::data::Mx1of2?<N> in; bool! out; power supply)
{
bool tout;
@ -180,7 +181,19 @@ defproc ctree (bool? in[N]; bool! out; power supply)
/* array that holds ALL the nodes in the completion tree */
bool tmp[end+1];
(k:N:tmp[k] = in[k];)
// OR layer for making OR between true and false of in (they are then sent to Ctree)
OR2_X1 OR2_tf[N];
(l:N:
OR2_tf[l].a = in.d[l].t;
OR2_tf[l].b = in.d[l].f;
OR2_tf[l].y = tmp[l];
// OR2_tf[i].a = supply.vdd;
// OR2_tf[i].b = supply.vdd;
// OR2_tf[i].y = supply.vdd;
OR2_tf[l].vdd = supply.vdd;
OR2_tf[l].vss = supply.vss;
)
//(k:N:tmp[k] = in[k];)
/* array to hold the actual C-elments, either A2C or A3C */
A_2C_B_X1 C2Els[lenTree2Count];
@ -269,7 +282,7 @@ defproc sigbuf (bool? in; bool! out[N]; power supply)
[] N >= 30 & N <= 42 ->
BUF_X12 buf12 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss);
]
(i:1..N:y[i]=y[0];)
(i:1..N-1:out[i]=out[0];)
}
}}

5
test/unit_tests/buf_15/run/prsim.out Normal file
View File

@ -0,0 +1,5 @@
t.buffer_test._en t.buffer_test._out_a_BX_f[0] t.buffer_test._out_a_BX_t[0] t.buffer_test.f_buf_func[0].n1 t.buffer_test.t_buf_func[7].n1 t.buffer_test.t_buf_func[12].n1 t.buffer_test.f_buf_func[8].n1 t.buffer_test.t_buf_func[10].n1 t.buffer_test._en_X_t[0] t.buffer_test.t_buf_func[3].n1 t.buffer_test.f_buf_func[5].n1 t.out.a t.buffer_test.t_buf_func[11].n1 t.buffer_test.vc.tmp[8] t.buffer_test.f_buf_func[4].n1 t.buffer_test.vc.tmp[0] t.buffer_test.vc.tmp[22] t.buffer_test.f_buf_func[6].n1 t.buffer_test.t_buf_func[2].n1 t.buffer_test.t_buf_func[9].n1 t.buffer_test.f_buf_func[13].n1 t.buffer_test.vc.tmp[18] t.buffer_test.t_buf_func[14].n1 t.buffer_test.vc.tmp[5] t.buffer_test.f_buf_func[7].n1 t.buffer_test.f_buf_func[12].n1 t.buffer_test.t_buf_func[4].n1 t.buffer_test._en_X_f[0] t.buffer_test.vc.tmp[10] t.buffer_test.f_buf_func[14].n1 t.buffer_test.out_a_B_buf_t.buf6._y t.buffer_test.vc.tmp[19] t.buffer_test.t_buf_func[8].n1 t.buffer_test.f_buf_func[9].n1 t.buffer_test.f_buf_func[2].n1 t.buffer_test.vc.tmp[16] t.buffer_test.t_buf_func[1].n1 t.buffer_test.f_buf_func[10].n1 t.buffer_test.vc.tmp[2] t.buffer_test.vc.tmp[14] t.buffer_test.vc.tmp[12] t.buffer_test.vc.tmp[1] t.buffer_test._out_a_B t.buffer_test.f_buf_func[1].n1 t.buffer_test.vc.tmp[4] t.buffer_test.out_a_B_buf_f.buf6._y t.buffer_test.vc.tmp[15] t.buffer_test.vc.tmp[11] t.buffer_test.vc.tmp[13] t.in.v t.buffer_test.vc.OR2_tf[0]._y t.buffer_test.vc.tmp[6] t.buffer_test.vc.tmp[9] t.buffer_test.vc.tmp[24] t.buffer_test.vc.tmp[23] t.buffer_test.vc.OR2_tf[14]._y t.buffer_test._in_v t.buffer_test.t_buf_func[0].n1 t.buffer_test.vc.OR2_tf[4]._y t.buffer_test.t_buf_func[5].n1 t.buffer_test.t_buf_func[6].n1 t.buffer_test.t_buf_func[13].n1 t.buffer_test.f_buf_func[3].n1 t.buffer_test.vc.tmp[7] t.buffer_test.vc.C2Els[0]._y t.buffer_test.vc.OR2_tf[5]._y t.buffer_test.vc.tmp[20] t.buffer_test.en_buf_f.buf6._y t.out.v t.buffer_test.vc.OR2_tf[10]._y t.buffer_test.vc.OR2_tf[8]._y t.buffer_test.vc.OR2_tf[3]._y t.buffer_test.vc.C2Els[7]._y t.buffer_test.vc.C2Els[1]._y t.buffer_test.vc.OR2_tf[6]._y t.buffer_test.vc.C3Els[0]._y t.buffer_test.vc.C2Els[3]._y t.buffer_test.f_buf_func[11].n1 t.buffer_test.vc.tmp[21] t.buffer_test.vc.OR2_tf[11]._y t.buffer_test.in_v_buf._y t.buffer_test.vc.OR2_tf[12]._y t.buffer_test.vc.C2Els[2]._y t.buffer_test.vc.tmp[17] t.buffer_test.vc.tmp[3] t.buffer_test.vc.OR2_tf[2]._y t.buffer_test.vc.OR2_tf[7]._y t.buffer_test.vc.OR2_tf[1]._y t.buffer_test.vc.C3Els[1]._y t.buffer_test.vc.C2Els[4]._y t.buffer_test.vc.OR2_tf[13]._y t.buffer_test.vc.C2Els[6]._y t.buffer_test.vc.OR2_tf[9]._y t.buffer_test.en_buf_t.buf6._y t.buffer_test.vc.C3Els[2]._y t.buffer_test.vc.C2Els[5]._y
yo man
reset completed
ALLELUHIA

1663
test/unit_tests/buf_15/run/test.prs
View File

File diff suppressed because it is too large Load Diff

7
test/unit_tests/buf_15/test.act
View File

@ -31,9 +31,9 @@ import globals;
open tmpl::dataflow_neuro;
defproc buffer_15 (avMx1of2<N> in; avMx1of2<N> out){
buffer<15> buffer_test(.in=in, .out=out, .reset_B = Reset);
defproc buffer_15 (avMx1of2<15> in; avMx1of2<15> out){
buffer<15> buffer_test(.in=in, .out=out);
//Low active Reset
bool _reset_B;
prs {
@ -41,6 +41,7 @@ defproc buffer_15 (avMx1of2<N> in; avMx1of2<N> out){
}
buffer_test.supply.vss = GND;
buffer_test.supply.vdd = Vdd;
buffer_test.reset_B = _reset_B;
}

21
test/unit_tests/buf_15/test.prsim
View File

@ -1,16 +1,29 @@
set-channel-neutral "t.in" 15
set-qdi-channel-neutral "t.in" 15
set t.out.a 0
set t.out.v 0
cycle
system "echo 'yo man'"
set t.reset 1
set Reset 0
cycle
system "echo 'reset completed'"
status X
mode run
assert-qdi-channel-neutral "t.out" 15
cycle
assert t.out.d 0
set-qdi-channel-valid "t.in" 15 5
cycle
assert t.in.v 1
assert t.in.a 0
assert-qdi-channel-valid "t.out" 15 5
set t.out.v 1
cycle
assert t.in.a 1
set-qdi-channel-neutral "t.in" 15
cycle
set t.out.a 1
system "echo 'ALLELUHIA'"

3
test/unit_tests/ctree_15/run/prsim.out
View File

@ -1,3 +0,0 @@
t.ctree_test.tmp[22] t.ctree_test.C2Els[0]._y t.ctree_test.tmp[17] t.in[14] t.in[4] t.in[2] t.in[8] t.in[13] t.ctree_test.tmp[21] t.ctree_test.tmp[23] t.out t.in[12] t.in[6] t.in[7] t.in[10] t.in[5] t.ctree_test.tmp[19] t.ctree_test.tmp[18] t.ctree_test.C3Els[0]._y t.in[3] t.ctree_test.tmp[24] t.ctree_test.C3Els[2]._y t.ctree_test.C2Els[4]._y t.in[0] t.in[1] t.ctree_test.tmp[15] t.ctree_test.tmp[16] t.in[11] t.ctree_test.tmp[20] t.ctree_test.C2Els[7]._y t.in[9] t.ctree_test.C2Els[2]._y t.ctree_test.C2Els[1]._y t.ctree_test.C2Els[6]._y t.ctree_test.C2Els[5]._y t.ctree_test.C2Els[3]._y t.ctree_test.C3Els[1]._y
0
1

8
test/unit_tests/helper.scm
View File

@ -44,13 +44,13 @@
)
)
(define assert-channel-valid
(define assert-qdi-channel-valid
(lambda (ch width value)
(assert-var-int (string-append ch ".d") width value)
)
)
(define assert-channel-neutral
(define assert-qdi-channel-neutral
(lambda (ch width)
(letrec ((helper
(lambda (i)
@ -74,7 +74,7 @@
)
(define set-channel-neutral
(define set-qdi-channel-neutral
(lambda (ch width)
(letrec ((ch-name (string-append ch ".d"))
(helper
@ -97,7 +97,7 @@
)
)
(define set-channel-valid
(define set-qdi-channel-valid
(lambda (ch width val)
(letrec ((ch-name (string-append ch ".d"))
(helper

2
test/unit_tests/init_qdi.prsim
View File

@ -3,7 +3,7 @@ load-scm "helper.scm"
random
set GND 0
set Vdd 1
set Reset 0
set Reset 1
mode reset
cycle