bics/actlib_dataflow_neuro
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XMerge branch 'madison_chip_dev' into dev

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alexmadison
2022-04-04 17:49:45 +02:00
parent 0ade5522a2 c462be605d
commit 5fbd435ca2
35 changed files with 49394 additions and 16552 deletions
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30
dataflow_neuro/chips.act
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@ -87,6 +87,7 @@ NC_NRN_X, NC_NRN_Y, NC_SYN_X, NC_SYN_Y,
N_SYN_DLY_CFG,
N_NRN_MON_X, N_NRN_MON_Y, N_SYN_MON_X, N_SYN_MON_Y,
N_BUFFERS,
N_LINE_PD_DLY, // Number of dummy delays to add line pull down
N_BD_DLY_CFG,
REG_NCA, REG_NCW, REG_M>
@ -117,6 +118,7 @@ defproc chip_texel (bd<N_IN> in, out;
fifo<N_IN-1,N_BUFFERS> fifo_dmx2reg(.in = _demux.out2, .reset_B = reset_B, .supply = supply);
registerA_wr_array<REG_NCA, REG_NCW, REG_M> register(.in = fifo_dmx2reg.out, .data = reg_data,
.supply = supply, .reset_B = reset_B);
fifo<N_IN-2,N_BUFFERS> fifo_reg2mrg(.in = register.out, .reset_B = reset_B, .supply = supply);
// TO ADD: nrn/syn mon decoders
@ -126,22 +128,28 @@ defproc chip_texel (bd<N_IN> in, out;
decoder_2d_hybrid<NC_SYN_X, NC_SYN_Y, N_SYN_X, N_SYN_Y, N_SYN_DLY_CFG> decoder(.in = fifo_dmx2dec.in,
.out = synapses,
.hs_en = register.data[0].d[0].f, // Defaults to handshake disable
.supply = supply, .reset_B = reset_B)
.supply = supply, .reset_B = reset_B);
(i:N_SYN_DLY_CFG: decoder.dly_cfg[i] = register.data[0].d[1 + i].t); // Defaults to max delay
// Neurons + encoder
pbool NC_NRN;
NC_NRN = NC_NRN_X + NC_NRN_Y;
nrn_hs_2D_array<N_NRN_X,N_NRN_Y,N_LINE_PD_DLY> nrn_grid(.in = neurons,
.supply = supply, .reset_B = reset_B);
encoder2D<NC_NRN_X, NC_NRN_Y, N_NRN_X, N_NRN_Y, 16> encoder(
.inx = nrn_grid.outx,
.iny = nrn_grid.outy,
.reset_B = reset_B, .supply = supply
)
fifo<NC_NRN, N_BUFFERS> fifo_enc2mrg(.in = encoder.out,
.reset_B = reset_B, .supply = supply);
append<NC_NRN, N_IN-NC_NRN,0> append_enc(.in = fifo_enc2mrg.in, )
// Merge
merge<> merge_enc8reg
}
}