pushed merge in primitives.act

dataflow_neuro/primitives.act

@@ -444,6 +444,74 @@ namespace tmpl {
             BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
         }
 
+        export template<pint N>
+        defproc merge (avMx1of2<N> in1; avMx1of2<N> in2; avMx1of2<N> out ; bool? reset_B; power supply) {
+
+          //control
+          bool _in1_a_B,_in2_a_B,_en, _reset_BX,_reset_BXX[2*N];
+          bool _in1_arb,_in2_arb,_out_a_X[2*N+1];
+          A_4C_RB_X4 in1ack_ctl(.c1=_in1_arb,.c2=_en,.c3=in1.v,.c4=out.v,.y=in1.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          A_4C_RB_X4 in2ack_ctl(.c1=_in2_arb,.c2=_en,.c3=in2.v,.c4=out.v,.y=in2.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          A_4P1N1N_X1 en_ctl(.p1 = in1.a,.p2=in2.a,.p3=_out_a_X[N],.p4 = out.v, .n1 = in1.a,.y = _en,.vdd=supply.vdd,.vss=supply.vss);
+          INV_X1 in1ack_ctl_inv(.a=in1.a,.y=_in1_a_B,.vdd=supply.vdd,.vss=supply.vss);
+          INV_X1 in2ack_ctl_inv(.a=in2.a,.y=_in2_a_B,.vdd=supply.vdd,.vss=supply.vss);
+
+          //reset_buffers
+          BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
+          sigbuf<N*2> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
+
+          //validity
+          a1of1 _in1_temp,_in2_temp,_out_temp;
+
+          bool _in1_arb2function,_in2_arb2function;
+          bool _in1_arb2function_X[2*N],_in2_arb2function_X[2*N];
+
+          valtree<N> vc1(.in=in1.d,.out=in1.v,.supply=supply);
+          valtree<N> vc2(.in=in2.d,.out=in2.v,.supply=supply);
+          arbiter_handshake validity_arb(.in1 = _in1_temp,.in2 = _in2_temp,.out =_out_temp);
+          _in1_temp.r = in1.v;
+          _in2_temp.r = in2.v;
+          _in1_temp.a = _in1_arb;
+          _in1_temp.a = _in2_arb;
+          _out_temp.r = _out_temp.a;
+          AND2_X1 AND_arb1(.a = _in2_a_B,.b = _in1_arb, .y = _in1_arb2function);
+          AND2_X1 AND_arb2(.a = _in1_a_B,.b = _in2_arb, .y = _in2_arb2function);
+          sigbuf<2*N> arb2function1(.in = _in1_arb2function,.out = _in1_arb2function_X);
+          sigbuf<2*N> arb2function2(.in = _in2_arb2function,.out = _in2_arb2function_X);
+
+          //function
+          A_2C2N2N_R_X1 merge_func_t[N];
+          A_2C2N2N_R_X1 merge_func_f[N];
+          sigbuf<N*2+1> buf_out_a(.in = out.a,.out = _out_a_X);
+          buf_out_a.supply=supply;
+          buf_out_a.supply=supply;
+          (i:N: 
+            merge_func_t[i].c1 = _en;
+            merge_func_t[i].c2 = _out_a_X[i];
+            merge_func_t[i].n1 = _in1_arb2function_X[i];
+            merge_func_t[i].n2 = in1.d.d[i].t;
+            merge_func_t[i].n3 = _in2_arb2function_X[i];
+            merge_func_t[i].n4 = in2.d.d[i].t;
+            merge_func_t[i].y = out.d.d[i].t;
+            merge_func_t[i].vdd=supply.vdd;
+            merge_func_t[i].vss=supply.vss;
+            merge_func_t[i].pr_B = _reset_BXX[i+N-1];
+            merge_func_t[i].sr_B = _reset_BXX[i+N-1];
+
+            merge_func_f[i].c1 = _en;
+            merge_func_f[i].c2 = _out_a_X[i+N-1];
+            merge_func_f[i].n1 = _in1_arb2function_X[i+N-1];
+            merge_func_f[i].n2 = in1.d.d[i].f;
+            merge_func_f[i].n3 = _in2_arb2function_X[i+N-1];
+            merge_func_f[i].n4 = in2.d.d[i].f;
+            merge_func_f[i].y = out.d.d[i].f;
+            merge_func_f[i].vdd=supply.vdd;
+            merge_func_f[i].vss=supply.vss;
+            merge_func_f[i].pr_B = _reset_BXX[i];
+            merge_func_f[i].sr_B = _reset_BXX[i];
+            )
+        }
+ 
         export 
         defproc buffer_t(a1of1 in; a1of1 out; bool? reset_B; power supply)
         {

test/unit_tests/arbiter/run/prsim.out

@@ -0,0 +1,39 @@
+a._v a.a a.u a.v a._u a.b 
+reset done
+	         0 a.a : 0
+	         0 a.b : 0
+	         1 a._u : 1  [by a.a:=0]
+	      7092 a._v : 1  [by a.b:=0]
+	      7094 a.v : 0  [by a._v:=1]
+	     10468 a.u : 0  [by a._u:=1]
+
+step 1.1 finished
+	     10468 a.a : 1
+	     10468 a.b : 1
+	     15221 a._u : 0  [by a.a:=1]
+	     15335 a.u : 1  [by a._u:=0]
+
+step 1.2 finished
+	     15335 a.a : 0
+	     15335 a.b : 0
+	     80701 a._u : 1  [by a.a:=0]
+	     82427 a.u : 0  [by a._u:=1]
+
+step 2.1 finished
+	     82427 a.a : 1
+	     82427 a.b : 1
+	     82466 a._u : 0  [by a.a:=1]
+	     82957 a.u : 1  [by a._u:=0]
+
+step 2.2 finished
+	     82957 a.a : 0
+	     82957 a.b : 0
+	     82970 a._u : 1  [by a.a:=0]
+	     83010 a.u : 0  [by a._u:=1]
+
+step 3.1 finished
+	     83010 a.b : 1
+	     83425 a._v : 0  [by a.b:=1]
+	     83445 a.v : 1  [by a._v:=0]
+
+step 3.2 finished

test/unit_tests/arbiter/test.act

@@ -0,0 +1,18 @@
+defproc arbiter (bool a, b, u, v)
+{
+  bool _u, _v;
+  prs {
+   [keeper=0]  a &  _v -> _u-
+   [keeper=0] ~a  | ~_v  -> _u+
+   [keeper=0]  b &  _u -> _v-
+   [keeper=0] ~b  | ~_u  -> _v+
+   [keeper=0] _u  => u-
+   [keeper=0] _v => v-
+  }
+  spec {
+    mk_excllo(_u, _v)
+  }
+}
+
+
+arbiter a;

test/unit_tests/arbiter/test.prsim

@@ -0,0 +1,39 @@
+watchall
+cycle
+system "echo 'reset done'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 1.1 finished'"
+set a.a 1
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 1.2 finished'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 2.1 finished'"
+set a.a 1
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 2.2 finished'"
+set a.a 0
+set a.b 0
+advance 1000000
+status X
+mode run
+system "echo 'step 3.1 finished'"
+set a.a 0
+set a.b 1
+advance 1000000
+status X
+mode run
+system "echo 'step 3.2 finished'"