encoder in register works
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Michele committed
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4 files changed
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@@ -83,9 +83,9 @@ defproc register_rw (avMx1of2<1+log_nw+wl> in; d1of<wl> data[2<<log_nw]; power s
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(pin_idx:log_nw:
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(pin_idx:log_nw:
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_bitval = (_word_idx & ( 1 << pin_idx )) >> pin_idx; // Get binary digit of integer i, column j
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_bitval = (_word_idx & ( 1 << pin_idx )) >> pin_idx; // Get binary digit of integer i, column j
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[_bitval = 1 ->
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[_bitval = 1 ->
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atree[_word_idx].in[pin_idx] = in.d.d[pin_idx+1].t;
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atree[_word_idx].in[pin_idx] = in.d.d[pin_idx+wl].t;
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[] _bitval = 0 ->
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[] _bitval = 0 ->
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atree[_word_idx].in[pin_idx] = in.d.d[pin_idx+1].f;
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atree[_word_idx].in[pin_idx] = in.d.d[pin_idx+wl].f;
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[]_bitval >= 2 -> {false : "fuck"};
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[]_bitval >= 2 -> {false : "fuck"};
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]
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]
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)
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)
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@@ -98,15 +98,7 @@ defproc register_rw (avMx1of2<1+log_nw+wl> in; d1of<wl> data[2<<log_nw]; power s
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and_encoder[_word_idx].vss = supply.vss;
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and_encoder[_word_idx].vss = supply.vss;
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clock_buffer[_word_idx].in = _clock_word_temp[_word_idx];
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clock_buffer[_word_idx].in = _clock_word_temp[_word_idx];
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clock_buffer[_word_idx].supply = supply;
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clock_buffer[_word_idx].supply = supply;
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// Describing all the FF and their connection
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(_bit_idx:wl:
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ff[_bit_idx*(1+_word_idx)].clk = clock_buffer[_word_idx].out[_bit_idx];
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ff[_bit_idx*(1+_word_idx)].d = in.d.d[_bit_idx+1+log_nw].t;
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ff[_bit_idx*(1+_word_idx)].q = data[_word_idx].d[_bit_idx];
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ff[_bit_idx*(1+_word_idx)].reset_B = _reset_mem_BXX[_bit_idx*(1+_word_idx)];
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ff[_bit_idx*(1+_word_idx)].vdd = supply.vdd;
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ff[_bit_idx*(1+_word_idx)].vss = supply.vss;
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)
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)
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)
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}
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}
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}}
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}}
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@@ -1,4 +1,4 @@
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t.registers.ff[4].q t.registers._clock_word_temp[0] t.registers.ff[15].reset_B t.registers.atree[0].in[0] t.registers._clock_temp t.registers.ack_dly._a[1] t.dly_cfg[1] t.registers.ff[5].reset_B t.registers.ff[8].d t.registers._clock t.registers.clk_dly.and2[0]._y t.in.d.d[0].t t.registers.ff[2].reset_B t.registers.ff[7].clk t.registers.ff[12]._sqib t.registers.ack_dly.dly[1].__y t.registers.clock_buffer[2].out[0] t.registers.val_input.ct.in[1] t.registers.ff[1].clk t.registers.ff[5]._mqi t.registers.clock_buffer[5].out[0] t.registers.ff[8]._clk t.registers.ff[7]._mqib t.registers.ff[15].q t.in.d.d[4].f t.registers._clock_word_temp[2] t.registers.clk_dly.dly[2]._y t.registers.ack_dly.dly[1].___y t.registers.ff[4].reset_B t.registers.ff[13]._clk t.registers._out_encoder[3] t.registers.clock_buffer[1].buf1._y t.registers.ff[11]._mqi t.registers.ff[13]._mqib t.in.d.d[3].t t.dly_cfg[0] t.registers.ff[4].__clk t.registers._in_v_temp t.registers.atree[1].in[0] t.registers._out_encoder[2] t.registers.ff[6].clk t.registers.ff[14]._mqi t.registers._out_encoder[1] t.registers.clk_dly.and2[1]._y t.registers.atree[2].in[1] t.registers.val_input.ct.in[0] t.registers.ack_dly.dly[2]._y t.registers._in_a_temp t.registers.ff[3].__clk t.in.d.d[0].f t.registers.clk_dly.dly[1].y t.registers.ff[1].__clk t.in.v t.registers._clock_word_temp[5] t.registers.clock_buffer[0].out[0] t.registers.clock_buffer[4].out[0] t.registers.clk_dly.dly[2].y t.registers.ff[0].q t.in.d.d[4].t t.registers.ff[0].clk t.registers.ff[14]._clk t.registers.clk_dly.dly[1].a t.registers.ff[10]._mqib t.registers._clock_word_temp[3] t.registers._out_encoder[7] t.registers.ff[6].__clk t.registers.ff[0]._sqib t.registers.ff[9]._clk t.registers.ff[15]._mqib t.registers.ack_dly.dly[0].___y t.registers.ff[11].__clk t.registers._out_encoder[4] t.registers.val_input.ct.in[3] t.registers.ff[7]._mqi t.registers._out_encoder[5] t.registers.ff[5].q t.registers.ff[1]._sqi t.registers.ff[1]._sqib t.registers.ff[7]._clk t.registers._clock_word_temp[4] t.registers.atree[0].in[1] t.registers.clock_buffer[0].buf1._y t.registers._out_encoder[0] t.registers.ack_dly.dly[2].___y t.registers._clock_word_temp[7] t.registers.clock_buffer[6].out[0] t.registers.ff[10].reset_B t.registers.ff[3]._clk t.registers.ff[13]._sqi t.registers.ff[2]._mqi t.registers._clock_word_temp[6] t.registers.ack_dly.mu2[0]._y t.registers.atree[1].and2s[0]._y t.registers.clk_dly._a[1] t.registers.val_input.ct.in[4] t.registers.ff[11]._sqi t.registers.ff[3].reset_B t.registers.ff[6]._mqi t.registers.ff[10].clk t.registers.val_input.OR2_tf[3]._y t.registers.ff[5].__clk t.registers.clk_X.buf1._y t.registers.ff[11]._clk t.registers.ff[0].d t.registers.ff[14]._sqi t.registers.ff[7]._sqib t.registers.clk_dly.dly[0].___y t.registers.ff[8].q t.registers._clock_word_temp[1] t.registers.and_encoder[2]._y t.registers.clk_dly.dly[1].___y t.registers.ff[5]._sqib t.registers._out_encoder[6] t.registers.ff[6].reset_B t.registers.clock_buffer[4].buf1._y t.in.a t.registers.clk_dly.mu2[1]._s t.registers.ff[5].d t.registers.ff[9]._mqib t.registers.clk_dly.dly[0]._y t.registers.ff[4]._mqib t.registers.ff[8]._sqi t.in.d.d[3].f t.registers.val_input.OR2_tf[2]._y t.registers.val_input.ct.in[2] t.registers.ff[14].q t.registers.val_input.ct.tmp[6] t.registers.clk_dly.dly[1]._y t.registers.ff[13].q t.registers.ff[1].d t.registers.ff[2]._clk t.registers.ff[10].__clk t.registers.ff[3]._mqib t.registers.ack_dly.dly[2].y t.registers.atree[6].and2s[0]._y t.registers.atree[0].and2s[0]._y t.registers.clock_buffer[3].out[0] t.registers.ff[2]._sqi t.registers.ff[3].clk t.registers.ff[3].d t.registers.ff[1]._mqi t.registers.ff[12].clk t.registers.clk_dly.mu2[1]._y t.registers.ff[9]._mqi t.registers.ff[8]._mqib t.registers.clk_dly.mu2[0]._s t.registers.ff[10].q t.registers.ack_dly.dly[0]._y t.registers.clk_dly.dly[0].a t.registers.ff[2].q t.registers.ff[4]._sqib t.registers.ack_dly.dly[0].a t.registers.ff[11].reset_B t.registers.clock_buffer[2].buf1._y t.registers.ff[10]._sqi t.registers.ff[15]._clk t.registers.ff[13]._sqib t.registers.ff[9].clk t.registers.ff[14].reset_B t.registers.ff[7].d t.registers.ff[4].d t.registers.ff[7]._sqi t.registers.clk_dly.dly[1].__y t.registers.ff[15].clk t.registers.ff[6]._mqib t.registers.clk_dly.dly[0].y t.registers.ff[2].__clk t.registers.ff[2]._sqib t.registers.clk_dly.mu2[0]._y t.registers.ff[9].reset_B t.registers.ff[10].d t.registers.ff[1].q t.registers.ff[3]._sqi t.registers.ff[5]._mqib t.registers.ff[6].d t.registers.ff[13].clk t.registers.ff[6]._clk t.registers.clock_buffer[7].out[0] t.registers.ff[5]._sqi t.registers.ff[12]._sqi t.registers.ff[9]._sqi t.registers.atree[7].and2s[0]._y t.registers.ff[4]._clk t.registers.clock_buffer[3].buf1._y t.registers.clock_buffer[1].out[0] t.registers.val_input.ct.tmp[5] t.registers.ff[12]._mqi t.registers.atree[4].and2s[0]._y t.registers.ack_dly.dly[1]._y t.registers.ff[9].__clk t.registers.ff[14].d t.registers.and_encoder[0]._y t.registers.ff[13]._mqi t.registLine truncated
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t.registers.ff[4].q t.registers._clock_word_temp[0] t.registers.ff[15].reset_B t.in.d.d[1].f t.registers._clock_temp t.registers.ack_dly._a[1] t.dly_cfg[1] t.registers.ff[5].reset_B t.registers.ff[8].d t.registers._clock t.registers.clk_dly.and2[0]._y t.in.d.d[0].t t.registers.ff[2].reset_B t.registers.ff[7].clk t.registers.ff[12]._sqib t.registers.ack_dly.dly[1].__y t.registers.clock_buffer[2].out[0] t.registers.val_input.ct.in[1] t.registers.ff[1].clk t.registers.ff[5]._mqi t.registers.clock_buffer[5].out[0] t.registers.ff[8]._clk t.registers.ff[7]._mqib t.registers.ff[15].q t.in.d.d[4].f t.registers._clock_word_temp[2] t.registers.clk_dly.dly[2]._y t.registers.ack_dly.dly[1].___y t.registers.ff[4].reset_B t.registers.ff[13]._clk t.registers._out_encoder[3] t.registers.clock_buffer[1].buf1._y t.registers.ff[11]._mqi t.registers.ff[13]._mqib t.registers.atree[2].in[1] t.dly_cfg[0] t.registers.ff[4].__clk t.registers._in_v_temp t.registers.atree[1].in[0] t.registers._out_encoder[2] t.registers.ff[6].clk t.registers.ff[14]._mqi t.registers._out_encoder[1] t.registers.clk_dly.and2[1]._y t.registers.val_input.ct.in[0] t.registers.atree[0].in[0] t.registers.ack_dly.dly[2]._y t.registers._in_a_temp t.registers.ff[3].__clk t.in.d.d[0].f t.registers.clk_dly.dly[1].y t.registers.ff[1].__clk t.in.v t.registers._clock_word_temp[5] t.registers.clock_buffer[0].out[0] t.registers.clock_buffer[4].out[0] t.registers.clk_dly.dly[2].y t.registers.ff[0].q t.in.d.d[4].t t.registers.ff[0].clk t.registers.ff[14]._clk t.registers.clk_dly.dly[1].a t.registers.ff[10]._mqib t.registers._clock_word_temp[3] t.registers._out_encoder[7] t.registers.ff[6].__clk t.registers.ff[0]._sqib t.registers.ff[9]._clk t.registers.ff[15]._mqib t.registers.ack_dly.dly[0].___y t.registers.ff[11].__clk t.registers._out_encoder[4] t.registers.val_input.ct.in[3] t.registers.ff[7]._mqi t.registers._out_encoder[5] t.registers.ff[5].q t.in.d.d[1].t t.registers.ff[1]._sqi t.registers.ff[1]._sqib t.registers.ff[7]._clk t.registers._clock_word_temp[4] t.registers.clock_buffer[0].buf1._y t.registers._out_encoder[0] t.registers.ack_dly.dly[2].___y t.registers._clock_word_temp[7] t.registers.clock_buffer[6].out[0] t.registers.ff[10].reset_B t.registers.ff[3]._clk t.registers.ff[13]._sqi t.registers.ff[2]._mqi t.registers._clock_word_temp[6] t.registers.ack_dly.mu2[0]._y t.registers.atree[1].and2s[0]._y t.registers.atree[0].in[1] t.registers.clk_dly._a[1] t.registers.val_input.ct.in[4] t.registers.ff[11]._sqi t.registers.ff[3].reset_B t.registers.ff[6]._mqi t.registers.ff[10].clk t.registers.val_input.OR2_tf[3]._y t.registers.ff[5].__clk t.registers.clk_X.buf1._y t.registers.ff[11]._clk t.registers.ff[0].d t.registers.ff[14]._sqi t.registers.ff[7]._sqib t.registers.clk_dly.dly[0].___y t.registers.ff[8].q t.registers._clock_word_temp[1] t.registers.and_encoder[2]._y t.registers.clk_dly.dly[1].___y t.registers.ff[5]._sqib t.registers._out_encoder[6] t.registers.ff[6].reset_B t.registers.clock_buffer[4].buf1._y t.in.a t.registers.clk_dly.mu2[1]._s t.registers.ff[5].d t.registers.ff[9]._mqib t.registers.clk_dly.dly[0]._y t.registers.ff[4]._mqib t.registers.ff[8]._sqi t.registers.val_input.OR2_tf[2]._y t.registers.val_input.ct.in[2] t.registers.ff[14].q t.registers.val_input.ct.tmp[6] t.registers.clk_dly.dly[1]._y t.registers.ff[13].q t.registers.ff[1].d t.registers.ff[2]._clk t.registers.ff[10].__clk t.registers.ff[3]._mqib t.registers.ack_dly.dly[2].y t.registers.atree[6].and2s[0]._y t.registers.atree[0].and2s[0]._y t.registers.clock_buffer[3].out[0] t.registers.ff[2]._sqi t.registers.ff[3].clk t.registers.ff[3].d t.registers.ff[1]._mqi t.registers.ff[12].clk t.registers.clk_dly.mu2[1]._y t.registers.ff[9]._mqi t.registers.ff[8]._mqib t.registers.clk_dly.mu2[0]._s t.registers.ff[10].q t.registers.ack_dly.dly[0]._y t.registers.clk_dly.dly[0].a t.registers.ff[2].q t.registers.ff[4]._sqib t.registers.ack_dly.dly[0].a t.registers.ff[11].reset_B t.registers.clock_buffer[2].buf1._y t.registers.ff[10]._sqi t.registers.ff[15]._clk t.registers.ff[13]._sqib t.registers.ff[9].clk t.registers.ff[14].reset_B t.registers.ff[7].d t.registers.ff[4].d t.registers.ff[7]._sqi t.registers.clk_dly.dly[1].__y t.registers.ff[15].clk t.registers.ff[6]._mqib t.registers.clk_dly.dly[0].y t.registers.ff[2].__clk t.registers.ff[2]._sqib t.registers.clk_dly.mu2[0]._y t.registers.ff[9].reset_B t.registers.ff[10].d t.registers.ff[1].q t.registers.ff[3]._sqi t.registers.ff[5]._mqib t.registers.ff[6].d t.registers.ff[13].clk t.registers.ff[6]._clk t.registers.clock_buffer[7].out[0] t.registers.ff[5]._sqi t.registers.ff[12]._sqi t.registers.ff[9]._sqi t.registers.atree[7].and2s[0]._y t.registers.ff[4]._clk t.registers.clock_buffer[3].buf1._y t.registers.clock_buffer[1].out[0] t.registers.val_input.ct.tmp[5] t.registers.ff[12]._mqi t.registers.atree[4].and2s[0]._y t.registers.ack_dly.dly[1]._y t.registers.ff[9].__clk t.registers.ff[14].d t.registers.and_encoder[0]._y t.registers.ff[13]._mqi t.registLine truncated
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[0] start test
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[0] start test
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16472 t.in.d.d[0].f : 0
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16472 t.in.d.d[0].f : 0
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16472 t.data[1].d[1] : 0
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16472 t.data[1].d[1] : 0
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@@ -7,298 +7,296 @@ t.registers.ff[4].q t.registers._clock_word_temp[0] t.registers.ff[15].reset_B t
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16472 t.data[0].d[0] : 0
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16472 t.data[0].d[0] : 0
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16472 t.in.d.d[4].t : 0
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16472 t.in.d.d[4].t : 0
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16472 t.in.d.d[4].f : 0
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16472 t.in.d.d[4].f : 0
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16472 t.in.d.d[3].t : 0
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16472 t.registers.atree[0].in[0] : 0
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16472 t.in.d.d[3].f : 0
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16472 t.registers.atree[2].in[1] : 0
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16472 t.registers.atree[2].in[1] : 0
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16472 t.in.d.d[0].t : 0
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16472 t.in.d.d[1].f : 0
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16472 t.registers.atree[0].in[1] : 0
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16472 t.registers.atree[0].in[1] : 0
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16472 t.registers.atree[1].in[0] : 0
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16472 t.registers.atree[1].in[0] : 0
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16485 t.registers.val_input.OR2_tf[3]._y : 1 [by t.in.d.d[3].f:=0]
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16472 t.in.d.d[0].t : 0
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16487 t.registers.atree[4].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
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16472 t.registers.atree[0].in[0] : 0
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16488 t.registers.atree[5].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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16472 t.in.d.d[1].t : 0
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16491 t.registers._out_encoder[4] : 0 [by t.registers.atree[4].and2s[0]._y:=1]
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16485 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0]
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16492 t.registers.val_input.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0]
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16487 t.registers.atree[6].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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16506 t.registers.and_encoder[4]._y : 1 [by t.registers._out_encoder[4]:=0]
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16488 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0]
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16511 t.registers.atree[2].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
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16491 t.registers._out_encoder[6] : 0 [by t.registers.atree[6].and2s[0]._y:=1]
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16512 t.registers.atree[3].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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16492 t.registers.atree[4].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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16519 t.registers.atree[1].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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16506 t.registers.and_encoder[6]._y : 1 [by t.registers._out_encoder[6]:=0]
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16566 t.registers._out_encoder[2] : 0 [by t.registers.atree[2].and2s[0]._y:=1]
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16511 t.registers.atree[3].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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16887 t.registers.atree[7].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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16512 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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16963 t.registers.atree[6].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
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16519 t.registers.val_input.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0]
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18198 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
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16566 t.registers._out_encoder[3] : 0 [by t.registers.atree[3].and2s[0]._y:=1]
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18620 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1]
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16887 t.registers.atree[1].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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22533 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[1]:=0]
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16963 t.registers.atree[7].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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22534 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1]
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18198 t.registers.atree[2].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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25617 t.registers._out_encoder[5] : 0 [by t.registers.atree[5].and2s[0]._y:=1]
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18620 t.registers._out_encoder[2] : 0 [by t.registers.atree[2].and2s[0]._y:=1]
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25618 t.registers.and_encoder[5]._y : 1 [by t.registers._out_encoder[5]:=0]
|
22533 t.registers.atree[5].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
|
||||||
|
22534 t.registers._out_encoder[5] : 0 [by t.registers.atree[5].and2s[0]._y:=1]
|
||||||
|
22535 t.registers.and_encoder[5]._y : 1 [by t.registers._out_encoder[5]:=0]
|
||||||
|
25617 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1]
|
||||||
30209 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1]
|
30209 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1]
|
||||||
30415 t.registers.and_encoder[2]._y : 1 [by t.registers._out_encoder[2]:=0]
|
30415 t.registers.and_encoder[3]._y : 1 [by t.registers._out_encoder[3]:=0]
|
||||||
30697 t.registers._clock_word_temp[2] : 0 [by t.registers.and_encoder[2]._y:=1]
|
30697 t.registers._clock_word_temp[3] : 0 [by t.registers.and_encoder[3]._y:=1]
|
||||||
31306 t.registers._out_encoder[6] : 0 [by t.registers.atree[6].and2s[0]._y:=1]
|
31306 t.registers._out_encoder[7] : 0 [by t.registers.atree[7].and2s[0]._y:=1]
|
||||||
31309 t.registers.and_encoder[6]._y : 1 [by t.registers._out_encoder[6]:=0]
|
31309 t.registers.and_encoder[7]._y : 1 [by t.registers._out_encoder[7]:=0]
|
||||||
31465 t.registers.clock_buffer[2].buf1._y : 1 [by t.registers._clock_word_temp[2]:=0]
|
31465 t.registers.clock_buffer[3].buf1._y : 1 [by t.registers._clock_word_temp[3]:=0]
|
||||||
32016 t.registers.clock_buffer[2].out[0] : 0 [by t.registers.clock_buffer[2].buf1._y:=1]
|
32016 t.registers.clock_buffer[3].out[0] : 0 [by t.registers.clock_buffer[3].buf1._y:=1]
|
||||||
41699 t.registers._out_encoder[7] : 0 [by t.registers.atree[7].and2s[0]._y:=1]
|
41699 t.registers._out_encoder[1] : 0 [by t.registers.atree[1].and2s[0]._y:=1]
|
||||||
42770 t.registers.and_encoder[7]._y : 1 [by t.registers._out_encoder[7]:=0]
|
42740 t.registers._clock_word_temp[5] : 0 [by t.registers.and_encoder[5]._y:=1]
|
||||||
43724 t.registers._clock_word_temp[7] : 0 [by t.registers.and_encoder[7]._y:=1]
|
42770 t.registers.and_encoder[1]._y : 1 [by t.registers._out_encoder[1]:=0]
|
||||||
44805 t.registers.clock_buffer[7].buf1._y : 1 [by t.registers._clock_word_temp[7]:=0]
|
43694 t.registers.clock_buffer[5].buf1._y : 1 [by t.registers._clock_word_temp[5]:=0]
|
||||||
45823 t.registers._clock_word_temp[5] : 0 [by t.registers.and_encoder[5]._y:=1]
|
43851 t.registers._clock_word_temp[1] : 0 [by t.registers.and_encoder[1]._y:=1]
|
||||||
46299 t.registers._out_encoder[1] : 0 [by t.registers.atree[1].and2s[0]._y:=1]
|
44833 t.registers.clock_buffer[1].buf1._y : 1 [by t.registers._clock_word_temp[1]:=0]
|
||||||
46317 t.registers.and_encoder[1]._y : 1 [by t.registers._out_encoder[1]:=0]
|
44851 t.registers.clock_buffer[1].out[0] : 0 [by t.registers.clock_buffer[1].buf1._y:=1]
|
||||||
46805 t.registers.clock_buffer[5].buf1._y : 1 [by t.registers._clock_word_temp[5]:=0]
|
46299 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1]
|
||||||
50330 t.registers._clock_word_temp[1] : 0 [by t.registers.and_encoder[1]._y:=1]
|
53437 t.registers._clock_word_temp[6] : 0 [by t.registers.and_encoder[6]._y:=1]
|
||||||
50808 t.registers.clock_buffer[5].out[0] : 0 [by t.registers.clock_buffer[5].buf1._y:=1]
|
53750 t.registers._clock_word_temp[7] : 0 [by t.registers.and_encoder[7]._y:=1]
|
||||||
53437 t.registers._clock_word_temp[4] : 0 [by t.registers.and_encoder[4]._y:=1]
|
57450 t.registers.clock_buffer[6].buf1._y : 1 [by t.registers._clock_word_temp[6]:=0]
|
||||||
53750 t.registers._clock_word_temp[6] : 0 [by t.registers.and_encoder[6]._y:=1]
|
57753 t.registers.clock_buffer[7].buf1._y : 1 [by t.registers._clock_word_temp[7]:=0]
|
||||||
58510 t.registers.clock_buffer[6].buf1._y : 1 [by t.registers._clock_word_temp[6]:=0]
|
59740 t.registers._out_encoder[4] : 0 [by t.registers.atree[4].and2s[0]._y:=1]
|
||||||
59012 t.registers.clock_buffer[6].out[0] : 0 [by t.registers.clock_buffer[6].buf1._y:=1]
|
60570 t.registers.val_input.OR2_tf[1]._y : 1 [by t.in.d.d[1].t:=0]
|
||||||
59740 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1]
|
61072 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1]
|
||||||
60570 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.atree[1].in[0]:=0]
|
61275 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[1]:=0]
|
||||||
60773 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1]
|
63129 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1]
|
||||||
62627 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[1]:=0]
|
64500 t.registers.and_encoder[4]._y : 1 [by t.registers._out_encoder[4]:=0]
|
||||||
62766 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1]
|
64639 t.registers._clock_word_temp[4] : 0 [by t.registers.and_encoder[4]._y:=1]
|
||||||
67334 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0]
|
67334 t.registers.and_encoder[2]._y : 1 [by t.registers._out_encoder[2]:=0]
|
||||||
68165 t.registers._out_encoder[3] : 0 [by t.registers.atree[3].and2s[0]._y:=1]
|
67403 t.registers._clock_word_temp[2] : 0 [by t.registers.and_encoder[2]._y:=1]
|
||||||
68234 t.registers.and_encoder[3]._y : 1 [by t.registers._out_encoder[3]:=0]
|
67414 t.registers.clock_buffer[2].buf1._y : 1 [by t.registers._clock_word_temp[2]:=0]
|
||||||
68245 t.registers._clock_word_temp[3] : 0 [by t.registers.and_encoder[3]._y:=1]
|
68165 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1]
|
||||||
75021 t.registers.clock_buffer[4].buf1._y : 1 [by t.registers._clock_word_temp[4]:=0]
|
68369 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0]
|
||||||
75225 t.registers.clock_buffer[4].out[0] : 0 [by t.registers.clock_buffer[4].buf1._y:=1]
|
68384 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1]
|
||||||
|
68385 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0]
|
||||||
|
68422 t.registers.clock_buffer[0].out[0] : 0 [by t.registers.clock_buffer[0].buf1._y:=1]
|
||||||
|
79337 t.registers.clock_buffer[7].out[0] : 0 [by t.registers.clock_buffer[7].buf1._y:=1]
|
||||||
81838 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0]
|
81838 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0]
|
||||||
81853 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1]
|
82577 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1]
|
||||||
81854 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[4]:=0]
|
82689 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[4]:=0]
|
||||||
81891 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1]
|
98164 t.registers.clock_buffer[5].out[0] : 0 [by t.registers.clock_buffer[5].buf1._y:=1]
|
||||||
82630 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0]
|
100985 t.registers.clock_buffer[4].buf1._y : 1 [by t.registers._clock_word_temp[4]:=0]
|
||||||
82742 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1]
|
101025 t.registers.clock_buffer[4].out[0] : 0 [by t.registers.clock_buffer[4].buf1._y:=1]
|
||||||
82782 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0]
|
102351 t.registers.clock_buffer[6].out[0] : 0 [by t.registers.clock_buffer[6].buf1._y:=1]
|
||||||
83039 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1]
|
119200 t.registers.clock_buffer[2].out[0] : 0 [by t.registers.clock_buffer[2].buf1._y:=1]
|
||||||
95231 t.registers.clock_buffer[1].buf1._y : 1 [by t.registers._clock_word_temp[1]:=0]
|
130201 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1]
|
||||||
95318 t.registers.clock_buffer[1].out[0] : 0 [by t.registers.clock_buffer[1].buf1._y:=1]
|
130458 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0]
|
||||||
99275 t.registers.clock_buffer[7].out[0] : 0 [by t.registers.clock_buffer[7].buf1._y:=1]
|
130545 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1]
|
||||||
103680 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1]
|
130546 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0]
|
||||||
103974 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0]
|
130839 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0]
|
||||||
103975 t.registers.clock_buffer[0].out[0] : 0 [by t.registers.clock_buffer[0].buf1._y:=1]
|
132352 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1]
|
||||||
120031 t.registers.clock_buffer[3].buf1._y : 1 [by t.registers._clock_word_temp[3]:=0]
|
132846 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1]
|
||||||
121837 t.registers.clock_buffer[3].out[0] : 0 [by t.registers.clock_buffer[3].buf1._y:=1]
|
134055 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0]
|
||||||
130254 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0]
|
134645 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1]
|
||||||
132261 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1]
|
134823 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0]
|
||||||
133470 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0]
|
135626 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1]
|
||||||
134060 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1]
|
|
||||||
134238 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0]
|
|
||||||
135041 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1]
|
|
||||||
t.registers.ff[4].q t.registers.ff[15].reset_B t.registers._clock_temp t.registers.ack_dly._a[1] t.dly_cfg[1] t.registers.ff[5].reset_B t.registers.ff[8].d t.registers._clock t.registers.ff[2].reset_B t.registers.ff[7].clk t.registers.ff[12]._sqib t.registers.ack_dly.dly[1].__y t.registers.ff[1].clk t.registers.ff[5]._mqi t.registers.ff[8]._clk t.registers.ff[7]._mqib t.registers.ff[15].q t.registers.clk_dly.dly[2]._y t.registers.ack_dly.dly[1].___y t.registers.ff[4].reset_B t.registers.ff[13]._clk t.registers.ff[11]._mqi t.registers.ff[13]._mqib t.dly_cfg[0] t.registers.ff[4].__clk t.registers.ff[6].clk t.registers.ff[14]._mqi t.registers.clk_dly.and2[1]._y t.registers.ack_dly.dly[2]._y t.registers._in_a_temp t.registers.ff[3].__clk t.registers.clk_dly.dly[1].y t.registers.ff[1].__clk t.registers.clk_dly.dly[2].y t.registers.ff[0].q t.registers.ff[0].clk t.registers.ff[14]._clk t.registers.clk_dly.dly[1].a t.registers.ff[10]._mqib t.registers.ff[6].__clk t.registers.ff[0]._sqib t.registers.ff[9]._clk t.registers.ff[15]._mqib t.registers.ack_dly.dly[0].___y t.registers.ff[11].__clk t.registers.ff[7]._mqi t.registers.ff[5].q t.registers.ff[1]._sqi t.registers.ff[1]._sqib t.registers.ff[7]._clk t.registers.ack_dly.dly[2].___y t.registers.ff[10].reset_B t.registers.ff[3]._clk t.registers.ff[13]._sqi t.registers.ff[2]._mqi t.registers.ack_dly.mu2[0]._y t.registers.clk_dly._a[1] t.registers.ff[11]._sqi t.registers.ff[3].reset_B t.registers.ff[6]._mqi t.registers.ff[10].clk t.registers.ff[5].__clk t.registers.clk_X.buf1._y t.registers.ff[11]._clk t.registers.ff[0].d t.registers.ff[14]._sqi t.registers.ff[7]._sqib t.registers.ff[8].q t.registers.clk_dly.dly[1].___y t.registers.ff[5]._sqib t.registers.ff[6].reset_B t.in.a t.registers.clk_dly.mu2[1]._s t.registers.ff[5].d t.registers.ff[9]._mqib t.registers.ff[4]._mqib t.registers.ff[8]._sqi t.registers.ff[14].q t.registers.clk_dly.dly[1]._y t.registers.ff[13].q t.registers.ff[1].d t.registers.ff[2]._clk t.registers.ff[10].__clk t.registers.ff[3]._mqib t.registers.ack_dly.dly[2].y t.registers.ff[2]._sqi t.registers.ff[3].clk t.registers.ff[3].d t.registers.ff[1]._mqi t.registers.ff[12].clk t.registers.clk_dly.mu2[1]._y t.registers.ff[9]._mqi t.registers.ff[8]._mqib t.registers.clk_dly.mu2[0]._s t.registers.ff[10].q t.registers.ack_dly.dly[0]._y t.registers.ff[2].q t.registers.ff[4]._sqib t.registers.ack_dly.dly[0].a t.registers.ff[11].reset_B t.registers.ff[10]._sqi t.registers.ff[15]._clk t.registers.ff[13]._sqib t.registers.ff[9].clk t.registers.ff[14].reset_B t.registers.ff[7].d t.registers.ff[4].d t.registers.ff[7]._sqi t.registers.clk_dly.dly[1].__y t.registers.ff[15].clk t.registers.ff[6]._mqib t.registers.ff[2].__clk t.registers.ff[2]._sqib t.registers.clk_dly.mu2[0]._y t.registers.ff[9].reset_B t.registers.ff[10].d t.registers.ff[1].q t.registers.ff[3]._sqi t.registers.ff[5]._mqib t.registers.ff[6].d t.registers.ff[13].clk t.registers.ff[6]._clk t.registers.ff[5]._sqi t.registers.ff[12]._sqi t.registers.ff[9]._sqi t.registers.ff[4]._clk t.registers.ff[12]._mqi t.registers.ack_dly.dly[1]._y t.registers.ff[9].__clk t.registers.ff[14].d t.registers.ff[13]._mqi t.registers.ff[8].reset_B t.registers.ack_dly.dly[1].y t.registers.ff[0]._clk t.registers.ff[3]._sqib t.registers.ack_dly.and2[1]._y t.registers.ff[13].d t.registers.ff[1]._mqib t.registers.ff[0].__clk t.registers.ff[4].clk t.registers.ff[9].d t.registers.ack_dly.dly[0].y t.registers.clk_dly.dly[2].__y t.registers.ff[12].q t.registers.ff[10]._mqi t.registers.ff[5]._clk t.registers.ff[12].d t.registers.ff[15].d t.registers.ack_dly.dly[1].a t.registers.ff[9]._sqib t.registers.ff[2].clk t.registers.ff[4]._mqi t.registers.ff[10]._clk t.registers.ff[12]._mqib t.registers.ff[2]._mqib t.registers.ff[8].__clk t.registers.ff[11]._mqib t.registers.ff[1]._clk t.registers.ff[11]._sqib t.registers.ff[9].q t.registers.ff[3].q t.registers.ff[6].q t.registers.ff[10]._sqib t.registers.ff[2].d t.registers.ff[8]._mqi t.registers.ff[1].reset_B t.registers.ff[11].q t.registers.ff[12].reset_B t.registers.ack_dly.dly[2].__y t.registers.ff[6]._sqib t.registers.ff[11].clk t.registers.ff[0]._mqi t.registers.ff[12]._clk t.registers.ff[15]._sqi t.registers.ff[4]._sqi t.registers.ff[8]._sqib t.registers.ff[12].__clk t.registers.ff[6]._sqi t.registers.ff[13].__clk t.registers.ff[14]._mqib t.registers.ff[14].__clk t.registers.ack_dly.and2[0]._y t.registers.ack_dly.mu2[1]._s t.registers.ff[7].__clk t.registers.ff[14]._sqib t.registers.clk_dly.dly[2].___y t.registers.ff[14].clk t.registers.ff[11].d t.registers.ack_input_X.buf1._y t.registers.ff[0]._mqib t.registers.ff[15]._sqib t.registers.ff[0].reset_B t.registers.ack_dly.mu2[1]._y t.registers.ff[5].clk t.registers.ff[7].q t.registers.ff[3]._mqi t.registers.ack_dly.dly[0].__y t.registers.ff[13].reset_B t.registers.ff[8].clk t.registers.ff[15].__clk t.registers.ff[0]._sqi t.registers.ff[15]._mqi t.registers.ack_dly.mu2[0]._s t.registers.ff[7].reset_B
|
t.registers.ff[4].q t.registers.ff[15].reset_B t.registers._clock_temp t.registers.ack_dly._a[1] t.dly_cfg[1] t.registers.ff[5].reset_B t.registers.ff[8].d t.registers._clock t.registers.ff[2].reset_B t.registers.ff[7].clk t.registers.ff[12]._sqib t.registers.ack_dly.dly[1].__y t.registers.ff[1].clk t.registers.ff[5]._mqi t.registers.ff[8]._clk t.registers.ff[7]._mqib t.registers.ff[15].q t.registers.clk_dly.dly[2]._y t.registers.ack_dly.dly[1].___y t.registers.ff[4].reset_B t.registers.ff[13]._clk t.registers.ff[11]._mqi t.registers.ff[13]._mqib t.dly_cfg[0] t.registers.ff[4].__clk t.registers.ff[6].clk t.registers.ff[14]._mqi t.registers.clk_dly.and2[1]._y t.registers.ack_dly.dly[2]._y t.registers._in_a_temp t.registers.ff[3].__clk t.registers.clk_dly.dly[1].y t.registers.ff[1].__clk t.registers.clk_dly.dly[2].y t.registers.ff[0].q t.registers.ff[0].clk t.registers.ff[14]._clk t.registers.clk_dly.dly[1].a t.registers.ff[10]._mqib t.registers.ff[6].__clk t.registers.ff[0]._sqib t.registers.ff[9]._clk t.registers.ff[15]._mqib t.registers.ack_dly.dly[0].___y t.registers.ff[11].__clk t.registers.ff[7]._mqi t.registers.ff[5].q t.registers.ff[1]._sqi t.registers.ff[1]._sqib t.registers.ff[7]._clk t.registers.ack_dly.dly[2].___y t.registers.ff[10].reset_B t.registers.ff[3]._clk t.registers.ff[13]._sqi t.registers.ff[2]._mqi t.registers.ack_dly.mu2[0]._y t.registers.clk_dly._a[1] t.registers.ff[11]._sqi t.registers.ff[3].reset_B t.registers.ff[6]._mqi t.registers.ff[10].clk t.registers.ff[5].__clk t.registers.clk_X.buf1._y t.registers.ff[11]._clk t.registers.ff[0].d t.registers.ff[14]._sqi t.registers.ff[7]._sqib t.registers.ff[8].q t.registers.clk_dly.dly[1].___y t.registers.ff[5]._sqib t.registers.ff[6].reset_B t.in.a t.registers.clk_dly.mu2[1]._s t.registers.ff[5].d t.registers.ff[9]._mqib t.registers.ff[4]._mqib t.registers.ff[8]._sqi t.registers.ff[14].q t.registers.clk_dly.dly[1]._y t.registers.ff[13].q t.registers.ff[1].d t.registers.ff[2]._clk t.registers.ff[10].__clk t.registers.ff[3]._mqib t.registers.ack_dly.dly[2].y t.registers.ff[2]._sqi t.registers.ff[3].clk t.registers.ff[3].d t.registers.ff[1]._mqi t.registers.ff[12].clk t.registers.clk_dly.mu2[1]._y t.registers.ff[9]._mqi t.registers.ff[8]._mqib t.registers.clk_dly.mu2[0]._s t.registers.ff[10].q t.registers.ack_dly.dly[0]._y t.registers.ff[2].q t.registers.ff[4]._sqib t.registers.ack_dly.dly[0].a t.registers.ff[11].reset_B t.registers.ff[10]._sqi t.registers.ff[15]._clk t.registers.ff[13]._sqib t.registers.ff[9].clk t.registers.ff[14].reset_B t.registers.ff[7].d t.registers.ff[4].d t.registers.ff[7]._sqi t.registers.clk_dly.dly[1].__y t.registers.ff[15].clk t.registers.ff[6]._mqib t.registers.ff[2].__clk t.registers.ff[2]._sqib t.registers.clk_dly.mu2[0]._y t.registers.ff[9].reset_B t.registers.ff[10].d t.registers.ff[1].q t.registers.ff[3]._sqi t.registers.ff[5]._mqib t.registers.ff[6].d t.registers.ff[13].clk t.registers.ff[6]._clk t.registers.ff[5]._sqi t.registers.ff[12]._sqi t.registers.ff[9]._sqi t.registers.ff[4]._clk t.registers.ff[12]._mqi t.registers.ack_dly.dly[1]._y t.registers.ff[9].__clk t.registers.ff[14].d t.registers.ff[13]._mqi t.registers.ff[8].reset_B t.registers.ack_dly.dly[1].y t.registers.ff[0]._clk t.registers.ff[3]._sqib t.registers.ack_dly.and2[1]._y t.registers.ff[13].d t.registers.ff[1]._mqib t.registers.ff[0].__clk t.registers.ff[4].clk t.registers.ff[9].d t.registers.ack_dly.dly[0].y t.registers.clk_dly.dly[2].__y t.registers.ff[12].q t.registers.ff[10]._mqi t.registers.ff[5]._clk t.registers.ff[12].d t.registers.ff[15].d t.registers.ack_dly.dly[1].a t.registers.ff[9]._sqib t.registers.ff[2].clk t.registers.ff[4]._mqi t.registers.ff[10]._clk t.registers.ff[12]._mqib t.registers.ff[2]._mqib t.registers.ff[8].__clk t.registers.ff[11]._mqib t.registers.ff[1]._clk t.registers.ff[11]._sqib t.registers.ff[9].q t.registers.ff[3].q t.registers.ff[6].q t.registers.ff[10]._sqib t.registers.ff[2].d t.registers.ff[8]._mqi t.registers.ff[1].reset_B t.registers.ff[11].q t.registers.ff[12].reset_B t.registers.ack_dly.dly[2].__y t.registers.ff[6]._sqib t.registers.ff[11].clk t.registers.ff[0]._mqi t.registers.ff[12]._clk t.registers.ff[15]._sqi t.registers.ff[4]._sqi t.registers.ff[8]._sqib t.registers.ff[12].__clk t.registers.ff[6]._sqi t.registers.ff[13].__clk t.registers.ff[14]._mqib t.registers.ff[14].__clk t.registers.ack_dly.and2[0]._y t.registers.ack_dly.mu2[1]._s t.registers.ff[7].__clk t.registers.ff[14]._sqib t.registers.clk_dly.dly[2].___y t.registers.ff[14].clk t.registers.ff[11].d t.registers.ack_input_X.buf1._y t.registers.ff[0]._mqib t.registers.ff[15]._sqib t.registers.ff[0].reset_B t.registers.ack_dly.mu2[1]._y t.registers.ff[5].clk t.registers.ff[7].q t.registers.ff[3]._mqi t.registers.ack_dly.dly[0].__y t.registers.ff[13].reset_B t.registers.ff[8].clk t.registers.ff[15].__clk t.registers.ff[0]._sqi t.registers.ff[15]._mqi t.registers.ack_dly.mu2[0]._s t.registers.ff[7].reset_B
|
||||||
135041 Reset : 0
|
135626 Reset : 0
|
||||||
135205 t._reset_B : 1 [by Reset:=0]
|
135790 t._reset_B : 1 [by Reset:=0]
|
||||||
135227 t.registers.reset_buf_BXX._y : 0 [by t._reset_B:=1]
|
135812 t.registers.reset_buf_BXX._y : 0 [by t._reset_B:=1]
|
||||||
136074 t.registers._reset_mem_BX : 1 [by t.registers.reset_buf_BXX._y:=0]
|
136659 t.registers._reset_mem_BX : 1 [by t.registers.reset_buf_BXX._y:=0]
|
||||||
137400 t.registers.reset_buf_BX._y : 0 [by t._reset_B:=1]
|
137985 t.registers.reset_buf_BX._y : 0 [by t._reset_B:=1]
|
||||||
137533 t.registers._reset_BX : 1 [by t.registers.reset_buf_BX._y:=0]
|
138118 t.registers._reset_BX : 1 [by t.registers.reset_buf_BX._y:=0]
|
||||||
166202 t.registers.reset_bufarray.buf6._y : 0 [by t.registers._reset_mem_BX:=1]
|
166787 t.registers.reset_bufarray.buf6._y : 0 [by t.registers._reset_mem_BX:=1]
|
||||||
181864 t.registers._reset_mem_BXX[0] : 1 [by t.registers.reset_bufarray.buf6._y:=0]
|
182449 t.registers._reset_mem_BXX[0] : 1 [by t.registers.reset_bufarray.buf6._y:=0]
|
||||||
[1] reset completed
|
[1] reset completed
|
||||||
181864 t.dly_cfg[0] : 1
|
182449 t.dly_cfg[0] : 1
|
||||||
181864 t.dly_cfg[1] : 1
|
182449 t.dly_cfg[1] : 1
|
||||||
181871 t.registers.clk_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
|
182456 t.registers.clk_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
|
||||||
182085 t.registers.ack_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
|
182670 t.registers.ack_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
|
||||||
182223 t.registers.ack_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
|
182808 t.registers.ack_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
|
||||||
195980 t.registers.clk_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
|
196565 t.registers.clk_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
|
||||||
196010 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.mu2[0]._s:=0]
|
196595 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.mu2[0]._s:=0]
|
||||||
202723 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1]
|
203308 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1]
|
||||||
260184 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0]
|
260769 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0]
|
||||||
260275 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1]
|
260860 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1]
|
||||||
262464 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0]
|
263049 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0]
|
||||||
262471 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1]
|
263056 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1]
|
||||||
265258 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0]
|
265843 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0]
|
||||||
265364 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1]
|
265949 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1]
|
||||||
265442 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0]
|
266027 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0]
|
||||||
265717 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1]
|
266302 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1]
|
||||||
284713 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0]
|
285298 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0]
|
||||||
285168 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1]
|
285753 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1]
|
||||||
285180 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0]
|
285765 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0]
|
||||||
285584 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1]
|
286169 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1]
|
||||||
285596 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp:=0]
|
286181 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp:=0]
|
||||||
291512 t.registers._clock : 0 [by t.registers.clk_X.buf1._y:=1]
|
292097 t.registers._clock : 0 [by t.registers.clk_X.buf1._y:=1]
|
||||||
295788 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock:=0]
|
296373 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock:=0]
|
||||||
298687 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1]
|
299272 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1]
|
||||||
302982 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0]
|
303567 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0]
|
||||||
302984 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1]
|
303569 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1]
|
||||||
307519 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0]
|
308104 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0]
|
||||||
308768 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1]
|
309353 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1]
|
||||||
312267 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0]
|
312852 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0]
|
||||||
312433 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1]
|
313018 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1]
|
||||||
312508 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0]
|
313093 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0]
|
||||||
312853 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1]
|
313438 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1]
|
||||||
312991 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0]
|
313576 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0]
|
||||||
318254 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1]
|
318839 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1]
|
||||||
318256 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0]
|
318841 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0]
|
||||||
362173 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1]
|
362758 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1]
|
||||||
362174 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0]
|
362759 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0]
|
||||||
362722 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1]
|
363307 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1]
|
||||||
362733 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0]
|
363318 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0]
|
||||||
363103 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1]
|
363688 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1]
|
||||||
363170 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0]
|
363755 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0]
|
||||||
365811 t.registers._in_a_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1]
|
366396 t.registers._in_a_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1]
|
||||||
365827 t.registers.ack_input_X.buf1._y : 1 [by t.registers._in_a_temp:=0]
|
366412 t.registers.ack_input_X.buf1._y : 1 [by t.registers._in_a_temp:=0]
|
||||||
370389 t.in.a : 0 [by t.registers.ack_input_X.buf1._y:=1]
|
370974 t.in.a : 0 [by t.registers.ack_input_X.buf1._y:=1]
|
||||||
[2] delay line set
|
[2] delay line set
|
||||||
370389 t.in.d.d[0].t : 1
|
370974 t.in.d.d[0].t : 1
|
||||||
370389 t.in.d.d[4].f : 1
|
370974 t.in.d.d[4].f : 1
|
||||||
370389 t.registers.atree[0].in[1] : 1
|
370974 t.registers.atree[0].in[0] : 1
|
||||||
370389 t.registers.atree[1].in[0] : 1
|
370974 t.in.d.d[1].t : 1
|
||||||
370389 t.in.d.d[3].f : 1
|
370974 t.registers.atree[0].in[1] : 1
|
||||||
370391 t.registers.atree[5].and2s[0]._y : 0 [by t.registers.atree[1].in[0]:=1]
|
370976 t.registers.atree[0].and2s[0]._y : 0 [by t.registers.atree[0].in[1]:=1]
|
||||||
370394 t.registers._out_encoder[5] : 1 [by t.registers.atree[5].and2s[0]._y:=0]
|
370979 t.registers._out_encoder[0] : 1 [by t.registers.atree[0].and2s[0]._y:=0]
|
||||||
370917 t.registers.val_input.OR2_tf[0]._y : 0 [by t.in.d.d[0].t:=1]
|
371502 t.registers.val_input.OR2_tf[0]._y : 0 [by t.in.d.d[0].t:=1]
|
||||||
370946 t.registers.val_input.ct.in[0] : 1 [by t.registers.val_input.OR2_tf[0]._y:=0]
|
371531 t.registers.val_input.ct.in[0] : 1 [by t.registers.val_input.OR2_tf[0]._y:=0]
|
||||||
372824 t.registers.val_input.OR2_tf[4]._y : 0 [by t.in.d.d[4].f:=1]
|
373409 t.registers.val_input.OR2_tf[4]._y : 0 [by t.in.d.d[4].f:=1]
|
||||||
373141 t.registers.val_input.ct.in[4] : 1 [by t.registers.val_input.OR2_tf[4]._y:=0]
|
373726 t.registers.val_input.ct.in[4] : 1 [by t.registers.val_input.OR2_tf[4]._y:=0]
|
||||||
383430 t.registers.atree[1].and2s[0]._y : 0 [by t.registers.atree[1].in[0]:=1]
|
384015 t.registers.val_input.OR2_tf[3]._y : 0 [by t.registers.atree[0].in[1]:=1]
|
||||||
385031 t.registers._out_encoder[1] : 1 [by t.registers.atree[1].and2s[0]._y:=0]
|
385616 t.registers.val_input.ct.in[3] : 1 [by t.registers.val_input.OR2_tf[3]._y:=0]
|
||||||
394314 t.registers.val_input.OR2_tf[1]._y : 0 [by t.registers.atree[1].in[0]:=1]
|
394899 t.registers.val_input.OR2_tf[1]._y : 0 [by t.in.d.d[1].t:=1]
|
||||||
394467 t.registers.val_input.ct.in[1] : 1 [by t.registers.val_input.OR2_tf[1]._y:=0]
|
395052 t.registers.val_input.ct.in[1] : 1 [by t.registers.val_input.OR2_tf[1]._y:=0]
|
||||||
394511 t.registers.val_input.ct.C2Els[0]._y : 0 [by t.registers.val_input.ct.in[1]:=1]
|
395096 t.registers.val_input.ct.C2Els[0]._y : 0 [by t.registers.val_input.ct.in[1]:=1]
|
||||||
397269 t.registers.val_input.OR2_tf[2]._y : 0 [by t.registers.atree[0].in[1]:=1]
|
397854 t.registers.val_input.OR2_tf[2]._y : 0 [by t.registers.atree[0].in[0]:=1]
|
||||||
397272 t.registers.val_input.ct.tmp[5] : 1 [by t.registers.val_input.ct.C2Els[0]._y:=0]
|
397857 t.registers.val_input.ct.tmp[5] : 1 [by t.registers.val_input.ct.C2Els[0]._y:=0]
|
||||||
410952 t.registers.val_input.ct.in[2] : 1 [by t.registers.val_input.OR2_tf[2]._y:=0]
|
411537 t.registers.val_input.ct.in[2] : 1 [by t.registers.val_input.OR2_tf[2]._y:=0]
|
||||||
431347 t.registers.val_input.OR2_tf[3]._y : 0 [by t.in.d.d[3].f:=1]
|
411538 t.registers.val_input.ct.C3Els[0]._y : 0 [by t.registers.val_input.ct.in[2]:=1]
|
||||||
431348 t.registers.val_input.ct.in[3] : 1 [by t.registers.val_input.OR2_tf[3]._y:=0]
|
411755 t.registers.val_input.ct.tmp[6] : 1 [by t.registers.val_input.ct.C3Els[0]._y:=0]
|
||||||
431565 t.registers.val_input.ct.C3Els[0]._y : 0 [by t.registers.val_input.ct.in[3]:=1]
|
411777 t.registers.val_input.ct.C2Els[1]._y : 0 [by t.registers.val_input.ct.tmp[6]:=1]
|
||||||
431587 t.registers.val_input.ct.tmp[6] : 1 [by t.registers.val_input.ct.C3Els[0]._y:=0]
|
411778 t.registers._in_v_temp : 1 [by t.registers.val_input.ct.C2Els[1]._y:=0]
|
||||||
431588 t.registers.val_input.ct.C2Els[1]._y : 0 [by t.registers.val_input.ct.tmp[6]:=1]
|
413359 t.registers.clk_dly.and2[0]._y : 0 [by t.registers._in_v_temp:=1]
|
||||||
433169 t.registers._in_v_temp : 1 [by t.registers.val_input.ct.C2Els[1]._y:=0]
|
413518 t.registers.clk_dly.dly[0].a : 1 [by t.registers.clk_dly.and2[0]._y:=0]
|
||||||
433328 t.registers.val_input_X.buf1._y : 0 [by t.registers._in_v_temp:=1]
|
421123 t.registers.val_input_X.buf1._y : 0 [by t.registers._in_v_temp:=1]
|
||||||
442514 t.registers.clk_dly.and2[0]._y : 0 [by t.registers._in_v_temp:=1]
|
422410 t.in.v : 1 [by t.registers.val_input_X.buf1._y:=0]
|
||||||
443801 t.registers.clk_dly.dly[0].a : 1 [by t.registers.clk_dly.and2[0]._y:=0]
|
431932 t.registers.atree[4].and2s[0]._y : 0 [by t.registers.atree[0].in[1]:=1]
|
||||||
446033 t.registers.clk_dly.dly[0]._y : 0 [by t.registers.clk_dly.dly[0].a:=1]
|
433194 t.registers.clk_dly.dly[0]._y : 0 [by t.registers.clk_dly.dly[0].a:=1]
|
||||||
446178 t.registers.clk_dly.dly[0].__y : 1 [by t.registers.clk_dly.dly[0]._y:=0]
|
433339 t.registers.clk_dly.dly[0].__y : 1 [by t.registers.clk_dly.dly[0]._y:=0]
|
||||||
449010 t.registers.clk_dly.dly[0].___y : 0 [by t.registers.clk_dly.dly[0].__y:=1]
|
434164 t.registers._out_encoder[4] : 1 [by t.registers.atree[4].and2s[0]._y:=0]
|
||||||
453004 t.in.v : 1 [by t.registers.val_input_X.buf1._y:=0]
|
436171 t.registers.clk_dly.dly[0].___y : 0 [by t.registers.clk_dly.dly[0].__y:=1]
|
||||||
455364 t.registers.clk_dly.dly[0].y : 1 [by t.registers.clk_dly.dly[0].___y:=0]
|
442525 t.registers.clk_dly.dly[0].y : 1 [by t.registers.clk_dly.dly[0].___y:=0]
|
||||||
455365 t.registers.clk_dly.mu2[0]._y : 0 [by t.registers.clk_dly.dly[0].y:=1]
|
442526 t.registers.clk_dly.mu2[0]._y : 0 [by t.registers.clk_dly.dly[0].y:=1]
|
||||||
494649 t.registers.clk_dly._a[1] : 1 [by t.registers.clk_dly.mu2[0]._y:=0]
|
481810 t.registers.clk_dly._a[1] : 1 [by t.registers.clk_dly.mu2[0]._y:=0]
|
||||||
494811 t.registers.clk_dly.and2[1]._y : 0 [by t.registers.clk_dly._a[1]:=1]
|
481972 t.registers.clk_dly.and2[1]._y : 0 [by t.registers.clk_dly._a[1]:=1]
|
||||||
502180 t.registers.clk_dly.dly[1].a : 1 [by t.registers.clk_dly.and2[1]._y:=0]
|
489341 t.registers.clk_dly.dly[1].a : 1 [by t.registers.clk_dly.and2[1]._y:=0]
|
||||||
502194 t.registers.clk_dly.dly[1]._y : 0 [by t.registers.clk_dly.dly[1].a:=1]
|
489355 t.registers.clk_dly.dly[1]._y : 0 [by t.registers.clk_dly.dly[1].a:=1]
|
||||||
502201 t.registers.clk_dly.dly[1].__y : 1 [by t.registers.clk_dly.dly[1]._y:=0]
|
489362 t.registers.clk_dly.dly[1].__y : 1 [by t.registers.clk_dly.dly[1]._y:=0]
|
||||||
502361 t.registers.clk_dly.dly[1].___y : 0 [by t.registers.clk_dly.dly[1].__y:=1]
|
489522 t.registers.clk_dly.dly[1].___y : 0 [by t.registers.clk_dly.dly[1].__y:=1]
|
||||||
523918 t.registers.clk_dly.dly[1].y : 1 [by t.registers.clk_dly.dly[1].___y:=0]
|
511079 t.registers.clk_dly.dly[1].y : 1 [by t.registers.clk_dly.dly[1].___y:=0]
|
||||||
523919 t.registers.clk_dly.dly[2]._y : 0 [by t.registers.clk_dly.dly[1].y:=1]
|
511080 t.registers.clk_dly.dly[2]._y : 0 [by t.registers.clk_dly.dly[1].y:=1]
|
||||||
523920 t.registers.clk_dly.dly[2].__y : 1 [by t.registers.clk_dly.dly[2]._y:=0]
|
511081 t.registers.clk_dly.dly[2].__y : 1 [by t.registers.clk_dly.dly[2]._y:=0]
|
||||||
523921 t.registers.clk_dly.dly[2].___y : 0 [by t.registers.clk_dly.dly[2].__y:=1]
|
511082 t.registers.clk_dly.dly[2].___y : 0 [by t.registers.clk_dly.dly[2].__y:=1]
|
||||||
526164 t.registers.clk_dly.dly[2].y : 1 [by t.registers.clk_dly.dly[2].___y:=0]
|
513325 t.registers.clk_dly.dly[2].y : 1 [by t.registers.clk_dly.dly[2].___y:=0]
|
||||||
526351 t.registers.clk_dly.mu2[1]._y : 0 [by t.registers.clk_dly.dly[2].y:=1]
|
513512 t.registers.clk_dly.mu2[1]._y : 0 [by t.registers.clk_dly.dly[2].y:=1]
|
||||||
526352 t.registers._clock_temp : 1 [by t.registers.clk_dly.mu2[1]._y:=0]
|
513513 t.registers._clock_temp : 1 [by t.registers.clk_dly.mu2[1]._y:=0]
|
||||||
530534 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp:=1]
|
517695 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp:=1]
|
||||||
565316 t.registers._clock : 1 [by t.registers.clk_X.buf1._y:=0]
|
552477 t.registers._clock : 1 [by t.registers.clk_X.buf1._y:=0]
|
||||||
565317 t.registers.and_encoder[5]._y : 0 [by t.registers._clock:=1]
|
552478 t.registers.and_encoder[4]._y : 0 [by t.registers._clock:=1]
|
||||||
565321 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock:=1]
|
552482 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock:=1]
|
||||||
565322 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0]
|
552483 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0]
|
||||||
565339 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1]
|
552500 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1]
|
||||||
566169 t.registers.and_encoder[1]._y : 0 [by t.registers._clock:=1]
|
553330 t.registers.and_encoder[0]._y : 0 [by t.registers._clock:=1]
|
||||||
566208 t.registers._clock_word_temp[5] : 1 [by t.registers.and_encoder[5]._y:=0]
|
553369 t.registers._clock_word_temp[4] : 1 [by t.registers.and_encoder[4]._y:=0]
|
||||||
566211 t.registers.clock_buffer[5].buf1._y : 0 [by t.registers._clock_word_temp[5]:=1]
|
553372 t.registers.clock_buffer[4].buf1._y : 0 [by t.registers._clock_word_temp[4]:=1]
|
||||||
567152 t.registers.clock_buffer[5].out[0] : 1 [by t.registers.clock_buffer[5].buf1._y:=0]
|
554313 t.registers.clock_buffer[4].out[0] : 1 [by t.registers.clock_buffer[4].buf1._y:=0]
|
||||||
567912 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0]
|
555073 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0]
|
||||||
574530 t.registers._clock_word_temp[1] : 1 [by t.registers.and_encoder[1]._y:=0]
|
561691 t.registers._clock_word_temp[0] : 1 [by t.registers.and_encoder[0]._y:=0]
|
||||||
574531 t.registers.clock_buffer[1].buf1._y : 0 [by t.registers._clock_word_temp[1]:=1]
|
561692 t.registers.clock_buffer[0].buf1._y : 0 [by t.registers._clock_word_temp[0]:=1]
|
||||||
574573 t.registers.clock_buffer[1].out[0] : 1 [by t.registers.clock_buffer[1].buf1._y:=0]
|
561734 t.registers.clock_buffer[0].out[0] : 1 [by t.registers.clock_buffer[0].buf1._y:=0]
|
||||||
626874 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1]
|
614035 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1]
|
||||||
629691 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0]
|
616852 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0]
|
||||||
643424 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1]
|
630585 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1]
|
||||||
643519 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0]
|
630680 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0]
|
||||||
643854 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1]
|
631015 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1]
|
||||||
643862 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0]
|
631023 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0]
|
||||||
643896 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1]
|
631057 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1]
|
||||||
657783 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0]
|
644944 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0]
|
||||||
658701 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1]
|
645862 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1]
|
||||||
658705 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0]
|
645866 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0]
|
||||||
705083 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1]
|
692244 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1]
|
||||||
707481 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0]
|
694642 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0]
|
||||||
710696 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1]
|
697857 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1]
|
||||||
757815 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0]
|
744976 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0]
|
||||||
757863 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1]
|
745024 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1]
|
||||||
757866 t.registers._in_a_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0]
|
745027 t.registers._in_a_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0]
|
||||||
758044 t.registers.ack_input_X.buf1._y : 0 [by t.registers._in_a_temp:=1]
|
745205 t.registers.ack_input_X.buf1._y : 0 [by t.registers._in_a_temp:=1]
|
||||||
779021 t.in.a : 1 [by t.registers.ack_input_X.buf1._y:=0]
|
766182 t.in.a : 1 [by t.registers.ack_input_X.buf1._y:=0]
|
||||||
WRONG ASSERT: "t.registers._out_encoder[0]" has value 0 and not 1.
|
766182 t.in.d.d[0].t : 0
|
||||||
WRONG ASSERT: "t.registers._out_encoder[1]" has value 1 and not 0.
|
766182 t.in.d.d[4].f : 0
|
||||||
779021 t.in.d.d[0].t : 0
|
766182 t.registers.atree[0].in[0] : 0
|
||||||
779021 t.in.d.d[4].f : 0
|
766182 t.in.d.d[1].t : 0
|
||||||
779021 t.registers.atree[0].in[1] : 0
|
766182 t.registers.atree[0].in[1] : 0
|
||||||
779021 t.registers.atree[1].in[0] : 0
|
766183 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0]
|
||||||
779021 t.in.d.d[3].f : 0
|
766256 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1]
|
||||||
779022 t.registers.val_input.OR2_tf[3]._y : 1 [by t.in.d.d[3].f:=0]
|
766355 t.registers.atree[4].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
|
||||||
779095 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1]
|
766359 t.registers._out_encoder[4] : 0 [by t.registers.atree[4].and2s[0]._y:=1]
|
||||||
779194 t.registers.atree[5].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
|
766366 t.registers.val_input.OR2_tf[1]._y : 1 [by t.in.d.d[1].t:=0]
|
||||||
779198 t.registers._out_encoder[5] : 0 [by t.registers.atree[5].and2s[0]._y:=1]
|
766462 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1]
|
||||||
779205 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.atree[1].in[0]:=0]
|
767009 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
|
||||||
779301 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1]
|
767145 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1]
|
||||||
779848 t.registers.atree[1].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
|
767146 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0]
|
||||||
779984 t.registers._out_encoder[1] : 0 [by t.registers.atree[1].and2s[0]._y:=1]
|
772133 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0]
|
||||||
779985 t.registers.and_encoder[1]._y : 1 [by t.registers._out_encoder[1]:=0]
|
772374 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1]
|
||||||
784972 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0]
|
778081 t.registers.val_input.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0]
|
||||||
785213 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1]
|
782040 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1]
|
||||||
790920 t.registers.val_input.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0]
|
782052 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[0]:=0]
|
||||||
794879 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1]
|
785952 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1]
|
||||||
794891 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[0]:=0]
|
786192 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1]
|
||||||
798791 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1]
|
787221 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0]
|
||||||
799031 t.registers._clock_word_temp[1] : 0 [by t.registers.and_encoder[1]._y:=1]
|
787222 t.registers.clock_buffer[0].out[0] : 0 [by t.registers.clock_buffer[0].buf1._y:=1]
|
||||||
800060 t.registers.clock_buffer[1].buf1._y : 1 [by t.registers._clock_word_temp[1]:=0]
|
803647 t.registers.and_encoder[4]._y : 1 [by t.registers._out_encoder[4]:=0]
|
||||||
800061 t.registers.clock_buffer[1].out[0] : 0 [by t.registers.clock_buffer[1].buf1._y:=1]
|
803703 t.registers._clock_word_temp[4] : 0 [by t.registers.and_encoder[4]._y:=1]
|
||||||
816486 t.registers.and_encoder[5]._y : 1 [by t.registers._out_encoder[5]:=0]
|
805667 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0]
|
||||||
816542 t.registers._clock_word_temp[5] : 0 [by t.registers.and_encoder[5]._y:=1]
|
805668 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1]
|
||||||
818506 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[1]:=0]
|
805705 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[2]:=0]
|
||||||
818507 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1]
|
829080 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1]
|
||||||
818544 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[2]:=0]
|
829081 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0]
|
||||||
841919 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1]
|
832645 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1]
|
||||||
841920 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0]
|
832658 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0]
|
||||||
845484 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1]
|
834337 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0]
|
||||||
845497 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0]
|
834694 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1]
|
||||||
847176 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0]
|
834719 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0]
|
||||||
847533 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1]
|
834740 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1]
|
||||||
847558 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0]
|
834741 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0]
|
||||||
847579 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1]
|
844389 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1]
|
||||||
847580 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0]
|
844390 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.dly[0].y:=0]
|
||||||
857228 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1]
|
844391 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1]
|
||||||
857229 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.dly[0].y:=0]
|
844552 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0]
|
||||||
857230 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1]
|
845589 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1]
|
||||||
857391 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0]
|
845594 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0]
|
||||||
858428 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1]
|
846175 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1]
|
||||||
858433 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0]
|
846583 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0]
|
||||||
859014 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1]
|
846594 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1]
|
||||||
859422 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0]
|
847641 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0]
|
||||||
859433 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1]
|
847655 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1]
|
||||||
860480 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0]
|
847673 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0]
|
||||||
860494 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1]
|
847677 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1]
|
||||||
860512 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0]
|
847781 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0]
|
||||||
860516 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1]
|
848709 t.registers.clock_buffer[4].buf1._y : 1 [by t.registers._clock_word_temp[4]:=0]
|
||||||
860620 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0]
|
849642 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1]
|
||||||
861548 t.registers.clock_buffer[5].buf1._y : 1 [by t.registers._clock_word_temp[5]:=0]
|
849913 t.registers.clock_buffer[4].out[0] : 0 [by t.registers.clock_buffer[4].buf1._y:=1]
|
||||||
862481 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1]
|
879225 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1]
|
||||||
862752 t.registers.clock_buffer[5].out[0] : 0 [by t.registers.clock_buffer[5].buf1._y:=1]
|
887680 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp:=0]
|
||||||
892064 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1]
|
887908 t.registers._clock : 0 [by t.registers.clk_X.buf1._y:=1]
|
||||||
900519 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp:=0]
|
888751 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock:=0]
|
||||||
900747 t.registers._clock : 0 [by t.registers.clk_X.buf1._y:=1]
|
890210 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1]
|
||||||
901590 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock:=0]
|
890280 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0]
|
||||||
903049 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1]
|
940702 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1]
|
||||||
903119 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0]
|
940713 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0]
|
||||||
953541 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1]
|
940716 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1]
|
||||||
953552 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0]
|
940770 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0]
|
||||||
953555 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1]
|
941918 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1]
|
||||||
953609 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0]
|
943079 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0]
|
||||||
954757 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1]
|
951731 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1]
|
||||||
955918 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0]
|
951812 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0]
|
||||||
964570 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1]
|
962889 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1]
|
||||||
964651 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0]
|
980872 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0]
|
||||||
975728 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1]
|
980964 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1]
|
||||||
993711 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0]
|
989275 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0]
|
||||||
993803 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1]
|
991019 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1]
|
||||||
1002114 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0]
|
991632 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0]
|
||||||
1003858 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1]
|
1005654 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1]
|
||||||
1004471 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0]
|
1005699 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0]
|
||||||
1018493 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1]
|
1006696 t.registers._in_a_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1]
|
||||||
1018538 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0]
|
1008345 t.registers.ack_input_X.buf1._y : 1 [by t.registers._in_a_temp:=0]
|
||||||
1019535 t.registers._in_a_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1]
|
1008870 t.in.a : 0 [by t.registers.ack_input_X.buf1._y:=1]
|
||||||
1021184 t.registers.ack_input_X.buf1._y : 1 [by t.registers._in_a_temp:=0]
|
|
||||||
1021709 t.in.a : 0 [by t.registers.ack_input_X.buf1._y:=1]
|
|
||||||
[3] clock checked
|
[3] clock checked
|
||||||
@@ -338,27 +338,27 @@
|
|||||||
= "t.registers.in.d.d[4].d[1]" "t.registers._in_temp.d[4].d[1]"
|
= "t.registers.in.d.d[4].d[1]" "t.registers._in_temp.d[4].d[1]"
|
||||||
= "t.registers.in.d.d[4].d[0]" "t.registers.in.d.d[4].f"
|
= "t.registers.in.d.d[4].d[0]" "t.registers.in.d.d[4].f"
|
||||||
= "t.registers.in.d.d[4].d[1]" "t.registers.in.d.d[4].t"
|
= "t.registers.in.d.d[4].d[1]" "t.registers.in.d.d[4].t"
|
||||||
|
= "t.registers.in.d.d[3].d[0]" "t.registers.atree[5].in[1]"
|
||||||
|
= "t.registers.in.d.d[3].d[0]" "t.registers.atree[4].in[1]"
|
||||||
|
= "t.registers.in.d.d[3].d[0]" "t.registers.atree[1].in[1]"
|
||||||
|
= "t.registers.in.d.d[3].d[0]" "t.registers.atree[0].in[1]"
|
||||||
= "t.registers.in.d.d[3].d[0]" "t.registers.in.d.d[3].f"
|
= "t.registers.in.d.d[3].d[0]" "t.registers.in.d.d[3].f"
|
||||||
|
= "t.registers.in.d.d[3].d[1]" "t.registers.atree[7].in[1]"
|
||||||
|
= "t.registers.in.d.d[3].d[1]" "t.registers.atree[6].in[1]"
|
||||||
|
= "t.registers.in.d.d[3].d[1]" "t.registers.atree[3].in[1]"
|
||||||
|
= "t.registers.in.d.d[3].d[1]" "t.registers.atree[2].in[1]"
|
||||||
= "t.registers.in.d.d[3].d[1]" "t.registers.in.d.d[3].t"
|
= "t.registers.in.d.d[3].d[1]" "t.registers.in.d.d[3].t"
|
||||||
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[5].in[1]"
|
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[6].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[4].in[1]"
|
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[4].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[1].in[1]"
|
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[2].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[0].in[1]"
|
= "t.registers.in.d.d[2].d[0]" "t.registers.atree[0].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[0]" "t.registers.in.d.d[2].f"
|
= "t.registers.in.d.d[2].d[0]" "t.registers.in.d.d[2].f"
|
||||||
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[7].in[1]"
|
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[7].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[6].in[1]"
|
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[5].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[3].in[1]"
|
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[3].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[2].in[1]"
|
= "t.registers.in.d.d[2].d[1]" "t.registers.atree[1].in[0]"
|
||||||
= "t.registers.in.d.d[2].d[1]" "t.registers.in.d.d[2].t"
|
= "t.registers.in.d.d[2].d[1]" "t.registers.in.d.d[2].t"
|
||||||
= "t.registers.in.d.d[1].d[0]" "t.registers.atree[6].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[0]" "t.registers.atree[4].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[0]" "t.registers.atree[2].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[0]" "t.registers.atree[0].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[0]" "t.registers.in.d.d[1].f"
|
= "t.registers.in.d.d[1].d[0]" "t.registers.in.d.d[1].f"
|
||||||
= "t.registers.in.d.d[1].d[1]" "t.registers.atree[7].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[1]" "t.registers.atree[5].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[1]" "t.registers.atree[3].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[1]" "t.registers.atree[1].in[0]"
|
|
||||||
= "t.registers.in.d.d[1].d[1]" "t.registers.in.d.d[1].t"
|
= "t.registers.in.d.d[1].d[1]" "t.registers.in.d.d[1].t"
|
||||||
= "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f"
|
= "t.registers.in.d.d[0].d[0]" "t.registers.in.d.d[0].f"
|
||||||
= "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t"
|
= "t.registers.in.d.d[0].d[1]" "t.registers.in.d.d[0].t"
|
||||||
|
|||||||
@@ -31,6 +31,8 @@ assert-qdi-channel-valid "t.in" 5 3
|
|||||||
assert t.registers._clock 1
|
assert t.registers._clock 1
|
||||||
assert t.registers._out_encoder[0] 1
|
assert t.registers._out_encoder[0] 1
|
||||||
assert t.registers._out_encoder[1] 0
|
assert t.registers._out_encoder[1] 0
|
||||||
|
assert t.registers._out_encoder[2] 0
|
||||||
|
assert t.registers._out_encoder[3] 0
|
||||||
set-qdi-channel-neutral "t.in" 5
|
set-qdi-channel-neutral "t.in" 5
|
||||||
cycle
|
cycle
|
||||||
assert t.registers._clock 0
|
assert t.registers._clock 0
|
||||||
|
|||||||
Reference in new issue
Block a user