wired up most of the stuff in encoder (missing dual rail tree)
Obv not simulated yet and not sure all wires are correct. still need to repass through them
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0e9f2ae506
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@ -212,9 +212,15 @@ namespace tmpl {
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}
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template<pint N, pint M, pint ACK_STRENGTH>
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defproc encoder2D(a1of1 x[N]; a1of1 y[M] ;avMx1of2<X> addr; bool! out_a; power supply)
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template<pint N, pint M,pint address_size, pint ACK_STRENGTH>
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defproc encoder2D(a1of1 x[N]; a1of1 y[M] ;avMx1of2<address_size> addr; power supply; bool reset_B)
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{
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// Reset buffers
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bool _reset_BX,_reset_BXX[H];
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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sigbuf<2*address_size+3> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
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// Arbiters
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a1of1 _out_arb_x,_out_arb_y;
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a1of1 _x_temp[N];
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@ -227,6 +233,7 @@ namespace tmpl {
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arbtree<N> Xarb(.in = _x_temp,.out = _out_arb_X,.supply = supply);
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arbtree<M> Yarb(.in = _y_temp,.out = _out_arb_Y,.supply = supply);
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// Sigbufs for strong ackowledge signals (note that the sigbuf needs to be changed)
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sigbuf<ACK_STRENGTH> x_ack_arb[N];
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sigbuf<ACK_STRENGTH> y_ack_arb[M];
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(i:N:
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@ -240,6 +247,100 @@ namespace tmpl {
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y_ack_arb[i].supply = supply;
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)
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// This block checks that the input is valid and that the arbiter made a choice
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// Then activates the ack of the arbiter
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bool _x_v,_in_x_v;
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A_2C2P_RB_X1 Y_ack_confirm();
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Y_ack_confirm.p1 = _x_v;
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Y_ack_confirm.p2 =_in_x_v;
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Y_ack_confirm.c1 = _out_arb_Y.r;
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Y_ack_confirm.c2 = _x_a_B;
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Y_ack_confirm.y = _out_arb_Y.a;
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Y_ack_confirm.vdd = supply.vdd;
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Y_ack_confirm.vss = supply.vss;
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Y_ack_confirm.reset_B = _reset_BXX[0];
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// This block checks that the input is valid and that the arbiter made a choice
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// Then activates the ack of the arbiter
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A_2C_RB X_ack_confirm();
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X_ack_confirm.c1 = _out_arb_X.r;
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X_ack_confirm.c2 = _x_a_B;
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X_ack_confirm.vdd = supply.vdd;
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X_ack_confirm.vss = supply.vss;
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X_ack_confirm.reset_B = _reset_BXX[1];
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//X_REQ validation
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bool _x_req_array[N],_x_v,_x_v_B;
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(i:N:_x_req_array[i] = x[i].r;)
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ortree x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply);
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INV_X1 not_x_req_ortree(.in = _x_v,.out = _x_v_B);
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//
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A_2P3P1C2N_RB_X4 x_ack();
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//branch1
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x_ack.p1 = _in_x_v;
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x_ack.p2 = _x_v_B;
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//branch2
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x_ack.p3 = _in_x_v;
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x_ack.p4 = _in_y_v;
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x_ack.p5 = _x_v;
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//
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x_ack.c1 = _en
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x_ack.n1 = addr.v
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x_ack.n2 = _in_x_v;
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//
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x_ack.y = _x_a;
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//
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x_ack.vdd = supply.vdd;
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x_ack.vss = supply.vss;
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x_ack.reset_B = _reset_BXX[2];
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INV_X1 not_x_ack(.in = _x_a,.out = _x_a_B);
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A_1C2P enabling(.p1 = addr.a, .p2 = addr.v, .c1 = _x_a, .y = _en, .vdd = supply.vdd, .vss = supply.vss)
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avMx1of2<N> _in_x;
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dualrail<N> _in;
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_in_x.d = _in.d;
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_in_x.v = _in_x_v;
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//buffer_func_s
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A_2C2N_RB buffer_func_s_f[address_size];
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A_2C2N_RB buffer_func_s_t[address_size];
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sigbuf<address_size> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
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sigbuf<address_size> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
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INV_X1 out_a_inv(.a=addr.a,.y=_out_a_B);
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sigbuf<address_size> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t, .supply=supply);
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sigbuf<address_size> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f, .supply=supply);
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(i:address_size:
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buffer_func_s_f[i].c1 = _en_X_f[i];
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buffer_func_s_f[i].c2 = _out_a_BX_f[i];
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buffer_func_s_f[i].n1 = _in_x.d.d[i].f;
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buffer_func_s_f[i].n1 = _in_x.v;
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buffer_func_s_f[i].vdd=supply.vdd;
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buffer_func_s_f[i].vss=supply.vss;
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buffer_func_s_f[i].pr_B = _reset_BXX[i+3];
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buffer_func_s_f[i].sr_B = _reset_BXX[i+3];
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buffer_func_s_f[i].y = addr.d.d[i].f;
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buffer_func_s_t[i].c1 = _en_X_r[i];
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buffer_func_s_t[i].c2 = _out_a_BX_t[i];
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buffer_func_s_t[i].n1 = _in_x.d.d[i].r;
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buffer_func_s_t[i].n1 = _in_x.v;
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buffer_func_s_t[i].vdd=supply.vdd;
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buffer_func_s_t[i].vss=supply.vss;
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buffer_func_s_t[i].pr_B = _reset_BXX[i+3+address_size];
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buffer_func_s_t[i].sr_B = _reset_BXX[i+3+address_size];
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buffer_func_s_t[i].y = addr.d.d[i].t;
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)
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bool _addr_v
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vtree addr_validity(.in = addr,.out = _addr_v);
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sigbuf<4> addr_validity_x(.in = _addr_v,.out = addr.v);
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addr_validity.supply = supply;
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addr_validity_x.supply = supply;
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}
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