bics/actlib_dataflow_neuro
20
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

fixed register wr array tests

Browse Source
This commit is contained in:
alexmadison 2023-11-21 15:55:15 +01:00
parent e7158ca2a9
commit bd56ac71e1
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
test/unit_tests/registerA_wr_array/test.act
View File

@ -46,7 +46,7 @@ defproc registerA_wr_array_3x5x8 (avMx1of2<3+5+1> in; Mx1of2<5> data[8]; avMx1of
// Make a register array with 3 bit address (-> 8 registers),
// each register holding 5 bits.
registerA_wr_array<3,5,8> b(.in = in, .data = data, .out = out,
register_wr_array<3,5,8> b(.in = in, .data = data, .out = out,
.reset_B = _reset_B, .supply = supply);
}