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got rid of flip flop reg tests

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This commit is contained in:
alexmadison 2023-12-01 11:05:31 +01:00
parent 627caf1aed
commit ca3a56572d
4 changed files with 0 additions and 185 deletions
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55
test/unit_tests/flipflop/run/prsim.out
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@ -1,55 +0,0 @@
t.ff.__clk_B t.ff._clk_B t.d t.clk t._clk_B
[0] start test
15221 Reset : 0
15221 t.clk : 0
15221 t.d : 0
16947 t._clk_B : 1 [by t.clk:=0]
16986 t.ff._clk_B : 0 [by t._clk_B:=1]
17001 t.ff.__clk_B : 1 [by t.ff._clk_B:=0]
80587 t._reset_B : 1 [by Reset:=0]
[1] reset completed
[2] tested d = 0, clk rise
80587 t.clk : 1
80587 t.d : 1
80600 t.ff._mqib : 0 [by t.d:=1]
80640 t.ff._mqi : 1 [by t.ff._mqib:=0]
81078 t._clk_B : 0 [by t.clk:=1]
81493 t.ff._clk_B : 1 [by t._clk_B:=0]
81513 t.ff.__clk_B : 0 [by t.ff._clk_B:=1]
87554 t.ff._sqib : 0 [by t.ff._clk_B:=1]
87570 t.q : 1 [by t.ff._sqib:=0]
87601 t.ff._sqi : 1 [by t.ff._sqib:=0]
131668 t.ff.q_B : 0 [by t.q:=1]
131668 t.clk : 0
145392 t._clk_B : 1 [by t.clk:=0]
145396 t.ff._clk_B : 0 [by t._clk_B:=1]
154525 t.ff.__clk_B : 1 [by t.ff._clk_B:=0]
154525 t.d : 0
154540 t.ff._mqib : 1 [by t.d:=0]
197788 t.ff._mqi : 0 [by t.ff._mqib:=1]
197788 t.clk : 1
234719 t._clk_B : 0 [by t.clk:=1]
234774 t.ff._clk_B : 1 [by t._clk_B:=0]
286427 t.ff.__clk_B : 0 [by t.ff._clk_B:=1]
316207 t.ff._sqib : 1 [by t.ff.__clk_B:=0]
330056 t.ff._sqi : 0 [by t.ff._sqib:=1]
341019 t.q : 0 [by t.ff._sqib:=1]
355362 t.ff.q_B : 1 [by t.q:=0]
355362 t.clk : 0
355784 t._clk_B : 1 [by t.clk:=0]
404498 t.ff._clk_B : 0 [by t._clk_B:=1]
404499 t.ff.__clk_B : 1 [by t.ff._clk_B:=0]
404499 t.d : 1
404500 t.ff._mqib : 0 [by t.d:=1]
424705 t.ff._mqi : 1 [by t.ff._mqib:=0]
[3] tested d = 1, clk rise and fall
424705 t.clk : 1
424987 t._clk_B : 0 [by t.clk:=1]
425755 t.ff._clk_B : 1 [by t._clk_B:=0]
425758 t.ff.__clk_B : 0 [by t.ff._clk_B:=1]
448196 t.ff._sqib : 0 [by t.ff._clk_B:=1]
448747 t.ff._sqi : 1 [by t.ff._sqib:=0]
449267 t.q : 1 [by t.ff._sqib:=0]
450221 t.ff.q_B : 0 [by t.q:=1]
450221 t.d : 0

29
test/unit_tests/flipflop/run/test.prs
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@ -1,29 +0,0 @@
= "GND" "GND"
= "Vdd" "Vdd"
= "Reset" "Reset"
"Reset"->"t._reset_B"-
~("Reset")->"t._reset_B"+
"t.clk"->"t._clk_B"-
~("t.clk")->"t._clk_B"+
= "t._reset_B" "t.ff.reset_B"
"t.ff.clk_B"->"t.ff._clk_B"-
~("t.ff.clk_B")->"t.ff._clk_B"+
"t.ff._clk_B"->"t.ff.__clk_B"-
~("t.ff._clk_B")->"t.ff.__clk_B"+
~"t.ff.d"&~"t.ff._clk_B"|~"t.ff.reset_B"|~"t.ff.__clk_B"&~"t.ff._mqi"->"t.ff._mqib"+
("t.ff.d"&"t.ff.__clk_B"|"t.ff._mqi"&"t.ff._clk_B")&"t.ff.reset_B"->"t.ff._mqib"-
"t.ff._mqib"->"t.ff._mqi"-
~("t.ff._mqib")->"t.ff._mqi"+
~"t.ff._mqi"&~"t.ff.__clk_B"|~"t.ff.reset_B"|~"t.ff._sqi"&~"t.ff._clk_B"->"t.ff._sqib"+
("t.ff._mqi"&"t.ff._clk_B"|"t.ff._sqi"&"t.ff.__clk_B")&"t.ff.reset_B"->"t.ff._sqib"-
"t.ff._sqib"->"t.ff._sqi"-
~("t.ff._sqib")->"t.ff._sqi"+
"t.ff._sqib"->"t.ff.q"-
~("t.ff._sqib")->"t.ff.q"+
"t.ff.q"->"t.ff.q_B"-
~("t.ff.q")->"t.ff.q_B"+
= "Vdd" "t.ff.vdd"
= "GND" "t.ff.vss"
= "t.q" "t.ff.q"
= "t._clk_B" "t.ff.clk_B"
= "t.d" "t.ff.d"

50
test/unit_tests/flipflop/test.act
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@ -1,50 +0,0 @@
/*************************************************************************
*
* This file is part of ACT dataflow neuro library.
* It's the testing facility for cell_lib_std.act
*
* Copyright (c) 2022 University of Groningen - Ole Richter
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
* Copyright (c) 2022 University of Groningen - Michele Mastella
* Copyright (c) 2022 University of Groningen - Madison Cotteret
*
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
*
* You may redistribute and modify this documentation and make products
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
* for applicable conditions.
*
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
*
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
* these sources, You must maintain the Source Location visible in its
* documentation.
*
**************************************************************************
*/
import "../../dataflow_neuro/primitives.act";
import globals;
open tmpl::dataflow_neuro;
defproc flipflop_test (bool! q; bool? d,clk){
bool _clk_B;
DFFQ_R_X1 ff(.d=d,.clk_B = _clk_B, .q = q);
//Low active Reset
bool _reset_B;
prs {
Reset => _reset_B-
clk => _clk_B-
}
ff.vss = GND;
ff.vdd = Vdd;
ff.reset_B = _reset_B;
}
flipflop_test t;

51
test/unit_tests/flipflop/test.prsim
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@ -1,51 +0,0 @@
watchall
system "echo '[0] start test'"
set Reset 0
set t.d 0
set t.clk 0
cycle
status X
mode run
assert t.q 0
system "echo '[1] reset completed'"
system "echo '[2] tested d = 0, clk rise'"
set t.clk 1
set t.d 1
cycle
set t.clk 0
cycle
set t.d 0
cycle
assert t.q 1
set t.clk 1
cycle
assert t.q 0
set t.d 0
set t.clk 0
cycle
assert t.q 0
set t.d 1
cycle
set t.clk 0
cycle
assert t.q 0
system "echo '[3] tested d = 1, clk rise and fall'"
set t.d 1
cycle
set t.clk 1
cycle
set t.d 0
cycle
assert t.q 1