created demultiplexer and tests, not working yet
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@@ -1041,6 +1041,99 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; bool! out_req_x[Nx], out_req_y[
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}
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/**
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* 2D decoder which uses either synapse handshaking, or just a delay.
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* Controlled by the "hs_en" (handshake_enable) config bit.
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* hs_en = 0 -> use delayed version.
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* hs_en = 1 -> use synapse handshaking.
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* Regardless of which version is used, the final ack going to the buffer
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* goes through the prog_delay block.
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* Thus, for the handshaking version to be used "correctly",
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* dly_cfg should be set to all zeros.
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* ack_disable blocks the ack being returned to the buffer.
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* Is needed in case there are instabilities while we fiddle with delays.
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*/
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// @TODO : think hard about the fact that the line end pullups are not placed manually,
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// and write argumentation about whether this is fine
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export template<pint N>
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defproc decoder_1d (avMx1of2<std::ceil_log2(N)> in; a1of1 out[N];
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bool? reset_B; power supply) {
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// Buffer to recieve concat address packet
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buffer<std::ceil_log2(N)> addr_buf(.in = in, .reset_B = reset_B, .supply = supply);
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// Decoder And tree
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decoder_dualrail_refresh<std::ceil_log2(N),N> d_dr(.supply = supply);
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(i:0..std::ceil_log2(N)-1:d_dr.in.d[i] = addr_buf.out.d.d[i];)
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(i:0..N-1: d_dr.out[i] = out[i].r;)
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// Validity
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vtree<std::ceil_log2(N)> vtree (.in = d_dr.final_refresh, .supply = supply);
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vtree.out = addr_buf.out.v;
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// ORtree from all output acks, back to the buffer ack.
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// This is instead of the ack that came from the delayed validity trees,
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// in decoder_2d_dly.
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ortree<N> _ortree(.supply = supply);
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(i:N:
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_ortree.in[i] = out[i].a;
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)
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_ortree.out = addr_buf.out.a;
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}
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export template<pint N, W>
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defproc demux_qdi2bd_1d (avMx1of2<std::ceil_log2(N)+W> in; rbd<W> out[N];
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bool? reset_B; power supply) {
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sigbuf<N+1> data_t[W];
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(0..W-1:i:
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data_t[i].in = addr_buf.out.d.d[std::ceil_log2(N)+i].t;
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(0..N-1:j:
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data_t[i].out[j] = out[j].d.d[0];
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)
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data_t.supply = supply;
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)
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// Buffer to recieve concat address packet
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buffer<std::ceil_log2(N)+W> addr_buf(.in = in, .reset_B = reset_B, .supply = supply);
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// Decoder And tree
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decoder_dualrail_refresh<std::ceil_log2(N),N> d_dr(.supply = supply);
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(i:0..std::ceil_log2(N)-1:d_dr.in.d[i] = addr_buf.out.d.d[i];)
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(i:0..N-1: d_dr.out[i] = out[i].r;)
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// Validity
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vtree<std::ceil_log2(N)> vtree (.in = d_dr.final_refresh, .supply = supply);
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vtree<W> vtree_data (.supply = supply);
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(0..W-1:i:
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vtree_data.in[i].t = addr_buf.d.d[i+std::ceil_log2(N)].t;
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vtree_data.in[i].f = data_t[i].out[N]
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)
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A_2C_B_X1 valid_Cel(.c1 = vtree.out, .c2 = vtree_data.out, .y = addr_buf.out.v,
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.vdd = supply.vdd, .vss = supply.vss);
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// ORtree from all output acks, back to the buffer ack.
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// This is instead of the ack that came from the delayed validity trees,
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// in decoder_2d_dly.
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ortree<N> _ortree(.supply = supply);
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(i:N:
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_ortree.in[i] = out[i].a;
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)
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_ortree.out = addr_buf.out.a;
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}
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}
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}
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