merged

dataflow_neuro/coders.act

@@ -44,7 +44,7 @@ namespace tmpl {
 		 * 	Thus NxC should be something like NxC = ceil(log2(Nx))
 		 * 	but my guess is that we can't do logs...
 		 * 	N_dly_cfg is the number of config bits in the ACK delay line,
-		 * 	with all bits high corresponding to 2**N_dly_cfg -1 DLY1_X4 cells.
+		 * 	with all bits high corresponding to 2**N_dly_cfg -1 DLY4_X1 cells.
 		 */
 		export template<pint NxC, NyC, Nx, Ny, N_dly_cfg>
 		defproc decoder_2d_dly (avMx1of2<NxC+NyC> in; bool? outx[Nx], outy[Ny], 
@@ -212,6 +212,20 @@ namespace tmpl {
 		}
 
 
+		export template<pint Nx, Ny>
+		defproc and_grid(bool! out[Nx*Ny]; bool? inx[Nx], iny[Ny]; power supply) {
+			AND2_X1 ands[Nx*Ny];
+			(i:0..Nx*Ny-1:ands[i].vss = supply.vss; ands[i].vdd = supply.vdd;)
+			(x:0..Nx-1:
+				(y:0..Ny-1:
+					ands[x + y*Nx].a = inx[x];
+					ands[x + y*Nx].b = iny[y];
+					ands[x + y*Nx].y = out[x + y*Nx];
+					)
+				)
+		}
+
+
 		template<pint N, pint M, pint ACK_STRENGTH>
 		defproc encoder2D(a1of1 x[N]; a1of1 y[M] ;avMx1of2<X> addr; bool! out_a; power supply)
 		{
@@ -244,8 +258,6 @@ namespace tmpl {
 		}
 
 
-
-
 	}
 
 }

dataflow_neuro/treegates.act

@@ -48,6 +48,9 @@ defproc ortree (bool? in[N]; bool! out; power supply)
 
   { N > 0 : "What?" };
 
+  [N = 1 -> BUF_X1 b(.vss=supply.vss, .vdd = supply.vdd, .a = in[0], .y = out);
+  []  N > 1 ->
+
   pint i, end, j;
   i = 0;
   end = N-1;
@@ -148,6 +151,8 @@ defproc ortree (bool? in[N]; bool! out; power supply)
   ]
   
     out = tmp[end];
+
+  ]
 }
 
 export template<pint N>
@@ -157,6 +162,11 @@ defproc andtree (bool? in[N]; bool! out; power supply)
 
   { N > 0 : "What?" };
 
+
+
+  [N = 1 -> BUF_X1 b(.vss=supply.vss, .vdd = supply.vdd, .a = in[0], .y = out);
+  []  N > 1 ->
+
   pint i, end, j;
   i = 0;
   end = N-1;
@@ -257,6 +267,8 @@ defproc andtree (bool? in[N]; bool! out; power supply)
   ]
   
     out = tmp[end];
+
+  ]
 }
   
 /*
@@ -270,6 +282,10 @@ defproc ctree (bool? in[N]; bool! out; power supply)
 
   { N > 0 : "What?" };
 
+  bool meaningless_var;
+
+  [N = 1 -> BUF_X1 b(.vss=supply.vss, .vdd = supply.vdd, .a = in[0], .y = out);
+  []  N > 1 ->
   pint i, end, j;
   i = 0;
   end = N-1;
@@ -374,6 +390,11 @@ defproc ctree (bool? in[N]; bool! out; power supply)
   
   out = tmp[end];
 
+
+    ]
+
+  
+  
 }
 
 export template<pint N>