Compare commits
4 Commits
b162cff991
...
eda9e2a98b
| Author | SHA1 | Date | |
|---|---|---|---|
|
eda9e2a98b | ||
|
|
e995a78efb | ||
|
|
87010c256b | ||
|
|
0a957fc130 |
@ -418,6 +418,7 @@ defproc registerA_w_array(avMx1of2<NcA + NcW + 1> in; Mx1of2<NcW> data[M];
|
||||
// Input valid tree
|
||||
// Note that I may need to check the validity of other downstream stuff,
|
||||
// to be ultra careful about delays.
|
||||
// e.g. TODO add validity checking on the selector signals.
|
||||
vtree<NcA + NcW + 1> input_valid(.in = in.d, .out = in.v,
|
||||
.supply = supply);
|
||||
|
||||
@ -454,10 +455,10 @@ TIELO_X1 tielow_writebit_f[M];
|
||||
)
|
||||
|
||||
// Connect the (selected) write bit
|
||||
registers[i].in.d.d[NcA + NcW].t = write_selectors[i].y;
|
||||
registers[i].in.d.d[NcW].t = write_selectors[i].y;
|
||||
tielow_writebit_f[i].vdd = supply.vdd;
|
||||
tielow_writebit_f[i].vss = supply.vss;
|
||||
registers[i].in.d.d[NcA + NcW].f = tielow_writebit_f[i].y;
|
||||
registers[i].in.d.d[NcW].f = tielow_writebit_f[i].y;
|
||||
|
||||
// Connect to ack ortree
|
||||
registers[i].in.a = ack_ortree.in[i];
|
||||
@ -469,10 +470,6 @@ TIELO_X1 tielow_writebit_f[M];
|
||||
registers[i].reset_B = reset_B;
|
||||
)
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
@ -102,7 +102,7 @@ Use -exclude='regex' to specify signals to exclude (or -ex).""")
|
||||
# Get list of all times (before filtering)
|
||||
unique_times = np.unique([int(e[0]) for e in entries])
|
||||
|
||||
assert not (exclude_given and include_given), "Can't give include and exclude re simultaneously."
|
||||
# assert not (exclude_given and include_given), "Can't give include and exclude re simultaneously."
|
||||
if include_given: print(f"Including signals that match regex {include_re}")
|
||||
if exclude_given: print(f"Excluding signals that match regex {exclude_re}")
|
||||
|
||||
@ -225,8 +225,8 @@ Use -exclude='regex' to specify signals to exclude (or -ex).""")
|
||||
ax.text(time_to_index(time), num_sigs, time, ha = "center", va = "top", size = 10, rotation = 90)
|
||||
|
||||
# Find and plot wrong Assert statements
|
||||
asserts = re.findall(r"\t *(\d+) .*\nWRONG ASSERT:\t(.+)", f)
|
||||
if len(asserts): print("Failed asserts found!")
|
||||
asserts = re.findall(r"\t *(\d+) .*\n(WRONG ASSERT|WARNING):\t?(.+)", f)
|
||||
if len(asserts): print("Warnings found!")
|
||||
for a in asserts:
|
||||
print(a)
|
||||
time = int(a[0])
|
||||
@ -234,11 +234,11 @@ Use -exclude='regex' to specify signals to exclude (or -ex).""")
|
||||
try:
|
||||
time = unique_times[np.argwhere((unique_times-time) < 0)[-1]]
|
||||
except:
|
||||
print(f"Couldn't find an appropriate time for assert {a}")
|
||||
print(f"Couldn't find an appropriate time for warning {a}")
|
||||
continue
|
||||
index = time_to_index(time)
|
||||
ax.axvline(index+0.5, c = "red", lw = 2)
|
||||
ax.text(index+0.5, -1, a[1], rotation = 90, ha = "center", va = "bottom", c = "red")
|
||||
ax.text(index+0.5, -1, a[2], rotation = 90, ha = "center", va = "bottom", c = "red")
|
||||
|
||||
# Find echoed statements of the form "[digits] text"
|
||||
echoes = re.findall(r"\t *(\d+) [^\t]*\n(\[\d*\].+)", f)
|
||||
|
||||
Binary file not shown.
418
test/unit_tests/registerA_w/run/prsim.out
Normal file
418
test/unit_tests/registerA_w/run/prsim.out
Normal file
@ -0,0 +1,418 @@
|
||||
b.b.gandalf_f[3].a b.b.gandalf_t[1].a b.b.gandalf_f[5].a b.b.gandalf_f[1].a b.b.gandalf_t[2].a b.b.gandalf_f[6].a b.b.gandalf_f[4].a b.b.gandalf_t[6].a b.b.gandalf_t[3].a b.b.gandalf_f[0].a b.b.gandalf_t[0].a b.b.gandalf_t[4].a b.b.gandalf_t[5].a b.b._w b.b.gandalf_f[2].a
|
||||
169671 b.b.gandalf_f[0].a : 0
|
||||
169671 b.b._w : 0
|
||||
169671 b.in.d.d[7].f : 0
|
||||
169671 b.b.gandalf_t[6].a : 0
|
||||
169671 b.b.gandalf_f[6].a : 0
|
||||
169671 b.b.gandalf_t[5].a : 0
|
||||
169671 b.b.gandalf_f[5].a : 0
|
||||
169671 b.b.gandalf_t[4].a : 0
|
||||
169671 b.b.gandalf_f[4].a : 0
|
||||
169671 b.b.gandalf_t[3].a : 0
|
||||
169671 b.b.gandalf_f[3].a : 0
|
||||
169671 b.b.gandalf_t[2].a : 0
|
||||
169671 b.b.gandalf_f[2].a : 0
|
||||
169671 b.b.gandalf_t[1].a : 0
|
||||
169671 b.b.gandalf_f[1].a : 0
|
||||
169671 b.b.gandalf_t[0].a : 0
|
||||
[] Set reset 0
|
||||
|
||||
169671 Reset : 0
|
||||
170041 b._reset_B : 1 [by Reset:=0]
|
||||
170108 b.b.buf.reset_buf._y : 0 [by b._reset_B:=1]
|
||||
170124 b.b.buf._reset_BX : 1 [by b.b.buf.reset_buf._y:=0]
|
||||
172682 b.b.buf._reset : 0 [by b._reset_B:=1]
|
||||
174686 b.b.buf.reset_bufarray.buf2._y : 0 [by b.b.buf._reset_BX:=1]
|
||||
175214 b.b.buf._reset_BXX[0] : 1 [by b.b.buf.reset_bufarray.buf2._y:=0]
|
||||
[] Sending in 127
|
||||
175214 b.b.gandalf_t[0].a : 1
|
||||
175214 b.b._w : 1
|
||||
175214 b.b.gandalf_t[6].a : 1
|
||||
175214 b.b.gandalf_t[2].a : 1
|
||||
175214 b.b.gandalf_t[5].a : 1
|
||||
175214 b.b.gandalf_t[4].a : 1
|
||||
175214 b.b.gandalf_t[3].a : 1
|
||||
175214 b.b.gandalf_t[1].a : 1
|
||||
177649 b.b.A_flush._y : 0 [by b.b._w:=1]
|
||||
204529 b.b._flush : 1 [by b.b.A_flush._y:=0]
|
||||
217570 b.b.buf._flushB : 0 [by b.b._flush:=1]
|
||||
217572 b.b.buf.t_buf_func[0]._y : 1 [by b.b.buf._flushB:=0]
|
||||
217573 b.b.buf.t_buf_func[2]._y : 1 [by b.b.buf._flushB:=0]
|
||||
217599 b.b.buf.t_buf_func[3]._y : 1 [by b.b.buf._flushB:=0]
|
||||
217616 b.out.d[0].t : 0 [by b.b.buf.t_buf_func[0]._y:=1]
|
||||
217617 b.b.out_valid.OR2_tf[0]._y : 1 [by b.out.d[0].t:=0]
|
||||
217723 b.b.buf.t_buf_func[6]._y : 1 [by b.b.buf._flushB:=0]
|
||||
217745 b.out.d[6].t : 0 [by b.b.buf.t_buf_func[6]._y:=1]
|
||||
217746 b.b.out_valid.OR2_tf[6]._y : 1 [by b.out.d[6].t:=0]
|
||||
217834 b.b.out_valid.ct.in[0] : 0 [by b.b.out_valid.OR2_tf[0]._y:=1]
|
||||
217887 b.b.buf.t_buf_func[4]._y : 1 [by b.b.buf._flushB:=0]
|
||||
219171 b.b.buf.t_buf_func[5]._y : 1 [by b.b.buf._flushB:=0]
|
||||
219327 b.b.out_valid.ct.in[6] : 0 [by b.b.out_valid.OR2_tf[6]._y:=1]
|
||||
219330 b.out.d[5].t : 0 [by b.b.buf.t_buf_func[5]._y:=1]
|
||||
220334 b.out.d[2].t : 0 [by b.b.buf.t_buf_func[2]._y:=1]
|
||||
221621 b.b.out_valid.OR2_tf[2]._y : 1 [by b.out.d[2].t:=0]
|
||||
223853 b.b.out_valid.ct.in[2] : 0 [by b.b.out_valid.OR2_tf[2]._y:=1]
|
||||
227232 b.out.d[4].t : 0 [by b.b.buf.t_buf_func[4]._y:=1]
|
||||
227377 b.b.out_valid.OR2_tf[4]._y : 1 [by b.out.d[4].t:=0]
|
||||
228454 b.b._flushB : 0 [by b.b._flush:=1]
|
||||
230209 b.b.out_valid.ct.in[4] : 0 [by b.b.out_valid.OR2_tf[4]._y:=1]
|
||||
231282 b.out.d[3].t : 0 [by b.b.buf.t_buf_func[3]._y:=1]
|
||||
237636 b.b.out_valid.OR2_tf[3]._y : 1 [by b.out.d[3].t:=0]
|
||||
237637 b.b.out_valid.ct.in[3] : 0 [by b.b.out_valid.OR2_tf[3]._y:=1]
|
||||
239006 b.b.out_valid.OR2_tf[5]._y : 1 [by b.out.d[5].t:=0]
|
||||
239168 b.b.out_valid.ct.in[5] : 0 [by b.b.out_valid.OR2_tf[5]._y:=1]
|
||||
246537 b.b.out_valid.ct.C3Els[0]._y : 1 [by b.b.out_valid.ct.in[5]:=0]
|
||||
246551 b.b.out_valid.ct.tmp[9] : 0 [by b.b.out_valid.ct.C3Els[0]._y:=1]
|
||||
276921 b.b.out_valid.ct.C2Els[1]._y : 1 [by b.b.out_valid.ct.in[3]:=0]
|
||||
276928 b.b.out_valid.ct.tmp[8] : 0 [by b.b.out_valid.ct.C2Els[1]._y:=1]
|
||||
278528 b.b.buf.t_buf_func[1]._y : 1 [by b.b.buf._flushB:=0]
|
||||
278688 b.out.d[1].t : 0 [by b.b.buf.t_buf_func[1]._y:=1]
|
||||
300245 b.b.out_valid.OR2_tf[1]._y : 1 [by b.out.d[1].t:=0]
|
||||
300246 b.b.out_valid.ct.in[1] : 0 [by b.b.out_valid.OR2_tf[1]._y:=1]
|
||||
300247 b.b.out_valid.ct.C2Els[0]._y : 1 [by b.b.out_valid.ct.in[1]:=0]
|
||||
300248 b.b.out_valid.ct.tmp[7] : 0 [by b.b.out_valid.ct.C2Els[0]._y:=1]
|
||||
302491 b.b.out_valid.ct.C3Els[1]._y : 1 [by b.b.out_valid.ct.tmp[7]:=0]
|
||||
302678 b.b._out_v : 0 [by b.b.out_valid.ct.C3Els[1]._y:=1]
|
||||
302679 b.b._out_vB : 1 [by b.b._out_v:=0]
|
||||
306861 b.b._en2 : 0 [by b.b._out_vB:=1]
|
||||
341643 b.b.A_flush._y : 1 [by b.b._en2:=0]
|
||||
341644 b.b._flush : 0 [by b.b.A_flush._y:=1]
|
||||
341649 b.b._flushB : 1 [by b.b._flush:=0]
|
||||
342497 b.b.pass.y : 1 [by b.b._flush:=0]
|
||||
342498 b.b.gandalf_t[0]._y : 0 [by b.b.pass.y:=1]
|
||||
342499 b.b.gandalf_t[0].y : 1 [by b.b.gandalf_t[0]._y:=0]
|
||||
342500 b.b.gandalf_t[4]._y : 0 [by b.b.pass.y:=1]
|
||||
342514 b.b.gandalf_t[1]._y : 0 [by b.b.pass.y:=1]
|
||||
342535 b.b.buf._flushB : 1 [by b.b._flush:=0]
|
||||
342541 b.b.buf.vc.OR2_tf[0]._y : 0 [by b.b.gandalf_t[0].y:=1]
|
||||
342630 b.b.buf.t_buf_func[0]._y : 0 [by b.b.buf._flushB:=1]
|
||||
342638 b.out.d[0].t : 1 [by b.b.buf.t_buf_func[0]._y:=0]
|
||||
342672 b.b.out_valid.OR2_tf[0]._y : 0 [by b.out.d[0].t:=1]
|
||||
342876 b.b.buf.vc.ct.in[0] : 1 [by b.b.buf.vc.OR2_tf[0]._y:=0]
|
||||
343438 b.b.gandalf_t[5]._y : 0 [by b.b.pass.y:=1]
|
||||
344356 b.b.gandalf_t[5].y : 1 [by b.b.gandalf_t[5]._y:=0]
|
||||
344360 b.b.buf.vc.OR2_tf[5]._y : 0 [by b.b.gandalf_t[5].y:=1]
|
||||
345070 b.b.gandalf_t[2]._y : 0 [by b.b.pass.y:=1]
|
||||
345317 b.b.gandalf_t[4].y : 1 [by b.b.gandalf_t[4]._y:=0]
|
||||
345365 b.b.buf.t_buf_func[4]._y : 0 [by b.b.gandalf_t[4].y:=1]
|
||||
345368 b.out.d[4].t : 1 [by b.b.buf.t_buf_func[4]._y:=0]
|
||||
345546 b.b.out_valid.OR2_tf[4]._y : 0 [by b.out.d[4].t:=1]
|
||||
346758 b.b.buf.vc.ct.in[5] : 1 [by b.b.buf.vc.OR2_tf[5]._y:=0]
|
||||
348285 b.b.gandalf_t[2].y : 1 [by b.b.gandalf_t[2]._y:=0]
|
||||
350858 b.b.gandalf_t[3]._y : 0 [by b.b.pass.y:=1]
|
||||
354236 b.b.buf.t_buf_func[2]._y : 0 [by b.b.gandalf_t[2].y:=1]
|
||||
355063 b.out.d[2].t : 1 [by b.b.buf.t_buf_func[2]._y:=0]
|
||||
355236 b.b.out_valid.OR2_tf[2]._y : 0 [by b.out.d[2].t:=1]
|
||||
355420 b.b.out_valid.ct.in[2] : 1 [by b.b.out_valid.OR2_tf[2]._y:=0]
|
||||
356247 b.b.gandalf_t[1].y : 1 [by b.b.gandalf_t[1]._y:=0]
|
||||
356248 b.b.buf.vc.OR2_tf[1]._y : 0 [by b.b.gandalf_t[1].y:=1]
|
||||
356252 b.b.buf.vc.ct.in[1] : 1 [by b.b.buf.vc.OR2_tf[1]._y:=0]
|
||||
356320 b.b.buf.t_buf_func[1]._y : 0 [by b.b.gandalf_t[1].y:=1]
|
||||
356416 b.out.d[1].t : 1 [by b.b.buf.t_buf_func[1]._y:=0]
|
||||
356552 b.b.out_valid.OR2_tf[1]._y : 0 [by b.out.d[1].t:=1]
|
||||
356553 b.b.out_valid.ct.in[1] : 1 [by b.b.out_valid.OR2_tf[1]._y:=0]
|
||||
356559 b.b.out_valid.ct.in[0] : 1 [by b.b.out_valid.OR2_tf[0]._y:=0]
|
||||
360184 b.b.buf.vc.OR2_tf[2]._y : 0 [by b.b.gandalf_t[2].y:=1]
|
||||
360425 b.b.buf.vc.ct.in[2] : 1 [by b.b.buf.vc.OR2_tf[2]._y:=0]
|
||||
366523 b.b.out_valid.ct.in[4] : 1 [by b.b.out_valid.OR2_tf[4]._y:=0]
|
||||
375605 b.b.out_valid.ct.C2Els[0]._y : 0 [by b.b.out_valid.ct.in[0]:=1]
|
||||
379564 b.b.out_valid.ct.tmp[7] : 1 [by b.b.out_valid.ct.C2Els[0]._y:=0]
|
||||
390343 b.b.gandalf_t[3].y : 1 [by b.b.gandalf_t[3]._y:=0]
|
||||
390355 b.b.buf.vc.OR2_tf[3]._y : 0 [by b.b.gandalf_t[3].y:=1]
|
||||
390734 b.b.buf.t_buf_func[5]._y : 0 [by b.b.gandalf_t[5].y:=1]
|
||||
390735 b.out.d[5].t : 1 [by b.b.buf.t_buf_func[5]._y:=0]
|
||||
390791 b.b.out_valid.OR2_tf[5]._y : 0 [by b.out.d[5].t:=1]
|
||||
391384 b.b.buf.vc.ct.in[3] : 1 [by b.b.buf.vc.OR2_tf[3]._y:=0]
|
||||
391385 b.b.buf.vc.ct.C2Els[1]._y : 0 [by b.b.buf.vc.ct.in[3]:=1]
|
||||
391422 b.b.buf.vc.ct.tmp[8] : 1 [by b.b.buf.vc.ct.C2Els[1]._y:=0]
|
||||
392436 b.b.buf.vc.OR2_tf[4]._y : 0 [by b.b.gandalf_t[4].y:=1]
|
||||
393540 b.b.buf.vc.ct.C2Els[0]._y : 0 [by b.b.buf.vc.ct.in[1]:=1]
|
||||
393541 b.b.buf.vc.ct.tmp[7] : 1 [by b.b.buf.vc.ct.C2Els[0]._y:=0]
|
||||
394243 b.b.buf.t_buf_func[3]._y : 0 [by b.b.gandalf_t[3].y:=1]
|
||||
397807 b.out.d[3].t : 1 [by b.b.buf.t_buf_func[3]._y:=0]
|
||||
399499 b.b.out_valid.OR2_tf[3]._y : 0 [by b.out.d[3].t:=1]
|
||||
399512 b.b.out_valid.ct.in[3] : 1 [by b.b.out_valid.OR2_tf[3]._y:=0]
|
||||
401459 b.b.gandalf_t[6]._y : 0 [by b.b.pass.y:=1]
|
||||
401816 b.b.gandalf_t[6].y : 1 [by b.b.gandalf_t[6]._y:=0]
|
||||
401837 b.b.buf.t_buf_func[6]._y : 0 [by b.b.gandalf_t[6].y:=1]
|
||||
401838 b.out.d[6].t : 1 [by b.b.buf.t_buf_func[6]._y:=0]
|
||||
401841 b.b.buf.vc.OR2_tf[6]._y : 0 [by b.b.gandalf_t[6].y:=1]
|
||||
401842 b.b.buf.vc.ct.in[6] : 1 [by b.b.buf.vc.OR2_tf[6]._y:=0]
|
||||
411486 b.b.out_valid.OR2_tf[6]._y : 0 [by b.out.d[6].t:=1]
|
||||
411487 b.b.out_valid.ct.in[6] : 1 [by b.b.out_valid.OR2_tf[6]._y:=0]
|
||||
415811 b.b.buf.vc.ct.in[4] : 1 [by b.b.buf.vc.OR2_tf[4]._y:=0]
|
||||
415972 b.b.buf.vc.ct.C3Els[0]._y : 0 [by b.b.buf.vc.ct.in[4]:=1]
|
||||
416496 b.b.out_valid.ct.C2Els[1]._y : 0 [by b.b.out_valid.ct.in[3]:=1]
|
||||
416501 b.b.out_valid.ct.tmp[8] : 1 [by b.b.out_valid.ct.C2Els[1]._y:=0]
|
||||
417009 b.b.buf.vc.ct.tmp[9] : 1 [by b.b.buf.vc.ct.C3Els[0]._y:=0]
|
||||
417590 b.b.buf.vc.ct.C3Els[1]._y : 0 [by b.b.buf.vc.ct.tmp[9]:=1]
|
||||
417998 b.b.buf._in_v : 1 [by b.b.buf.vc.ct.C3Els[1]._y:=0]
|
||||
418009 b.b.buf.in_v_buf._y : 0 [by b.b.buf._in_v:=1]
|
||||
419056 b.in.v : 1 [by b.b.buf.in_v_buf._y:=0]
|
||||
435797 b.b.out_valid.ct.in[5] : 1 [by b.b.out_valid.OR2_tf[5]._y:=0]
|
||||
435811 b.b.out_valid.ct.C3Els[0]._y : 0 [by b.b.out_valid.ct.in[5]:=1]
|
||||
435829 b.b.out_valid.ct.tmp[9] : 1 [by b.b.out_valid.ct.C3Els[0]._y:=0]
|
||||
435833 b.b.out_valid.ct.C3Els[1]._y : 0 [by b.b.out_valid.ct.tmp[9]:=1]
|
||||
435937 b.b._out_v : 1 [by b.b.out_valid.ct.C3Els[1]._y:=0]
|
||||
437141 b.b.buf._en : 0 [by b.b._out_v:=1]
|
||||
437369 b.b.buf.en_buf_f.buf2._y : 1 [by b.b.buf._en:=0]
|
||||
437984 b.b.buf.en_buf_t.buf2._y : 1 [by b.b.buf._en:=0]
|
||||
438054 b.b.buf._en_X_t[0] : 0 [by b.b.buf.en_buf_t.buf2._y:=1]
|
||||
438828 b.b.buf._en_X_f[0] : 0 [by b.b.buf.en_buf_f.buf2._y:=1]
|
||||
445596 b.b.in_ack_inv.a : 1 [by b.b.buf._en:=0]
|
||||
467381 b.b._out_vB : 0 [by b.b._out_v:=1]
|
||||
496018 b.b.in_ack_inv.y : 0 [by b.b.in_ack_inv.a:=1]
|
||||
496029 b.in.a : 1 [by b.b.in_ack_inv.y:=0]
|
||||
[] Removing input
|
||||
496029 b.b.gandalf_t[0].a : 0
|
||||
496029 b.b._w : 0
|
||||
496029 b.b.gandalf_t[2].a : 0
|
||||
496029 b.b.gandalf_t[6].a : 0
|
||||
496029 b.b.gandalf_t[5].a : 0
|
||||
496029 b.b.gandalf_t[1].a : 0
|
||||
496029 b.b.gandalf_t[4].a : 0
|
||||
496029 b.b.gandalf_t[3].a : 0
|
||||
496032 b.b.gandalf_t[0]._y : 1 [by b.b.gandalf_t[0].a:=0]
|
||||
496083 b.b._en2 : 1 [by b.b._w:=0]
|
||||
496110 b.b.gandalf_t[1]._y : 1 [by b.b.gandalf_t[1].a:=0]
|
||||
496124 b.b.gandalf_t[0].y : 0 [by b.b.gandalf_t[0]._y:=1]
|
||||
496737 b.b.buf.vc.OR2_tf[0]._y : 1 [by b.b.gandalf_t[0].y:=0]
|
||||
497177 b.b.gandalf_t[2]._y : 1 [by b.b.gandalf_t[2].a:=0]
|
||||
497190 b.b.gandalf_t[6]._y : 1 [by b.b.gandalf_t[6].a:=0]
|
||||
497222 b.b.gandalf_t[2].y : 0 [by b.b.gandalf_t[2]._y:=1]
|
||||
497854 b.b.gandalf_t[1].y : 0 [by b.b.gandalf_t[1]._y:=1]
|
||||
498187 b.b.gandalf_t[6].y : 0 [by b.b.gandalf_t[6]._y:=1]
|
||||
498379 b.b.buf.vc.OR2_tf[1]._y : 1 [by b.b.gandalf_t[1].y:=0]
|
||||
498431 b.b.buf.vc.ct.in[1] : 0 [by b.b.buf.vc.OR2_tf[1]._y:=1]
|
||||
498871 b.b.buf.vc.OR2_tf[2]._y : 1 [by b.b.gandalf_t[2].y:=0]
|
||||
498878 b.b.buf.vc.ct.in[2] : 0 [by b.b.buf.vc.OR2_tf[2]._y:=1]
|
||||
499087 b.b.buf.vc.OR2_tf[6]._y : 1 [by b.b.gandalf_t[6].y:=0]
|
||||
504394 b.b.pass.y : 0 [by b.b._en2:=1]
|
||||
504681 b.b.gandalf_t[5]._y : 1 [by b.b.gandalf_t[5].a:=0]
|
||||
507106 b.b.gandalf_t[4]._y : 1 [by b.b.gandalf_t[4].a:=0]
|
||||
507108 b.b.gandalf_t[4].y : 0 [by b.b.gandalf_t[4]._y:=1]
|
||||
507462 b.b.buf.vc.OR2_tf[4]._y : 1 [by b.b.gandalf_t[4].y:=0]
|
||||
507595 b.b.buf.vc.ct.in[4] : 0 [by b.b.buf.vc.OR2_tf[4]._y:=1]
|
||||
510759 b.b.buf.vc.ct.in[0] : 0 [by b.b.buf.vc.OR2_tf[0]._y:=1]
|
||||
510760 b.b.buf.vc.ct.C2Els[0]._y : 1 [by b.b.buf.vc.ct.in[0]:=0]
|
||||
510764 b.b.buf.vc.ct.tmp[7] : 0 [by b.b.buf.vc.ct.C2Els[0]._y:=1]
|
||||
511148 b.b.gandalf_t[5].y : 0 [by b.b.gandalf_t[5]._y:=1]
|
||||
511694 b.b.buf.vc.OR2_tf[5]._y : 1 [by b.b.gandalf_t[5].y:=0]
|
||||
514012 b.b.gandalf_t[3]._y : 1 [by b.b.gandalf_t[3].a:=0]
|
||||
514013 b.b.gandalf_t[3].y : 0 [by b.b.gandalf_t[3]._y:=1]
|
||||
514699 b.b.buf.vc.ct.in[6] : 0 [by b.b.buf.vc.OR2_tf[6]._y:=1]
|
||||
526391 b.b.buf.vc.OR2_tf[3]._y : 1 [by b.b.gandalf_t[3].y:=0]
|
||||
526470 b.b.buf.vc.ct.in[3] : 0 [by b.b.buf.vc.OR2_tf[3]._y:=1]
|
||||
528903 b.b.buf.vc.ct.C2Els[1]._y : 1 [by b.b.buf.vc.ct.in[3]:=0]
|
||||
528991 b.b.buf.vc.ct.tmp[8] : 0 [by b.b.buf.vc.ct.C2Els[1]._y:=1]
|
||||
557257 b.b.buf.vc.ct.in[5] : 0 [by b.b.buf.vc.OR2_tf[5]._y:=1]
|
||||
565039 b.b.buf.vc.ct.C3Els[0]._y : 1 [by b.b.buf.vc.ct.in[5]:=0]
|
||||
593366 b.b.buf.vc.ct.tmp[9] : 0 [by b.b.buf.vc.ct.C3Els[0]._y:=1]
|
||||
593425 b.b.buf.vc.ct.C3Els[1]._y : 1 [by b.b.buf.vc.ct.tmp[9]:=0]
|
||||
593455 b.b.buf._in_v : 0 [by b.b.buf.vc.ct.C3Els[1]._y:=1]
|
||||
594922 b.b.buf.in_v_buf._y : 1 [by b.b.buf._in_v:=0]
|
||||
654426 b.in.v : 0 [by b.b.buf.in_v_buf._y:=1]
|
||||
673810 b.b.buf._en : 1 [by b.in.v:=0]
|
||||
673937 b.b.buf.en_buf_t.buf2._y : 0 [by b.b.buf._en:=1]
|
||||
674106 b.b.buf._en_X_t[0] : 1 [by b.b.buf.en_buf_t.buf2._y:=0]
|
||||
674495 b.b.in_ack_inv.a : 0 [by b.b.buf._en:=1]
|
||||
674538 b.b.in_ack_inv.y : 1 [by b.b.in_ack_inv.a:=0]
|
||||
674550 b.in.a : 0 [by b.b.in_ack_inv.y:=1]
|
||||
690525 b.b.buf.en_buf_f.buf2._y : 0 [by b.b.buf._en:=1]
|
||||
691804 b.b.buf._en_X_f[0] : 1 [by b.b.buf.en_buf_f.buf2._y:=0]
|
||||
[] Sending in 35
|
||||
691804 b.b.gandalf_t[0].a : 1
|
||||
691804 b.b._w : 1
|
||||
691804 b.b.gandalf_f[6].a : 1
|
||||
691804 b.b.gandalf_f[2].a : 1
|
||||
691804 b.b.gandalf_t[5].a : 1
|
||||
691804 b.b.gandalf_f[4].a : 1
|
||||
691804 b.b.gandalf_f[3].a : 1
|
||||
691804 b.b.gandalf_t[1].a : 1
|
||||
692037 b.b.A_flush._y : 0 [by b.b._w:=1]
|
||||
692040 b.b._flush : 1 [by b.b.A_flush._y:=0]
|
||||
692041 b.b.buf._flushB : 0 [by b.b._flush:=1]
|
||||
692042 b.b.buf.t_buf_func[4]._y : 1 [by b.b.buf._flushB:=0]
|
||||
692043 b.b.buf.t_buf_func[3]._y : 1 [by b.b.buf._flushB:=0]
|
||||
692043 b.b.buf.t_buf_func[6]._y : 1 [by b.b.buf._flushB:=0]
|
||||
692060 b.out.d[4].t : 0 [by b.b.buf.t_buf_func[4]._y:=1]
|
||||
692068 b.b.out_valid.OR2_tf[4]._y : 1 [by b.out.d[4].t:=0]
|
||||
692078 b.b._flushB : 0 [by b.b._flush:=1]
|
||||
692122 b.b.out_valid.ct.in[4] : 0 [by b.b.out_valid.OR2_tf[4]._y:=1]
|
||||
692133 b.b.buf.t_buf_func[1]._y : 1 [by b.b.buf._flushB:=0]
|
||||
692162 b.out.d[3].t : 0 [by b.b.buf.t_buf_func[3]._y:=1]
|
||||
692167 b.b.out_valid.OR2_tf[3]._y : 1 [by b.out.d[3].t:=0]
|
||||
693234 b.b.out_valid.ct.in[3] : 0 [by b.b.out_valid.OR2_tf[3]._y:=1]
|
||||
693542 b.b.buf.t_buf_func[5]._y : 1 [by b.b.buf._flushB:=0]
|
||||
693543 b.out.d[5].t : 0 [by b.b.buf.t_buf_func[5]._y:=1]
|
||||
693681 b.b.out_valid.OR2_tf[5]._y : 1 [by b.out.d[5].t:=0]
|
||||
693682 b.b.out_valid.ct.in[5] : 0 [by b.b.out_valid.OR2_tf[5]._y:=1]
|
||||
694768 b.b.buf.t_buf_func[2]._y : 1 [by b.b.buf._flushB:=0]
|
||||
694832 b.out.d[2].t : 0 [by b.b.buf.t_buf_func[2]._y:=1]
|
||||
694955 b.b.out_valid.OR2_tf[2]._y : 1 [by b.out.d[2].t:=0]
|
||||
694957 b.b.out_valid.ct.in[2] : 0 [by b.b.out_valid.OR2_tf[2]._y:=1]
|
||||
694994 b.b.out_valid.ct.C2Els[1]._y : 1 [by b.b.out_valid.ct.in[2]:=0]
|
||||
695137 b.b.out_valid.ct.tmp[8] : 0 [by b.b.out_valid.ct.C2Els[1]._y:=1]
|
||||
697763 b.out.d[6].t : 0 [by b.b.buf.t_buf_func[6]._y:=1]
|
||||
697814 b.b.out_valid.OR2_tf[6]._y : 1 [by b.out.d[6].t:=0]
|
||||
698256 b.b.out_valid.ct.in[6] : 0 [by b.b.out_valid.OR2_tf[6]._y:=1]
|
||||
698267 b.b.out_valid.ct.C3Els[0]._y : 1 [by b.b.out_valid.ct.in[6]:=0]
|
||||
698268 b.b.out_valid.ct.tmp[9] : 0 [by b.b.out_valid.ct.C3Els[0]._y:=1]
|
||||
704793 b.b.buf.t_buf_func[0]._y : 1 [by b.b.buf._flushB:=0]
|
||||
704802 b.out.d[0].t : 0 [by b.b.buf.t_buf_func[0]._y:=1]
|
||||
704827 b.b.out_valid.OR2_tf[0]._y : 1 [by b.out.d[0].t:=0]
|
||||
715080 b.b.out_valid.ct.in[0] : 0 [by b.b.out_valid.OR2_tf[0]._y:=1]
|
||||
742671 b.out.d[1].t : 0 [by b.b.buf.t_buf_func[1]._y:=1]
|
||||
746192 b.b.out_valid.OR2_tf[1]._y : 1 [by b.out.d[1].t:=0]
|
||||
746337 b.b.out_valid.ct.in[1] : 0 [by b.b.out_valid.OR2_tf[1]._y:=1]
|
||||
762505 b.b.out_valid.ct.C2Els[0]._y : 1 [by b.b.out_valid.ct.in[1]:=0]
|
||||
762735 b.b.out_valid.ct.tmp[7] : 0 [by b.b.out_valid.ct.C2Els[0]._y:=1]
|
||||
763426 b.b.out_valid.ct.C3Els[1]._y : 1 [by b.b.out_valid.ct.tmp[7]:=0]
|
||||
763440 b.b._out_v : 0 [by b.b.out_valid.ct.C3Els[1]._y:=1]
|
||||
764983 b.b._out_vB : 1 [by b.b._out_v:=0]
|
||||
766594 b.b._en2 : 0 [by b.b._out_vB:=1]
|
||||
784106 b.b.A_flush._y : 1 [by b.b._en2:=0]
|
||||
784117 b.b._flush : 0 [by b.b.A_flush._y:=1]
|
||||
784118 b.b.pass.y : 1 [by b.b._flush:=0]
|
||||
784118 b.b._flushB : 1 [by b.b._flush:=0]
|
||||
784119 b.b.gandalf_f[6]._y : 0 [by b.b.pass.y:=1]
|
||||
784122 b.b.gandalf_f[6].y : 1 [by b.b.gandalf_f[6]._y:=0]
|
||||
784135 b.b.gandalf_t[0]._y : 0 [by b.b.pass.y:=1]
|
||||
784141 b.b.gandalf_t[0].y : 1 [by b.b.gandalf_t[0]._y:=0]
|
||||
784250 b.b.gandalf_f[4]._y : 0 [by b.b.pass.y:=1]
|
||||
784270 b.b.gandalf_t[1]._y : 0 [by b.b.pass.y:=1]
|
||||
784546 b.b.buf.vc.OR2_tf[6]._y : 0 [by b.b.gandalf_f[6].y:=1]
|
||||
784757 b.b.gandalf_f[2]._y : 0 [by b.b.pass.y:=1]
|
||||
784759 b.b.gandalf_f[2].y : 1 [by b.b.gandalf_f[2]._y:=0]
|
||||
784953 b.b.buf.vc.OR2_tf[2]._y : 0 [by b.b.gandalf_f[2].y:=1]
|
||||
785100 b.b.gandalf_t[1].y : 1 [by b.b.gandalf_t[1]._y:=0]
|
||||
785238 b.b.buf.vc.OR2_tf[1]._y : 0 [by b.b.gandalf_t[1].y:=1]
|
||||
785255 b.b.buf.vc.ct.in[1] : 1 [by b.b.buf.vc.OR2_tf[1]._y:=0]
|
||||
785556 b.b.buf.vc.ct.in[2] : 1 [by b.b.buf.vc.OR2_tf[2]._y:=0]
|
||||
785911 b.b.gandalf_f[3]._y : 0 [by b.b.pass.y:=1]
|
||||
785928 b.b.gandalf_f[3].y : 1 [by b.b.gandalf_f[3]._y:=0]
|
||||
786354 b.b.buf.vc.OR2_tf[3]._y : 0 [by b.b.gandalf_f[3].y:=1]
|
||||
786355 b.b.buf.vc.ct.in[3] : 1 [by b.b.buf.vc.OR2_tf[3]._y:=0]
|
||||
786356 b.b.buf.vc.ct.C2Els[1]._y : 0 [by b.b.buf.vc.ct.in[3]:=1]
|
||||
786711 b.b.gandalf_f[4].y : 1 [by b.b.gandalf_f[4]._y:=0]
|
||||
786712 b.b.buf.vc.OR2_tf[4]._y : 0 [by b.b.gandalf_f[4].y:=1]
|
||||
786729 b.b.buf.vc.OR2_tf[0]._y : 0 [by b.b.gandalf_t[0].y:=1]
|
||||
786731 b.b.buf.vc.ct.in[4] : 1 [by b.b.buf.vc.OR2_tf[4]._y:=0]
|
||||
786897 b.b.buf.vc.ct.in[0] : 1 [by b.b.buf.vc.OR2_tf[0]._y:=0]
|
||||
787101 b.b.gandalf_t[5]._y : 0 [by b.b.pass.y:=1]
|
||||
787262 b.b.gandalf_t[5].y : 1 [by b.b.gandalf_t[5]._y:=0]
|
||||
787382 b.b.buf.vc.ct.tmp[8] : 1 [by b.b.buf.vc.ct.C2Els[1]._y:=0]
|
||||
787435 b.b.buf.vc.OR2_tf[5]._y : 0 [by b.b.gandalf_t[5].y:=1]
|
||||
787436 b.b.buf.vc.ct.C2Els[0]._y : 0 [by b.b.buf.vc.ct.in[0]:=1]
|
||||
789982 b.b.buf.vc.ct.in[5] : 1 [by b.b.buf.vc.OR2_tf[5]._y:=0]
|
||||
790618 b.b.buf._flushB : 1 [by b.b._flush:=0]
|
||||
790619 b.b.buf.t_buf_func[0]._y : 0 [by b.b.buf._flushB:=1]
|
||||
790619 b.b.buf.t_buf_func[1]._y : 0 [by b.b.buf._flushB:=1]
|
||||
790623 b.out.d[1].t : 1 [by b.b.buf.t_buf_func[1]._y:=0]
|
||||
790625 b.b.buf.f_buf_func[6]._y : 0 [by b.b.buf._flushB:=1]
|
||||
790646 b.b.buf.f_buf_func[4]._y : 0 [by b.b.buf._flushB:=1]
|
||||
790812 b.out.d[4].f : 1 [by b.b.buf.f_buf_func[4]._y:=0]
|
||||
790825 b.b.buf.f_buf_func[2]._y : 0 [by b.b.buf._flushB:=1]
|
||||
791008 b.b.buf.t_buf_func[5]._y : 0 [by b.b.buf._flushB:=1]
|
||||
791033 b.out.d[0].t : 1 [by b.b.buf.t_buf_func[0]._y:=0]
|
||||
791451 b.b.buf.f_buf_func[3]._y : 0 [by b.b.buf._flushB:=1]
|
||||
791590 b.out.d[3].f : 1 [by b.b.buf.f_buf_func[3]._y:=0]
|
||||
791889 b.b.out_valid.OR2_tf[0]._y : 0 [by b.out.d[0].t:=1]
|
||||
791941 b.out.d[5].t : 1 [by b.b.buf.t_buf_func[5]._y:=0]
|
||||
791943 b.b.out_valid.OR2_tf[5]._y : 0 [by b.out.d[5].t:=1]
|
||||
792084 b.b.out_valid.ct.in[0] : 1 [by b.b.out_valid.OR2_tf[0]._y:=0]
|
||||
792402 b.b.out_valid.OR2_tf[1]._y : 0 [by b.out.d[1].t:=1]
|
||||
792408 b.b.out_valid.ct.in[1] : 1 [by b.b.out_valid.OR2_tf[1]._y:=0]
|
||||
792662 b.b.out_valid.ct.C2Els[0]._y : 0 [by b.b.out_valid.ct.in[1]:=1]
|
||||
792670 b.b.out_valid.ct.tmp[7] : 1 [by b.b.out_valid.ct.C2Els[0]._y:=0]
|
||||
799470 b.out.d[2].f : 1 [by b.b.buf.f_buf_func[2]._y:=0]
|
||||
799471 b.b.out_valid.OR2_tf[2]._y : 0 [by b.out.d[2].f:=1]
|
||||
799477 b.b.out_valid.ct.in[2] : 1 [by b.b.out_valid.OR2_tf[2]._y:=0]
|
||||
802497 b.b.buf.vc.ct.tmp[7] : 1 [by b.b.buf.vc.ct.C2Els[0]._y:=0]
|
||||
807478 b.b.buf.vc.ct.in[6] : 1 [by b.b.buf.vc.OR2_tf[6]._y:=0]
|
||||
813499 b.out.d[6].f : 1 [by b.b.buf.f_buf_func[6]._y:=0]
|
||||
816589 b.b.out_valid.OR2_tf[6]._y : 0 [by b.out.d[6].f:=1]
|
||||
816815 b.b.out_valid.ct.in[6] : 1 [by b.b.out_valid.OR2_tf[6]._y:=0]
|
||||
817799 b.b.out_valid.OR2_tf[3]._y : 0 [by b.out.d[3].f:=1]
|
||||
818618 b.b.out_valid.ct.in[3] : 1 [by b.b.out_valid.OR2_tf[3]._y:=0]
|
||||
818619 b.b.out_valid.ct.C2Els[1]._y : 0 [by b.b.out_valid.ct.in[3]:=1]
|
||||
818625 b.b.out_valid.ct.tmp[8] : 1 [by b.b.out_valid.ct.C2Els[1]._y:=0]
|
||||
830682 b.b.out_valid.OR2_tf[4]._y : 0 [by b.out.d[4].f:=1]
|
||||
830684 b.b.out_valid.ct.in[4] : 1 [by b.b.out_valid.OR2_tf[4]._y:=0]
|
||||
845392 b.b.out_valid.ct.in[5] : 1 [by b.b.out_valid.OR2_tf[5]._y:=0]
|
||||
848954 b.b.out_valid.ct.C3Els[0]._y : 0 [by b.b.out_valid.ct.in[5]:=1]
|
||||
848969 b.b.out_valid.ct.tmp[9] : 1 [by b.b.out_valid.ct.C3Els[0]._y:=0]
|
||||
858514 b.b.buf.vc.ct.C3Els[0]._y : 0 [by b.b.buf.vc.ct.in[6]:=1]
|
||||
858621 b.b.buf.vc.ct.tmp[9] : 1 [by b.b.buf.vc.ct.C3Els[0]._y:=0]
|
||||
858714 b.b.buf.vc.ct.C3Els[1]._y : 0 [by b.b.buf.vc.ct.tmp[9]:=1]
|
||||
860366 b.b.buf._in_v : 1 [by b.b.buf.vc.ct.C3Els[1]._y:=0]
|
||||
864305 b.b.buf.in_v_buf._y : 0 [by b.b.buf._in_v:=1]
|
||||
865063 b.in.v : 1 [by b.b.buf.in_v_buf._y:=0]
|
||||
869770 b.b.out_valid.ct.C3Els[1]._y : 0 [by b.b.out_valid.ct.tmp[9]:=1]
|
||||
872393 b.b._out_v : 1 [by b.b.out_valid.ct.C3Els[1]._y:=0]
|
||||
872394 b.b.buf._en : 0 [by b.b._out_v:=1]
|
||||
872395 b.b.buf.en_buf_f.buf2._y : 1 [by b.b.buf._en:=0]
|
||||
873109 b.b._out_vB : 0 [by b.b._out_v:=1]
|
||||
874134 b.b.in_ack_inv.a : 1 [by b.b.buf._en:=0]
|
||||
874135 b.b.in_ack_inv.y : 0 [by b.b.in_ack_inv.a:=1]
|
||||
874141 b.in.a : 1 [by b.b.in_ack_inv.y:=0]
|
||||
884546 b.b.buf.en_buf_t.buf2._y : 1 [by b.b.buf._en:=0]
|
||||
884547 b.b.buf._en_X_t[0] : 0 [by b.b.buf.en_buf_t.buf2._y:=1]
|
||||
900594 b.b.buf._en_X_f[0] : 0 [by b.b.buf.en_buf_f.buf2._y:=1]
|
||||
[] Removing input
|
||||
900594 b.b.gandalf_t[0].a : 0
|
||||
900594 b.b._w : 0
|
||||
900594 b.b.gandalf_f[2].a : 0
|
||||
900594 b.b.gandalf_f[6].a : 0
|
||||
900594 b.b.gandalf_t[5].a : 0
|
||||
900594 b.b.gandalf_t[1].a : 0
|
||||
900594 b.b.gandalf_f[4].a : 0
|
||||
900594 b.b.gandalf_f[3].a : 0
|
||||
900601 b.b.gandalf_t[5]._y : 1 [by b.b.gandalf_t[5].a:=0]
|
||||
900607 b.b.gandalf_f[4]._y : 1 [by b.b.gandalf_f[4].a:=0]
|
||||
900616 b.b.gandalf_f[2]._y : 1 [by b.b.gandalf_f[2].a:=0]
|
||||
900617 b.b.gandalf_f[2].y : 0 [by b.b.gandalf_f[2]._y:=1]
|
||||
900618 b.b.buf.vc.OR2_tf[2]._y : 1 [by b.b.gandalf_f[2].y:=0]
|
||||
900648 b.b.gandalf_f[4].y : 0 [by b.b.gandalf_f[4]._y:=1]
|
||||
900659 b.b.gandalf_t[1]._y : 1 [by b.b.gandalf_t[1].a:=0]
|
||||
900660 b.b.gandalf_t[1].y : 0 [by b.b.gandalf_t[1]._y:=1]
|
||||
900705 b.b.gandalf_t[5].y : 0 [by b.b.gandalf_t[5]._y:=1]
|
||||
901718 b.b.gandalf_f[3]._y : 1 [by b.b.gandalf_f[3].a:=0]
|
||||
902544 b.b.gandalf_f[3].y : 0 [by b.b.gandalf_f[3]._y:=1]
|
||||
903841 b.b.buf.vc.OR2_tf[5]._y : 1 [by b.b.gandalf_t[5].y:=0]
|
||||
904377 b.b.buf.vc.OR2_tf[3]._y : 1 [by b.b.gandalf_f[3].y:=0]
|
||||
904435 b.b.buf.vc.ct.in[3] : 0 [by b.b.buf.vc.OR2_tf[3]._y:=1]
|
||||
913820 b.b.buf.vc.OR2_tf[4]._y : 1 [by b.b.gandalf_f[4].y:=0]
|
||||
916263 b.b.buf.vc.ct.in[4] : 0 [by b.b.buf.vc.OR2_tf[4]._y:=1]
|
||||
920389 b.b.buf.vc.ct.in[5] : 0 [by b.b.buf.vc.OR2_tf[5]._y:=1]
|
||||
920485 b.b.buf.vc.OR2_tf[1]._y : 1 [by b.b.gandalf_t[1].y:=0]
|
||||
922193 b.b._en2 : 1 [by b.b._w:=0]
|
||||
923102 b.b.gandalf_f[6]._y : 1 [by b.b.gandalf_f[6].a:=0]
|
||||
923116 b.b.gandalf_f[6].y : 0 [by b.b.gandalf_f[6]._y:=1]
|
||||
923472 b.b.buf.vc.OR2_tf[6]._y : 1 [by b.b.gandalf_f[6].y:=0]
|
||||
937258 b.b.buf.vc.ct.in[1] : 0 [by b.b.buf.vc.OR2_tf[1]._y:=1]
|
||||
940083 b.b.gandalf_t[0]._y : 1 [by b.b.gandalf_t[0].a:=0]
|
||||
940188 b.b.gandalf_t[0].y : 0 [by b.b.gandalf_t[0]._y:=1]
|
||||
940297 b.b.buf.vc.OR2_tf[0]._y : 1 [by b.b.gandalf_t[0].y:=0]
|
||||
940298 b.b.buf.vc.ct.in[0] : 0 [by b.b.buf.vc.OR2_tf[0]._y:=1]
|
||||
940307 b.b.buf.vc.ct.C2Els[0]._y : 1 [by b.b.buf.vc.ct.in[0]:=0]
|
||||
959310 b.b.buf.vc.ct.in[6] : 0 [by b.b.buf.vc.OR2_tf[6]._y:=1]
|
||||
959311 b.b.buf.vc.ct.C3Els[0]._y : 1 [by b.b.buf.vc.ct.in[6]:=0]
|
||||
959392 b.b.pass.y : 0 [by b.b._en2:=1]
|
||||
964996 b.b.buf.vc.ct.in[2] : 0 [by b.b.buf.vc.OR2_tf[2]._y:=1]
|
||||
964997 b.b.buf.vc.ct.C2Els[1]._y : 1 [by b.b.buf.vc.ct.in[2]:=0]
|
||||
968086 b.b.buf.vc.ct.tmp[8] : 0 [by b.b.buf.vc.ct.C2Els[1]._y:=1]
|
||||
978260 b.b.buf.vc.ct.tmp[7] : 0 [by b.b.buf.vc.ct.C2Els[0]._y:=1]
|
||||
995705 b.b.buf.vc.ct.tmp[9] : 0 [by b.b.buf.vc.ct.C3Els[0]._y:=1]
|
||||
1044431 b.b.buf.vc.ct.C3Els[1]._y : 1 [by b.b.buf.vc.ct.tmp[9]:=0]
|
||||
1045181 b.b.buf._in_v : 0 [by b.b.buf.vc.ct.C3Els[1]._y:=1]
|
||||
1051936 b.b.buf.in_v_buf._y : 1 [by b.b.buf._in_v:=0]
|
||||
1051987 b.in.v : 0 [by b.b.buf.in_v_buf._y:=1]
|
||||
1051997 b.b.buf._en : 1 [by b.in.v:=0]
|
||||
1051998 b.b.buf.en_buf_t.buf2._y : 0 [by b.b.buf._en:=1]
|
||||
1051999 b.b.buf._en_X_t[0] : 1 [by b.b.buf.en_buf_t.buf2._y:=0]
|
||||
1052317 b.b.in_ack_inv.a : 0 [by b.b.buf._en:=1]
|
||||
1054047 b.b.in_ack_inv.y : 1 [by b.b.in_ack_inv.a:=0]
|
||||
1055734 b.in.a : 0 [by b.b.in_ack_inv.y:=1]
|
||||
1059579 b.b.buf.en_buf_f.buf2._y : 0 [by b.b.buf._en:=1]
|
||||
1059594 b.b.buf._en_X_f[0] : 1 [by b.b.buf.en_buf_f.buf2._y:=0]
|
||||
1275
test/unit_tests/registerA_w/run/test.prs
Normal file
1275
test/unit_tests/registerA_w/run/test.prs
Normal file
File diff suppressed because it is too large
Load Diff
52
test/unit_tests/registerA_w/test.act
Normal file
52
test/unit_tests/registerA_w/test.act
Normal file
@ -0,0 +1,52 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/registers.act";
|
||||
|
||||
import globals;
|
||||
import std::data;
|
||||
|
||||
open std::data;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
defproc registerA_w (avMx1of2<8> in; Mx1of2<7> out){
|
||||
bool _reset_B;
|
||||
prs {
|
||||
Reset => _reset_B-
|
||||
}
|
||||
power supply;
|
||||
supply.vdd = Vdd;
|
||||
supply.vss = GND;
|
||||
|
||||
registerA<7> b(.in = in, .out = out, .reset_B = _reset_B, .supply = supply);
|
||||
}
|
||||
|
||||
|
||||
// fifo_decoder_neurons_encoder_fifo e;
|
||||
registerA_w b;
|
||||
42
test/unit_tests/registerA_w/test.prsim
Normal file
42
test/unit_tests/registerA_w/test.prsim
Normal file
@ -0,0 +1,42 @@
|
||||
watchall
|
||||
|
||||
set-qdi-channel-neutral "b.in" 8
|
||||
cycle
|
||||
|
||||
|
||||
mode run
|
||||
system "echo '[] Set reset 0'"
|
||||
status X
|
||||
set Reset 0
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending in 127'"
|
||||
set-qdi-channel-valid "b.in" 8 255
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.out" 7 127
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 8
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
assert-var-int "b.out" 7 127
|
||||
|
||||
system "echo '[] Sending in 35'"
|
||||
set-qdi-channel-valid "b.in" 8 163
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.out" 7 35
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 8
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
assert-var-int "b.out" 7 35
|
||||
|
||||
2721
test/unit_tests/registerA_w_array/run/prsim.out
Normal file
2721
test/unit_tests/registerA_w_array/run/prsim.out
Normal file
File diff suppressed because it is too large
Load Diff
8605
test/unit_tests/registerA_w_array/run/test.prs
Normal file
8605
test/unit_tests/registerA_w_array/run/test.prs
Normal file
File diff suppressed because it is too large
Load Diff
54
test/unit_tests/registerA_w_array/test.act
Normal file
54
test/unit_tests/registerA_w_array/test.act
Normal file
@ -0,0 +1,54 @@
|
||||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/registers.act";
|
||||
|
||||
import globals;
|
||||
import std::data;
|
||||
|
||||
open std::data;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
defproc registerA_w_array_3x5x8 (avMx1of2<3+5+1> in; Mx1of2<5> data[8]){
|
||||
bool _reset_B;
|
||||
prs {
|
||||
Reset => _reset_B-
|
||||
}
|
||||
power supply;
|
||||
supply.vdd = Vdd;
|
||||
supply.vss = GND;
|
||||
|
||||
// Make a register array with 3 bit address (-> 8 registers),
|
||||
// each register holding 5 bits.
|
||||
registerA_w_array<3,5,8> b(.in = in, .data = data, .reset_B = _reset_B, .supply = supply);
|
||||
}
|
||||
|
||||
|
||||
// fifo_decoder_neurons_encoder_fifo e;
|
||||
registerA_w_array_3x5x8 b;
|
||||
150
test/unit_tests/registerA_w_array/test.prsim
Normal file
150
test/unit_tests/registerA_w_array/test.prsim
Normal file
@ -0,0 +1,150 @@
|
||||
watchall
|
||||
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
|
||||
|
||||
mode run
|
||||
system "echo '[] Set reset 0'"
|
||||
status X
|
||||
set Reset 0
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg0'"
|
||||
set-qdi-channel-valid "b.in" 9 256
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.data[0]" 5 0
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
assert-var-int "b.data[0]" 5 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg0'"
|
||||
set-qdi-channel-valid "b.in" 9 256
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.data[0]" 5 0
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
assert-var-int "b.data[0]" 5 0
|
||||
|
||||
system "echo '[] Sending packet write 01100 to reg0'"
|
||||
set-qdi-channel-valid "b.in" 9 352
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.data[0]" 5 12
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
assert-var-int "b.data[0]" 5 12
|
||||
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg1'"
|
||||
set-qdi-channel-valid "b.in" 9 257
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.data[1]" 5 0
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg2'"
|
||||
set-qdi-channel-valid "b.in" 9 258
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
assert-var-int "b.data[2]" 5 0
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
assert-var-int "b.data[2]" 5 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg3'"
|
||||
set-qdi-channel-valid "b.in" 9 259
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg4'"
|
||||
set-qdi-channel-valid "b.in" 9 260
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg5'"
|
||||
set-qdi-channel-valid "b.in" 9 261
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg6'"
|
||||
set-qdi-channel-valid "b.in" 9 262
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
system "echo '[] Sending packet write 0s to reg7'"
|
||||
set-qdi-channel-valid "b.in" 9 263
|
||||
cycle
|
||||
assert b.in.a 1
|
||||
assert b.in.v 1
|
||||
|
||||
system "echo '[] Removing input'"
|
||||
set-qdi-channel-neutral "b.in" 9
|
||||
cycle
|
||||
assert b.in.a 0
|
||||
assert b.in.v 0
|
||||
|
||||
assert-var-int "b.data[2]" 5 0
|
||||
assert-var-int "b.data[3]" 5 0
|
||||
assert-var-int "b.data[4]" 5 0
|
||||
assert-var-int "b.data[5]" 5 0
|
||||
assert-var-int "b.data[6]" 5 0
|
||||
assert-var-int "b.data[7]" 5 0
|
||||
Loading…
Reference in New Issue
Block a user