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Author SHA1 Message Date
alexmadison
8528ee12cd added cells needed for neuron grid 2022-03-28 19:51:50 +02:00
alexmadison
d395778a4a neuron 2d handshake fixes 2022-03-28 19:51:03 +02:00
3 changed files with 126 additions and 23 deletions

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@ -26,6 +26,33 @@
namespace tmpl { namespace tmpl {
namespace dataflow_neuro{ namespace dataflow_neuro{
export defcell KEEP_X1 (bool y; bool vdd, vss) {
bool _y;
prs{
y => _y-
[weak=1] _y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}
}
}
export defcell A_1C2N_RB_X1 (bool! y; bool? c1,n1,n2,pr_B, sr_B; bool vdd, vss) {
bool _y;
prs{
(~c1)|~pr_B -> _y+
c1 & n1 & n2 & sr_B -> _y-
_y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}
}
}
export defcell A_1C1P2N_RB_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) { export defcell A_1C1P2N_RB_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) {
bool _y; bool _y;
prs{ prs{
@ -41,6 +68,22 @@ namespace tmpl {
} }
} }
export defcell A_2C1P1N_RB_X1 (bool! y; bool? c1,c2,p1,n1,pr_B,sr_B; bool vdd, vss) {
bool _y;
prs{
(~p1 & ~c1 & ~c2)|~pr_B -> _y+
c1 & c2 & n1 & sr_B -> _y-
_y => y-
}
sizing {
leak_adjust <- 1;
p_n_mode <- 1;
y {-1}; _y{-1}
}
}
export defcell A_1C1P2N_R_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) { export defcell A_1C1P2N_R_X1 (bool! y; bool? c1,p1,n1,n2,pr_B, sr_B; bool vdd, vss) {
prs{ prs{
(~p1 & ~c1)|~pr_B -> y- (~p1 & ~c1)|~pr_B -> y-

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@ -477,35 +477,35 @@ namespace tmpl {
/** /**
* Neuron handshaking. * Neuron handshaking.
* Looks for a rising edge on the neuron req. * Looks for a rising edge on the neuron req.
* Then performs a 2d handshake out out_y then out_x. * Then performs a 2d handshake out outy then outx.
*/ */
export export
defproc neuron_hs_2D(a1of1 in; a1of1 out_x; a1of1 out_y; power supply; bool reset_B) { defproc neuron_hs_2D(a1of1 in; a1of1 outx; a1of1 outy; power supply; bool reset_B) {
bool _reset_BX; bool _reset_BX;
BUF_X2 reset_buf(.a = reset_B, .y = _reset_BX, .vdd = supply.vdd, .vss = supply.vss); BUF_X2 reset_buf(.a = reset_B, .y = _reset_BX, .vdd = supply.vdd, .vss = supply.vss);
bool _en, _req; bool _en, _req;
A_1C2N_RB_X1 A_ack(.c1 = _en, .n1 = _req, .n2 = in.r, .y = in.a, A_1C2N_RB_X1 A_ack(.c1 = _en, .n1 = _req, .n2 = in.r, .y = in.a,
.sr_B = _reset_BX, .sr_B = _reset_BX, .vss = supply.vss, .vdd = supply.vdd); .pr_B = _reset_BX, .sr_B = _reset_BX, .vss = supply.vss, .vdd = supply.vdd);
A_1C1P_X1 A_en(.p1 = _req, .c1 = in.a, .y = _en, A_1C1P_X1 A_en(.p1 = _req, .c1 = in.a, .y = _en,
.vss = supply.vss, .vdd = supply.vdd); .vss = supply.vss, .vdd = supply.vdd);
bool _y_a_B, _x_a_B; bool _y_a_B, _x_a_B;
INV_X2 inv_x(.a = out_x.a, .y = _x_a_B, .vss = supply.vss, .vdd = supply.vdd); INV_X2 inv_x(.a = outx.a, .y = _x_a_B, .vss = supply.vss, .vdd = supply.vdd);
INV_X2 inv_y(.a = out_y.a, .y = _y_a_B, .vss = supply.vss, .vdd = supply.vdd); INV_X2 inv_y(.a = outy.a, .y = _y_a_B, .vss = supply.vss, .vdd = supply.vdd);
A_2C1P1N_RB_X1 A_req(.p1 = _x_a_B, .c1 = _en, .c2 = _y_a_B, .n1 = in.r, A_2C1P1N_RB_X1 A_req(.p1 = _x_a_B, .c1 = _en, .c2 = _y_a_B, .n1 = in.r, .y = _req,
.sr_B = _reset_BX, .sr_B = _reset_BX, .vdd = supply.vdd, .vss = supply.vss); .pr_B = _reset_BX, .sr_B = _reset_BX, .vdd = supply.vdd, .vss = supply.vss);
// y_req pull up // y_req pull up
NAND2_X1 nand_y(.a = _y_a_B, .b = _req, .vdd = supply.vdd, .vss = supply.vss); NAND2_X1 nand_y(.a = _y_a_B, .b = _req, .vdd = supply.vdd, .vss = supply.vss);
PULLUP_X4 pu_y(.a = nand_y.y, .y = out_y.r, .vdd = supply.vdd, .vss = supply.vss); PULLUP_X4 pu_y(.a = nand_y.y, .y = outy.r, .vdd = supply.vdd, .vss = supply.vss);
// x_req pull up // x_req pull up
NAND3_X1 nand_x(.a = _x_a_B, .b = _req, .c = out_y.a, .vdd = supply.vdd, .vss = supply.vss); NAND3_X1 nand_x(.a = _x_a_B, .b = _req, .c = outy.a, .vdd = supply.vdd, .vss = supply.vss);
PULLUP_X4 pu_x(.a = nand_x.y, .y = out_x.r, .vdd = supply.vdd, .vss = supply.vss); PULLUP_X4 pu_x(.a = nand_x.y, .y = outx.r, .vdd = supply.vdd, .vss = supply.vss);
} }
@ -513,14 +513,14 @@ namespace tmpl {
export export
defproc line_end_pull_down (bool? in; bool? reset_B; power supply; bool! out) defproc line_end_pull_down (bool? in; bool? reset_B; power supply; bool! out)
{ {
bool _out, __out, nor_out; bool _out, __out, nand_out;
BUF_X1 buf1(.a=in, .y=_out, .vdd=supply.vdd,.vss=supply.vss); BUF_X1 buf1(.a=in, .y=_out, .vdd=supply.vdd,.vss=supply.vss);
BUF_X1 buf2(.a=_out, .y=__out, .vdd=supply.vdd,.vss=supply.vss); BUF_X1 buf2(.a=_out, .y=__out, .vdd=supply.vdd,.vss=supply.vss);
INV_X1 inv(.a = __out, .vdd=supply.vdd,.vss =supply.vss); INV_X1 inv(.a = __out, .vdd=supply.vdd,.vss =supply.vss);
NAND2_X1 aenor(.a=inv.y, .b=reset_B, .y = nor_out, .vdd=supply.vdd,.vss=supply.vss); NAND2_X1 aenor(.a=inv.y, .b=reset_B, .y = nand_out, .vdd=supply.vdd,.vss=supply.vss);
PULLDOWN_X4 pull_down(.a=nor_out, .y=out); PULLDOWN_X4 pull_down(.a=nand_out, .y=out);
} }
@ -529,9 +529,12 @@ namespace tmpl {
* A 2d grid of neuron handshakers. * A 2d grid of neuron handshakers.
* Should then slot into the encoder. * Should then slot into the encoder.
* Each neuron has an a1of1 channel (in), which is tripped when a neuron spikes. * Each neuron has an a1of1 channel (in), which is tripped when a neuron spikes.
* N_dly is number of delay elements to add to line pull down,
* for the purpose of running ACT sims.
* It should probably be set to 0 though.
*/ */
export template<pint Nx, Ny> export template<pint Nx, Ny, N_dly>
defproc neuron_hs_2D_array(a1of1 in[Nx*Ny]; a1of1 out_x[Nx], out_y[Ny]; defproc nrn_hs_2D_array(a1of1 in[Nx*Ny]; a1of1 outx[Nx], outy[Ny];
power supply; bool reset_B) { power supply; bool reset_B) {
// Make hella signal buffers // Make hella signal buffers
@ -542,6 +545,7 @@ namespace tmpl {
rsb[j].supply = supply; rsb[j].supply = supply;
) )
// Create handshake grid // Create handshake grid
pint index; pint index;
neuron_hs_2D neurons[Nx*Ny]; neuron_hs_2D neurons[Nx*Ny];
@ -551,32 +555,63 @@ namespace tmpl {
neurons[index].supply = supply; neurons[index].supply = supply;
neurons[index].reset_B = rsb[j].out[i]; neurons[index].reset_B = rsb[j].out[i];
neurons[index].in = in[index]; neurons[index].in = in[index];
neurons[index].out_x = out_x[i]; neurons[index].outx = outx[i];
neurons[index].out_y = out_y[j]; neurons[index].outy = outy[j];
) )
) )
// Create line req pull downs // Hacks to maybe construct some fifos, ignore.
[N_dly >= 1 ->
delay_fifo<N_dly> dly_x[Nx];
delay_fifo<N_dly> dly_y[Ny];
]
// Create x line req pull downs
line_end_pull_down pd_x[Nx]; line_end_pull_down pd_x[Nx];
sigbuf<Nx> rsb_pd_x(.in = reset_B, .supply = supply); sigbuf<Nx> rsb_pd_x(.in = reset_B, .supply = supply);
(i:0..Nx-1: (i:0..Nx-1:
pd_x[i].in = out_x[i].a; [ N_dly = 0 ->
pd_x[i].out = out_x[i].r; pd_x[i].in = outx[i].a;
[] N_dly >= 1 ->
dly_x[i].supply = supply;
dly_x[i].in = outx[i].a;
pd_x[i].in = dly_x[i].out;
]
pd_x[i].out = outx[i].r;
pd_x[i].reset_B = rsb_pd_x.out[i]; pd_x[i].reset_B = rsb_pd_x.out[i];
pd_x[i].supply = supply; pd_x[i].supply = supply;
) )
// Create line req pull downs // Create y line req pull downs
line_end_pull_down pd_y[Ny]; line_end_pull_down pd_y[Ny];
sigbuf<Ny> rsb_pd_y(.in = reset_B, .supply = supply); sigbuf<Ny> rsb_pd_y(.in = reset_B, .supply = supply);
(j:0..Ny-1: (j:0..Ny-1:
pd_y[j].in = out_y[j].a; [ N_dly = 0 ->
pd_y[j].out = out_y[j].r; pd_y[j].in = outy[j].a;
[] N_dly >= 1 ->
dly_y[j].supply = supply;
dly_y[j].in = outy[j].a;
pd_y[j].in = dly_y[j].out;
]
pd_y[j].out = outy[j].r;
pd_y[j].reset_B = rsb_pd_y.out[j]; pd_y[j].reset_B = rsb_pd_y.out[j];
pd_y[j].supply = supply; pd_y[j].supply = supply;
) )
// Add keeps
KEEP_X1 keep_x[Nx];
(i:Nx:
keep_x[i].vdd = supply.vdd;
keep_x[i].vss = supply.vss;
keep_x[i].y = outx[i].r;
)
KEEP_X1 keep_y[Ny];
(j:Ny:
keep_y[j].vdd = supply.vdd;
keep_y[j].vss = supply.vss;
keep_y[j].y = outy[j].r;
)
} }

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@ -685,6 +685,31 @@ namespace tmpl {
(i:((1<<N)-1):dly[i].vss = supply.vss;) (i:((1<<N)-1):dly[i].vss = supply.vss;)
} }
// Non programmable delays
// N is number of delays to have in series (not log!!).
// Is useful for testing purposes.
// But should probably remove before running innovus etc.
export template<pint N>
defproc delay_fifo (bool! out; bool? in; power supply) {
{ N >= 0 : "What?" };
DLY4_X1 dly[N];
dly[0].vdd = supply.vdd;
dly[0].vss = supply.vss;
dly[0].a = in;
(i:1..N-1:
dly[i].vdd = supply.vdd;
dly[i].vss = supply.vss;
dly[i].a = dly[i-1].y;
)
dly[N-1].vdd = supply.vdd;
dly[N-1].vss = supply.vss;
dly[N-1].y = out;
}
/** /**
* Appends a hard-coded word "VAL" to an input. * Appends a hard-coded word "VAL" to an input.
* Works by piping through all sigs, but adding * Works by piping through all sigs, but adding