479 lines
14 KiB
Plaintext
479 lines
14 KiB
Plaintext
/*************************************************************************
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*
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* This file is part of ACT dataflow neuro library
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*
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* Copyright (c) 2022 University of Groningen - Ole Richter
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* Copyright (c) 2022 University of Groningen - Michele Mastella
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* Copyright (c) 2022 University of Groningen - Hugh Greatorex
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* Copyright (c) 2022 University of Groningen - Madison Cotteret
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*
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*
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* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
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*
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* You may redistribute and modify this documentation and make products
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* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
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* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
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* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
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* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
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* for applicable conditions.
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*
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* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
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*
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* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
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* these sources, You must maintain the Source Location visible in its
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* documentation.
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*
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**************************************************************************
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*/
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import "../../dataflow_neuro/cell_lib_async.act";
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import "../../dataflow_neuro/cell_lib_std.act";
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import "../../dataflow_neuro/treegates.act";
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import "../../dataflow_neuro/primitives.act";
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// import tmpl::dataflow_neuro;
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// import tmpl::dataflow_neuro;
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import std::channel;
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open std::channel;
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// import std::func;
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open std;
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import std::data;
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open std::data;
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// import dev::channel;
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// open dev::channel;
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namespace tmpl {
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namespace dataflow_neuro {
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/**
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* 2D decoder which uses a configurable delay from the VCtrees to buffer ack.
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* Nx is the x size of the decoder array
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* NxC is the number of wires in the x channel.
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* Thus NxC should be something like NxC = ceil(log2(Nx))
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* but my guess is that we can't do logs...
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* N_dly_cfg is the number of config bits in the ACK delay line,
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* with all bits high corresponding to 2**N_dly_cfg -1 DLY4_X1 cells.
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*/
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export template<pint NxC, NyC, Nx, Ny, N_dly_cfg>
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defproc decoder_2d_dly (avMx1of2<NxC+NyC> in; bool? outx[Nx], outy[Ny],
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dly_cfg[N_dly_cfg], reset_B; power supply) {
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// Buffer to recieve concat(x,y) address packet
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buffer<NxC+NyC> addr_buf(.in = in, .reset_B = reset_B, .supply = supply);
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// NEED TO BUFFER OUTPUTS FROM BUFFER I RECKON
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// Validity trees
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vtree<NxC> vtree_x (.supply = supply);
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vtree<NyC> vtree_y (.supply = supply);
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(i:0..NxC-1:vtree_x.in.d[i].t = addr_buf.out.d.d[i].t;)
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(i:0..NxC-1:vtree_x.in.d[i].f = addr_buf.out.d.d[i].f;)
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(i:0..NyC-1:vtree_y.in.d[i].t = addr_buf.out.d.d[i+NxC].t;)
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(i:0..NyC-1:vtree_y.in.d[i].f = addr_buf.out.d.d[i+NxC].f;)
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// Delay ack line. Ack line is delayed (but not the val)
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A_2C_B_X1 C2el(.c1 = vtree_x.out, .c2 = vtree_y.out, .vdd = supply.vdd, .vss = supply.vss);
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addr_buf.out.v = C2el.y;
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// delayprog<N_dly_cfg> dly(.in = tielow.y, .s = dly_cfg, .supply = supply);
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delayprog<N_dly_cfg> dly(.in = C2el.y, .s = dly_cfg, .supply = supply);
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// ACK MAY HAVE BEEN DISCONNECTED HERE
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// FOR TESTING PURPOSES
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// !!!!!!!!!!!!!!!!
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dly.out = addr_buf.out.a;
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// ACK MAY HAVE BEEN DISCONNECTED HERE
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// FOR TESTING PURPOSES
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// !!!!!!!!!!!!!!!!
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// AND trees
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pint bitval;
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andtree<NxC> atree_x[Nx];
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(k:0..Nx-1:atree_x[k].supply = supply;)
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(i:0..Nx-1:
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(j:0..NxC-1:
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bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
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[bitval = 1 ->
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atree_x[i].in[j] = addr_buf.out.d.d[j].t;
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[]bitval = 0 ->
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atree_x[i].in[j] = addr_buf.out.d.d[j].f;
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[]bitval >= 2 -> {false : "fuck"};
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]
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atree_x[i].out = outx[i];
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)
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)
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andtree<NyC> atree_y[Ny];
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(k:0..Ny-1:atree_y[k].supply = supply;)
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(i:0..Ny-1:
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(j:0..NyC-1:
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bitval = (i & ( 1 << j )) >> j; // Get binary digit of integer i, column j
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[bitval = 1 ->
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atree_y[i].in[j] = addr_buf.out.d.d[j+NxC].t;
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[]bitval = 0 ->
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atree_y[i].in[j] = addr_buf.out.d.d[j+NxC].f;
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]
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atree_y[i].out = outy[i];
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)
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)
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}
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/*
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* Build an arbiter_handshake tree.
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*/
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export template<pint N>
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defproc arbtree (a1of1 in[N]; a1of1 out; power supply)
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{
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bool tout;
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{ N > 0 : "What?" };
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pint i, end, j;
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i = 0;
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end = N-1;
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pint arbCount;
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arbCount = 0;
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/* Pre"calculate" the number of C cells required, look below if confused */
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*[ i != end ->
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j = 0;
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*[ i <= end ->
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j = j + 1;
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[i = end ->
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i = end+1;
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[] i+1 = end ->
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i = end+1;
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arbCount = arbCount +1;
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[] else ->
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i = i + 2;
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arbCount = arbCount +1;
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]
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]
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/*-- update range that has to be combined --*/
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// i = end+1;
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end = end+j;
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]
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/* array that holds ALL the nodes in the completion tree */
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a1of1 tmp[end+1];
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// Connecting the first nodes to the input
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(l:N:
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tmp[l] = in[l];
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)
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/* array to hold the actual C-elments, either A2C or A3C */
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[arbCount > 0 ->
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arbiter_handshake arbs[arbCount];
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]
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(h:arbCount:arbs[h].supply = supply;)
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/* Reset the variables we just stole lol */
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i = 0;
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end = N-1;
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j = 0;
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pint arbIndex = 0;
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/* Invariant: i <= end */
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*[ i != end ->
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/*
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* Invariant: tmp[i..end] has the current signals that need to be
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* combined together, and "isinv" specifies if they are the inverted
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* sense or not
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*/
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j = 0;
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*[ i <= end ->
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/*-- there are still signals that need to be combined --*/
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j = j + 1;
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[ i = end ->
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/*-- last piece: pipe input through to next layer --*/
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tmp[end+j] = tmp[i];
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i = end+1;
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[] i+1 = end ->
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/*-- last piece: use either a 2 input C-element --*/
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arbs[arbIndex].in1 = tmp[i];
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arbs[arbIndex].in2 = tmp[i+1];
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arbs[arbIndex].out = tmp[end+j];
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arbIndex = arbIndex +1;
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i = end+1;
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[] else ->
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/*-- more to come; so use a two input C-element --*/
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arbs[arbIndex].in1 = tmp[i];
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arbs[arbIndex].in2 = tmp[i+1];
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arbs[arbIndex].out = tmp[end+j];
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arbIndex = arbIndex +1;
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i = i + 2;
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]
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]
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/*-- update range that has to be combined --*/
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i = end+1;
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end = end+j;
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j = 0;
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]
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out = tmp[end];
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}
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export template<pint Nx, Ny>
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defproc and_grid(bool! out[Nx*Ny]; bool? inx[Nx], iny[Ny]; power supply) {
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AND2_X1 ands[Nx*Ny];
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(i:0..Nx*Ny-1:ands[i].vss = supply.vss; ands[i].vdd = supply.vdd;)
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(x:0..Nx-1:
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(y:0..Ny-1:
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ands[x + y*Nx].a = inx[x];
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ands[x + y*Nx].b = iny[y];
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ands[x + y*Nx].y = out[x + y*Nx];
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)
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)
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}
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// Generates the OR-trees required to go from
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// N one-hot inputs to Nc dual rail binary encoding.
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export template<pint Nc, N>
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defproc dualrail_encoder(bool? in[N]; Mx1of2<Nc> out; power supply) {
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{N <= 1<<Nc : "Num inputs too wide for encoding channel!"};
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// For each output line, need to precalculate how big of an OR tree it needs
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// since can't presume that N = 2**Nc
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// First version however, just be hella lazy and presume N=2**Nc,
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// connect extra nodes to ground (sorry)
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pint _N; // N rounded up to a power of 2
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_N = (1<<Nc);
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ortree<_N/2> ors_t[Nc];
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ortree<_N/2> ors_f[Nc];
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(i:Nc:ors_t[i].supply = supply; ors_t[i].out = out.d[i].t;)
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(i:Nc:ors_f[i].supply = supply; ors_f[i].out = out.d[i].f;)
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pint num_connected_t; // Number of guys already connected to the current OR tree
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pint num_connected_f;
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TIELO_X1 tielo(.vdd = supply.vdd, .vss = supply.vss); // I'm sorry
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pint bitval;
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(i:0..Nc-1: // For each output line
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num_connected_t = 0;
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num_connected_f = 0;
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(j:0.. _N-1:
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bitval = (j & ( 1 << i )) >> i; // Get binary digit of integer j, column i
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[bitval = 1 & j <= N-1->
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ors_t[i].in[num_connected_t] = in[j];
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num_connected_t = num_connected_t + 1;
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[] bitval = 0 & j <= N-1->
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ors_f[i].in[num_connected_f] = in[j];
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num_connected_f = num_connected_f + 1;
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[] bitval = 1 & j > N-1->
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ors_t[i].in[num_connected_t] = tielo.y;
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num_connected_t = num_connected_t + 1;
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[] bitval = 0 & j > N-1->
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ors_f[i].in[num_connected_f] = tielo.y;
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num_connected_f = num_connected_f + 1;
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]
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)
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)
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}
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/**
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* Buffer function code.
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* Is the function block ripped from the buffer_s.
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* Used in the encoder2d.
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*/
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export template<pint N>
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defproc buffer_s_func (Mx1of2<N> in; avMx1of2<N> out; bool? in_v, en, reset_B; power supply) {
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//function
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bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N], _in_vX, _in_vXX_t[N],_in_vXX_f[N];
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A_2C2N_RB_X4 f_buf_func[N];
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A_2C2N_RB_X4 t_buf_func[N];
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// reset buffers
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bool _reset_BX,_reset_BXX[N];
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX, .supply=supply);
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// Enable signal buffers
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sigbuf<N> en_buf_t(.in=en, .out=_en_X_t, .supply=supply);
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sigbuf<N> en_buf_f(.in=en, .out=_en_X_f, .supply=supply);
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// out ack signal buffers
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INV_X1 out_a_inv(.a=out.a,.y=_out_a_B, .vss = supply.vss, .vdd = supply.vdd);
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sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t, .supply=supply);
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sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f, .supply=supply);
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// in val signal buffers
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BUF_X4 in_v_prebuf(.a = in_v, .y = _in_vX, .vss = supply.vss, .vdd = supply.vdd);
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sigbuf<N> in_v_buf_t(.in=_in_vX, .out=_in_vXX_t, .supply=supply);
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sigbuf<N> in_v_buf_f(.in=_in_vX, .out=_in_vXX_f, .supply=supply);
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(i:N:
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f_buf_func[i].y=out.d.d[i].f;
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t_buf_func[i].y=out.d.d[i].t;
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f_buf_func[i].c1=_en_X_f[i];
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t_buf_func[i].c1=_en_X_t[i];
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f_buf_func[i].c2=_out_a_BX_f[i];
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t_buf_func[i].c2=_out_a_BX_t[i];
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f_buf_func[i].n1=in.d[i].f;
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t_buf_func[i].n1=in.d[i].t;
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f_buf_func[i].n2=_in_vXX_f[i];
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t_buf_func[i].n2=_in_vXX_t[i];
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f_buf_func[i].vdd=supply.vdd;
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t_buf_func[i].vdd=supply.vdd;
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f_buf_func[i].vss=supply.vss;
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t_buf_func[i].vss=supply.vss;
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t_buf_func[i].pr_B = _reset_BXX[i];
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t_buf_func[i].sr_B = _reset_BXX[i];
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f_buf_func[i].pr_B = _reset_BXX[i];
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f_buf_func[i].sr_B = _reset_BXX[i];
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)
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}
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export template<pint NxC, NyC, Nx, Ny, ACK_STRENGTH>
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defproc encoder2D(a1of1 x[Nx]; a1of1 y[Ny]; avMx1of2<(NxC + NyC)> out; power supply; bool reset_B) {
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// Reset buffers
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pint H = 2*(NxC + NyC); //Reset strength? to be investigated
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bool _reset_BX,_reset_BXX[H];
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BUF_X4 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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sigbuf<2*(NxC + NyC)> reset_bufarray(.in=_reset_BX, .out=_reset_BXX,.supply=supply);
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// Arbiters
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a1of1 _arb_out_x, _arb_out_y;
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a1of1 _x_temp[Nx],_y_temp[Ny]; // For wiring the reqs to the arbtrees
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(i:Nx:
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_x_temp[i].r = x[i].r;
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)
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(i:Ny:
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_y_temp[i].r = y[i].r;
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)
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arbtree<Nx> Xarb(.in = _x_temp,.out = _arb_out_x,.supply = supply);
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arbtree<Ny> Yarb(.in = _y_temp,.out = _arb_out_y,.supply = supply);
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// Sigbufs for strong ackowledge signals from arb_in's
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sigbuf_1output<ACK_STRENGTH> x_ack_arb[Nx];
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sigbuf_1output<ACK_STRENGTH> y_ack_arb[Ny];
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(i:Nx:
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x_ack_arb[i].in = _x_temp[i].a;
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x_ack_arb[i].out = x[i].a;
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x_ack_arb[i].supply = supply;
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)
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(i:Ny:
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y_ack_arb[i].in = _y_temp[i].a;
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y_ack_arb[i].out = y[i].a;
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y_ack_arb[i].supply = supply;
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)
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// This block checks that the input is valid and that the arbiter made a choice
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// Then activates the ack of the arbiter
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bool _x_v,_in_x_v,_in_y_v,_x_a_B,_x_a;
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A_2C2P_RB_X1 Y_ack_confirm();
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Y_ack_confirm.p1 = _x_v;
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Y_ack_confirm.p2 =_in_x_v;
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Y_ack_confirm.c1 = _arb_out_y.r;
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Y_ack_confirm.c2 = _x_a_B;
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Y_ack_confirm.y = _arb_out_y.a;
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Y_ack_confirm.vdd = supply.vdd;
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Y_ack_confirm.vss = supply.vss;
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Y_ack_confirm.reset_B = _reset_BX;
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// This block checks that the input is valid and that the arbiter made a choice
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// Then activates the ack of the arbiter
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A_2C_RB_X1 X_ack_confirm();
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X_ack_confirm.c1 = _arb_out_x.r;
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X_ack_confirm.c2 = _x_a_B;
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X_ack_confirm.vdd = supply.vdd;
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X_ack_confirm.vss = supply.vss;
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X_ack_confirm.pr_B = _reset_BX;
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X_ack_confirm.sr_B = _reset_BX;
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X_ack_confirm.y = _arb_out_x.a;
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// X_req ORtree
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bool _x_req_array[Nx], _x_v_B;
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(i:Nx:_x_req_array[i] = x[i].r;)
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ortree<Nx> x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply); //todo BUFF
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INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B);
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//X_REQ validation
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// bool _x_req_array[Nx],_x_v_B, _en;
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// (i:Nx:_x_req_array[i] = x[i].r;)
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// ortree x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply);
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// INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B);
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bool _en;
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A_1C3P2P2N_R_X1 x_ack(); // NEEDS BUFFERING TO X4
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//branch1
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x_ack.p4 = _in_x_v;
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x_ack.p5 = _x_v_B;
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//branch2
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x_ack.p1 = _in_x_v;
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x_ack.p2 = _in_y_v;
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x_ack.p3 = _x_v;
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//
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x_ack.c1 = _en;
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x_ack.n1 = out.v;
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x_ack.n2 = _in_x_v;
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//
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x_ack.y = _x_a_B;
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//
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x_ack.vdd = supply.vdd;
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x_ack.vss = supply.vss;
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x_ack.pr_B = _reset_BX;
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x_ack.sr_B = _reset_BX;
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INV_X1 not_x_ack(.a = _x_a_B, .y = _x_a, .vdd = supply.vdd, .vss = supply.vss);
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A_1C2P_X1 enabling(.p1 = out.a, .p2 = out.v, .c1 = _x_a, .y = _en, .vdd = supply.vdd, .vss = supply.vss);
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avMx1of2<(NxC + NyC)> _in_x;
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// Encoders
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bool x_acks[Nx];
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Mx1of2<NxC> x_enc_out;
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(i:Nx:x_acks[i] = x[i].a;)
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dualrail_encoder<NxC, Nx> x_encoder(.in = x_acks, .out = x_enc_out, .supply = supply);
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bool y_acks[Ny];
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Mx1of2<NyC> y_enc_out;
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(i:Ny:y_acks[i] = y[i].a;)
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dualrail_encoder<NyC, Ny> y_encoder(.in = y_acks, .out = y_enc_out, .supply = supply);
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// Valid trees
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vtree<NxC> vtree_x(.in = x_enc_out, .out = _in_x_v, .supply = supply);
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vtree<NxC> vtree_y(.in = y_enc_out, .out = _in_y_v, .supply = supply);
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// Buffer func thing
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Mx1of2<NxC + NyC> into_buffer;
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(i:0..NxC-1:into_buffer.d[i] = x_enc_out.d[i];)
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(i:0..NyC-1:into_buffer.d[i+NxC] = y_enc_out.d[i];)
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AND2_X1 _in_xy_v(.a = _in_x_v, .b = _in_y_v, .vss = supply.vss, .vdd = supply.vdd);
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buffer_s_func<NxC + NyC> buf_s_func(.in = into_buffer, .out = out,
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.en = _en, .in_v = _in_xy_v.y, .supply = supply, .reset_B = reset_B);
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}
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}
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} |