50 lines
1.0 KiB
Plaintext
50 lines
1.0 KiB
Plaintext
watchall
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system "echo '[0] start test'"
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set-qdi-channel-neutral "t.in" 5
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set t.data[0].d[0] 0
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set t.data[0].d[1] 0
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set t.data[1].d[0] 0
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set t.data[1].d[1] 0
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set t.registers._in_write.a 0
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set t.registers._in_read.a 0
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set t.registers._in_write.v 0
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set t.registers._in_read.v 0
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set Reset 0
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cycle
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status X
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mode run
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assert-qdi-channel-neutral "t.in" 5
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assert t.data[0].d[0] 0
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assert t.data[0].d[1] 0
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assert t.data[1].d[0] 0
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assert t.data[1].d[1] 0
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cycle
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system "echo '[1] reset completed'"
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# Set delay config lines
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set t.dly_cfg[0] 1
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set t.dly_cfg[1] 1
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cycle
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assert-qdi-channel-neutral "t.in" 5
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system "echo '[2] delay line set'"
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set-qdi-channel-valid "t.in" 5 19
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cycle
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assert-qdi-channel-valid "t.registers._in_write" 4 3
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assert t.registers._clock 0
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assert t.registers._out_encoder[0] 1
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assert t.registers._out_encoder[1] 0
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assert t.registers._out_encoder[2] 0
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assert t.registers._out_encoder[3] 0
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cycle
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set-qdi-channel-neutral "t.in" 5
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cycle
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assert t.registers._clock 1
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assert t.registers.ff[0].q 1
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assert t.registers.ff[1].q 1
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system "echo '[3] clock checked'"
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