144 lines
5.1 KiB
Plaintext
144 lines
5.1 KiB
Plaintext
/*************************************************************************
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*
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* This file is part of ACT dataflow neuro library
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*
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* Copyright (c) 2022 University of Groningen - Ole Richter
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*
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* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
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*
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* You may redistribute and modify this documentation and make products
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* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
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* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
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* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
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* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
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* for applicable conditions.
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*
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* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
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*
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* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
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* these sources, You must maintain the Source Location visible in its
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* documentation.
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*
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**************************************************************************
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*/
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import tmpl::dataflow_neuro::cell_lib_std;
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import tmpl::dataflow_neuro::cell_lib_async;
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import std::channel;
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open std::channel;
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namespace tmpl {
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namespace dataflow_neuro {
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// @ole talk to rajit, we use valid the wrong way arround according to stdlib
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template<pbool reset; pint V; pint M>
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defchan gen_avMx1of2 <: chan(int<M>) (std::data::Mx1of2?!<M> d; bool!? a; bool!? v)
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{
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{ 0 <= V & std::ceil_log2(V) < M : "Initial token value out of range" };
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methods {
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/*-- initialize channel, sender end --*/
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send_init {
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[ reset -> (,i:M: [ ((V >> i) & 1) = 0 -> d.d[i].f+ [] else -> d.d[i].t+ ]);[v]
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[] else -> (,i:M: d.d[i].t-,d.d[i].f-);[~v]
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]
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}
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/*-- set output data --*/
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set {
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(,i:M: [((self >> i) & 1) = 0 -> d.d[i].f+ [] else -> d.d[i].t+ ]);[v]
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}
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/*-- finish synchronization --*/
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send_up {
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[a]
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}
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/*-- reset part of the protocol --*/
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send_rest {
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(,i:M: d.d[i].t-,d.d[i].f-);[~v],[~a]
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}
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/*-- initialize channel, receiver end --*/
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recv_init {
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v-;a-
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}
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/*-- get value --*/
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get {
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[(&i:M: d.d[i].t | d.d[i].f)];
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self := 0;
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(;i:M: [ d.d[i].t -> self := self | (1 << i)
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[] else -> skip
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]
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)
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}
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/*-- finish synchronization action --*/
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recv_up {
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v+,a+
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}
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/*-- reset part of the protocol --*/
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recv_rest {
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[(&i:M:~d.d[i].t & ~d.d[i].f)];v-,a-
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}
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/*-- probe expression on receiver --*/
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// i think this deadlocks with recv_up
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recv_probe = v;
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// no sender probe
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}
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}
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export defchan avMx1of2 <: gen_avMx1of2<false,0> () { }
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export defchan avrMx1of2 <: gen_avMx1of2<true,0> () { }
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/**
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* the buffer template gives you a standart buffer of bitwidth N
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*
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*/
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export template<pint N>
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defproc buffer (avMx1of2<N> in; avMx1of2<N> out; rsp reset; power supply) {
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//control
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bool _en,_en_X,_preset_X,_sreset_X;
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A_3C_RB_X4 inack_ctl(c1=en_X,c2=in.v,c3=out.v,y=in.a,pr_B=_preset_X,sr_B=_sreset_X,vdd=supply.vdd,vss=supply.vss);
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A_1C1P_X1 en_ctl(c1=in.a,p1=out.v,y=_en,vdd=supply.vdd,vss=supply.vss);
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sigbuf en_buf<N*2>(a=_en, y=_en_X, power=supply);
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sigbuf preset_buf<N*2>(a=reset.p,y=preset_X, power=supply);
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sigbuf sreset_buf<N*2>(a=reset.s,y=sreset_X, power=supply);
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//validity
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bool _in_v;
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ctree vc<N>(in=in.d,y=_in_v, power=supply);
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sigbuf in_v_buf<12>(a=_in_v, y=in.v);
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//function
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bool _out_a_BX, _out_a_B;
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A_2C1N_RB_X4 f_buf_func[N];
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A_2C1N_RB_X4 t_buf_func[N];
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INV_X1 out_a_inv(a=out.a,y=_out_a_B);
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sigbuf out_a_B_buf<N*2>(a=_out_a_B,y=_out_a_BX);
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// check if you can also do single var to array connect a=b[N]
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// and remove them from the loop
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(i:N:
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f_buf_func[i].y=out.d.d[i].f;
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t_buf_func[i].y=out.d.d[i].t;
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f_buf_func[i].c1=_en_X;
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t_buf_func[i].c1=_en_X;
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f_buf_func[i].c2=_out_a_BX;
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t_buf_func[i].c2=_out_a_BX;
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f_buf_func[i].n1=in.d.d[i].f;
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t_buf_func[i].n1=in.d.d[i].t;
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f_buf_func[i].pr_B=_preset_X;
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t_buf_func[i].pr_B=_preset_X;
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f_buf_func[i].sr_B=_sreset_X;
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t_buf_func[i].sr_B=_sreset_X;
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f_buf_func[i].vdd=supply.vdd;
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t_buf_func[i].vdd=supply.vdd;
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f_buf_func[i].vss=supply.vss;
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t_buf_func[i].vss=supply.vss;
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)
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}
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}
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} |