cmos switch + hot-well w transistor

This commit is contained in:
W. Soares Girao 2021-08-27 11:08:12 +02:00
parent b025bce8ce
commit 7699fc7d59
16 changed files with 936 additions and 938 deletions

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@ -31,7 +31,7 @@
</tooloptions>
<vars>
<var>inp_pr_delay
<value>0.01</value>
<value>1</value>
</var>
<var>inp_pr_period
<value>0.02</value>
@ -40,7 +40,7 @@
<value>1u</value>
</var>
<var>inp_pt_delay
<value>0.02</value>
<value>1</value>
</var>
<var>inp_pt_period
<value>0.02</value>
@ -49,23 +49,29 @@
<value>1u</value>
</var>
<var>Ica_pre
<value>5n</value>
<value>0</value>
</var>
<var>Ith_pre
<value>10n</value>
<value>0</value>
</var>
<var>Vca_post
<value>1.8</value>
<value>0</value>
</var>
<var>Ic_dep
<value>{From/To}Linear:10n:10n:30n{From/To}</value>
<value>0</value>
</var>
<var>Ic_dep2
<value>10n</value>
<value>0</value>
</var>
<var>Vc_pot
<value>0</value>
</var>
<var>Vbnw
<value>0.6</value>
</var>
<var>Vbpw
<value>2.0</value>
</var>
</vars>
<origoptions>
<option>cell
@ -172,7 +178,7 @@
</tooloptions>
<vars>
<var>inp_pr_delay
<value>0.01</value>
<value>1</value>
</var>
<var>inp_pr_period
<value>0.02</value>
@ -181,7 +187,7 @@
<value>1u</value>
</var>
<var>inp_pt_delay
<value>0.02</value>
<value>1</value>
</var>
<var>inp_pt_period
<value>0.02</value>
@ -190,23 +196,29 @@
<value>1u</value>
</var>
<var>Ica_pre
<value>5n</value>
<value>0</value>
</var>
<var>Ith_pre
<value>10n</value>
<value>0</value>
</var>
<var>Vca_post
<value>1.8</value>
<value>0</value>
</var>
<var>Ic_dep
<value>{From/To}Linear:10n:10n:30n{From/To}</value>
<value>0</value>
</var>
<var>Ic_dep2
<value>10n</value>
<value>0</value>
</var>
<var>Vc_pot
<value>0</value>
</var>
<var>Vbnw
<value>0.6</value>
</var>
<var>Vbpw
<value>2.0</value>
</var>
</vars>
<origoptions>
<option>cell
@ -335,8 +347,8 @@
<allsweepsenabled>1</allsweepsenabled>
<sortVariableValues>0</sortVariableValues>
</checkpoint>
<timestamp>Aug 25 17:45:54 2021</timestamp>
<uuid>{306117ac-8a8d-4d9d-b811-2f83222403c9}</uuid>
<timestamp>Aug 27 00:32:45 2021</timestamp>
<uuid>{b592bb1e-1706-4761-a1e5-c082821afb54}</uuid>
<resultsname>/home/p302242/libraries/CognigrOne_LR3/CognigrOne_LR3/hebbian_block_LR3_tb/maestro/results/maestro/ExplorerRun.0.rdb</resultsname>
<simresults>$AXL_SETUPDB_DIR/results/maestro/ExplorerRun.0.rdb</simresults>
<rawdatadelstrategy>SaveAll
@ -344,7 +356,7 @@
</rawdatadelstrategy>
<netlistdelstrategy>SaveAll</netlistdelstrategy>
<uselocalpsfdir>false</uselocalpsfdir>
<localpsfdir>/tmp/bics01_p302242_174554480</localpsfdir>
<localpsfdir>/tmp/bics01_p302242_003245612</localpsfdir>
<psfdir>/home/p302242/simulation/CognigrOne_LR3/hebbian_block_LR3_tb/maestro/results/maestro/ExplorerRun.0</psfdir>
<simdir>$AXL_PROJECT_DIR/CognigrOne_LR3/hebbian_block_LR3_tb/maestro/results/maestro/ExplorerRun.0</simdir>
<gendatasheetplotsonsimulation>0</gendatasheetplotsonsimulation>

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@ -1,13 +1,13 @@
Starting Single Run, Sweeps and Corners...
Current time: Wed Aug 25 17:45:55 2021
Current time: Fri Aug 27 00:32:46 2021
Best design point: 1
Design specs:
CognigrOne_LR3_hebbian_block_LR3_tb_1 corner Nominal -
Design parameters:
ExplorerRun.0
Number of points completed: 3
Number of points completed: 1
Number of simulation errors: 0
ExplorerRun.0 completed.
Current time: Wed Aug 25 17:46:24 2021
Current time: Fri Aug 27 00:32:57 2021

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