2022-03-07 16:36:01 +01:00
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t.registers.ff[4].clk_B t.registers._clock_word_temp[0] t.in.d.d[1].f t.registers._clock_temp t.registers.ack_dly._a[1] t.registers.ff[0].clk_B t.registers._clock_temp_inv t.registers._clock t.dly_cfg[1] t.registers.ack_dly.dly[1].__y t.registers.ff[0].d t.registers.clk_dly.and2[0]._y t.registers.val_input.ct.in[1] t.in.d.d[4].f t.registers._clock_word_temp[2] t.registers.clk_dly.dly[2]._y t.registers.ff[5].__clk_B t.registers.ack_dly.dly[1].___y t.registers.ff[4]._clk_B t.registers._out_encoder[3] t.registers.clock_buffer[1].buf1._y t.registers.ff[6].clk_B t.registers.atree[2].in[1] t.dly_cfg[0] t.registers._in_v_temp t.registers._out_encoder[2] t.registers._out_encoder[1] t.registers.clk_dly.and2[1]._y t.registers.atree[0].in[0] t.registers.ack_dly.dly[2]._y t.registers.val_input.ct.in[0] t.registers._in_a_temp t.in.d.d[0].f t.registers.clk_dly.dly[1].y t.in.v t.registers.ff[3]._clk_B t.registers.clk_dly.dly[2].y t.in.d.d[4].t t.registers.clk_dly.dly[1].a t.registers._clock_word_temp[3] t.registers.ack_dly.dly[0].___y t.registers.val_input.ct.in[3] t.registers.ff[1].d t.registers.clock_buffer[0].buf1._y t.registers._out_encoder[0] t.registers.atree[1].in[0] t.registers.ack_dly.dly[2].___y t.registers.ack_dly.mu2[0]._y t.registers.atree[1].and2s[0]._y t.registers.clk_dly._a[1] t.registers.atree[0].in[1] t.registers.ff[2].__clk_B t.registers.val_input.ct.in[4] t.registers.val_input.OR2_tf[3]._y t.registers.clk_X.buf1._y t.registers.ff[7].__clk_B t.registers.clk_dly.dly[0].___y t.registers._clock_word_temp[1] t.registers.and_encoder[2]._y t.registers.clk_dly.dly[1].___y t.registers.ff[7]._clk_B t.in.a t.registers.clk_dly.mu2[1]._s t.registers.ff[1]._clk_B t.registers.clk_dly.dly[0]._y t.registers.val_input.ct.in[2] t.registers.val_input.OR2_tf[2]._y t.registers.val_input.ct.tmp[6] t.registers.clk_dly.dly[1]._y t.registers.ack_dly.dly[2].y t.registers.atree[0].and2s[0]._y t.registers.clk_dly.mu2[1]._y t.registers.clk_dly.mu2[0]._s t.registers.ack_dly.dly[0]._y t.registers.clk_dly.dly[0].a t.registers.ack_dly.dly[0].a t.registers.ff[0]._clk_B t.registers.clock_buffer[2].buf1._y t.registers.clk_dly.dly[1].__y t.registers.ff[2].clk_B t.registers.ff[6]._clk_B t.registers.clk_dly.dly[0].y t.registers.clk_dly.mu2[0]._y t.registers.clock_buffer[3].buf1._y t.registers.val_input.ct.tmp[5] t.registers.ack_dly.dly[1]._y t.registers.and_encoder[0]._y t.registers.val_input.ct.C2Els[1]._y t.registers.ack_dly.dly[1].y t.registers.ack_dly.and2[1]._y t.registers.val_input.OR2_tf[1]._y t.registers.clk_dly.dly[0].__y t.registers.ff[3].__clk_B t.registers.ack_dly.dly[0].y t.registers.clk_dly.dly[2].__y t.registers.atree[3].and2s[0]._y t.registers.ff[6].__clk_B t.registers.ack_dly.dly[1].a t.registers.ff[4].__clk_B t.registers.atree[2].and2s[0]._y t.registers.ff[1].__clk_B t.registers.val_input_X.buf1._y t.registers.ack_dly.dly[2].__y t.registers.val_input.OR2_tf[0]._y t.registers.ff[0].__clk_B t.registers.ff[5]._clk_B t.registers.and_encoder[1]._y t.registers.ack_dly.and2[0]._y t.registers.ack_dly.mu2[1]._s t.registers.clk_dly.dly[2].___y t.registers.val_input.OR2_tf[4]._y t.registers.ack_input_X.buf1._y t.registers.val_input.ct.C2Els[0]._y t.registers.ack_dly.mu2[1]._y t.registers.val_input.ct.C3Els[0]._y t.registers.ack_dly.dly[0].__y t.registers.and_encoder[3]._y t.registers.ff[2]._clk_B t.registers.ack_dly.mu2[0]._s
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2022-03-05 20:28:50 +01:00
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[0] start test
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2022-03-07 16:36:01 +01:00
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115040 t.in.d.d[0].f : 0
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115040 Reset : 0
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115040 t.in.d.d[4].t : 0
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115040 t.in.d.d[1].f : 0
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115040 t.in.d.d[4].f : 0
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115040 t.registers.atree[2].in[1] : 0
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115040 t.registers.atree[0].in[1] : 0
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115040 t.registers.atree[1].in[0] : 0
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115040 t.registers.ff[0].d : 0
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115040 t.registers.atree[0].in[0] : 0
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115040 t.registers.ff[1].d : 0
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115058 t._reset_B : 1 [by Reset:=0]
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115127 t.registers.reset_buf_BXX._y : 0 [by t._reset_B:=1]
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115138 t.registers._reset_mem_BX : 1 [by t.registers.reset_buf_BXX._y:=0]
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115179 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.ff[1].d:=0]
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115243 t.registers.val_input.OR2_tf[0]._y : 1 [by t.registers.ff[0].d:=0]
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115258 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1]
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115383 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1]
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115384 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[1]:=0]
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115421 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1]
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115542 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0]
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116281 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1]
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116894 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0]
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117006 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1]
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119043 t.registers.atree[2].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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119053 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0]
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119093 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1]
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119350 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[4]:=0]
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119437 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1]
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119731 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0]
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119732 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1]
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119800 t.registers.atree[1].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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121009 t.registers._out_encoder[1] : 0 [by t.registers.atree[1].and2s[0]._y:=1]
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121538 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0]
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121599 t.registers.and_encoder[1]._y : 1 [by t.registers._out_encoder[1]:=0]
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121716 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1]
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121739 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0]
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121880 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0]
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121902 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1]
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122402 t.registers._clock_word_temp[1] : 0 [by t.registers.and_encoder[1]._y:=1]
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122749 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0]
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122882 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1]
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123934 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1]
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136624 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[1]:=0]
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151404 t.registers.reset_buf_BX._y : 0 [by t._reset_B:=1]
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151763 t.registers._reset_BX : 1 [by t.registers.reset_buf_BX._y:=0]
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152286 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1]
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152530 t.registers.clock_buffer[1].buf1._y : 1 [by t.registers._clock_word_temp[1]:=0]
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152751 t.registers.ff[2].clk_B : 0 [by t.registers.clock_buffer[1].buf1._y:=1]
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152758 t.registers.ff[2]._clk_B : 1 [by t.registers.ff[2].clk_B:=0]
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152781 t.registers.ff[3]._clk_B : 1 [by t.registers.ff[2].clk_B:=0]
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159471 t.registers.ff[2].__clk_B : 0 [by t.registers.ff[2]._clk_B:=1]
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159941 t.registers.atree[3].and2s[0]._y : 1 [by t.registers.atree[2].in[1]:=0]
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160032 t.registers._out_encoder[3] : 0 [by t.registers.atree[3].and2s[0]._y:=1]
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162221 t.registers.and_encoder[3]._y : 1 [by t.registers._out_encoder[3]:=0]
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162228 t.registers._clock_word_temp[3] : 0 [by t.registers.and_encoder[3]._y:=1]
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165015 t.registers.clock_buffer[3].buf1._y : 1 [by t.registers._clock_word_temp[3]:=0]
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165121 t.registers.ff[6].clk_B : 0 [by t.registers.clock_buffer[3].buf1._y:=1]
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165199 t.registers.ff[6]._clk_B : 1 [by t.registers.ff[6].clk_B:=0]
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165396 t.registers.ff[7]._clk_B : 1 [by t.registers.ff[6].clk_B:=0]
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165851 t.registers.ff[7].__clk_B : 0 [by t.registers.ff[7]._clk_B:=1]
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166402 t.registers.and_encoder[0]._y : 1 [by t.registers._out_encoder[0]:=0]
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166414 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1]
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166555 t.registers._out_encoder[2] : 0 [by t.registers.atree[2].and2s[0]._y:=1]
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166567 t.registers.and_encoder[2]._y : 1 [by t.registers._out_encoder[2]:=0]
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166818 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0]
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166924 t.registers.reset_bufarray.buf3._y : 0 [by t.registers._reset_mem_BX:=1]
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169823 t.registers._reset_mem_BXX[0] : 1 [by t.registers.reset_bufarray.buf3._y:=0]
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171094 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1]
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171096 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0]
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172483 t.registers._clock_word_temp[2] : 0 [by t.registers.and_encoder[2]._y:=1]
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173732 t.registers.clock_buffer[2].buf1._y : 1 [by t.registers._clock_word_temp[2]:=0]
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175389 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0]
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175555 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1]
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175631 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1]
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177231 t.registers.ff[4].clk_B : 0 [by t.registers.clock_buffer[2].buf1._y:=1]
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177306 t.registers.ff[4]._clk_B : 1 [by t.registers.ff[4].clk_B:=0]
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177444 t.registers.ff[4].__clk_B : 0 [by t.registers.ff[4]._clk_B:=1]
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177576 t.registers.ff[5]._clk_B : 1 [by t.registers.ff[4].clk_B:=0]
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182839 t.registers.ff[5].__clk_B : 0 [by t.registers.ff[5]._clk_B:=1]
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184195 t.registers.ff[6].__clk_B : 0 [by t.registers.ff[6]._clk_B:=1]
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210242 t.registers.ff[3].__clk_B : 0 [by t.registers.ff[3]._clk_B:=1]
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t.registers._clock_temp t.registers.ack_dly._a[1] t.registers._clock_temp_inv t.registers._clock t.dly_cfg[1] t.registers.ack_dly.dly[1].__y t.registers.clk_dly.dly[2]._y t.registers.ack_dly.dly[1].___y t.dly_cfg[0] t.registers.clk_dly.and2[1]._y t.registers.ack_dly.dly[2]._y t.registers._in_a_temp t.registers.clk_dly.dly[1].y t.registers.clk_dly.dly[2].y t.registers.clk_dly.dly[1].a t.registers.ack_dly.dly[0].___y t.registers.ack_dly.dly[2].___y t.registers.ack_dly.mu2[0]._y t.registers.clk_dly._a[1] t.registers.clk_X.buf1._y t.registers.clk_dly.dly[1].___y t.in.a t.registers.clk_dly.mu2[1]._s t.registers.clk_dly.dly[1]._y t.registers.ack_dly.dly[2].y t.registers.clk_dly.mu2[1]._y t.registers.clk_dly.mu2[0]._s t.registers.ack_dly.dly[0]._y t.registers.ack_dly.dly[0].a t.registers.clk_dly.dly[1].__y t.registers.clk_dly.mu2[0]._y t.registers.ack_dly.dly[1]._y t.registers.ack_dly.dly[1].y t.registers.ack_dly.and2[1]._y t.registers.ack_dly.dly[0].y t.registers.clk_dly.dly[2].__y t.registers.ack_dly.dly[1].a t.registers.ack_dly.dly[2].__y t.registers.ack_dly.and2[0]._y t.registers.ack_dly.mu2[1]._s t.registers.clk_dly.dly[2].___y t.registers.ack_input_X.buf1._y t.registers.ack_dly.mu2[1]._y t.registers.ack_dly.dly[0].__y t.registers.ack_dly.mu2[0]._s
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2022-03-05 20:28:50 +01:00
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[1] reset completed
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2022-03-07 16:36:01 +01:00
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210242 t.dly_cfg[0] : 1
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210242 t.dly_cfg[1] : 1
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210243 t.registers.ack_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
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210244 t.registers.ack_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
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210790 t.registers.clk_dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
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254159 t.registers.clk_dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
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254170 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.mu2[0]._s:=0]
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254540 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1]
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254607 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0]
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257248 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1]
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257264 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0]
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261826 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1]
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262354 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0]
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264789 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1]
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291669 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0]
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315594 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1]
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328635 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0]
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328637 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1]
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389595 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0]
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389598 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1]
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389627 t.registers._clock_temp_inv : 1 [by t.registers._clock_temp:=0]
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389944 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp_inv:=1]
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391545 t.registers._clock : 1 [by t.registers.clk_X.buf1._y:=0]
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391698 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock:=1]
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391742 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0]
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394503 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1]
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408186 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0]
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408187 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1]
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408404 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0]
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408426 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1]
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408427 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0]
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410008 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1]
|
|
|
|
419353 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0]
|
|
|
|
419512 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1]
|
|
|
|
439188 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0]
|
|
|
|
440475 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1]
|
|
|
|
442707 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0]
|
|
|
|
442852 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1]
|
|
|
|
445684 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0]
|
|
|
|
452038 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1]
|
|
|
|
452039 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0]
|
|
|
|
491323 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1]
|
|
|
|
491485 t.registers._in_a_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0]
|
|
|
|
498854 t.registers.ack_input_X.buf1._y : 0 [by t.registers._in_a_temp:=1]
|
|
|
|
498868 t.in.a : 1 [by t.registers.ack_input_X.buf1._y:=0]
|
2022-03-05 20:28:50 +01:00
|
|
|
[2] delay line set
|
2022-03-07 16:36:01 +01:00
|
|
|
498868 t.registers.ff[0].d : 1
|
|
|
|
498868 t.in.d.d[4].f : 1
|
|
|
|
498868 t.registers.atree[0].in[0] : 1
|
|
|
|
498868 t.registers.ff[1].d : 1
|
|
|
|
498868 t.registers.atree[0].in[1] : 1
|
|
|
|
498869 t.registers.val_input.OR2_tf[1]._y : 0 [by t.registers.ff[1].d:=1]
|
|
|
|
498869 t.registers.val_input.OR2_tf[3]._y : 0 [by t.registers.atree[0].in[1]:=1]
|
|
|
|
498869 t.registers.atree[0].and2s[0]._y : 0 [by t.registers.atree[0].in[1]:=1]
|
|
|
|
498870 t.registers._out_encoder[0] : 1 [by t.registers.atree[0].and2s[0]._y:=0]
|
|
|
|
498875 t.registers.val_input.OR2_tf[0]._y : 0 [by t.registers.ff[0].d:=1]
|
|
|
|
499028 t.registers.val_input.OR2_tf[4]._y : 0 [by t.in.d.d[4].f:=1]
|
|
|
|
499029 t.registers.val_input.ct.in[4] : 1 [by t.registers.val_input.OR2_tf[4]._y:=0]
|
|
|
|
499056 t.registers.val_input.ct.in[3] : 1 [by t.registers.val_input.OR2_tf[3]._y:=0]
|
|
|
|
501112 t.registers.val_input.ct.in[1] : 1 [by t.registers.val_input.OR2_tf[1]._y:=0]
|
|
|
|
503052 t.registers.and_encoder[0]._y : 0 [by t.registers._out_encoder[0]:=1]
|
|
|
|
503905 t.registers._clock_word_temp[0] : 1 [by t.registers.and_encoder[0]._y:=0]
|
|
|
|
503910 t.registers.clock_buffer[0].buf1._y : 0 [by t.registers._clock_word_temp[0]:=1]
|
|
|
|
504801 t.registers.ff[0].clk_B : 1 [by t.registers.clock_buffer[0].buf1._y:=0]
|
|
|
|
504802 t.registers.ff[0]._clk_B : 0 [by t.registers.ff[0].clk_B:=1]
|
|
|
|
504818 t.registers.ff[1]._clk_B : 0 [by t.registers.ff[0].clk_B:=1]
|
|
|
|
507375 t.registers.ff[0].__clk_B : 1 [by t.registers.ff[0]._clk_B:=0]
|
|
|
|
507378 t.registers.ff[0]._mqib : 0 [by t.registers.ff[0].__clk_B:=1]
|
|
|
|
508319 t.registers.ff[0]._mqi : 1 [by t.registers.ff[0]._mqib:=0]
|
|
|
|
513179 t.registers.ff[1].__clk_B : 1 [by t.registers.ff[1]._clk_B:=0]
|
|
|
|
520425 t.registers.val_input.OR2_tf[2]._y : 0 [by t.registers.atree[0].in[0]:=1]
|
|
|
|
520426 t.registers.val_input.ct.in[2] : 1 [by t.registers.val_input.OR2_tf[2]._y:=0]
|
|
|
|
520468 t.registers.val_input.ct.C3Els[0]._y : 0 [by t.registers.val_input.ct.in[2]:=1]
|
|
|
|
523285 t.registers.val_input.ct.tmp[6] : 1 [by t.registers.val_input.ct.C3Els[0]._y:=0]
|
|
|
|
533657 t.registers.val_input.ct.in[0] : 1 [by t.registers.val_input.OR2_tf[0]._y:=0]
|
|
|
|
547390 t.registers.val_input.ct.C2Els[0]._y : 0 [by t.registers.val_input.ct.in[0]:=1]
|
|
|
|
547485 t.registers.val_input.ct.tmp[5] : 1 [by t.registers.val_input.ct.C2Els[0]._y:=0]
|
|
|
|
547820 t.registers.val_input.ct.C2Els[1]._y : 0 [by t.registers.val_input.ct.tmp[5]:=1]
|
|
|
|
547828 t.registers._in_v_temp : 1 [by t.registers.val_input.ct.C2Els[1]._y:=0]
|
|
|
|
547862 t.registers.clk_dly.and2[0]._y : 0 [by t.registers._in_v_temp:=1]
|
|
|
|
548780 t.registers.clk_dly.dly[0].a : 1 [by t.registers.clk_dly.and2[0]._y:=0]
|
|
|
|
548784 t.registers.clk_dly.dly[0]._y : 0 [by t.registers.clk_dly.dly[0].a:=1]
|
|
|
|
561715 t.registers.val_input_X.buf1._y : 0 [by t.registers._in_v_temp:=1]
|
|
|
|
564113 t.in.v : 1 [by t.registers.val_input_X.buf1._y:=0]
|
|
|
|
572141 t.registers.ff[1]._mqib : 0 [by t.registers.ff[1].__clk_B:=1]
|
|
|
|
575356 t.registers.ff[1]._mqi : 1 [by t.registers.ff[1]._mqib:=0]
|
|
|
|
595162 t.registers.clk_dly.dly[0].__y : 1 [by t.registers.clk_dly.dly[0]._y:=0]
|
|
|
|
642281 t.registers.clk_dly.dly[0].___y : 0 [by t.registers.clk_dly.dly[0].__y:=1]
|
|
|
|
642329 t.registers.clk_dly.dly[0].y : 1 [by t.registers.clk_dly.dly[0].___y:=0]
|
|
|
|
642332 t.registers.clk_dly.mu2[0]._y : 0 [by t.registers.clk_dly.dly[0].y:=1]
|
|
|
|
642510 t.registers.clk_dly._a[1] : 1 [by t.registers.clk_dly.mu2[0]._y:=0]
|
|
|
|
663487 t.registers.clk_dly.and2[1]._y : 0 [by t.registers.clk_dly._a[1]:=1]
|
|
|
|
675386 t.registers.clk_dly.dly[1].a : 1 [by t.registers.clk_dly.and2[1]._y:=0]
|
|
|
|
681337 t.registers.clk_dly.dly[1]._y : 0 [by t.registers.clk_dly.dly[1].a:=1]
|
|
|
|
720822 t.registers.clk_dly.dly[1].__y : 1 [by t.registers.clk_dly.dly[1]._y:=0]
|
|
|
|
721649 t.registers.clk_dly.dly[1].___y : 0 [by t.registers.clk_dly.dly[1].__y:=1]
|
|
|
|
721822 t.registers.clk_dly.dly[1].y : 1 [by t.registers.clk_dly.dly[1].___y:=0]
|
|
|
|
722006 t.registers.clk_dly.dly[2]._y : 0 [by t.registers.clk_dly.dly[1].y:=1]
|
|
|
|
722007 t.registers.clk_dly.dly[2].__y : 1 [by t.registers.clk_dly.dly[2]._y:=0]
|
|
|
|
722080 t.registers.clk_dly.dly[2].___y : 0 [by t.registers.clk_dly.dly[2].__y:=1]
|
|
|
|
722084 t.registers.clk_dly.dly[2].y : 1 [by t.registers.clk_dly.dly[2].___y:=0]
|
|
|
|
759372 t.registers.clk_dly.mu2[1]._y : 0 [by t.registers.clk_dly.dly[2].y:=1]
|
|
|
|
759468 t.registers._clock_temp : 1 [by t.registers.clk_dly.mu2[1]._y:=0]
|
|
|
|
759604 t.registers._clock_temp_inv : 0 [by t.registers._clock_temp:=1]
|
|
|
|
759605 t.registers.clk_X.buf1._y : 1 [by t.registers._clock_temp_inv:=0]
|
|
|
|
778651 t.registers._clock : 0 [by t.registers.clk_X.buf1._y:=1]
|
|
|
|
778892 t.registers.and_encoder[0]._y : 1 [by t.registers._clock:=0]
|
|
|
|
778904 t.registers._clock_word_temp[0] : 0 [by t.registers.and_encoder[0]._y:=1]
|
|
|
|
782610 t.registers.ack_dly.and2[0]._y : 1 [by t.registers._clock:=0]
|
|
|
|
782804 t.registers.clock_buffer[0].buf1._y : 1 [by t.registers._clock_word_temp[0]:=0]
|
|
|
|
782805 t.registers.ff[0].clk_B : 0 [by t.registers.clock_buffer[0].buf1._y:=1]
|
|
|
|
782861 t.registers.ff[0]._clk_B : 1 [by t.registers.ff[0].clk_B:=0]
|
|
|
|
782862 t.registers.ff[0].__clk_B : 0 [by t.registers.ff[0]._clk_B:=1]
|
|
|
|
782898 t.registers.ff[0]._sqib : 0 [by t.registers.ff[0]._clk_B:=1]
|
|
|
|
782899 t.data[0].d[0] : 1 [by t.registers.ff[0]._sqib:=0]
|
|
|
|
783639 t.registers.ack_dly.dly[0].a : 0 [by t.registers.ack_dly.and2[0]._y:=1]
|
|
|
|
787203 t.registers.ack_dly.dly[0]._y : 1 [by t.registers.ack_dly.dly[0].a:=0]
|
|
|
|
788895 t.registers.ack_dly.dly[0].__y : 0 [by t.registers.ack_dly.dly[0]._y:=1]
|
|
|
|
788908 t.registers.ack_dly.dly[0].___y : 1 [by t.registers.ack_dly.dly[0].__y:=0]
|
|
|
|
805892 t.registers.ack_dly.dly[0].y : 0 [by t.registers.ack_dly.dly[0].___y:=1]
|
|
|
|
806249 t.registers.ack_dly.mu2[0]._y : 1 [by t.registers.ack_dly.dly[0].y:=0]
|
|
|
|
806273 t.registers.ff[0]._sqi : 1 [by t.registers.ff[0]._sqib:=0]
|
|
|
|
806274 t.registers.ack_dly._a[1] : 0 [by t.registers.ack_dly.mu2[0]._y:=1]
|
|
|
|
806295 t.registers.ack_dly.and2[1]._y : 1 [by t.registers.ack_dly._a[1]:=0]
|
|
|
|
806296 t.registers.ack_dly.dly[1].a : 0 [by t.registers.ack_dly.and2[1]._y:=1]
|
|
|
|
815944 t.registers.ack_dly.dly[1]._y : 1 [by t.registers.ack_dly.dly[1].a:=0]
|
|
|
|
815945 t.registers.ack_dly.dly[1].__y : 0 [by t.registers.ack_dly.dly[1]._y:=1]
|
|
|
|
815946 t.registers.ack_dly.dly[1].___y : 1 [by t.registers.ack_dly.dly[1].__y:=0]
|
|
|
|
816107 t.registers.ack_dly.dly[1].y : 0 [by t.registers.ack_dly.dly[1].___y:=1]
|
|
|
|
817144 t.registers.ack_dly.dly[2]._y : 1 [by t.registers.ack_dly.dly[1].y:=0]
|
|
|
|
817149 t.registers.ack_dly.dly[2].__y : 0 [by t.registers.ack_dly.dly[2]._y:=1]
|
|
|
|
817730 t.registers.ack_dly.dly[2].___y : 1 [by t.registers.ack_dly.dly[2].__y:=0]
|
|
|
|
818138 t.registers.ack_dly.dly[2].y : 0 [by t.registers.ack_dly.dly[2].___y:=1]
|
|
|
|
818149 t.registers.ack_dly.mu2[1]._y : 1 [by t.registers.ack_dly.dly[2].y:=0]
|
|
|
|
819196 t.registers._in_a_temp : 0 [by t.registers.ack_dly.mu2[1]._y:=1]
|
|
|
|
819210 t.registers.ack_input_X.buf1._y : 1 [by t.registers._in_a_temp:=0]
|
|
|
|
819228 t.in.a : 0 [by t.registers.ack_input_X.buf1._y:=1]
|
|
|
|
827811 t.registers.ff[1]._clk_B : 1 [by t.registers.ff[0].clk_B:=0]
|
|
|
|
827815 t.registers.ff[1].__clk_B : 0 [by t.registers.ff[1]._clk_B:=1]
|
|
|
|
827915 t.registers.ff[1]._sqib : 0 [by t.registers.ff[1]._clk_B:=1]
|
|
|
|
829119 t.data[0].d[1] : 1 [by t.registers.ff[1]._sqib:=0]
|
|
|
|
859359 t.registers.ff[1]._sqi : 1 [by t.registers.ff[1]._sqib:=0]
|
|
|
|
859359 t.registers.ff[0].d : 0
|
|
|
|
859359 t.in.d.d[4].f : 0
|
|
|
|
859359 t.registers.atree[0].in[0] : 0
|
|
|
|
859359 t.registers.ff[1].d : 0
|
|
|
|
859359 t.registers.atree[0].in[1] : 0
|
|
|
|
859429 t.registers.val_input.OR2_tf[1]._y : 1 [by t.registers.ff[1].d:=0]
|
|
|
|
859440 t.registers.val_input.ct.in[1] : 0 [by t.registers.val_input.OR2_tf[1]._y:=1]
|
|
|
|
859587 t.registers.val_input.OR2_tf[4]._y : 1 [by t.in.d.d[4].f:=0]
|
|
|
|
859590 t.registers.val_input.ct.in[4] : 0 [by t.registers.val_input.OR2_tf[4]._y:=1]
|
|
|
|
860202 t.registers.atree[0].and2s[0]._y : 1 [by t.registers.atree[0].in[0]:=0]
|
|
|
|
860256 t.registers._out_encoder[0] : 0 [by t.registers.atree[0].and2s[0]._y:=1]
|
|
|
|
860818 t.registers.val_input.OR2_tf[2]._y : 1 [by t.registers.atree[0].in[0]:=0]
|
|
|
|
861966 t.registers.val_input.ct.in[2] : 0 [by t.registers.val_input.OR2_tf[2]._y:=1]
|
|
|
|
867814 t.registers.val_input.OR2_tf[0]._y : 1 [by t.registers.ff[0].d:=0]
|
|
|
|
868975 t.registers.val_input.ct.in[0] : 0 [by t.registers.val_input.OR2_tf[0]._y:=1]
|
|
|
|
877627 t.registers.val_input.ct.C2Els[0]._y : 1 [by t.registers.val_input.ct.in[0]:=0]
|
|
|
|
877708 t.registers.val_input.ct.tmp[5] : 0 [by t.registers.val_input.ct.C2Els[0]._y:=1]
|
|
|
|
909781 t.registers.val_input.OR2_tf[3]._y : 1 [by t.registers.atree[0].in[1]:=0]
|
|
|
|
920858 t.registers.val_input.ct.in[3] : 0 [by t.registers.val_input.OR2_tf[3]._y:=1]
|
|
|
|
938841 t.registers.val_input.ct.C3Els[0]._y : 1 [by t.registers.val_input.ct.in[3]:=0]
|
|
|
|
938933 t.registers.val_input.ct.tmp[6] : 0 [by t.registers.val_input.ct.C3Els[0]._y:=1]
|
|
|
|
947244 t.registers.val_input.ct.C2Els[1]._y : 1 [by t.registers.val_input.ct.tmp[6]:=0]
|
|
|
|
948988 t.registers._in_v_temp : 0 [by t.registers.val_input.ct.C2Els[1]._y:=1]
|
|
|
|
949601 t.registers.clk_dly.and2[0]._y : 1 [by t.registers._in_v_temp:=0]
|
|
|
|
949646 t.registers.clk_dly.dly[0].a : 0 [by t.registers.clk_dly.and2[0]._y:=1]
|
|
|
|
950643 t.registers.clk_dly.dly[0]._y : 1 [by t.registers.clk_dly.dly[0].a:=0]
|
|
|
|
952292 t.registers.clk_dly.dly[0].__y : 0 [by t.registers.clk_dly.dly[0]._y:=1]
|
|
|
|
952817 t.registers.clk_dly.dly[0].___y : 1 [by t.registers.clk_dly.dly[0].__y:=0]
|
|
|
|
953717 t.registers.clk_dly.dly[0].y : 0 [by t.registers.clk_dly.dly[0].___y:=1]
|
|
|
|
953769 t.registers.clk_dly.mu2[0]._y : 1 [by t.registers.clk_dly.dly[0].y:=0]
|
|
|
|
953776 t.registers.clk_dly._a[1] : 0 [by t.registers.clk_dly.mu2[0]._y:=1]
|
|
|
|
963010 t.registers.val_input_X.buf1._y : 1 [by t.registers._in_v_temp:=0]
|
|
|
|
969388 t.registers.clk_dly.and2[1]._y : 1 [by t.registers.clk_dly._a[1]:=0]
|
|
|
|
969390 t.registers.clk_dly.dly[1].a : 0 [by t.registers.clk_dly.and2[1]._y:=1]
|
|
|
|
969477 t.in.v : 0 [by t.registers.val_input_X.buf1._y:=1]
|
|
|
|
969744 t.registers.clk_dly.dly[1]._y : 1 [by t.registers.clk_dly.dly[1].a:=0]
|
|
|
|
969877 t.registers.clk_dly.dly[1].__y : 0 [by t.registers.clk_dly.dly[1]._y:=1]
|
|
|
|
969878 t.registers.clk_dly.dly[1].___y : 1 [by t.registers.clk_dly.dly[1].__y:=0]
|
|
|
|
969882 t.registers.clk_dly.dly[1].y : 0 [by t.registers.clk_dly.dly[1].___y:=1]
|
|
|
|
970428 t.registers.clk_dly.dly[2]._y : 1 [by t.registers.clk_dly.dly[1].y:=0]
|
|
|
|
1015991 t.registers.clk_dly.dly[2].__y : 0 [by t.registers.clk_dly.dly[2]._y:=1]
|
|
|
|
1015992 t.registers.clk_dly.dly[2].___y : 1 [by t.registers.clk_dly.dly[2].__y:=0]
|
|
|
|
1028370 t.registers.clk_dly.dly[2].y : 0 [by t.registers.clk_dly.dly[2].___y:=1]
|
|
|
|
1028449 t.registers.clk_dly.mu2[1]._y : 1 [by t.registers.clk_dly.dly[2].y:=0]
|
|
|
|
1030882 t.registers._clock_temp : 0 [by t.registers.clk_dly.mu2[1]._y:=1]
|
|
|
|
1030970 t.registers._clock_temp_inv : 1 [by t.registers._clock_temp:=0]
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1038752 t.registers.clk_X.buf1._y : 0 [by t.registers._clock_temp_inv:=1]
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1067079 t.registers._clock : 1 [by t.registers.clk_X.buf1._y:=0]
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|
1067138 t.registers.ack_dly.and2[0]._y : 0 [by t.registers._clock:=1]
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1067168 t.registers.ack_dly.dly[0].a : 1 [by t.registers.ack_dly.and2[0]._y:=0]
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1068635 t.registers.ack_dly.dly[0]._y : 0 [by t.registers.ack_dly.dly[0].a:=1]
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1128139 t.registers.ack_dly.dly[0].__y : 1 [by t.registers.ack_dly.dly[0]._y:=0]
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1147523 t.registers.ack_dly.dly[0].___y : 0 [by t.registers.ack_dly.dly[0].__y:=1]
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1148208 t.registers.ack_dly.dly[0].y : 1 [by t.registers.ack_dly.dly[0].___y:=0]
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1164923 t.registers.ack_dly.mu2[0]._y : 0 [by t.registers.ack_dly.dly[0].y:=1]
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1165050 t.registers.ack_dly._a[1] : 1 [by t.registers.ack_dly.mu2[0]._y:=0]
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1165219 t.registers.ack_dly.and2[1]._y : 0 [by t.registers.ack_dly._a[1]:=1]
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1165262 t.registers.ack_dly.dly[1].a : 1 [by t.registers.ack_dly.and2[1]._y:=0]
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1165274 t.registers.ack_dly.dly[1]._y : 0 [by t.registers.ack_dly.dly[1].a:=1]
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1166553 t.registers.ack_dly.dly[1].__y : 1 [by t.registers.ack_dly.dly[1]._y:=0]
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1166786 t.registers.ack_dly.dly[1].___y : 0 [by t.registers.ack_dly.dly[1].__y:=1]
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|
1166789 t.registers.ack_dly.dly[1].y : 1 [by t.registers.ack_dly.dly[1].___y:=0]
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|
1166827 t.registers.ack_dly.dly[2]._y : 0 [by t.registers.ack_dly.dly[1].y:=1]
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1166828 t.registers.ack_dly.dly[2].__y : 1 [by t.registers.ack_dly.dly[2]._y:=0]
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|
1179580 t.registers.ack_dly.dly[2].___y : 0 [by t.registers.ack_dly.dly[2].__y:=1]
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|
1179672 t.registers.ack_dly.dly[2].y : 1 [by t.registers.ack_dly.dly[2].___y:=0]
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|
1182399 t.registers.ack_dly.mu2[1]._y : 0 [by t.registers.ack_dly.dly[2].y:=1]
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|
1182401 t.registers._in_a_temp : 1 [by t.registers.ack_dly.mu2[1]._y:=0]
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|
1182402 t.registers.ack_input_X.buf1._y : 0 [by t.registers._in_a_temp:=1]
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1183903 t.in.a : 1 [by t.registers.ack_input_X.buf1._y:=0]
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2022-03-05 20:28:50 +01:00
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[3] clock checked
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