2022-02-23 19:01:54 +01:00
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watchall
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2022-02-25 19:16:40 +01:00
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system "echo '[0] code starts'"
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2022-02-24 16:47:24 +01:00
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set t.in1.r 0
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set t.in2.r 0
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set t.out.a 0
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2022-02-23 19:01:54 +01:00
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cycle
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status X
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mode run
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2022-02-25 19:16:40 +01:00
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system "echo '[1] reset done'"
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system "echo '----------------------------------------------------------------------------------------------------'"
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2022-02-24 16:47:24 +01:00
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set t.in1.r 1
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cycle
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assert t.out.r 1
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set t.out.a 1
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cycle
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assert t.in1.a 1
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2022-02-25 19:16:40 +01:00
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system "echo '[2] test in1 done'"
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2022-02-24 19:02:37 +01:00
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system "echo '----------------------------------------------------------------------------------------------------'"
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2022-02-24 16:47:24 +01:00
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set t.in1.r 0
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2022-02-25 19:16:40 +01:00
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cycle
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assert t.out.r 0
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2022-02-24 16:47:24 +01:00
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set t.out.a 0
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cycle
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assert t.in1.a 0
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2022-02-25 19:16:40 +01:00
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system "echo '[3] reset done'"
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system "echo '----------------------------------------------------------------------------------------------------'"
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set t.in2.r 1
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cycle
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assert t.out.r 1
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set t.out.a 1
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cycle
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assert t.in2.a 1
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system "echo '[4] test in2 done'"
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system "echo '----------------------------------------------------------------------------------------------------'"
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set t.in2.r 0
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cycle
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assert t.out.r 0
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set t.out.a 0
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cycle
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2022-02-24 16:47:24 +01:00
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assert t.in2.a 0
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2022-02-25 19:16:40 +01:00
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system "echo '[5] reset done'"
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system "echo '----------------------------------------------------------------------------------------------------'"
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