bics/actlib_dataflow_neuro
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added catch for low n syn mon

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alexmadison
2022-04-10 15:19:11 +02:00
parent ae3ecc3d6b
commit 19564a5a91
2 changed files with 29 additions and 17 deletions
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33
dataflow_neuro/chips.act
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@ -166,23 +166,26 @@ defproc chip_texel (bd<N_IN> in, out;
// Otherwise boom.
bool DEV_DEBUG;
pint NSMX4 = N_SYN_MON_X/4; // Self explanatory
sigbuf<NSMX4> sb_DEV_DEBUG(.in = register.data[0].d[5].t,
sigbuf<std::max(NSMX4,4)> sb_DEV_DEBUG(.in = register.data[0].d[5].t,
.supply = supply);
DEV_DEBUG = sb_DEV_DEBUG.out[0];
AND2_X1 ands_devmon[NSMX4];
(i:NSMX4:
ands_devmon[i].a = syn_mon_dec_x.out[1+i*4];
ands_devmon[i].b = DEV_DEBUG;
ands_devmon[i].y = syn_mon_x[1+i*4];
ands_devmon[i].vdd = supply.vdd;
ands_devmon[i].vss = supply.vss;
)
// Wire up the non-ANDed lines.
(i:N_SYN_MON_X:
[~(i%4 = 1) ->
syn_mon_x[i] = syn_mon_dec_x.out[i];
]
)
[NSMX4 >= 1 ->
AND2_X1 ands_devmon[NSMX4];
(i:NSMX4:
ands_devmon[i].a = syn_mon_dec_x.out[1+i*4];
ands_devmon[i].b = DEV_DEBUG;
ands_devmon[i].y = syn_mon_x[1+i*4];
ands_devmon[i].vdd = supply.vdd;
ands_devmon[i].vss = supply.vss;
)
// Wire up the non-ANDed lines.
(i:N_SYN_MON_X:
[~(i%4 = 1) ->
syn_mon_x[i] = syn_mon_dec_x.out[i];
]
)
]
}