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fixed timing bug in encoder

This commit is contained in:
alexmadison 2022-04-10 15:17:53 +02:00
parent 6eb6766bef
commit ae3ecc3d6b
1 changed files with 4 additions and 2 deletions
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6
dataflow_neuro/coders.act
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@ -732,6 +732,7 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
// ortree x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply);
// INV_X1 not_x_req_ortree(.a = _x_v,.y = _x_v_B);
bool _x_a_B2; // sorry
bool _en;
A_1C3P2P2N_R_X1 x_ack(); // NEEDS BUFFERING TO X4
@ -747,14 +748,15 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
x_ack.n1 = out.v;
x_ack.n2 = _in_x_v;
//
x_ack.y = _x_a_B;
x_ack.y = _x_a_B2;
//
x_ack.vdd = supply.vdd;
x_ack.vss = supply.vss;
x_ack.pr_B = _reset_BX;
x_ack.sr_B = _reset_BX;
INV_X1 not_x_ack(.a = _x_a_B, .y = _x_a, .vdd = supply.vdd, .vss = supply.vss);
INV_X1 not_x_ack(.a = _x_a_B2, .y = _x_a, .vdd = supply.vdd, .vss = supply.vss);
INV_X1 not_x_ack2(.a = _x_a, .y = _x_a_B, .vdd = supply.vdd, .vss = supply.vss);
A_1C2P_X1 enabling(.p1 = out.a, .p2 = out.v, .c1 = _x_a, .y = _en, .vdd = supply.vdd, .vss = supply.vss);