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disentangled synapse handshake circuits, passing tests

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alexmadison
2022-04-20 18:24:43 +02:00
parent cd5900d4dc
commit 351b3ea151
2 changed files with 63 additions and 37 deletions
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12
dataflow_neuro/chips.act
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@ -93,7 +93,6 @@ defproc texel_core (avMx1of2<N_IN> in, out;
slice_data<N_IN-1, 0, NC_SYN> slice_pre_dec(.in = _demux.out1, .supply = supply);
fifo<NC_SYN,N_BUFFERS> fifo_dmx2dec(.in = slice_pre_dec.out, .reset_B = _reset_BX, .supply = supply);
decoder_2d_hybrid<NC_SYN_X, NC_SYN_Y, N_SYN_X, N_SYN_Y, N_SYN_DLY_CFG> decoder(.in = fifo_dmx2dec.out,
.out = synapses,
.hs_en = register.data[0].d[0].t, // Defaults to handshake disable
.ack_disable = register.data[1].d[2].t, // Defaults to ack enabled
.supply = supply, .reset_B = _reset_BX);
@ -103,7 +102,16 @@ defproc texel_core (avMx1of2<N_IN> in, out;
dly_cfg_inverters[i].vdd = supply.vdd;
dly_cfg_inverters[i].vss = supply.vss;
decoder.dly_cfg[i] = dly_cfg_inverters[i].y;
) // This sexy hack means that the inverters are max delay throughout the register flush operations.
)
// Synapse handshake circuits, to be removed for innovus
decoder_2d_synapse_hs<N_SYN_X, N_SYN_Y> _synapses(
.synapses = synapses,
.in_req_x = decoder.out_req_x, .in_req_y = decoder.out_req_y,
.in_ackB_pullups = decoder.out_ackB_pullups,
.out_req_x_pullups = decoder.in_req_x_pullups,
.out_ackB_decoder = decoder.in_ackB_decoder,
.supply = supply);
// Neurons + encoder
pint NC_NRN;