Merge remote-tracking branch 'origin/dev' into dev
This commit is contained in:
Greatorex committed
commit
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@@ -1,3 +1,4 @@
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random_seed 6
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initialize
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load-scm "helper.scm"
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random
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@@ -15129,18 +15130,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [6,211]'"
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set-bd-data-valid "c.in" 32 13510
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system "echo '[] Sending spike to core 0 synapse [8,15]'"
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set-bd-data-valid "c.in" 32 248
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[3171].r 1
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set c.c1_synapses[3171].a 1
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assert c.c1_synapses[233].r 1
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set c.c1_synapses[233].a 1
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cycle
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assert c.c1_synapses[3171].r 0
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set c.c1_synapses[3171].a 0
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assert c.c1_synapses[233].r 0
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set c.c1_synapses[233].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15148,18 +15149,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [4,216]'"
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set-bd-data-valid "c.in" 32 13828
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system "echo '[] Sending spike to core 0 synapse [13,291]'"
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set-bd-data-valid "c.in" 32 4669
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[3244].r 1
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set c.c1_synapses[3244].a 1
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assert c.c1_synapses[4378].r 1
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set c.c1_synapses[4378].a 1
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cycle
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assert c.c1_synapses[3244].r 0
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set c.c1_synapses[3244].a 0
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assert c.c1_synapses[4378].r 0
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set c.c1_synapses[4378].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15167,18 +15168,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [1,161]'"
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set-bd-data-valid "c.in" 32 10305
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system "echo '[] Sending spike to core 0 synapse [10,120]'"
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set-bd-data-valid "c.in" 32 1930
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[2416].r 1
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set c.c1_synapses[2416].a 1
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assert c.c1_synapses[1810].r 1
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set c.c1_synapses[1810].a 1
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cycle
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assert c.c1_synapses[2416].r 0
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set c.c1_synapses[2416].a 0
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assert c.c1_synapses[1810].r 0
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set c.c1_synapses[1810].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15186,18 +15187,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [3,247]'"
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set-bd-data-valid "c.in" 32 15811
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system "echo '[] Sending spike to core 0 synapse [3,127]'"
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set-bd-data-valid "c.in" 32 2035
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[3708].r 1
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set c.c1_synapses[3708].a 1
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assert c.c1_synapses[1908].r 1
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set c.c1_synapses[1908].a 1
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cycle
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assert c.c1_synapses[3708].r 0
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set c.c1_synapses[3708].a 0
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assert c.c1_synapses[1908].r 0
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set c.c1_synapses[1908].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15205,18 +15206,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [14,261]'"
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set-bd-data-valid "c.in" 32 16718
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system "echo '[] Sending spike to core 0 synapse [0,67]'"
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set-bd-data-valid "c.in" 32 1072
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[3929].r 1
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set c.c1_synapses[3929].a 1
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assert c.c1_synapses[1005].r 1
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set c.c1_synapses[1005].a 1
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cycle
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assert c.c1_synapses[3929].r 0
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set c.c1_synapses[3929].a 0
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assert c.c1_synapses[1005].r 0
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set c.c1_synapses[1005].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15224,18 +15225,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [0,342]'"
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set-bd-data-valid "c.in" 32 21888
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system "echo '[] Sending spike to core 0 synapse [7,323]'"
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set-bd-data-valid "c.in" 32 5175
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[5130].r 1
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set c.c1_synapses[5130].a 1
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assert c.c1_synapses[4852].r 1
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set c.c1_synapses[4852].a 1
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cycle
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assert c.c1_synapses[5130].r 0
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set c.c1_synapses[5130].a 0
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assert c.c1_synapses[4852].r 0
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set c.c1_synapses[4852].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15243,18 +15244,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [14,31]'"
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set-bd-data-valid "c.in" 32 1998
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system "echo '[] Sending spike to core 0 synapse [4,167]'"
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set-bd-data-valid "c.in" 32 2676
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[479].r 1
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set c.c1_synapses[479].a 1
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assert c.c1_synapses[2509].r 1
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set c.c1_synapses[2509].a 1
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cycle
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assert c.c1_synapses[479].r 0
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set c.c1_synapses[479].a 0
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assert c.c1_synapses[2509].r 0
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set c.c1_synapses[2509].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15262,18 +15263,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [13,288]'"
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set-bd-data-valid "c.in" 32 18445
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system "echo '[] Sending spike to core 0 synapse [14,229]'"
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set-bd-data-valid "c.in" 32 3678
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[4333].r 1
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set c.c1_synapses[4333].a 1
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assert c.c1_synapses[3449].r 1
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set c.c1_synapses[3449].a 1
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cycle
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assert c.c1_synapses[4333].r 0
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set c.c1_synapses[4333].a 0
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assert c.c1_synapses[3449].r 0
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set c.c1_synapses[3449].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15281,18 +15282,18 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [14,105]'"
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set-bd-data-valid "c.in" 32 6734
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system "echo '[] Sending spike to core 0 synapse [7,291]'"
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set-bd-data-valid "c.in" 32 4663
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[1589].r 1
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set c.c1_synapses[1589].a 1
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assert c.c1_synapses[4372].r 1
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set c.c1_synapses[4372].a 1
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cycle
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assert c.c1_synapses[1589].r 0
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set c.c1_synapses[1589].a 0
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assert c.c1_synapses[4372].r 0
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set c.c1_synapses[4372].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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@@ -15300,24 +15301,215 @@ cycle
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assert c.in.a 0
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system "echo '[] Sending spike to core 0 synapse [14,311]'"
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set-bd-data-valid "c.in" 32 19918
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system "echo '[] Sending spike to core 0 synapse [5,52]'"
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set-bd-data-valid "c.in" 32 837
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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assert c.c1_synapses[4679].r 1
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set c.c1_synapses[4679].a 1
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assert c.c1_synapses[785].r 1
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set c.c1_synapses[785].a 1
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cycle
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assert c.c1_synapses[4679].r 0
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set c.c1_synapses[4679].a 0
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assert c.c1_synapses[785].r 0
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set c.c1_synapses[785].a 0
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cycle
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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cycle
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assert c.in.a 0
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|
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|
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system "echo '[] Sending spike to core 0 synapse [13,248]'"
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set-bd-data-valid "c.in" 32 3981
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cycle
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set c.in.r 1
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cycle
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assert c.in.a 1
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|
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assert c.c1_synapses[3733].r 1
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set c.c1_synapses[3733].a 1
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cycle
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assert c.c1_synapses[3733].r 0
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||||
set c.c1_synapses[3733].a 0
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||||
cycle
|
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system "echo '[] Removing input'"
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set-bd-channel-neutral "c.in" 32
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cycle
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assert c.in.a 0
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|
||||
|
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system "echo '[] Sending spike to core 0 synapse [4,231]'"
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set-bd-data-valid "c.in" 32 3700
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||||
cycle
|
||||
set c.in.r 1
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||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3469].r 1
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||||
set c.c1_synapses[3469].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3469].r 0
|
||||
set c.c1_synapses[3469].a 0
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||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
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||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [6,291]'"
|
||||
set-bd-data-valid "c.in" 32 4662
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4371].r 1
|
||||
set c.c1_synapses[4371].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4371].r 0
|
||||
set c.c1_synapses[4371].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [0,71]'"
|
||||
set-bd-data-valid "c.in" 32 1136
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[1065].r 1
|
||||
set c.c1_synapses[1065].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[1065].r 0
|
||||
set c.c1_synapses[1065].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [7,299]'"
|
||||
set-bd-data-valid "c.in" 32 4791
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4492].r 1
|
||||
set c.c1_synapses[4492].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4492].r 0
|
||||
set c.c1_synapses[4492].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [11,116]'"
|
||||
set-bd-data-valid "c.in" 32 1867
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[1751].r 1
|
||||
set c.c1_synapses[1751].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[1751].r 0
|
||||
set c.c1_synapses[1751].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [11,8]'"
|
||||
set-bd-data-valid "c.in" 32 139
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[131].r 1
|
||||
set c.c1_synapses[131].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[131].r 0
|
||||
set c.c1_synapses[131].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [7,6]'"
|
||||
set-bd-data-valid "c.in" 32 103
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[97].r 1
|
||||
set c.c1_synapses[97].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[97].r 0
|
||||
set c.c1_synapses[97].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [4,317]'"
|
||||
set-bd-data-valid "c.in" 32 5076
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4759].r 1
|
||||
set c.c1_synapses[4759].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4759].r 0
|
||||
set c.c1_synapses[4759].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [5,216]'"
|
||||
set-bd-data-valid "c.in" 32 3461
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3245].r 1
|
||||
set c.c1_synapses[3245].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3245].r 0
|
||||
set c.c1_synapses[3245].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
|
||||
|
||||
# NEURON SPIKES #
|
||||
@@ -15337,245 +15529,6 @@ assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [3,5] in core 0 spikes'"
|
||||
set c.c1_neurons[78].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[78].a 1
|
||||
set c.c1_neurons[78].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[78].a 0
|
||||
system "echo '[] Receiving output spike [3,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 83
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [7,0] in core 0 spikes'"
|
||||
set c.c1_neurons[7].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[7].a 1
|
||||
set c.c1_neurons[7].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[7].a 0
|
||||
system "echo '[] Receiving output spike [7,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 7
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [7,2] in core 0 spikes'"
|
||||
set c.c1_neurons[37].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[37].a 1
|
||||
set c.c1_neurons[37].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[37].a 0
|
||||
system "echo '[] Receiving output spike [7,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 39
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,2] in core 0 spikes'"
|
||||
set c.c1_neurons[39].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 1
|
||||
set c.c1_neurons[39].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 0
|
||||
system "echo '[] Receiving output spike [9,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 41
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,2] in core 0 spikes'"
|
||||
set c.c1_neurons[32].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 1
|
||||
set c.c1_neurons[32].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 0
|
||||
system "echo '[] Receiving output spike [2,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 34
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,5] in core 0 spikes'"
|
||||
set c.c1_neurons[89].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 1
|
||||
set c.c1_neurons[89].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 0
|
||||
system "echo '[] Receiving output spike [14,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 94
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,5] in core 0 spikes'"
|
||||
set c.c1_neurons[84].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[84].a 1
|
||||
set c.c1_neurons[84].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[84].a 0
|
||||
system "echo '[] Receiving output spike [9,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 89
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,1] in core 0 spikes'"
|
||||
set c.c1_neurons[17].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 1
|
||||
set c.c1_neurons[17].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 0
|
||||
system "echo '[] Receiving output spike [2,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 18
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [5,5] in core 0 spikes'"
|
||||
set c.c1_neurons[80].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[80].a 1
|
||||
set c.c1_neurons[80].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[80].a 0
|
||||
system "echo '[] Receiving output spike [5,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 85
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [10,0] in core 0 spikes'"
|
||||
set c.c1_neurons[10].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[10].a 1
|
||||
set c.c1_neurons[10].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[10].a 0
|
||||
system "echo '[] Receiving output spike [10,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 10
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [12,2] in core 0 spikes'"
|
||||
set c.c1_neurons[42].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[42].a 1
|
||||
set c.c1_neurons[42].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[42].a 0
|
||||
system "echo '[] Receiving output spike [12,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 44
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,2] in core 0 spikes'"
|
||||
set c.c1_neurons[39].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 1
|
||||
set c.c1_neurons[39].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 0
|
||||
system "echo '[] Receiving output spike [9,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 41
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [6,3] in core 0 spikes'"
|
||||
set c.c1_neurons[51].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[51].a 1
|
||||
set c.c1_neurons[51].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[51].a 0
|
||||
system "echo '[] Receiving output spike [6,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 54
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,2] in core 0 spikes'"
|
||||
set c.c1_neurons[38].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[38].a 1
|
||||
set c.c1_neurons[38].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[38].a 0
|
||||
system "echo '[] Receiving output spike [8,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 40
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [3,1] in core 0 spikes'"
|
||||
set c.c1_neurons[18].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[18].a 1
|
||||
set c.c1_neurons[18].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[18].a 0
|
||||
system "echo '[] Receiving output spike [3,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 19
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,5] in core 0 spikes'"
|
||||
set c.c1_neurons[89].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 1
|
||||
set c.c1_neurons[89].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 0
|
||||
system "echo '[] Receiving output spike [14,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 94
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,4] in core 0 spikes'"
|
||||
set c.c1_neurons[74].r 1
|
||||
@@ -15592,21 +15545,6 @@ assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [12,5] in core 0 spikes'"
|
||||
set c.c1_neurons[87].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 1
|
||||
set c.c1_neurons[87].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 0
|
||||
system "echo '[] Receiving output spike [12,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 92
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,5] in core 0 spikes'"
|
||||
set c.c1_neurons[83].r 1
|
||||
cycle
|
||||
@@ -15622,3 +15560,272 @@ assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [10,1] in core 0 spikes'"
|
||||
set c.c1_neurons[25].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[25].a 1
|
||||
set c.c1_neurons[25].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[25].a 0
|
||||
system "echo '[] Receiving output spike [10,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 26
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [13,3] in core 0 spikes'"
|
||||
set c.c1_neurons[58].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[58].a 1
|
||||
set c.c1_neurons[58].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[58].a 0
|
||||
system "echo '[] Receiving output spike [13,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 61
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,2] in core 0 spikes'"
|
||||
set c.c1_neurons[44].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[44].a 1
|
||||
set c.c1_neurons[44].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[44].a 0
|
||||
system "echo '[] Receiving output spike [14,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 46
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,2] in core 0 spikes'"
|
||||
set c.c1_neurons[39].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 1
|
||||
set c.c1_neurons[39].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 0
|
||||
system "echo '[] Receiving output spike [9,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 41
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [5,1] in core 0 spikes'"
|
||||
set c.c1_neurons[20].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[20].a 1
|
||||
set c.c1_neurons[20].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[20].a 0
|
||||
system "echo '[] Receiving output spike [5,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 21
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [5,3] in core 0 spikes'"
|
||||
set c.c1_neurons[50].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[50].a 1
|
||||
set c.c1_neurons[50].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[50].a 0
|
||||
system "echo '[] Receiving output spike [5,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 53
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,1] in core 0 spikes'"
|
||||
set c.c1_neurons[23].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[23].a 1
|
||||
set c.c1_neurons[23].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[23].a 0
|
||||
system "echo '[] Receiving output spike [8,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 24
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [4,4] in core 0 spikes'"
|
||||
set c.c1_neurons[64].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[64].a 1
|
||||
set c.c1_neurons[64].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[64].a 0
|
||||
system "echo '[] Receiving output spike [4,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 68
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [3,0] in core 0 spikes'"
|
||||
set c.c1_neurons[3].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[3].a 1
|
||||
set c.c1_neurons[3].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[3].a 0
|
||||
system "echo '[] Receiving output spike [3,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 3
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,4] in core 0 spikes'"
|
||||
set c.c1_neurons[68].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[68].a 1
|
||||
set c.c1_neurons[68].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[68].a 0
|
||||
system "echo '[] Receiving output spike [8,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 72
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,2] in core 0 spikes'"
|
||||
set c.c1_neurons[32].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 1
|
||||
set c.c1_neurons[32].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 0
|
||||
system "echo '[] Receiving output spike [2,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 34
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,0] in core 0 spikes'"
|
||||
set c.c1_neurons[9].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[9].a 1
|
||||
set c.c1_neurons[9].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[9].a 0
|
||||
system "echo '[] Receiving output spike [9,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 9
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,1] in core 0 spikes'"
|
||||
set c.c1_neurons[17].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 1
|
||||
set c.c1_neurons[17].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 0
|
||||
system "echo '[] Receiving output spike [2,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 18
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [4,3] in core 0 spikes'"
|
||||
set c.c1_neurons[49].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[49].a 1
|
||||
set c.c1_neurons[49].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[49].a 0
|
||||
system "echo '[] Receiving output spike [4,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 52
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [12,5] in core 0 spikes'"
|
||||
set c.c1_neurons[87].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 1
|
||||
set c.c1_neurons[87].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 0
|
||||
system "echo '[] Receiving output spike [12,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 92
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,3] in core 0 spikes'"
|
||||
set c.c1_neurons[59].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[59].a 1
|
||||
set c.c1_neurons[59].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[59].a 0
|
||||
system "echo '[] Receiving output spike [14,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 62
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [1,4] in core 0 spikes'"
|
||||
set c.c1_neurons[61].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[61].a 1
|
||||
set c.c1_neurons[61].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[61].a 0
|
||||
system "echo '[] Receiving output spike [1,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 65
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,4] in core 0 spikes'"
|
||||
set c.c1_neurons[74].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[74].a 1
|
||||
set c.c1_neurons[74].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[74].a 0
|
||||
system "echo '[] Receiving output spike [14,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 78
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
@@ -1,653 +1,2 @@
|
||||
c.c1_synapses[1174].a c.c.core2.syn_x_AMZI_tbuf[4].y c.c1_synapses[4736].a c.c1_synapses[829].a c.c2_synapses[1335].a c.c1_synapses[4427].a c.c1_synapses[1005].a c.c2_synapses[11].a c.c1_synapses[4899].a c.c1_synapses[3806].a c.c2_synapses[4443].a c.c._bd2qdi.dly.dly[6].bufchain[12].y c.c2_synapses[1783].a c.c1_synapses[4773].a c.c1_synapses[4411].a c.c1_synapses[4198].a c.c1_synapses[4139].a c.c1_synapses[2572].a c.c2_synapses[746].a c.c1_synapses[2784].a c.c2_syn_mon_AMZI[29] c.c2_synapses[1884].a c.c1_synapses[518].a c.c2_synapses[5084].a c.c2_synapses[2137].a c.c2_synapses[2707].a c.c2_synapses[2537].a c.c1_synapses[4573].a c.c._bd2qdi._reqXX[0] c.c1_synapses[130].a c.c1_synapses[3156].a c.c1_synapses[729].a c.c1_synapses[199].a c.c._bd2qdi.dly.dly[11].bufchain[13]._y c.c2_synapses[5041].a c.c2_synapses[4198].a c.c2_synapses[3196].a c.c1_synapses[1894].a c.c2_synapses[2223].a c.c2_nrn_mon_AMZI[30] c.c1_synapses[1640].a c.c1_synapses[4493].a c.c._bd2qdi.dly.dly[1].bufchain[1].y c.c1_synapses[2321].a c.c2_synapses[4600].a c.c1_synapses[5207].a c.c1_nrn_mon_AMZO[3] c.c2_synapses[2403].a c.c2_nrn_mon_AMZO[4] c.c1_synapses[2345].a c.c1_syn_mon_AMZI[10] c.c2_synapses[1233].a c.c2_synapses[1825].a c.c2_synapses[4671].a c.c1_synapses[3973].a c.c1_synapses[3743].a c.c2_synapses[4240].a c.c2_synapses[287].a c.c1_synapses[1119].a c.c1_synapses[4782].a c.c._bd2qdi.dly.mu2[3]._s c.c1_synapses[3471].a c.c2_synapses[397].a c.c2_synapses[3896].a c.c1_synapses[2183].a c.c1_synapses[702].a c.c1_synapses[1847].a c.c2_synapses[3011].a c.c1_synapses[1883].a c.c2_synapses[621].a c.c1_synapses[307].a c.c2_synapses[3216].a c.c1_synapses[4517].a c.c2_synapses[2443].a c.c1_synapses[2409].a c.c1_synapses[828].a c.c1_synapses[3998].a c.c1_nrn_mon_AMZO[6] c.c1_synapses[31].a c.c2_synapses[1534].a c.c1_synapses[3933].a c.c2_synapses[3931].a c.c2_synapses[2873].a c.c1_synapses[1929].a c.c1_synapses[4335].a c.c2_synapses[2399].a c.c2_synapses[3535].a c.c2_synapses[4818].a c.c2_syn_mon_AMZO[4] c.c2_synapses[4008].a c.c2_synapses[2044].a c.c2_synapses[1263].a c.c2_synapses[2478].a c.c1_synapses[995].a c.c1_synapses[3289].a c.c2_synapses[77].a c.c1_synapses[45].a c.c1_syn_mon_AMZI[68] c.c2_synapses[2552].a c.c1_synapses[1029].a c.c2_synapses[3565].a c.c2_synapses[1464].a c.c1_synapses[1696].a c.c._qdi2bd.dly.dly[7].a c.c2_synapses[1086].a c.c2_synapses[2692].a c.c1_synapses[341].a c.c1_synapses[874].a c.c1_synapses[4758].a c.c2_synapses[1944].a c.c2_synapses[1041].a c.c2_synapses[4545].a c.c._qdi2bd.dly.dly[2].bufchain[10]._y c.c2_neurons[25].r c.c2_synapses[2261].a c.c2_synapses[2620].a c.bd_dly_cfg[2] c.c._bd2qdi.dly.dly[10].bufchain[5].y c.c1_nrn_mon_AMZI[3] c.c2_synapses[603].a c.c2_syn_mon_AMZO[3] c.c1_synapses[5215].a c.c2_synapses[3033].a c.c._bd2qdi.dly2.dly[0].bufchain[10].y c.c2_synapses[1666].a c.c1_synapses[4798].a c.c2_synapses[3597].a c.c1_synapses[697].a c.c1_synapses[1952].a c.c2_synapses[1768].a c.c2_synapses[4265].a c.c1_synapses[3222].a c.c1_synapses[2229].a c.c1_synapses[3359].a c.c1_synapses[1416].a c.c2_synapses[718].a c.c1_synapses[2353].a c.c2_synapses[5080].a c.c1_synapses[3613].a c.c._loopback_dropper.and_f[0].b c.c2_synapses[4387].a c.c2_synapses[2454].a c.c1_synapses[3858].a c.c2_synapses[4802].a c.c2_synapses[1377].a c.c2_synapses[3485].a c.c1_synapses[956].a c.c1_synapses[2964].a c.c1_synapses[1066].a c.c1_synapses[4156].a c.c2_neurons[18].r c.c1_synapses[609].a c.c1_neurons[55].r c.c2_synapses[4037].a c.c2_syn_mon_AMZI[7] c.c2_synapses[1461].a c.c1_synapses[59].a c.c1_synapses[2221].a c.c1_synapses[1179].a c.c._qdi2bd.dly.dly[5].bufchain[13]._y c.c1_synapses[3575].a c.c2_synapses[1432].a c.c2_synapses[710].a c.c2_synapses[1058].a c.c1_synapses[4908].a c.c2_synapses[446].a c.c._qdi2bd.dly.dly[4].bufchain[14].y c.c1_synapses[1374].a c.c1_syn_mon_AMZO[1] c.c2_synapses[1057].a c.c2_synapses[1950].a c.c1_synapses[2898].a c.c2_nrn_mon_AMZO[1] c.c2_synapses[1711].a c.c2_synapses[985].a c.c1_neurons[75].r c.c1_synapses[3455].a c.c1_synapses[296].a c.c1_synapses[641].a c.c1_synapses[3403].a c.c2_synapses[5087].a c.c1_synapses[1690].a c.c1_synapses[687].a c.c1_synapses[1037].a c.c._bd2qdi.dly2.dly[2].bufchain[14].y c.c1_synapses[46].a c.c2_synapses[524].a c.c2_synapses[4209].a c.c1_synapses[2824].a c.c1_synapses[801].a c.c1_synapses[1930].a c.c1_synapses[4007].a c.c2_synapses[627].a c.c1_synapses[1335].a c.c1_synapses[1363].a c.c2_synapses[1716].a c.c1_nrn_mon_AMZO[2] c.c2_synapses[4258].a c.c1_synapses[866].a c.c1_synapses[1715].a c.c2_synapses[407].a c.c1_synapses[3864].a c.c1_synapses[4739].a c.c1_synapses[1258].a c.c1_synapses[326].a c.c2_synapses[4080].a c.c2_synapses[733].a c.c1_synapses[4519].a c.c2_neurons[5].r c.c1_synapses[2148].a c.c2_synapses[1390].a c.c1_synapses[264].a c.c2_synapses[2356].a c.c1_synapses[437].a c.c2_synapses[787].a c.c1_synapses[1467].a c.c2_synapses[1423].a c.c1_synapses[111].a c.c2_synapses[20].a c.c2_synapses[4420].a c.c1_synapses[2460].a c.c1_synapses[4982].a c.c1_synapses[2263].a Line truncated
|
||||
c.c.core2.syn_x_AMZI_tbuf[4].y c.c2_syn_mon_AMZI[29] c.c2_nrn_mon_AMZI[30] c.c1_nrn_mon_AMZO[3] c.c2_nrn_mon_AMZO[4] c.c1_syn_mon_AMZI[10] c.c1_nrn_mon_AMZO[6] c.c2_syn_mon_AMZO[4] c.c1_syn_mon_AMZI[68] c.c1_nrn_mon_AMZI[3] c.c2_syn_mon_AMZO[3] c.c2_syn_mon_AMZI[7] c.c1_syn_mon_AMZO[1] c.c2_nrn_mon_AMZO[1] c.c1_nrn_mon_AMZO[2] c.c2_nrn_mon_AMZI[91] c.c2_nrn_mon_AMZO[3] c.c2_nrn_mon_AMZI[70] c.c1_nrn_mon_AMZO[1] c.c2_nrn_mon_AMZI[85] c.c.core2.nrn_x_AMZI_tbuf[0].y c.c2_nrn_mon_AMZO[2] c.c2_syn_mon_AMZI[69] c.c1_syn_mon_AMZI[63] c.c2_nrn_mon_AMZI[84] c.c1_nrn_mon_AMZI[96] c.c1_nrn_mon_AMZO[4] c.c.core1.nrn_x_AMZI_tbuf[0].y c.c2_nrn_mon_AMZO[0] c.c.core2.nrn_x_AMZI_tbuf[5].y c.c1_syn_mon_AMZI[73] c.c2_nrn_mon_AMZI[31] c.c1_syn_mon_AMZI[58] c.c1_syn_mon_AMZI[45] c.c.core2.nrn_x_AMZI_tbuf[6].y c.c2_nrn_mon_AMZI[82] c.c1_nrn_mon_AMZI[43] c.c1_syn_mon_AMZI[7] c.c2_syn_mon_AMZI[12] c.c2_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[9] c.c.core1.nrn_x_AMZI_tbuf[1].y c.c.core2.syn_x_AMZI_tbuf[2].y c.c1_syn_mon_AMZI[59] c.c2_nrn_mon_AMZI[90] c.c1_syn_mon_AMZI[37] c.c.core1.syn_x_AMZI_tbuf[3].y c.c2_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[1] c.c1_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[72] c.c1_syn_mon_AMZI[39] c.c1_nrn_mon_AMZI[68] c.c1_nrn_mon_AMZI[62] c.c2_nrn_mon_AMZO[5] c.c.core1.nrn_x_AMZI_tbuf[4].y c.c2_nrn_mon_AMZI[89] c.c.core2.syn_x_AMZI_tbuf[3].y c.c.core1.syn_x_AMZI_tbuf[2].y c.c2_syn_mon_AMZI[35] c.c2_nrn_mon_AMZI[102] c.c1_syn_mon_AMZI[6] c.c2_nrn_mon_AMZI[74] c.c2_nrn_mon_AMZI[25] c.c2_nrn_mon_AMZI[79] c.c1_syn_mon_AMZI[50] c.c1_nrn_mon_AMZI[75] c.c2_syn_mon_AMZO[0] c.c.core2.syn_x_AMZI_tbuf[1].y c.c2_syn_mon_AMZI[63] c.c1_syn_mon_AMZI[55] c.c1_nrn_mon_AMZI[60] c.c2_syn_mon_AMZI[33] c.c1_syn_mon_AMZO[4] c.c2_nrn_mon_AMZI[41] c.c1_nrn_mon_AMZI[92] c.c2_syn_mon_AMZI[24] c.c1_syn_mon_AMZO[0] c.c1_nrn_mon_AMZI[39] c.c2_syn_mon_AMZI[66] c.c1_nrn_mon_AMZI[69] c.c.core1.nrn_x_AMZI_tbuf[3].y c.c2_nrn_mon_AMZI[3] c.c1_nrn_mon_AMZO[0] c.c1_syn_mon_AMZI[72] c.c1_nrn_mon_AMZI[104] c.c.core1.nrn_mon_AMZO_sb.sb[6].buf12._y c.c1_nrn_mon_AMZI[98] c.c2_nrn_mon_AMZI[20] c.c2_nrn_mon_AMZI[12] c.c.core1.nrn_x_AMZI_tbuf[2].y c.c2_syn_mon_AMZI[71] c.c1_nrn_mon_AMZO[5] c.c1_syn_mon_AMZO[3] c.c2_nrn_mon_AMZI[48] c.c1_syn_mon_AMZI[17] c.c1_nrn_mon_AMZI[1] c.c1_syn_mon_AMZI[64] c.c2_syn_mon_AMZI[32] c.c.core2.nrn_x_AMZI_tbuf[3].y c.c2_nrn_mon_AMZI[101] c.c.core1.syn_x_AMZI_tbuf[4].y c.c.core2.nrn_x_AMZI_tbuf[1].y c.c2_syn_mon_AMZI[4] c.c2_nrn_mon_AMZI[64] c.c.core1.nrn_x_AMZI_tbuf[5].y c.c2_syn_mon_AMZI[65] c.c2_nrn_mon_AMZI[24] c.c2_nrn_mon_AMZI[8] c.c2_nrn_mon_AMZI[97] c.c2_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[41] c.c.core1.syn_x_AMZI_tbuf[1].y c.c1_syn_mon_AMZI[51] c.c2_nrn_mon_AMZI[50] c.c2_nrn_mon_AMZI[69] c.c1_syn_mon_AMZI[31] c.c.core2.syn_mon_AMZO_sb.sb[1].buf12._y c.c1_nrn_mon_AMZI[54] c.c2_nrn_mon_AMZI[16] c.c.core2.syn_x_AMZI_tbuf[0].y c.c1_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[52] c.c2_nrn_mon_AMZI[100] c.c1_syn_mon_AMZI[47] c.c2_nrn_mon_AMZO[6] c.c.core1.nrn_x_AMZI_tbuf[6].y c.c2_nrn_mon_AMZI[27] c.c1_nrn_mon_AMZI[57] c.c1_nrn_mon_AMZI[44] c.c2_nrn_mon_AMZI[96] c.c1_nrn_mon_AMZI[34] c.c2_nrn_mon_AMZI[26] c.c2_nrn_mon_AMZI[32] c.c1_nrn_mon_AMZI[16] c.c1_nrn_mon_AMZI[8] c.c2_syn_mon_AMZO[1] c.c1_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[0] c.c2_nrn_mon_AMZI[35] c.c1_nrn_mon_AMZI[72] c.c1_nrn_mon_AMZI[87] c.c1_syn_mon_AMZI[26] c.c2_syn_mon_AMZI[34] c.c2_syn_mon_AMZI[8] c.c1_nrn_mon_AMZI[81] c.c2_syn_mon_AMZI[44] c.c.core2.nrn_mon_AMZO_sb.sb[3].buf12._y c.c2_nrn_mon_AMZI[62] c.c2_syn_mon_AMZI[9] c.c1_nrn_mon_AMZI[11] c.c2_nrn_mon_AMZI[13] c.c1_nrn_mon_AMZI[19] c.c2_nrn_mon_AMZI[87] c.c2_syn_mon_AMZI[18] c.c1_nrn_mon_AMZI[7] c.c1_nrn_mon_AMZI[85] c.c1_nrn_mon_AMZI[88] c.c1_syn_mon_AMZI[35] c.c2_syn_mon_AMZI[10] c.c1_syn_mon_AMZI[5] c.c2_syn_mon_AMZI[39] c.c2_nrn_mon_AMZI[2] c.c1_nrn_mon_AMZI[70] c.c1_nrn_mon_AMZI[80] c.c2_nrn_mon_AMZI[14] c.c2_nrn_mon_AMZI[7] c.c1_nrn_mon_AMZI[95] c.c1_syn_mon_AMZI[25] c.c2_nrn_mon_AMZI[47] c.c1_syn_mon_AMZI[3] c.c2_syn_mon_AMZI[26] c.c1_nrn_mon_AMZI[4] c.c.core2.nrn_x_AMZI_tbuf[2].y c.c1_syn_mon_AMZI[56] c.c1_syn_mon_AMZI[20] c.c2_nrn_mon_AMZI[37] c.c1_nrn_mon_AMZI[74] c.c2_nrn_mon_AMZI[76] c.c2_nrn_mon_AMZI[54] c.c2_nrn_mon_AMZI[71] c.c1_nrn_mon_AMZI[35] c.c2_syn_mon_AMZI[0] c.c2_syn_mon_AMZI[38] c.c1_nrn_mon_AMZI[22] c.c2_nrn_mon_AMZI[88] c.c2_syn_mon_AMZI[49] c.c1_syn_mon_AMZI[65] c.c2_syn_mon_AMZI[73] c.c1_syn_mon_AMZI[34] c.c1_syn_mon_AMZI[9] c.c.core1.syn_x_AMZI_tbuf[0].y c.c.core2.syn_mon_AMZO_sb.sb[2].buf12._y c.c2_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[37] c.c2_nrn_mon_AMZI[63] c.c.core2.nrn_x_AMZI_tbuf[4].y c.c1_nrn_mon_AMZI[77] c.c2_syn_mon_AMZI[13] c.c2_syn_mon_AMZI[41] c.c2_nrn_mon_AMZI[94] c.c1_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[82] c.c1_nrn_mon_AMZI[63] c.c1_nrn_mon_AMZI[25] c.c2_nrn_mon_AMZI[57] c.c1_nrn_mon_AMZI[56] c.c2_nrn_mon_AMZI[78] c.c2_nrn_mon_AMZI[53] c.c1_syn_mon_AMZI[66] c.c1_syn_mon_AMZI[62] c.c1_nrn_mon_AMZI[23] c.c.core2.nrn_mon_AMZO_sb.sb[0].buf12._y c.c2_nrn_mon_AMZI[58] c.c1_nrn_mon_AMZI[47] Line truncated
|
||||
[] Set reset 0
|
||||
c.c.core2.syn_x_AMZI_tbuf[4].y c.c2_syn_mon_AMZI[29] c.c2_nrn_mon_AMZI[30] c.c1_nrn_mon_AMZO[3] c.c2_nrn_mon_AMZO[4] c.c1_syn_mon_AMZI[10] c.c1_nrn_mon_AMZO[6] c.c2_syn_mon_AMZO[4] c.c1_syn_mon_AMZI[68] c.c1_nrn_mon_AMZI[3] c.c2_syn_mon_AMZO[3] c.c2_syn_mon_AMZI[7] c.c1_syn_mon_AMZO[1] c.c2_nrn_mon_AMZO[1] c.c1_nrn_mon_AMZO[2] c.c2_nrn_mon_AMZI[91] c.c2_nrn_mon_AMZO[3] c.c2_nrn_mon_AMZI[70] c.c1_nrn_mon_AMZO[1] c.c2_nrn_mon_AMZI[85] c.c.core2.nrn_x_AMZI_tbuf[0].y c.c2_nrn_mon_AMZO[2] c.c2_syn_mon_AMZI[69] c.c1_syn_mon_AMZI[63] c.c2_nrn_mon_AMZI[84] c.c1_nrn_mon_AMZI[96] c.c1_nrn_mon_AMZO[4] c.c.core1.nrn_x_AMZI_tbuf[0].y c.c2_nrn_mon_AMZO[0] c.c.core2.nrn_x_AMZI_tbuf[5].y c.c1_syn_mon_AMZI[73] c.c2_nrn_mon_AMZI[31] c.c1_syn_mon_AMZI[58] c.c1_syn_mon_AMZI[45] c.c.core2.nrn_x_AMZI_tbuf[6].y c.c2_nrn_mon_AMZI[82] c.c1_nrn_mon_AMZI[43] c.c1_syn_mon_AMZI[7] c.c2_syn_mon_AMZI[12] c.c2_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[9] c.c.core1.nrn_x_AMZI_tbuf[1].y c.c.core2.syn_x_AMZI_tbuf[2].y c.c1_syn_mon_AMZI[59] c.c2_nrn_mon_AMZI[90] c.c1_syn_mon_AMZI[37] c.c.core1.syn_x_AMZI_tbuf[3].y c.c2_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[1] c.c1_syn_mon_AMZO[2] c.c2_syn_mon_AMZI[72] c.c1_syn_mon_AMZI[39] c.c1_nrn_mon_AMZI[68] c.c1_nrn_mon_AMZI[62] c.c2_nrn_mon_AMZO[5] c.c.core1.nrn_x_AMZI_tbuf[4].y c.c2_nrn_mon_AMZI[89] c.c.core2.syn_x_AMZI_tbuf[3].y c.c.core1.syn_x_AMZI_tbuf[2].y c.c2_syn_mon_AMZI[35] c.c2_nrn_mon_AMZI[102] c.c1_syn_mon_AMZI[6] c.c2_nrn_mon_AMZI[74] c.c2_nrn_mon_AMZI[25] c.c2_nrn_mon_AMZI[79] c.c1_syn_mon_AMZI[50] c.c1_nrn_mon_AMZI[75] c.c2_syn_mon_AMZO[0] c.c.core2.syn_x_AMZI_tbuf[1].y c.c2_syn_mon_AMZI[63] c.c1_syn_mon_AMZI[55] c.c1_nrn_mon_AMZI[60] c.c2_syn_mon_AMZI[33] c.c1_syn_mon_AMZO[4] c.c2_nrn_mon_AMZI[41] c.c1_nrn_mon_AMZI[92] c.c2_syn_mon_AMZI[24] c.c1_syn_mon_AMZO[0] c.c1_nrn_mon_AMZI[39] c.c2_syn_mon_AMZI[66] c.c1_nrn_mon_AMZI[69] c.c.core1.nrn_x_AMZI_tbuf[3].y c.c2_nrn_mon_AMZI[3] c.c1_nrn_mon_AMZO[0] c.c1_syn_mon_AMZI[72] c.c1_nrn_mon_AMZI[104] c.c.core1.nrn_mon_AMZO_sb.sb[6].buf12._y c.c1_nrn_mon_AMZI[98] c.c2_nrn_mon_AMZI[20] c.c2_nrn_mon_AMZI[12] c.c.core1.nrn_x_AMZI_tbuf[2].y c.c2_syn_mon_AMZI[71] c.c1_nrn_mon_AMZO[5] c.c1_syn_mon_AMZO[3] c.c2_nrn_mon_AMZI[48] c.c1_syn_mon_AMZI[17] c.c1_nrn_mon_AMZI[1] c.c1_syn_mon_AMZI[64] c.c2_syn_mon_AMZI[32] c.c.core2.nrn_x_AMZI_tbuf[3].y c.c2_nrn_mon_AMZI[101] c.c.core1.syn_x_AMZI_tbuf[4].y c.c.core2.nrn_x_AMZI_tbuf[1].y c.c2_syn_mon_AMZI[4] c.c2_nrn_mon_AMZI[64] c.c.core1.nrn_x_AMZI_tbuf[5].y c.c2_syn_mon_AMZI[65] c.c2_nrn_mon_AMZI[24] c.c2_nrn_mon_AMZI[8] c.c2_nrn_mon_AMZI[97] c.c2_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[41] c.c.core1.syn_x_AMZI_tbuf[1].y c.c1_syn_mon_AMZI[51] c.c2_nrn_mon_AMZI[50] c.c2_nrn_mon_AMZI[69] c.c1_syn_mon_AMZI[31] c.c.core2.syn_mon_AMZO_sb.sb[1].buf12._y c.c1_nrn_mon_AMZI[54] c.c2_nrn_mon_AMZI[16] c.c.core2.syn_x_AMZI_tbuf[0].y c.c1_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[52] c.c2_nrn_mon_AMZI[100] c.c1_syn_mon_AMZI[47] c.c2_nrn_mon_AMZO[6] c.c.core1.nrn_x_AMZI_tbuf[6].y c.c2_nrn_mon_AMZI[27] c.c1_nrn_mon_AMZI[57] c.c1_nrn_mon_AMZI[44] c.c2_nrn_mon_AMZI[96] c.c1_nrn_mon_AMZI[34] c.c2_nrn_mon_AMZI[26] c.c2_nrn_mon_AMZI[32] c.c1_nrn_mon_AMZI[16] c.c1_nrn_mon_AMZI[8] c.c2_syn_mon_AMZO[1] c.c1_syn_mon_AMZI[40] c.c1_nrn_mon_AMZI[0] c.c2_nrn_mon_AMZI[35] c.c1_nrn_mon_AMZI[72] c.c1_nrn_mon_AMZI[87] c.c1_syn_mon_AMZI[26] c.c2_syn_mon_AMZI[34] c.c2_syn_mon_AMZI[8] c.c1_nrn_mon_AMZI[81] c.c2_syn_mon_AMZI[44] c.c.core2.nrn_mon_AMZO_sb.sb[3].buf12._y c.c2_nrn_mon_AMZI[62] c.c2_syn_mon_AMZI[9] c.c1_nrn_mon_AMZI[11] c.c2_nrn_mon_AMZI[13] c.c1_nrn_mon_AMZI[19] c.c2_nrn_mon_AMZI[87] c.c2_syn_mon_AMZI[18] c.c1_nrn_mon_AMZI[7] c.c1_nrn_mon_AMZI[85] c.c1_nrn_mon_AMZI[88] c.c1_syn_mon_AMZI[35] c.c2_syn_mon_AMZI[10] c.c1_syn_mon_AMZI[5] c.c2_syn_mon_AMZI[39] c.c2_nrn_mon_AMZI[2] c.c1_nrn_mon_AMZI[70] c.c1_nrn_mon_AMZI[80] c.c2_nrn_mon_AMZI[14] c.c2_nrn_mon_AMZI[7] c.c1_nrn_mon_AMZI[95] c.c1_syn_mon_AMZI[25] c.c2_nrn_mon_AMZI[47] c.c1_syn_mon_AMZI[3] c.c2_syn_mon_AMZI[26] c.c1_nrn_mon_AMZI[4] c.c.core2.nrn_x_AMZI_tbuf[2].y c.c1_syn_mon_AMZI[56] c.c1_syn_mon_AMZI[20] c.c2_nrn_mon_AMZI[37] c.c1_nrn_mon_AMZI[74] c.c2_nrn_mon_AMZI[76] c.c2_nrn_mon_AMZI[54] c.c2_nrn_mon_AMZI[71] c.c1_nrn_mon_AMZI[35] c.c2_syn_mon_AMZI[0] c.c2_syn_mon_AMZI[38] c.c1_nrn_mon_AMZI[22] c.c2_nrn_mon_AMZI[88] c.c2_syn_mon_AMZI[49] c.c1_syn_mon_AMZI[65] c.c2_syn_mon_AMZI[73] c.c1_syn_mon_AMZI[34] c.c1_syn_mon_AMZI[9] c.c.core1.syn_x_AMZI_tbuf[0].y c.c.core2.syn_mon_AMZO_sb.sb[2].buf12._y c.c2_syn_mon_AMZI[21] c.c2_syn_mon_AMZI[37] c.c2_nrn_mon_AMZI[63] c.c.core2.nrn_x_AMZI_tbuf[4].y c.c1_nrn_mon_AMZI[77] c.c2_syn_mon_AMZI[13] c.c2_syn_mon_AMZI[41] c.c2_nrn_mon_AMZI[94] c.c1_syn_mon_AMZI[70] c.c1_nrn_mon_AMZI[82] c.c1_nrn_mon_AMZI[63] c.c1_nrn_mon_AMZI[25] c.c2_nrn_mon_AMZI[57] c.c1_nrn_mon_AMZI[56] c.c2_nrn_mon_AMZI[78] c.c2_nrn_mon_AMZI[53] c.c1_syn_mon_AMZI[66] c.c1_syn_mon_AMZI[62] c.c1_nrn_mon_AMZI[23] c.c.core2.nrn_mon_AMZO_sb.sb[0].buf12._y c.c2_nrn_mon_AMZI[58] c.c1_nrn_mon_AMZI[47] Line truncated
|
||||
[] Writing 300877 to core 0 address 7
|
||||
[] Removing input
|
||||
[] Writing 8168774 to core 0 address 8
|
||||
[] Removing input
|
||||
[] Writing 6819022 to core 0 address 9
|
||||
[] Removing input
|
||||
[] Writing 7066908 to core 0 address 10
|
||||
[] Removing input
|
||||
[] Writing 6007478 to core 0 address 11
|
||||
[] Removing input
|
||||
[] Writing 1796383 to core 0 address 12
|
||||
[] Removing input
|
||||
[] Writing 529499 to core 0 address 13
|
||||
[] Removing input
|
||||
[] Writing 8339184 to core 0 address 14
|
||||
[] Removing input
|
||||
[] Writing 4473171 to core 0 address 15
|
||||
[] Removing input
|
||||
[] Writing 4098327 to core 0 address 16
|
||||
[] Removing input
|
||||
[] Writing 7375816 to core 0 address 17
|
||||
[] Removing input
|
||||
[] Writing 1483731 to core 0 address 18
|
||||
[] Removing input
|
||||
[] Writing 124808 to core 0 address 19
|
||||
[] Removing input
|
||||
[] Writing 6345504 to core 0 address 20
|
||||
[] Removing input
|
||||
[] Writing 4703565 to core 0 address 21
|
||||
[] Removing input
|
||||
[] Writing 545667 to core 0 address 22
|
||||
[] Removing input
|
||||
[] Writing 2934273 to core 0 address 23
|
||||
[] Removing input
|
||||
[] Writing 8068256 to core 0 address 24
|
||||
[] Removing input
|
||||
[] Writing 362058 to core 0 address 25
|
||||
[] Removing input
|
||||
[] Writing 7133693 to core 0 address 26
|
||||
[] Removing input
|
||||
[] Writing 6208620 to core 0 address 27
|
||||
[] Removing input
|
||||
[] Writing 3246295 to core 0 address 28
|
||||
[] Removing input
|
||||
[] Writing 4950819 to core 0 address 29
|
||||
[] Removing input
|
||||
[] Writing 3427279 to core 0 address 30
|
||||
[] Removing input
|
||||
[] Writing 2161769 to core 0 address 31
|
||||
[] Removing input
|
||||
[] Writing 803373 to core 0 address 32
|
||||
[] Removing input
|
||||
[] Writing 3512045 to core 0 address 33
|
||||
[] Removing input
|
||||
[] Writing 5493302 to core 0 address 34
|
||||
[] Removing input
|
||||
[] Writing 8360505 to core 0 address 35
|
||||
[] Removing input
|
||||
[] Writing 3587872 to core 0 address 36
|
||||
[] Removing input
|
||||
[] Writing 2663456 to core 0 address 37
|
||||
[] Removing input
|
||||
[] Writing 7317802 to core 0 address 38
|
||||
[] Removing input
|
||||
[] Writing 7819386 to core 0 address 39
|
||||
[] Removing input
|
||||
[] Writing 4933143 to core 0 address 40
|
||||
[] Removing input
|
||||
[] Writing 977823 to core 0 address 41
|
||||
[] Removing input
|
||||
[] Writing 1264214 to core 0 address 42
|
||||
[] Removing input
|
||||
[] Writing 2486191 to core 0 address 43
|
||||
[] Removing input
|
||||
[] Writing 6442835 to core 0 address 44
|
||||
[] Removing input
|
||||
[] Writing 3170993 to core 0 address 45
|
||||
[] Removing input
|
||||
[] Writing 6668057 to core 0 address 46
|
||||
[] Removing input
|
||||
[] Writing 4318000 to core 0 address 47
|
||||
[] Removing input
|
||||
[] Writing 8011 to core 0 address 48
|
||||
[] Removing input
|
||||
[] Writing 7587516 to core 0 address 49
|
||||
[] Removing input
|
||||
[] Writing 7421115 to core 0 address 50
|
||||
[] Removing input
|
||||
[] Writing 1427337 to core 0 address 51
|
||||
[] Removing input
|
||||
[] Writing 5447713 to core 0 address 52
|
||||
[] Removing input
|
||||
[] Writing 4562783 to core 0 address 53
|
||||
[] Removing input
|
||||
[] Writing 129309 to core 0 address 54
|
||||
[] Removing input
|
||||
[] Writing 8162919 to core 0 address 55
|
||||
[] Removing input
|
||||
[] Writing 7209585 to core 0 address 56
|
||||
[] Removing input
|
||||
[] Writing 985012 to core 0 address 57
|
||||
[] Removing input
|
||||
[] Writing 269199 to core 0 address 58
|
||||
[] Removing input
|
||||
[] Writing 2817667 to core 0 address 59
|
||||
[] Removing input
|
||||
[] Writing 2771837 to core 0 address 60
|
||||
[] Removing input
|
||||
[] Writing 1588573 to core 0 address 61
|
||||
[] Removing input
|
||||
[] Writing 3092595 to core 0 address 62
|
||||
[] Removing input
|
||||
[] Writing 8138343 to core 0 address 63
|
||||
[] Removing input
|
||||
[] Writing 2993408 to core 1 address 7
|
||||
[] Removing input
|
||||
[] Writing 6012528 to core 1 address 8
|
||||
[] Removing input
|
||||
[] Writing 7667645 to core 1 address 9
|
||||
[] Removing input
|
||||
[] Writing 7943676 to core 1 address 10
|
||||
[] Removing input
|
||||
[] Writing 5944430 to core 1 address 11
|
||||
[] Removing input
|
||||
[] Writing 5096299 to core 1 address 12
|
||||
[] Removing input
|
||||
[] Writing 4202109 to core 1 address 13
|
||||
[] Removing input
|
||||
[] Writing 5685461 to core 1 address 14
|
||||
[] Removing input
|
||||
[] Writing 2770749 to core 1 address 15
|
||||
[] Removing input
|
||||
[] Writing 8059196 to core 1 address 16
|
||||
[] Removing input
|
||||
[] Writing 6488647 to core 1 address 17
|
||||
[] Removing input
|
||||
[] Writing 4471476 to core 1 address 18
|
||||
[] Removing input
|
||||
[] Writing 2326036 to core 1 address 19
|
||||
[] Removing input
|
||||
[] Writing 2198419 to core 1 address 20
|
||||
[] Removing input
|
||||
[] Writing 8031160 to core 1 address 21
|
||||
[] Removing input
|
||||
[] Writing 2158838 to core 1 address 22
|
||||
[] Removing input
|
||||
[] Writing 1621672 to core 1 address 23
|
||||
[] Removing input
|
||||
[] Writing 3819036 to core 1 address 24
|
||||
[] Removing input
|
||||
[] Writing 4857680 to core 1 address 25
|
||||
[] Removing input
|
||||
[] Writing 1164285 to core 1 address 26
|
||||
[] Removing input
|
||||
[] Writing 1816084 to core 1 address 27
|
||||
[] Removing input
|
||||
[] Writing 6794001 to core 1 address 28
|
||||
[] Removing input
|
||||
[] Writing 8055516 to core 1 address 29
|
||||
[] Removing input
|
||||
[] Writing 1903302 to core 1 address 30
|
||||
[] Removing input
|
||||
[] Writing 1512973 to core 1 address 31
|
||||
[] Removing input
|
||||
[] Writing 6365867 to core 1 address 32
|
||||
[] Removing input
|
||||
[] Writing 315176 to core 1 address 33
|
||||
[] Removing input
|
||||
[] Writing 5480951 to core 1 address 34
|
||||
[] Removing input
|
||||
[] Writing 6176549 to core 1 address 35
|
||||
[] Removing input
|
||||
[] Writing 360901 to core 1 address 36
|
||||
[] Removing input
|
||||
[] Writing 5805656 to core 1 address 37
|
||||
[] Removing input
|
||||
[] Writing 8079434 to core 1 address 38
|
||||
[] Removing input
|
||||
[] Writing 5656698 to core 1 address 39
|
||||
[] Removing input
|
||||
[] Writing 293288 to core 1 address 40
|
||||
[] Removing input
|
||||
[] Writing 618263 to core 1 address 41
|
||||
[] Removing input
|
||||
[] Writing 4764604 to core 1 address 42
|
||||
[] Removing input
|
||||
[] Writing 3710081 to core 1 address 43
|
||||
[] Removing input
|
||||
[] Writing 3568756 to core 1 address 44
|
||||
[] Removing input
|
||||
[] Writing 7975113 to core 1 address 45
|
||||
[] Removing input
|
||||
[] Writing 6975302 to core 1 address 46
|
||||
[] Removing input
|
||||
[] Writing 2858147 to core 1 address 47
|
||||
[] Removing input
|
||||
[] Writing 3333423 to core 1 address 48
|
||||
[] Removing input
|
||||
[] Writing 3592276 to core 1 address 49
|
||||
[] Removing input
|
||||
[] Writing 349968 to core 1 address 50
|
||||
[] Removing input
|
||||
[] Writing 244972 to core 1 address 51
|
||||
[] Removing input
|
||||
[] Writing 7010796 to core 1 address 52
|
||||
[] Removing input
|
||||
[] Writing 7204557 to core 1 address 53
|
||||
[] Removing input
|
||||
[] Writing 5858103 to core 1 address 54
|
||||
[] Removing input
|
||||
[] Writing 6909525 to core 1 address 55
|
||||
[] Removing input
|
||||
[] Writing 8130905 to core 1 address 56
|
||||
[] Removing input
|
||||
[] Writing 4877284 to core 1 address 57
|
||||
[] Removing input
|
||||
[] Writing 3384251 to core 1 address 58
|
||||
[] Removing input
|
||||
[] Writing 2819200 to core 1 address 59
|
||||
[] Removing input
|
||||
[] Writing 1126121 to core 1 address 60
|
||||
[] Removing input
|
||||
[] Writing 3722713 to core 1 address 61
|
||||
[] Removing input
|
||||
[] Writing 1683718 to core 1 address 62
|
||||
[] Removing input
|
||||
[] Writing 4969626 to core 1 address 63
|
||||
[] Removing input
|
||||
[] Reading core 0 address 7
|
||||
[] Removing input
|
||||
[] Receiving output 300877 from core 0 register 7
|
||||
[] Reading core 0 address 8
|
||||
[] Removing input
|
||||
[] Receiving output 8168774 from core 0 register 8
|
||||
[] Reading core 0 address 9
|
||||
[] Removing input
|
||||
[] Receiving output 6819022 from core 0 register 9
|
||||
[] Reading core 0 address 10
|
||||
[] Removing input
|
||||
[] Receiving output 7066908 from core 0 register 10
|
||||
[] Reading core 0 address 11
|
||||
[] Removing input
|
||||
[] Receiving output 6007478 from core 0 register 11
|
||||
[] Reading core 0 address 12
|
||||
[] Removing input
|
||||
[] Receiving output 1796383 from core 0 register 12
|
||||
[] Reading core 0 address 13
|
||||
[] Removing input
|
||||
[] Receiving output 529499 from core 0 register 13
|
||||
[] Reading core 0 address 14
|
||||
[] Removing input
|
||||
[] Receiving output 8339184 from core 0 register 14
|
||||
[] Reading core 0 address 15
|
||||
[] Removing input
|
||||
[] Receiving output 4473171 from core 0 register 15
|
||||
[] Reading core 0 address 16
|
||||
[] Removing input
|
||||
[] Receiving output 4098327 from core 0 register 16
|
||||
[] Reading core 0 address 17
|
||||
[] Removing input
|
||||
[] Receiving output 7375816 from core 0 register 17
|
||||
[] Reading core 0 address 18
|
||||
[] Removing input
|
||||
[] Receiving output 1483731 from core 0 register 18
|
||||
[] Reading core 0 address 19
|
||||
[] Removing input
|
||||
[] Receiving output 124808 from core 0 register 19
|
||||
[] Reading core 0 address 20
|
||||
[] Removing input
|
||||
[] Receiving output 6345504 from core 0 register 20
|
||||
[] Reading core 0 address 21
|
||||
[] Removing input
|
||||
[] Receiving output 4703565 from core 0 register 21
|
||||
[] Reading core 0 address 22
|
||||
[] Removing input
|
||||
[] Receiving output 545667 from core 0 register 22
|
||||
[] Reading core 0 address 23
|
||||
[] Removing input
|
||||
[] Receiving output 2934273 from core 0 register 23
|
||||
[] Reading core 0 address 24
|
||||
[] Removing input
|
||||
[] Receiving output 8068256 from core 0 register 24
|
||||
[] Reading core 0 address 25
|
||||
[] Removing input
|
||||
[] Receiving output 362058 from core 0 register 25
|
||||
[] Reading core 0 address 26
|
||||
[] Removing input
|
||||
[] Receiving output 7133693 from core 0 register 26
|
||||
[] Reading core 0 address 27
|
||||
[] Removing input
|
||||
[] Receiving output 6208620 from core 0 register 27
|
||||
[] Reading core 0 address 28
|
||||
[] Removing input
|
||||
[] Receiving output 3246295 from core 0 register 28
|
||||
[] Reading core 0 address 29
|
||||
[] Removing input
|
||||
[] Receiving output 4950819 from core 0 register 29
|
||||
[] Reading core 0 address 30
|
||||
[] Removing input
|
||||
[] Receiving output 3427279 from core 0 register 30
|
||||
[] Reading core 0 address 31
|
||||
[] Removing input
|
||||
[] Receiving output 2161769 from core 0 register 31
|
||||
[] Reading core 0 address 32
|
||||
[] Removing input
|
||||
[] Receiving output 803373 from core 0 register 32
|
||||
[] Reading core 0 address 33
|
||||
[] Removing input
|
||||
[] Receiving output 3512045 from core 0 register 33
|
||||
[] Reading core 0 address 34
|
||||
[] Removing input
|
||||
[] Receiving output 5493302 from core 0 register 34
|
||||
[] Reading core 0 address 35
|
||||
[] Removing input
|
||||
[] Receiving output 8360505 from core 0 register 35
|
||||
[] Reading core 0 address 36
|
||||
[] Removing input
|
||||
[] Receiving output 3587872 from core 0 register 36
|
||||
[] Reading core 0 address 37
|
||||
[] Removing input
|
||||
[] Receiving output 2663456 from core 0 register 37
|
||||
[] Reading core 0 address 38
|
||||
[] Removing input
|
||||
[] Receiving output 7317802 from core 0 register 38
|
||||
[] Reading core 0 address 39
|
||||
[] Removing input
|
||||
[] Receiving output 7819386 from core 0 register 39
|
||||
[] Reading core 0 address 40
|
||||
[] Removing input
|
||||
[] Receiving output 4933143 from core 0 register 40
|
||||
[] Reading core 0 address 41
|
||||
[] Removing input
|
||||
[] Receiving output 977823 from core 0 register 41
|
||||
[] Reading core 0 address 42
|
||||
[] Removing input
|
||||
[] Receiving output 1264214 from core 0 register 42
|
||||
[] Reading core 0 address 43
|
||||
[] Removing input
|
||||
[] Receiving output 2486191 from core 0 register 43
|
||||
[] Reading core 0 address 44
|
||||
[] Removing input
|
||||
[] Receiving output 6442835 from core 0 register 44
|
||||
[] Reading core 0 address 45
|
||||
[] Removing input
|
||||
[] Receiving output 3170993 from core 0 register 45
|
||||
[] Reading core 0 address 46
|
||||
[] Removing input
|
||||
[] Receiving output 6668057 from core 0 register 46
|
||||
[] Reading core 0 address 47
|
||||
[] Removing input
|
||||
[] Receiving output 4318000 from core 0 register 47
|
||||
[] Reading core 0 address 48
|
||||
[] Removing input
|
||||
[] Receiving output 8011 from core 0 register 48
|
||||
[] Reading core 0 address 49
|
||||
[] Removing input
|
||||
[] Receiving output 7587516 from core 0 register 49
|
||||
[] Reading core 0 address 50
|
||||
[] Removing input
|
||||
[] Receiving output 7421115 from core 0 register 50
|
||||
[] Reading core 0 address 51
|
||||
[] Removing input
|
||||
[] Receiving output 1427337 from core 0 register 51
|
||||
[] Reading core 0 address 52
|
||||
[] Removing input
|
||||
[] Receiving output 5447713 from core 0 register 52
|
||||
[] Reading core 0 address 53
|
||||
[] Removing input
|
||||
[] Receiving output 4562783 from core 0 register 53
|
||||
[] Reading core 0 address 54
|
||||
[] Removing input
|
||||
[] Receiving output 129309 from core 0 register 54
|
||||
[] Reading core 0 address 55
|
||||
[] Removing input
|
||||
[] Receiving output 8162919 from core 0 register 55
|
||||
[] Reading core 0 address 56
|
||||
[] Removing input
|
||||
[] Receiving output 7209585 from core 0 register 56
|
||||
[] Reading core 0 address 57
|
||||
[] Removing input
|
||||
[] Receiving output 985012 from core 0 register 57
|
||||
[] Reading core 0 address 58
|
||||
[] Removing input
|
||||
[] Receiving output 269199 from core 0 register 58
|
||||
[] Reading core 0 address 59
|
||||
[] Removing input
|
||||
[] Receiving output 2817667 from core 0 register 59
|
||||
[] Reading core 0 address 60
|
||||
[] Removing input
|
||||
[] Receiving output 2771837 from core 0 register 60
|
||||
[] Reading core 0 address 61
|
||||
[] Removing input
|
||||
[] Receiving output 1588573 from core 0 register 61
|
||||
[] Reading core 0 address 62
|
||||
[] Removing input
|
||||
[] Receiving output 3092595 from core 0 register 62
|
||||
[] Reading core 0 address 63
|
||||
[] Removing input
|
||||
[] Receiving output 8138343 from core 0 register 63
|
||||
[] Reading core 1 address 7
|
||||
[] Removing input
|
||||
[] Receiving output 2993408 from core 1 register 7
|
||||
[] Reading core 1 address 8
|
||||
[] Removing input
|
||||
[] Receiving output 6012528 from core 1 register 8
|
||||
[] Reading core 1 address 9
|
||||
[] Removing input
|
||||
[] Receiving output 7667645 from core 1 register 9
|
||||
[] Reading core 1 address 10
|
||||
[] Removing input
|
||||
[] Receiving output 7943676 from core 1 register 10
|
||||
[] Reading core 1 address 11
|
||||
[] Removing input
|
||||
[] Receiving output 5944430 from core 1 register 11
|
||||
[] Reading core 1 address 12
|
||||
[] Removing input
|
||||
[] Receiving output 5096299 from core 1 register 12
|
||||
[] Reading core 1 address 13
|
||||
[] Removing input
|
||||
[] Receiving output 4202109 from core 1 register 13
|
||||
[] Reading core 1 address 14
|
||||
[] Removing input
|
||||
[] Receiving output 5685461 from core 1 register 14
|
||||
[] Reading core 1 address 15
|
||||
[] Removing input
|
||||
[] Receiving output 2770749 from core 1 register 15
|
||||
[] Reading core 1 address 16
|
||||
[] Removing input
|
||||
[] Receiving output 8059196 from core 1 register 16
|
||||
[] Reading core 1 address 17
|
||||
[] Removing input
|
||||
[] Receiving output 6488647 from core 1 register 17
|
||||
[] Reading core 1 address 18
|
||||
[] Removing input
|
||||
[] Receiving output 4471476 from core 1 register 18
|
||||
[] Reading core 1 address 19
|
||||
[] Removing input
|
||||
[] Receiving output 2326036 from core 1 register 19
|
||||
[] Reading core 1 address 20
|
||||
[] Removing input
|
||||
[] Receiving output 2198419 from core 1 register 20
|
||||
[] Reading core 1 address 21
|
||||
[] Removing input
|
||||
[] Receiving output 8031160 from core 1 register 21
|
||||
[] Reading core 1 address 22
|
||||
[] Removing input
|
||||
[] Receiving output 2158838 from core 1 register 22
|
||||
[] Reading core 1 address 23
|
||||
[] Removing input
|
||||
[] Receiving output 1621672 from core 1 register 23
|
||||
[] Reading core 1 address 24
|
||||
[] Removing input
|
||||
[] Receiving output 3819036 from core 1 register 24
|
||||
[] Reading core 1 address 25
|
||||
[] Removing input
|
||||
[] Receiving output 4857680 from core 1 register 25
|
||||
[] Reading core 1 address 26
|
||||
[] Removing input
|
||||
[] Receiving output 1164285 from core 1 register 26
|
||||
[] Reading core 1 address 27
|
||||
[] Removing input
|
||||
[] Receiving output 1816084 from core 1 register 27
|
||||
[] Reading core 1 address 28
|
||||
[] Removing input
|
||||
[] Receiving output 6794001 from core 1 register 28
|
||||
[] Reading core 1 address 29
|
||||
[] Removing input
|
||||
[] Receiving output 8055516 from core 1 register 29
|
||||
[] Reading core 1 address 30
|
||||
[] Removing input
|
||||
[] Receiving output 1903302 from core 1 register 30
|
||||
[] Reading core 1 address 31
|
||||
[] Removing input
|
||||
[] Receiving output 1512973 from core 1 register 31
|
||||
[] Reading core 1 address 32
|
||||
[] Removing input
|
||||
[] Receiving output 6365867 from core 1 register 32
|
||||
[] Reading core 1 address 33
|
||||
[] Removing input
|
||||
[] Receiving output 315176 from core 1 register 33
|
||||
[] Reading core 1 address 34
|
||||
[] Removing input
|
||||
[] Receiving output 5480951 from core 1 register 34
|
||||
[] Reading core 1 address 35
|
||||
[] Removing input
|
||||
[] Receiving output 6176549 from core 1 register 35
|
||||
[] Reading core 1 address 36
|
||||
[] Removing input
|
||||
[] Receiving output 360901 from core 1 register 36
|
||||
[] Reading core 1 address 37
|
||||
[] Removing input
|
||||
[] Receiving output 5805656 from core 1 register 37
|
||||
[] Reading core 1 address 38
|
||||
[] Removing input
|
||||
[] Receiving output 8079434 from core 1 register 38
|
||||
[] Reading core 1 address 39
|
||||
[] Removing input
|
||||
[] Receiving output 5656698 from core 1 register 39
|
||||
[] Reading core 1 address 40
|
||||
[] Removing input
|
||||
[] Receiving output 293288 from core 1 register 40
|
||||
[] Reading core 1 address 41
|
||||
[] Removing input
|
||||
[] Receiving output 618263 from core 1 register 41
|
||||
[] Reading core 1 address 42
|
||||
[] Removing input
|
||||
[] Receiving output 4764604 from core 1 register 42
|
||||
[] Reading core 1 address 43
|
||||
[] Removing input
|
||||
[] Receiving output 3710081 from core 1 register 43
|
||||
[] Reading core 1 address 44
|
||||
[] Removing input
|
||||
[] Receiving output 3568756 from core 1 register 44
|
||||
[] Reading core 1 address 45
|
||||
[] Removing input
|
||||
[] Receiving output 7975113 from core 1 register 45
|
||||
[] Reading core 1 address 46
|
||||
[] Removing input
|
||||
[] Receiving output 6975302 from core 1 register 46
|
||||
[] Reading core 1 address 47
|
||||
[] Removing input
|
||||
[] Receiving output 2858147 from core 1 register 47
|
||||
[] Reading core 1 address 48
|
||||
[] Removing input
|
||||
[] Receiving output 3333423 from core 1 register 48
|
||||
[] Reading core 1 address 49
|
||||
[] Removing input
|
||||
[] Receiving output 3592276 from core 1 register 49
|
||||
[] Reading core 1 address 50
|
||||
[] Removing input
|
||||
[] Receiving output 349968 from core 1 register 50
|
||||
[] Reading core 1 address 51
|
||||
[] Removing input
|
||||
[] Receiving output 244972 from core 1 register 51
|
||||
[] Reading core 1 address 52
|
||||
[] Removing input
|
||||
[] Receiving output 7010796 from core 1 register 52
|
||||
[] Reading core 1 address 53
|
||||
[] Removing input
|
||||
[] Receiving output 7204557 from core 1 register 53
|
||||
[] Reading core 1 address 54
|
||||
[] Removing input
|
||||
[] Receiving output 5858103 from core 1 register 54
|
||||
[] Reading core 1 address 55
|
||||
[] Removing input
|
||||
[] Receiving output 6909525 from core 1 register 55
|
||||
[] Reading core 1 address 56
|
||||
[] Removing input
|
||||
[] Receiving output 8130905 from core 1 register 56
|
||||
[] Reading core 1 address 57
|
||||
[] Removing input
|
||||
[] Receiving output 4877284 from core 1 register 57
|
||||
[] Reading core 1 address 58
|
||||
[] Removing input
|
||||
[] Receiving output 3384251 from core 1 register 58
|
||||
[] Reading core 1 address 59
|
||||
[] Removing input
|
||||
[] Receiving output 2819200 from core 1 register 59
|
||||
[] Reading core 1 address 60
|
||||
[] Removing input
|
||||
[] Receiving output 1126121 from core 1 register 60
|
||||
[] Reading core 1 address 61
|
||||
[] Removing input
|
||||
[] Receiving output 3722713 from core 1 register 61
|
||||
[] Reading core 1 address 62
|
||||
[] Removing input
|
||||
[] Receiving output 1683718 from core 1 register 62
|
||||
[] Reading core 1 address 63
|
||||
[] Removing input
|
||||
[] Receiving output 4969626 from core 1 register 63
|
||||
[] Writing 121 to core 0 address 2
|
||||
[] Removing input
|
||||
[] Writing 1 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Writing 0 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Writing 7 to core 0 address 4
|
||||
[] Removing input
|
||||
[] Writing 5 to core 0 address 3
|
||||
[] Removing input
|
||||
[] Writing 2 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Writing 33 to core 0 address 0
|
||||
[] Writing 4 to core 0 address 1
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [0,0]
|
||||
2629574808 c.c1_synapses[0].r : 1 [by c.c1_syn_grid._and_grid.ands[0]._y:=0]
|
||||
2633725774 c.c1_synapses[0].r : 0 [by c.c1_syn_grid._and_grid.ands[0]._y:=1]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [6,211]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [4,216]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [1,161]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [3,247]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [14,261]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [0,342]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [14,31]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [13,288]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [14,105]
|
||||
[] Removing input
|
||||
[] Sending spike to core 0 synapse [14,311]
|
||||
[] Removing input
|
||||
[] Neuron [0,0] in core 0 spikes
|
||||
[] Receiving output spike [0,0]
|
||||
[] Neuron [3,5] in core 0 spikes
|
||||
[] Receiving output spike [3,5]
|
||||
[] Neuron [7,0] in core 0 spikes
|
||||
[] Receiving output spike [7,0]
|
||||
[] Neuron [7,2] in core 0 spikes
|
||||
[] Receiving output spike [7,2]
|
||||
[] Neuron [9,2] in core 0 spikes
|
||||
[] Receiving output spike [9,2]
|
||||
[] Neuron [2,2] in core 0 spikes
|
||||
[] Receiving output spike [2,2]
|
||||
[] Neuron [14,5] in core 0 spikes
|
||||
[] Receiving output spike [14,5]
|
||||
[] Neuron [9,5] in core 0 spikes
|
||||
[] Receiving output spike [9,5]
|
||||
[] Neuron [2,1] in core 0 spikes
|
||||
[] Receiving output spike [2,1]
|
||||
[] Neuron [5,5] in core 0 spikes
|
||||
[] Receiving output spike [5,5]
|
||||
[] Neuron [10,0] in core 0 spikes
|
||||
[] Receiving output spike [10,0]
|
||||
[] Neuron [12,2] in core 0 spikes
|
||||
[] Receiving output spike [12,2]
|
||||
[] Neuron [9,2] in core 0 spikes
|
||||
[] Receiving output spike [9,2]
|
||||
[] Neuron [6,3] in core 0 spikes
|
||||
[] Receiving output spike [6,3]
|
||||
[] Neuron [8,2] in core 0 spikes
|
||||
[] Receiving output spike [8,2]
|
||||
[] Neuron [3,1] in core 0 spikes
|
||||
[] Receiving output spike [3,1]
|
||||
[] Neuron [14,5] in core 0 spikes
|
||||
[] Receiving output spike [14,5]
|
||||
[] Neuron [14,4] in core 0 spikes
|
||||
[] Receiving output spike [14,4]
|
||||
[] Neuron [12,5] in core 0 spikes
|
||||
[] Receiving output spike [12,5]
|
||||
[] Neuron [8,5] in core 0 spikes
|
||||
[] Receiving output spike [8,5]
|
||||
c.c1_synapses[1174].a c.c.core2.syn_AMZO_keeps[4].y c.c1_synapses[4736].a c.c1_synapses[829].a c.c2_synapses[1335].a c.c1_synapses[4427].a c.c1_synapses[1005].a c.c2_synapses[11].a c.c1_synapses[4899].a c.c1_synapses[3806].a c.c2_synapses[4443].a c.c._bd2qdi.dly.dly[6].bufchain[12].y c.c2_synapses[1783].a c.c1_synapses[4773].a c.c1_synapses[4411].a c.c1_synapses[4198].a c.c1_synapses[4139].a c.c1_synapses[2572].a c.c2_synapses[746].a c.c1_synapses[2784].a c.c2_syn_mon_AMZI[29] c.c2_synapses[1884].a c.c1_synapses[518].a c.c2_synapses[5084].a c.c2_synapses[2137].a c.c2_synapses[2707].a c.c2_synapses[2537].a c.c1_synapses[4573].a c.c._bd2qdi._reqXX[0] c.c1_synapses[130].a c.c1_synapses[3156].a c.c1_synapses[729].a c.c1_synapses[199].a c.c._bd2qdi.dly.dly[11].bufchain[13]._y c.c2_synapses[5041].a c.c2_synapses[4198].a c.c2_synapses[3196].a c.c1_synapses[1894].a c.c2_synapses[2223].a c.c2_nrn_mon_AMZI[30] c.c1_synapses[1640].a c.c1_synapses[4493].a c.c._bd2qdi.dly.dly[1].bufchain[1].y c.c1_synapses[2321].a c.c2_synapses[4600].a c.c1_synapses[5207].a c.c1_nrn_mon_AMZO[3] c.c2_synapses[2403].a c.c2_nrn_mon_AMZO[4] c.c1_synapses[2345].a c.c1_syn_mon_AMZI[10] c.c2_synapses[1233].a c.c2_synapses[1825].a c.c2_synapses[4671].a c.c1_synapses[3973].a c.c1_synapses[3743].a c.c2_synapses[4240].a c.c2_synapses[287].a c.c1_synapses[1119].a c.c1_synapses[4782].a c.c._bd2qdi.dly.mu2[3]._s c.c1_synapses[3471].a c.c2_synapses[397].a c.c2_synapses[3896].a c.c1_synapses[2183].a c.c1_synapses[702].a c.c1_synapses[1847].a c.c2_synapses[3011].a c.c1_synapses[1883].a c.c2_synapses[621].a c.c1_synapses[307].a c.c2_synapses[3216].a c.c1_synapses[4517].a c.c2_synapses[2443].a c.c1_synapses[2409].a c.c1_synapses[828].a c.c1_synapses[3998].a c.c1_nrn_mon_AMZO[6] c.c1_synapses[31].a c.c2_synapses[1534].a c.c1_synapses[3933].a c.c2_synapses[3931].a c.c2_synapses[2873].a c.c1_synapses[1929].a c.c1_synapses[4335].a c.c2_synapses[2399].a c.c2_synapses[3535].a c.c2_synapses[4818].a c.c2_syn_mon_AMZO[4] c.c2_synapses[4008].a c.c2_synapses[2044].a c.c2_synapses[1263].a c.c2_synapses[2478].a c.c1_synapses[995].a c.c1_synapses[3289].a c.c2_synapses[77].a c.c1_synapses[45].a c.c1_syn_mon_AMZI[68] c.c2_synapses[2552].a c.c1_synapses[1029].a c.c2_synapses[3565].a c.c2_synapses[1464].a c.c1_synapses[1696].a c.c._qdi2bd.dly.dly[7].a c.c2_synapses[1086].a c.c2_synapses[2692].a c.c1_synapses[341].a c.c1_synapses[874].a c.c1_synapses[4758].a c.c2_synapses[1944].a c.c2_synapses[1041].a c.c2_synapses[4545].a c.c._qdi2bd.dly.dly[2].bufchain[10]._y c.c2_neurons[25].r c.c2_synapses[2261].a c.c2_synapses[2620].a c.bd_dly_cfg[2] c.c._bd2qdi.dly.dly[10].bufchain[5].y c.c1_nrn_mon_AMZI[3] c.c2_synapses[603].a c.c2_syn_mon_AMZO[3] c.c1_synapses[5215].a c.c2_synapses[3033].a c.c._bd2qdi.dly2.dly[0].bufchain[10].y c.c2_synapses[1666].a c.c1_synapses[4798].a c.c2_synapses[3597].a c.c1_synapses[697].a c.c1_synapses[1952].a c.c2_synapses[1768].a c.c2_synapses[4265].a c.c1_synapses[3222].a c.c1_synapses[2229].a c.c1_synapses[3359].a c.c1_synapses[1416].a c.c2_synapses[718].a c.c1_synapses[2353].a c.c2_synapses[5080].a c.c1_synapses[3613].a c.c._loopback_dropper.and_f[0].b c.c2_synapses[4387].a c.c2_synapses[2454].a c.c1_synapses[3858].a c.c2_synapses[4802].a c.c2_synapses[1377].a c.c2_synapses[3485].a c.c1_synapses[956].a c.c1_synapses[2964].a c.c1_synapses[1066].a c.c1_synapses[4156].a c.c2_neurons[18].r c.c1_synapses[609].a c.c1_neurons[55].r c.c2_synapses[4037].a c.c2_syn_mon_AMZI[7] c.c2_synapses[1461].a c.c1_synapses[59].a c.c1_synapses[2221].a c.c1_synapses[1179].a c.c._qdi2bd.dly.dly[5].bufchain[13]._y c.c1_synapses[3575].a c.c2_synapses[1432].a c.c2_synapses[710].a c.c2_synapses[1058].a c.c1_synapses[4908].a c.c2_synapses[446].a c.c._qdi2bd.dly.dly[4].bufchain[14].y c.c1_synapses[1374].a c.c1_syn_mon_AMZO[1] c.c2_synapses[1057].a c.c2_synapses[1950].a c.c1_synapses[2898].a c.c2_nrn_mon_AMZO[1] c.c2_synapses[1711].a c.c2_synapses[985].a c.c1_neurons[75].r c.c1_synapses[3455].a c.c1_synapses[296].a c.c1_synapses[641].a c.c1_synapses[3403].a c.c2_synapses[5087].a c.c1_synapses[1690].a c.c1_synapses[687].a c.c1_synapses[1037].a c.c._bd2qdi.dly2.dly[2].bufchain[14].y c.c1_synapses[46].a c.c2_synapses[524].a c.c2_synapses[4209].a c.c1_synapses[2824].a c.c1_synapses[801].a c.c1_synapses[1930].a c.c1_synapses[4007].a c.c2_synapses[627].a c.c1_synapses[1335].a c.c1_synapses[1363].a c.c2_synapses[1716].a c.c1_nrn_mon_AMZO[2] c.c2_synapses[4258].a c.c1_synapses[866].a c.c1_synapses[1715].a c.c2_synapses[407].a c.c1_synapses[3864].a c.c1_synapses[4739].a c.c1_synapses[1258].a c.c1_synapses[326].a c.c2_synapses[4080].a c.c2_synapses[733].a c.c1_synapses[4519].a c.c2_neurons[5].r c.c1_synapses[2148].a c.c2_synapses[1390].a c.c1_synapses[264].a c.c2_synapses[2356].a c.c1_synapses[437].a c.c2_synapses[787].a c.c1_synapses[1467].a c.c2_synapses[1423].a c.c1_synapses[111].a c.c2_synapses[20].a c.c2_synapses[4420].a c.c1_synapses[2460].a c.c1_synapses[4982].a c.c1_synapses[2263].a cLine truncated
|
||||
Node `c.c2_synapses' not found
|
||||
+1064
-3208
File diff suppressed because it is too large.
Load diff
@@ -49,7 +49,7 @@ pint NC_NRN_Y = 3;
|
||||
|
||||
pint N_SYN_X = 15;
|
||||
pint N_SYN_Y = 348;
|
||||
pint NC_SYN_X = 6;
|
||||
pint NC_SYN_X = 4;
|
||||
pint NC_SYN_Y = 9;
|
||||
|
||||
pint N_SYN_DLY_CFG = 4;
|
||||
|
||||
@@ -15119,18 +15119,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [6,211]'"
|
||||
set-bd-data-valid "c.in" 32 13510
|
||||
system "echo '[] Sending spike to core 0 synapse [8,15]'"
|
||||
set-bd-data-valid "c.in" 32 248
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3171].r 1
|
||||
set c.c1_synapses[3171].a 1
|
||||
assert c.c1_synapses[233].r 1
|
||||
set c.c1_synapses[233].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3171].r 0
|
||||
set c.c1_synapses[3171].a 0
|
||||
assert c.c1_synapses[233].r 0
|
||||
set c.c1_synapses[233].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15138,18 +15138,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [4,216]'"
|
||||
set-bd-data-valid "c.in" 32 13828
|
||||
system "echo '[] Sending spike to core 0 synapse [13,291]'"
|
||||
set-bd-data-valid "c.in" 32 4669
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3244].r 1
|
||||
set c.c1_synapses[3244].a 1
|
||||
assert c.c1_synapses[4378].r 1
|
||||
set c.c1_synapses[4378].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3244].r 0
|
||||
set c.c1_synapses[3244].a 0
|
||||
assert c.c1_synapses[4378].r 0
|
||||
set c.c1_synapses[4378].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15157,18 +15157,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [1,161]'"
|
||||
set-bd-data-valid "c.in" 32 10305
|
||||
system "echo '[] Sending spike to core 0 synapse [10,120]'"
|
||||
set-bd-data-valid "c.in" 32 1930
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[2416].r 1
|
||||
set c.c1_synapses[2416].a 1
|
||||
assert c.c1_synapses[1810].r 1
|
||||
set c.c1_synapses[1810].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[2416].r 0
|
||||
set c.c1_synapses[2416].a 0
|
||||
assert c.c1_synapses[1810].r 0
|
||||
set c.c1_synapses[1810].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15176,18 +15176,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [3,247]'"
|
||||
set-bd-data-valid "c.in" 32 15811
|
||||
system "echo '[] Sending spike to core 0 synapse [3,127]'"
|
||||
set-bd-data-valid "c.in" 32 2035
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3708].r 1
|
||||
set c.c1_synapses[3708].a 1
|
||||
assert c.c1_synapses[1908].r 1
|
||||
set c.c1_synapses[1908].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3708].r 0
|
||||
set c.c1_synapses[3708].a 0
|
||||
assert c.c1_synapses[1908].r 0
|
||||
set c.c1_synapses[1908].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15195,18 +15195,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [14,261]'"
|
||||
set-bd-data-valid "c.in" 32 16718
|
||||
system "echo '[] Sending spike to core 0 synapse [0,67]'"
|
||||
set-bd-data-valid "c.in" 32 1072
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3929].r 1
|
||||
set c.c1_synapses[3929].a 1
|
||||
assert c.c1_synapses[1005].r 1
|
||||
set c.c1_synapses[1005].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3929].r 0
|
||||
set c.c1_synapses[3929].a 0
|
||||
assert c.c1_synapses[1005].r 0
|
||||
set c.c1_synapses[1005].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15214,18 +15214,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [0,342]'"
|
||||
set-bd-data-valid "c.in" 32 21888
|
||||
system "echo '[] Sending spike to core 0 synapse [7,323]'"
|
||||
set-bd-data-valid "c.in" 32 5175
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[5130].r 1
|
||||
set c.c1_synapses[5130].a 1
|
||||
assert c.c1_synapses[4852].r 1
|
||||
set c.c1_synapses[4852].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[5130].r 0
|
||||
set c.c1_synapses[5130].a 0
|
||||
assert c.c1_synapses[4852].r 0
|
||||
set c.c1_synapses[4852].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15233,18 +15233,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [14,31]'"
|
||||
set-bd-data-valid "c.in" 32 1998
|
||||
system "echo '[] Sending spike to core 0 synapse [4,167]'"
|
||||
set-bd-data-valid "c.in" 32 2676
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[479].r 1
|
||||
set c.c1_synapses[479].a 1
|
||||
assert c.c1_synapses[2509].r 1
|
||||
set c.c1_synapses[2509].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[479].r 0
|
||||
set c.c1_synapses[479].a 0
|
||||
assert c.c1_synapses[2509].r 0
|
||||
set c.c1_synapses[2509].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15252,18 +15252,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [13,288]'"
|
||||
set-bd-data-valid "c.in" 32 18445
|
||||
system "echo '[] Sending spike to core 0 synapse [14,229]'"
|
||||
set-bd-data-valid "c.in" 32 3678
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4333].r 1
|
||||
set c.c1_synapses[4333].a 1
|
||||
assert c.c1_synapses[3449].r 1
|
||||
set c.c1_synapses[3449].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4333].r 0
|
||||
set c.c1_synapses[4333].a 0
|
||||
assert c.c1_synapses[3449].r 0
|
||||
set c.c1_synapses[3449].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15271,18 +15271,18 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [14,105]'"
|
||||
set-bd-data-valid "c.in" 32 6734
|
||||
system "echo '[] Sending spike to core 0 synapse [7,291]'"
|
||||
set-bd-data-valid "c.in" 32 4663
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[1589].r 1
|
||||
set c.c1_synapses[1589].a 1
|
||||
assert c.c1_synapses[4372].r 1
|
||||
set c.c1_synapses[4372].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[1589].r 0
|
||||
set c.c1_synapses[1589].a 0
|
||||
assert c.c1_synapses[4372].r 0
|
||||
set c.c1_synapses[4372].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
@@ -15290,24 +15290,215 @@ cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [14,311]'"
|
||||
set-bd-data-valid "c.in" 32 19918
|
||||
system "echo '[] Sending spike to core 0 synapse [5,52]'"
|
||||
set-bd-data-valid "c.in" 32 837
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4679].r 1
|
||||
set c.c1_synapses[4679].a 1
|
||||
assert c.c1_synapses[785].r 1
|
||||
set c.c1_synapses[785].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4679].r 0
|
||||
set c.c1_synapses[4679].a 0
|
||||
assert c.c1_synapses[785].r 0
|
||||
set c.c1_synapses[785].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [13,248]'"
|
||||
set-bd-data-valid "c.in" 32 3981
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3733].r 1
|
||||
set c.c1_synapses[3733].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3733].r 0
|
||||
set c.c1_synapses[3733].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [4,231]'"
|
||||
set-bd-data-valid "c.in" 32 3700
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3469].r 1
|
||||
set c.c1_synapses[3469].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3469].r 0
|
||||
set c.c1_synapses[3469].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [6,291]'"
|
||||
set-bd-data-valid "c.in" 32 4662
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4371].r 1
|
||||
set c.c1_synapses[4371].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4371].r 0
|
||||
set c.c1_synapses[4371].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [0,71]'"
|
||||
set-bd-data-valid "c.in" 32 1136
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[1065].r 1
|
||||
set c.c1_synapses[1065].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[1065].r 0
|
||||
set c.c1_synapses[1065].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [7,299]'"
|
||||
set-bd-data-valid "c.in" 32 4791
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4492].r 1
|
||||
set c.c1_synapses[4492].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4492].r 0
|
||||
set c.c1_synapses[4492].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [11,116]'"
|
||||
set-bd-data-valid "c.in" 32 1867
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[1751].r 1
|
||||
set c.c1_synapses[1751].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[1751].r 0
|
||||
set c.c1_synapses[1751].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [11,8]'"
|
||||
set-bd-data-valid "c.in" 32 139
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[131].r 1
|
||||
set c.c1_synapses[131].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[131].r 0
|
||||
set c.c1_synapses[131].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [7,6]'"
|
||||
set-bd-data-valid "c.in" 32 103
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[97].r 1
|
||||
set c.c1_synapses[97].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[97].r 0
|
||||
set c.c1_synapses[97].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [4,317]'"
|
||||
set-bd-data-valid "c.in" 32 5076
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[4759].r 1
|
||||
set c.c1_synapses[4759].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[4759].r 0
|
||||
set c.c1_synapses[4759].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
system "echo '[] Sending spike to core 0 synapse [5,216]'"
|
||||
set-bd-data-valid "c.in" 32 3461
|
||||
cycle
|
||||
set c.in.r 1
|
||||
cycle
|
||||
assert c.in.a 1
|
||||
|
||||
assert c.c1_synapses[3245].r 1
|
||||
set c.c1_synapses[3245].a 1
|
||||
cycle
|
||||
assert c.c1_synapses[3245].r 0
|
||||
set c.c1_synapses[3245].a 0
|
||||
cycle
|
||||
system "echo '[] Removing input'"
|
||||
set-bd-channel-neutral "c.in" 32
|
||||
cycle
|
||||
assert c.in.a 0
|
||||
|
||||
|
||||
|
||||
|
||||
# NEURON SPIKES #
|
||||
@@ -15327,245 +15518,6 @@ assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [3,5] in core 0 spikes'"
|
||||
set c.c1_neurons[78].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[78].a 1
|
||||
set c.c1_neurons[78].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[78].a 0
|
||||
system "echo '[] Receiving output spike [3,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 83
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [7,0] in core 0 spikes'"
|
||||
set c.c1_neurons[7].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[7].a 1
|
||||
set c.c1_neurons[7].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[7].a 0
|
||||
system "echo '[] Receiving output spike [7,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 7
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [7,2] in core 0 spikes'"
|
||||
set c.c1_neurons[37].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[37].a 1
|
||||
set c.c1_neurons[37].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[37].a 0
|
||||
system "echo '[] Receiving output spike [7,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 39
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,2] in core 0 spikes'"
|
||||
set c.c1_neurons[39].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 1
|
||||
set c.c1_neurons[39].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 0
|
||||
system "echo '[] Receiving output spike [9,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 41
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,2] in core 0 spikes'"
|
||||
set c.c1_neurons[32].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 1
|
||||
set c.c1_neurons[32].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 0
|
||||
system "echo '[] Receiving output spike [2,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 34
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,5] in core 0 spikes'"
|
||||
set c.c1_neurons[89].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 1
|
||||
set c.c1_neurons[89].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 0
|
||||
system "echo '[] Receiving output spike [14,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 94
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,5] in core 0 spikes'"
|
||||
set c.c1_neurons[84].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[84].a 1
|
||||
set c.c1_neurons[84].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[84].a 0
|
||||
system "echo '[] Receiving output spike [9,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 89
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,1] in core 0 spikes'"
|
||||
set c.c1_neurons[17].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 1
|
||||
set c.c1_neurons[17].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 0
|
||||
system "echo '[] Receiving output spike [2,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 18
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [5,5] in core 0 spikes'"
|
||||
set c.c1_neurons[80].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[80].a 1
|
||||
set c.c1_neurons[80].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[80].a 0
|
||||
system "echo '[] Receiving output spike [5,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 85
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [10,0] in core 0 spikes'"
|
||||
set c.c1_neurons[10].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[10].a 1
|
||||
set c.c1_neurons[10].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[10].a 0
|
||||
system "echo '[] Receiving output spike [10,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 10
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [12,2] in core 0 spikes'"
|
||||
set c.c1_neurons[42].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[42].a 1
|
||||
set c.c1_neurons[42].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[42].a 0
|
||||
system "echo '[] Receiving output spike [12,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 44
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,2] in core 0 spikes'"
|
||||
set c.c1_neurons[39].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 1
|
||||
set c.c1_neurons[39].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 0
|
||||
system "echo '[] Receiving output spike [9,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 41
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [6,3] in core 0 spikes'"
|
||||
set c.c1_neurons[51].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[51].a 1
|
||||
set c.c1_neurons[51].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[51].a 0
|
||||
system "echo '[] Receiving output spike [6,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 54
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,2] in core 0 spikes'"
|
||||
set c.c1_neurons[38].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[38].a 1
|
||||
set c.c1_neurons[38].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[38].a 0
|
||||
system "echo '[] Receiving output spike [8,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 40
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [3,1] in core 0 spikes'"
|
||||
set c.c1_neurons[18].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[18].a 1
|
||||
set c.c1_neurons[18].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[18].a 0
|
||||
system "echo '[] Receiving output spike [3,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 19
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,5] in core 0 spikes'"
|
||||
set c.c1_neurons[89].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 1
|
||||
set c.c1_neurons[89].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[89].a 0
|
||||
system "echo '[] Receiving output spike [14,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 94
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,4] in core 0 spikes'"
|
||||
set c.c1_neurons[74].r 1
|
||||
@@ -15582,21 +15534,6 @@ assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [12,5] in core 0 spikes'"
|
||||
set c.c1_neurons[87].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 1
|
||||
set c.c1_neurons[87].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 0
|
||||
system "echo '[] Receiving output spike [12,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 92
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,5] in core 0 spikes'"
|
||||
set c.c1_neurons[83].r 1
|
||||
cycle
|
||||
@@ -15612,3 +15549,272 @@ assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [10,1] in core 0 spikes'"
|
||||
set c.c1_neurons[25].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[25].a 1
|
||||
set c.c1_neurons[25].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[25].a 0
|
||||
system "echo '[] Receiving output spike [10,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 26
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [13,3] in core 0 spikes'"
|
||||
set c.c1_neurons[58].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[58].a 1
|
||||
set c.c1_neurons[58].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[58].a 0
|
||||
system "echo '[] Receiving output spike [13,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 61
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,2] in core 0 spikes'"
|
||||
set c.c1_neurons[44].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[44].a 1
|
||||
set c.c1_neurons[44].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[44].a 0
|
||||
system "echo '[] Receiving output spike [14,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 46
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,2] in core 0 spikes'"
|
||||
set c.c1_neurons[39].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 1
|
||||
set c.c1_neurons[39].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[39].a 0
|
||||
system "echo '[] Receiving output spike [9,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 41
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [5,1] in core 0 spikes'"
|
||||
set c.c1_neurons[20].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[20].a 1
|
||||
set c.c1_neurons[20].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[20].a 0
|
||||
system "echo '[] Receiving output spike [5,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 21
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [5,3] in core 0 spikes'"
|
||||
set c.c1_neurons[50].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[50].a 1
|
||||
set c.c1_neurons[50].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[50].a 0
|
||||
system "echo '[] Receiving output spike [5,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 53
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,1] in core 0 spikes'"
|
||||
set c.c1_neurons[23].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[23].a 1
|
||||
set c.c1_neurons[23].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[23].a 0
|
||||
system "echo '[] Receiving output spike [8,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 24
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [4,4] in core 0 spikes'"
|
||||
set c.c1_neurons[64].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[64].a 1
|
||||
set c.c1_neurons[64].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[64].a 0
|
||||
system "echo '[] Receiving output spike [4,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 68
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [3,0] in core 0 spikes'"
|
||||
set c.c1_neurons[3].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[3].a 1
|
||||
set c.c1_neurons[3].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[3].a 0
|
||||
system "echo '[] Receiving output spike [3,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 3
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [8,4] in core 0 spikes'"
|
||||
set c.c1_neurons[68].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[68].a 1
|
||||
set c.c1_neurons[68].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[68].a 0
|
||||
system "echo '[] Receiving output spike [8,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 72
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,2] in core 0 spikes'"
|
||||
set c.c1_neurons[32].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 1
|
||||
set c.c1_neurons[32].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[32].a 0
|
||||
system "echo '[] Receiving output spike [2,2]'"
|
||||
assert-bd-channel-valid "c.out" 32 34
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [9,0] in core 0 spikes'"
|
||||
set c.c1_neurons[9].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[9].a 1
|
||||
set c.c1_neurons[9].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[9].a 0
|
||||
system "echo '[] Receiving output spike [9,0]'"
|
||||
assert-bd-channel-valid "c.out" 32 9
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [2,1] in core 0 spikes'"
|
||||
set c.c1_neurons[17].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 1
|
||||
set c.c1_neurons[17].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[17].a 0
|
||||
system "echo '[] Receiving output spike [2,1]'"
|
||||
assert-bd-channel-valid "c.out" 32 18
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [4,3] in core 0 spikes'"
|
||||
set c.c1_neurons[49].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[49].a 1
|
||||
set c.c1_neurons[49].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[49].a 0
|
||||
system "echo '[] Receiving output spike [4,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 52
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [12,5] in core 0 spikes'"
|
||||
set c.c1_neurons[87].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 1
|
||||
set c.c1_neurons[87].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[87].a 0
|
||||
system "echo '[] Receiving output spike [12,5]'"
|
||||
assert-bd-channel-valid "c.out" 32 92
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,3] in core 0 spikes'"
|
||||
set c.c1_neurons[59].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[59].a 1
|
||||
set c.c1_neurons[59].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[59].a 0
|
||||
system "echo '[] Receiving output spike [14,3]'"
|
||||
assert-bd-channel-valid "c.out" 32 62
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [1,4] in core 0 spikes'"
|
||||
set c.c1_neurons[61].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[61].a 1
|
||||
set c.c1_neurons[61].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[61].a 0
|
||||
system "echo '[] Receiving output spike [1,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 65
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
|
||||
system "echo '[] Neuron [14,4] in core 0 spikes'"
|
||||
set c.c1_neurons[74].r 1
|
||||
cycle
|
||||
assert c.c1_neurons[74].a 1
|
||||
set c.c1_neurons[74].r 0
|
||||
cycle
|
||||
assert c.c1_neurons[74].a 0
|
||||
system "echo '[] Receiving output spike [14,4]'"
|
||||
assert-bd-channel-valid "c.out" 32 78
|
||||
set c.out.a 1
|
||||
cycle
|
||||
assert-bd-channel-neutral "c.out" 32
|
||||
set c.out.a 0
|
||||
cycle
|
||||
Reference in new issue
Block a user