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Added arbiter_handshake

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This commit is contained in:
M. Mastella
2022-02-23 19:01:54 +01:00
parent 97b0be5af0
commit 6f53a76dbc
9 changed files with 268 additions and 86 deletions
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34
dataflow_neuro/cell_lib_async.act
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@ -478,24 +478,38 @@ namespace tmpl {
p_n_mode <- 1;
y {-1}}
}
export defcell arbiter_handshake(bool in1_r, in1_a,in2_r, in2_a out_r, out_a)
//Rajit example
defproc arbiter_Rajit (bool a, b, u, v)
{
bool _u, _v;
A_2C_B_X1 cel1(.c1 = out_a,.c2 = v,.y = in1_a);
A_2C_B_X1 cel2(.c1 = out_a,.c2 = u,.y = in2_a);
prs {
[keeper=0] in1_v & _v -> _u-
[keeper=0] ~in1_v | ~_v -> _u+
[keeper=0] in2_v & _u -> _v-
[keeper=0] ~in2_v | ~_u -> _v+
[keeper=0] ~_u | ~in2_a => u+
[keeper=0] ~_v | ~in1_a => v+
[keeper=0] u | v => out_r
[keeper=0] a & _v -> _u-
[keeper=0] ~a | ~_v -> _u+
[keeper=0] b & _u -> _v-
[keeper=0] ~b | ~_u -> _v+
[keeper=0] _u => u-
[keeper=0] _v => v-
}
spec {
mk_excllo(_u, _v)
}
}
defproc ARBITER (bool? a, b, c, d; bool! y1,y2; bool? vdd, vss)
{
bool _y1, _y2;
prs {
[keeper=0] a & _y2 -> _y1-
[keeper=0] ~a | ~_y2 -> _y1+
[keeper=0] b & _y1 -> _y2-
[keeper=0] ~b | ~_y1 -> _y2+
[keeper=0] ~_y1 | ~c => y1+
[keeper=0] ~_y2 | ~d => y2+
}
spec {
mk_excllo(_y1, _y2)
}
}
}}

127
dataflow_neuro/primitives.act
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@ -150,65 +150,65 @@ namespace tmpl {
)
}
export template<pint N>
defproc demux (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
//control
bool _en, _reset_BX,_reset_BXX[N];
OR2_X1 out_or(.a=out.v1, .b=out.v2,.vdd=supply.vdd,.vss=supply.vss)
A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=_reset_BXX,.sr_B=_reset_BXX,.vdd=supply.vdd,.vss=supply.vss);
// export template<pint N>
// defproc demux (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) {
// //control
// bool _en, _reset_BX,_reset_BXX[N];
// OR2_X1 out_or(.a=out.v1, .b=out.v2,.vdd=supply.vdd,.vss=supply.vss);
// A_3C_RB_X4 inack_ctl(.c1=_en,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=_reset_BXX,.sr_B=_reset_BXX,.vdd=supply.vdd,.vss=supply.vss);
//validity
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
// //validity
// BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
// sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
// A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss);
//validity
bool _in_v, _c_f_buf, _c_t_buf, _c_v;
sigbuf<N> c_buf_t(.in=c_t, .out=_c_t_buf)
sigbuf<N> c_buf_f(.in=c_f, .out=_c_f_buf)
// //validity
// bool _in_v, _c_f_buf, _c_t_buf, _c_v;
// sigbuf<N> c_buf_t(.in=c_t, .out=_c_t_buf)
// sigbuf<N> c_buf_f(.in=c_f, .out=_c_f_buf)
OR2_X1 c_f_c_t_or(.a=_c_t_buf, .b=_c_f_buf, out._c_v)
ctree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
// OR2_X1 c_f_c_t_or(.a=_c_t_buf, .b=_c_f_buf, out._c_v)
// ctree<N> vc(.in=in.d,.out=_in_v,.supply=supply);
BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
// BUF_X4 in_v_buf(.a=_in_v, .y=in.v,.vdd=supply.vdd,.vss=supply.vss);
//function
bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
A_2C1N_RB_X4 f_buf_func[N];
A_2C1N_RB_X4 t_buf_func[N];
sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
INV_X1 out_a_inv(.a=out.a,.y=_out_a_B);
sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t);
sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f);
// check if you can also do single var to array connect a=b[N]
// and remove them from the loop
(i:N:
f_buf_func[i].y=out.d.d[i].f;
t_buf_func[i].y=out.d.d[i].t;
f_buf_func[i].c1=_en_X_f[i];
t_buf_func[i].c1=_en_X_t[i];
f_buf_func[i].c2=_out_a_BX_f[i];
t_buf_func[i].c2=_out_a_BX_t[i];
f_buf_func[i].n1=in.d.d[i].f;
t_buf_func[i].n1=in.d.d[i].t;
f_buf_func[i].vdd=supply.vdd;
t_buf_func[i].vdd=supply.vdd;
f_buf_func[i].vss=supply.vss;
t_buf_func[i].vss=supply.vss;
t_buf_func[i].pr_B = _reset_BXX[i];
t_buf_func[i].sr_B = _reset_BXX[i];
f_buf_func[i].pr_B = _reset_BXX[i];
f_buf_func[i].sr_B = _reset_BXX[i];
)
}
// //function
// bool _out_a_BX_t[N],_out_a_BX_f[N],_out_a_B,_en_X_t[N],_en_X_f[N];
// A_2C1N_RB_X4 f_buf_func[N];
// A_2C1N_RB_X4 t_buf_func[N];
// sigbuf<N> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
// sigbuf<N> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
// INV_X1 out_a_inv(.a=out.a,.y=_out_a_B);
// sigbuf<N> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t);
// sigbuf<N> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f);
// // check if you can also do single var to array connect a=b[N]
// // and remove them from the loop
// (i:N:
// f_buf_func[i].y=out.d.d[i].f;
// t_buf_func[i].y=out.d.d[i].t;
// f_buf_func[i].c1=_en_X_f[i];
// t_buf_func[i].c1=_en_X_t[i];
// f_buf_func[i].c2=_out_a_BX_f[i];
// t_buf_func[i].c2=_out_a_BX_t[i];
// f_buf_func[i].n1=in.d.d[i].f;
// t_buf_func[i].n1=in.d.d[i].t;
// f_buf_func[i].vdd=supply.vdd;
// t_buf_func[i].vdd=supply.vdd;
// f_buf_func[i].vss=supply.vss;
// t_buf_func[i].vss=supply.vss;
// t_buf_func[i].pr_B = _reset_BXX[i];
// t_buf_func[i].sr_B = _reset_BXX[i];
// f_buf_func[i].pr_B = _reset_BXX[i];
// f_buf_func[i].sr_B = _reset_BXX[i];
// )
// }
@ -287,16 +287,31 @@ namespace tmpl {
out2_f_buf_func[i].sr_B = _reset_BXX[i+N-1];
)
}
export template<pint N>
defproc merge (avMx1of2<N> in1; avMx1of2<N> in2; avMx1of2<N> out ; bool? reset_B; power supply) {
// export template<pint N>
// defproc merge (avMx1of2<N> in1; avMx1of2<N> in2; avMx1of2<N> out ; bool? reset_B; power supply) {
//control
// //control
// bool _en, _reset_BX,_reset_BXX[N];
// A_4C_RB_X4 in1ack_ctl(.c1=in1arb,.c2=_en,.c3=in1.v,.c4=out.v,.y=in1.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
// A_4C_RB_X4 in2ack_ctl(.c1=in2arb,.c2=_en,.c3=in2.v,.c4=out.v,.y=in2.a,.pr_B=_reset_BX,.sr_B=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
// A_4P_1N1N en_ctl(.p1 = in1.a,.p2=in2.a,.p3=out_a_X,.p4 = out.v, .n1 = in1.a,.y = _en,.vdd=supply.vdd,.vss=supply.vss);
//reset_buffers
// //reset_buffers
// BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
// sigbuf<N> reset_bufarray(.in=_reset_BX, .out=_reset_BXX);
//validity
// //validity
//function
}
}
// //function
// }
// defproc arbiter_handshake(a1of1 in1; a1of1 in2; a1of1 out; power supply)
// {
// bool _y1_arb,_y2_arb;
// A_2C_B_X1 cel1(.c1 = out.a,.c2 = _y1_arb,.y = in2.a,.vdd = supply.vdd, .vss = supply.vss);
// A_2C_B_X1 cel2(.c1 = out.a,.c2 = _y2_arb,.y = in1.a,.vdd = supply.vdd, .vss = supply.vss);
// OR2_X1 or_cell(.a = _y1_arb, .b = _y2_arb, .y = out.r,.vdd = supply.vdd, .vss = supply.vss);
// ARBITER arbiter(.a = in1.r, .b = in2.r, .c = in2.a, .d = in1.a, .y1 = _y1_arb, .y2 = _y2_arb, .vdd = supply.vdd, .vss = supply.vss);
// }
}}