attempting to complete the buffer
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		| @@ -79,7 +79,7 @@ namespace tmpl { | ||||
|         } | ||||
|  | ||||
|  | ||||
|         export defcell A_1C1P (bool! y; bool? c1, p1; bool vdd, vss) | ||||
|         export defcell A_1C1P_X1 (bool! y; bool? c1, p1; bool vdd, vss) | ||||
|         { | ||||
|         prs{ | ||||
|             ~p1 & ~c1 -> y+ | ||||
|   | ||||
| @@ -2,7 +2,9 @@ | ||||
|  * | ||||
|  *  This file is part of ACT dataflow neuro library | ||||
|  * | ||||
|  *  Copyright (c) 2022 University of Groningen - Ole Richter   | ||||
|  *  Copyright (c) 2022 University of Groningen - Ole Richter | ||||
|  *  Copyright (c) 2022 University of Groningen - Michele Mastella | ||||
|  *  Copyright (c) 2022 University of Groningen - Hugh Greatorex  | ||||
|  * | ||||
|  *  This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later | ||||
|  * | ||||
| @@ -21,8 +23,9 @@ | ||||
|  * | ||||
|  ************************************************************************** | ||||
|  */ | ||||
| import "cell_lib_async.act"; | ||||
| import "cell_lib_std.act"; | ||||
| import "../../dataflow_neuro/cell_lib_async.act"; | ||||
| import "../../dataflow_neuro/cell_lib_std.act"; | ||||
| import "../../dataflow_neuro/treegates.act"; | ||||
| // import tmpl::dataflow_neuro; | ||||
| // import tmpl::dataflow_neuro; | ||||
| import std::channel; | ||||
| @@ -101,26 +104,25 @@ namespace tmpl { | ||||
|          * | ||||
|          */ | ||||
|         export template<pint N> | ||||
|         defproc buffer (avMx1of2<N> in; avMx1of2<N> out; rsp reset; power supply) { | ||||
|         defproc buffer (avMx1of2<N> in; avMx1of2<N> out; bool? reset_B; power supply) { | ||||
|             //control | ||||
|             bool _en,_en_X,_preset_X,_sreset_X; | ||||
|             A_3C_RB_X4 inack_ctl(c1=en_X,c2=in.v,c3=out.v,y=in.a,pr_B=_preset_X,sr_B=_sreset_X,vdd=supply.vdd,vss=supply.vss); | ||||
|             A_1C1P_X1 en_ctl(c1=in.a,p1=out.v,y=_en,vdd=supply.vdd,vss=supply.vss); | ||||
|             sigbuf en_buf<N*2>(a=_en, y=_en_X, power=supply); | ||||
|             sigbuf preset_buf<N*2>(a=reset.p,y=preset_X, power=supply); | ||||
|             sigbuf sreset_buf<N*2>(a=reset.s,y=sreset_X, power=supply); | ||||
|  | ||||
|             bool _en,_en_X, _reset_BX,_reset_BXX[N]; | ||||
|             A_3C_RB_X4 inack_ctl(.c1=_en_X,.c2=in.v,.c3=out.v,.y=in.a,.pr_B=reset_B,.sr_B=reset_B,.vdd=supply.vdd,.vss=supply.vss); | ||||
|             A_1C1P_X1 en_ctl(.c1=in.a,.p1=out.v,.y=_en,.vdd=supply.vdd,.vss=supply.vss); | ||||
|             sigbuf<N*2> en_buf(.in=_en, .out=_en_X, .supply=supply); | ||||
| 	    sigbuf<N> reset_bufarray(.in=reset_BX, .out=_reset_BXX); | ||||
| 	    BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX); | ||||
|             //validity | ||||
|             bool _in_v; | ||||
|             ctree vc<N>(in=in.d,y=_in_v, power=supply); | ||||
|             sigbuf in_v_buf<12>(a=_in_v, y=in.v); | ||||
|             ctree<N> vc(.in=in.d,.y=_in_v,.vdd=supply.vdd,.vss=supply.vss); | ||||
|             sigbuf<12> in_v_buf(.in=_in_v, .out=in.v,.vdd=supply.vdd,.vss=supply.vss); | ||||
|  | ||||
|             //function | ||||
|             bool _out_a_BX, _out_a_B; | ||||
|             A_2C1N_RB_X4 f_buf_func[N]; | ||||
|             A_2C1N_RB_X4 f_buf_func[N](.pr_B = reset_BXX,.sr_B = reset_BXX); | ||||
|             A_2C1N_RB_X4 t_buf_func[N]; | ||||
|             INV_X1 out_a_inv(a=out.a,y=_out_a_B); | ||||
|             sigbuf out_a_B_buf<N*2>(a=_out_a_B,y=_out_a_BX); | ||||
|             INV_X1 out_a_inv(.a=out.a,.y=_out_a_B); | ||||
|             sigbuf<N*2> out_a_B_buf(.a=_out_a_B,.y=_out_a_BX); | ||||
|             // check if you can also do single var to array connect a=b[N] | ||||
|             // and remove them from the loop | ||||
|             (i:N:  | ||||
| @@ -132,10 +134,10 @@ namespace tmpl { | ||||
|                 t_buf_func[i].c2=_out_a_BX; | ||||
|                 f_buf_func[i].n1=in.d.d[i].f; | ||||
|                 t_buf_func[i].n1=in.d.d[i].t; | ||||
|                 f_buf_func[i].pr_B=_preset_X; | ||||
|                 t_buf_func[i].pr_B=_preset_X; | ||||
|                 f_buf_func[i].sr_B=_sreset_X; | ||||
|                 t_buf_func[i].sr_B=_sreset_X; | ||||
|                 f_buf_func[i].pr_B=reset_B; | ||||
|                 t_buf_func[i].pr_B=reset_B; | ||||
|                 f_buf_func[i].sr_B=reset_B; | ||||
|                 t_buf_func[i].sr_B=reset_B; | ||||
|                 f_buf_func[i].vdd=supply.vdd; | ||||
|                 t_buf_func[i].vdd=supply.vdd; | ||||
|                 f_buf_func[i].vss=supply.vss; | ||||
| @@ -143,4 +145,4 @@ namespace tmpl { | ||||
|             ) | ||||
|         } | ||||
|     } | ||||
| } | ||||
| } | ||||
|   | ||||
| @@ -247,28 +247,29 @@ defproc ctree (bool? in[N]; bool! out; power supply) | ||||
| } | ||||
|  | ||||
| export template<pint N> | ||||
| defproc sigbuf (bool? in; bool! out; power supply) | ||||
| defproc sigbuf (bool? in; bool! out[N]; power supply) | ||||
| { | ||||
|  | ||||
|   { N >= 0 : "sigbuf: parameter error" }; | ||||
|   { N <= 43 : "sigbuf: parameter error, N too big" }; | ||||
|  | ||||
| 	  /* -- just use a sized driver here -- */ | ||||
| 	[ N <= 4 -> | ||||
| 	  BUF_X1 buf1 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
| 	 [] N >= 5 & N <= 7 ->  | ||||
|     BUF_X2 buf2 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
| 	 [] N >= 8 & N <= 10 ->  | ||||
|     BUF_X3 buf3 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
| 	  /* -- just use in sized driver here -- */ | ||||
|     [ N <= 4 -> | ||||
|     BUF_X1 buf1 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|     [] N >= 5 & N <= 7 ->  | ||||
|     BUF_X2 buf2 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|     [] N >= 8 & N <= 10 ->  | ||||
|     BUF_X3 buf3 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|    [] N >= 11 & N <= 14 ->  | ||||
|     BUF_X4 buf4 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
|     BUF_X4 buf4 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|    [] N >= 15 & N <= 18 ->  | ||||
|     BUF_X6 buf6 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
|     BUF_X6 buf6 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|    [] N >= 19 & N <= 29 ->  | ||||
|     BUF_X8 buf8 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
|     BUF_X8 buf8 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|    [] N >= 30 & N <= 42 ->  | ||||
|     BUF_X12 buf12 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss); | ||||
|     BUF_X12 buf12 (.a = in, .y = out[0], .vdd = supply.vdd, .vss = supply.vss); | ||||
|    ] | ||||
|    (i:1..N:y[i]=y[0];) | ||||
| } | ||||
| }} | ||||
|  | ||||
|   | ||||
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