Merge remote-tracking branch 'origin/dev' into dev
This commit is contained in:
commit
828fccfb38
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|
@ -373,6 +373,16 @@ namespace tmpl {
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}
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sizing { _en{-2}; y{-2,2} }
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}
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||||
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||||
export defcell DFQ_R_X1 (bool! Q,Q_B; bool? d,clk,vdd,vss,reset_B)
|
||||
{
|
||||
prs {
|
||||
reset_B -> Q-
|
||||
~Q => Q_B
|
||||
reset_B & ~d & clk -> Q+
|
||||
reset_B & d & clk -> Q-
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||||
}
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||||
}
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||||
}
|
||||
}
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||||
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||||
|
|
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|||
|
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@ -44,7 +44,7 @@ namespace tmpl {
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* Thus NxC should be something like NxC = ceil(log2(Nx))
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* but my guess is that we can't do logs...
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* N_dly_cfg is the number of config bits in the ACK delay line,
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* with all bits high corresponding to 2**N_dly_cfg -1 DLY1_X4 cells.
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* with all bits high corresponding to 2**N_dly_cfg -1 DLY4_X1 cells.
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*/
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export template<pint NxC, NyC, Nx, Ny, N_dly_cfg>
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defproc decoder_2d_dly (avMx1of2<NxC+NyC> in; bool? outx[Nx], outy[Ny],
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@ -212,9 +212,28 @@ namespace tmpl {
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}
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template<pint N, pint M, pint ACK_STRENGTH>
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defproc encoder2D(a1of1 x[N]; a1of1 y[M] ;avMx1of2<X> addr; bool! out_a; power supply)
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{
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export template<pint Nx, Ny>
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defproc and_grid(bool! out[Nx*Ny]; bool? inx[Nx], iny[Ny]; power supply) {
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AND2_X1 ands[Nx*Ny];
|
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(i:0..Nx*Ny-1:ands[i].vss = supply.vss; ands[i].vdd = supply.vdd;)
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||||
(x:0..Nx-1:
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(y:0..Ny-1:
|
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ands[x + y*Nx].a = inx[x];
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ands[x + y*Nx].b = iny[y];
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ands[x + y*Nx].y = out[x + y*Nx];
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||||
)
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||||
)
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||||
}
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||||
|
||||
|
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template<pint N, pint M,pint address_size, pint ACK_STRENGTH>
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||||
defproc encoder2D(a1of1 x[N]; a1of1 y[M] ;avMx1of2<address_size> addr; power supply; bool reset_B) {
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// Reset buffers
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bool _reset_BX,_reset_BXX[H];
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BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
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sigbuf<2*address_size+3> reset_bufarray(.in=_reset_BX, .out=_reset_BXX,.vdd=supply.vdd,.vss=supply.vss);
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||||
|
||||
|
||||
// Arbiters
|
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a1of1 _out_arb_x,_out_arb_y;
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a1of1 _x_temp[N];
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|
|
@ -227,8 +246,9 @@ namespace tmpl {
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|||
arbtree<N> Xarb(.in = _x_temp,.out = _out_arb_X,.supply = supply);
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arbtree<M> Yarb(.in = _y_temp,.out = _out_arb_Y,.supply = supply);
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||||
|
||||
sigbuf<ACK_STRENGTH> x_ack_arb[N];
|
||||
sigbuf<ACK_STRENGTH> y_ack_arb[M];
|
||||
// Sigbufs for strong ackowledge signals
|
||||
sigbuf_1output<ACK_STRENGTH> x_ack_arb[N];
|
||||
sigbuf_1output<ACK_STRENGTH> y_ack_arb[M];
|
||||
(i:N:
|
||||
x_ack_arb[i].in = _x_temp[i].a;
|
||||
x_ack_arb[i].out[0] = x[i].a;
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||||
|
|
@ -240,12 +260,104 @@ namespace tmpl {
|
|||
y_ack_arb[i].supply = supply;
|
||||
)
|
||||
|
||||
// This block checks that the input is valid and that the arbiter made a choice
|
||||
// Then activates the ack of the arbiter
|
||||
bool _x_v,_in_x_v;
|
||||
A_2C2P_RB_X1 Y_ack_confirm();
|
||||
Y_ack_confirm.p1 = _x_v;
|
||||
Y_ack_confirm.p2 =_in_x_v;
|
||||
Y_ack_confirm.c1 = _out_arb_Y.r;
|
||||
Y_ack_confirm.c2 = _x_a_B;
|
||||
Y_ack_confirm.y = _out_arb_Y.a;
|
||||
Y_ack_confirm.vdd = supply.vdd;
|
||||
Y_ack_confirm.vss = supply.vss;
|
||||
Y_ack_confirm.reset_B = _reset_BXX[0];
|
||||
|
||||
// This block checks that the input is valid and that the arbiter made a choice
|
||||
// Then activates the ack of the arbiter
|
||||
A_2C_RB X_ack_confirm();
|
||||
X_ack_confirm.c1 = _out_arb_X.r;
|
||||
X_ack_confirm.c2 = _x_a_B;
|
||||
X_ack_confirm.vdd = supply.vdd;
|
||||
X_ack_confirm.vss = supply.vss;
|
||||
X_ack_confirm.reset_B = _reset_BXX[1];
|
||||
|
||||
//X_REQ validation
|
||||
bool _x_req_array[N],_x_v,_x_v_B;
|
||||
(i:N:_x_req_array[i] = x[i].r;)
|
||||
ortree x_req_ortree(.in = _x_req_array,.out = _x_v,.supply = supply);
|
||||
INV_X1 not_x_req_ortree(.in = _x_v,.out = _x_v_B);
|
||||
|
||||
//
|
||||
A_2P3P1C2N_RB_X4 x_ack();
|
||||
//branch1
|
||||
x_ack.p1 = _in_x_v;
|
||||
x_ack.p2 = _x_v_B;
|
||||
//branch2
|
||||
x_ack.p3 = _in_x_v;
|
||||
x_ack.p4 = _in_y_v;
|
||||
x_ack.p5 = _x_v;
|
||||
//
|
||||
x_ack.c1 = _en
|
||||
x_ack.n1 = addr.v
|
||||
x_ack.n2 = _in_x_v;
|
||||
//
|
||||
x_ack.y = _x_a;
|
||||
//
|
||||
x_ack.vdd = supply.vdd;
|
||||
x_ack.vss = supply.vss;
|
||||
x_ack.reset_B = _reset_BXX[2];
|
||||
|
||||
INV_X1 not_x_ack(.in = _x_a,.out = _x_a_B);
|
||||
|
||||
A_1C2P enabling(.p1 = addr.a, .p2 = addr.v, .c1 = _x_a, .y = _en, .vdd = supply.vdd, .vss = supply.vss)
|
||||
|
||||
avMx1of2<N> _in_x;
|
||||
dualrail<N> _in;
|
||||
_in_x.d = _in.d;
|
||||
_in_x.v = _in_x_v;
|
||||
|
||||
//buffer_func_s
|
||||
A_2C2N_RB buffer_func_s_f[address_size];
|
||||
A_2C2N_RB buffer_func_s_t[address_size];
|
||||
sigbuf<address_size> en_buf_t(.in=_en, .out=_en_X_t, .supply=supply);
|
||||
sigbuf<address_size> en_buf_f(.in=_en, .out=_en_X_f, .supply=supply);
|
||||
INV_X1 out_a_inv(.a=addr.a,.y=_out_a_B);
|
||||
sigbuf<address_size> out_a_B_buf_f(.in=_out_a_B,.out=_out_a_BX_t, .supply=supply);
|
||||
sigbuf<address_size> out_a_B_buf_t(.in=_out_a_B,.out=_out_a_BX_f, .supply=supply);
|
||||
|
||||
(i:address_size:
|
||||
buffer_func_s_f[i].c1 = _en_X_f[i];
|
||||
buffer_func_s_f[i].c2 = _out_a_BX_f[i];
|
||||
buffer_func_s_f[i].n1 = _in_x.d.d[i].f;
|
||||
buffer_func_s_f[i].n1 = _in_x.v;
|
||||
buffer_func_s_f[i].vdd=supply.vdd;
|
||||
buffer_func_s_f[i].vss=supply.vss;
|
||||
buffer_func_s_f[i].pr_B = _reset_BXX[i+3];
|
||||
buffer_func_s_f[i].sr_B = _reset_BXX[i+3];
|
||||
buffer_func_s_f[i].y = addr.d.d[i].f;
|
||||
|
||||
buffer_func_s_t[i].c1 = _en_X_r[i];
|
||||
buffer_func_s_t[i].c2 = _out_a_BX_t[i];
|
||||
buffer_func_s_t[i].n1 = _in_x.d.d[i].r;
|
||||
buffer_func_s_t[i].n1 = _in_x.v;
|
||||
buffer_func_s_t[i].vdd=supply.vdd;
|
||||
buffer_func_s_t[i].vss=supply.vss;
|
||||
buffer_func_s_t[i].pr_B = _reset_BXX[i+3+address_size];
|
||||
buffer_func_s_t[i].sr_B = _reset_BXX[i+3+address_size];
|
||||
buffer_func_s_t[i].y = addr.d.d[i].t;
|
||||
)
|
||||
bool _addr_v
|
||||
vtree addr_validity(.in = addr,.out = _addr_v);
|
||||
sigbuf_1output<4> addr_validity_x(.in = _addr_v,.out = addr.v);
|
||||
addr_validity.supply = supply;
|
||||
addr_validity_x.supply = supply;
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,113 @@
|
|||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
*
|
||||
|
||||
import "../../dataflow_neuro/cell_lib_async.act";
|
||||
import "../../dataflow_neuro/cell_lib_std.act";
|
||||
import "../../dataflow_neuro/treegates.act";
|
||||
import "../../dataflow_neuro/primitives.act";
|
||||
import "../../dataflow_neuro/coders.act";
|
||||
// import tmpl::dataflow_neuro;
|
||||
// import tmpl::dataflow_neuro;
|
||||
import std::channel;
|
||||
open std::channel;
|
||||
|
||||
namespace tmpl {
|
||||
namespace dataflow_neuro {
|
||||
// Circuit for storing, reading and writing registers using AER
|
||||
// The block has the parameters:
|
||||
// log_nw -> log2(number of words), parameters you can store
|
||||
// wl -> word length, length of each word
|
||||
// N_dly_cfg -> the number of config bits in the ACK delay line
|
||||
// The block has the pins:
|
||||
// in -> input data,
|
||||
// - the first bit is write/read_B
|
||||
// - the next log_nw bits describe the location,
|
||||
// - the last wl the word to write
|
||||
// data -> the data saved in the flip flop, sized wl x nw
|
||||
export template<pint log_nw,wl,N_dly_cfg>
|
||||
defproc register_rw (avMx1of2<1+log_nw+wl> in, d1of<wl> data[2<<log_nw] ){
|
||||
bool _in_v_temp,_in_a_temp,_clock_temp,_clock;
|
||||
//Validation of the input
|
||||
vtree val_input(.in = in,.out = _in_v_temp, .supply = supply);
|
||||
sigbuf_1output<4> val_input_X(.in = _in_v_temp,.out = in.v,.supply = supply);
|
||||
in.v = _in_v_temp;
|
||||
// Generation of the clock pulse
|
||||
delayprog<N_dly_cfg> dly(.in = _in_v_temp, .s = _clock_temp, .supply = supply);
|
||||
sigbuf_1output<4> val_input_X(.in = _clock_temp,.out = _clock,.supply = supply);
|
||||
// Sending back to the ackowledge
|
||||
delayprog<N_dly_cfg> dly(.in = _clock, .s = _in_a_temp, .supply = supply);
|
||||
sigbuf_1output<4> val_input_X(.in = _in_a_temp,.out = in.a,.supply = supply);
|
||||
//Reset Buffers
|
||||
bool _reset_BX,_reset_BXX[_nw*w];
|
||||
BUF_X1 reset_buf(.a=reset_B, .y=_reset_BX,.vdd=supply.vdd,.vss=supply.vss);
|
||||
sigbuf<_nw*wl> reset_bufarray(.in=_reset_BX, .out=_reset_BXX,.vdd=supply.vdd,.vss=supply.vss);
|
||||
// Creating the different flip flop arrays
|
||||
bool _nw = 2<<log_nw;
|
||||
bool _word_idx = 0;
|
||||
bool _out_encoder[_nw],_clock_word_temp[_nw],_clock_word[_nw];
|
||||
andtree<log_nw> atree[_nw];
|
||||
AND2_X1 and_encoder[_nw]
|
||||
sigbuf<wl> clock_buffer;
|
||||
DFQ_R_X1 ff[_nw*wl];
|
||||
(k:_nw:atree_x[k].supply = supply;)
|
||||
(_word_idx:_nw:
|
||||
// Decoding the bit pattern to understand which word we are looking at
|
||||
(pin_idx:log_nw:
|
||||
bitval = (_word_idx & ( 1 << pin_idx )) >> pin_idx; // Get binary digit of integer i, column j
|
||||
[bitval = 1 ->
|
||||
atree[_word_idx].in[pin_idx] = in.d.d[pin_idx+1].t;
|
||||
[] bitval = 0 ->
|
||||
atree[_word_idx].in[pin_idx] = in.d.d[pin_idx+1].f;
|
||||
[]bitval >= 2 -> {false : "fuck"};
|
||||
]
|
||||
)
|
||||
// Activating the fake clock for the right word
|
||||
atree_x[_word_idx].out = _out_encoder[_word_idx];
|
||||
and_encoder[_word_idx].a = _out_encoder[_word_idx];
|
||||
and_encoder[_word_idx].b = _clock
|
||||
and_encoder[_word_idx].y = _clock_word_temp[_word_idx];
|
||||
and_encoder[_word_idx].vdd = supply.vdd;
|
||||
and_encoder[_word_idx].vss = supply.vss;
|
||||
clock_buffer[_word_idx].in = _clock_word_temp[_word_idx];
|
||||
clock_buffer[_word_idx].out = _clock_word[_word_idx];
|
||||
clock_buffer[_word_idx].vdd = supply.vdd;
|
||||
clock_buffer[_word_idx].vss = supply.vss;
|
||||
// Describing all the FF and their connection
|
||||
(_bit_idx:wl:
|
||||
ff[_bit_idx*(1+_word_idx)].clk = _clock_word[_word_idx];
|
||||
ff[_bit_idx*(1+_word_idx)].d = in.d.d[_bit_idx+1+log_nw];
|
||||
ff[_bit_idx*(1+_word_idx)].q = data[_word_idx].d[_bit_idx];
|
||||
ff[_bit_idx*(1+_word_idx)].reset_B = reset_BXX[_bit_idx*(1+_word_idx)];
|
||||
ff[_bit_idx*(1+_word_idx)].vdd = supply.vdd;
|
||||
ff[_bit_idx*(1+_word_idx)].vss = supply.vss;
|
||||
)
|
||||
)
|
||||
}
|
||||
}}
|
||||
|
||||
|
|
@ -48,6 +48,9 @@ defproc ortree (bool? in[N]; bool! out; power supply)
|
|||
|
||||
{ N > 0 : "What?" };
|
||||
|
||||
[N = 1 -> BUF_X1 b(.vss=supply.vss, .vdd = supply.vdd, .a = in[0], .y = out);
|
||||
[] N > 1 ->
|
||||
|
||||
pint i, end, j;
|
||||
i = 0;
|
||||
end = N-1;
|
||||
|
|
@ -148,6 +151,8 @@ defproc ortree (bool? in[N]; bool! out; power supply)
|
|||
]
|
||||
|
||||
out = tmp[end];
|
||||
|
||||
]
|
||||
}
|
||||
|
||||
export template<pint N>
|
||||
|
|
@ -157,6 +162,11 @@ defproc andtree (bool? in[N]; bool! out; power supply)
|
|||
|
||||
{ N > 0 : "What?" };
|
||||
|
||||
|
||||
|
||||
[N = 1 -> BUF_X1 b(.vss=supply.vss, .vdd = supply.vdd, .a = in[0], .y = out);
|
||||
[] N > 1 ->
|
||||
|
||||
pint i, end, j;
|
||||
i = 0;
|
||||
end = N-1;
|
||||
|
|
@ -257,6 +267,8 @@ defproc andtree (bool? in[N]; bool! out; power supply)
|
|||
]
|
||||
|
||||
out = tmp[end];
|
||||
|
||||
]
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -270,6 +282,10 @@ defproc ctree (bool? in[N]; bool! out; power supply)
|
|||
|
||||
{ N > 0 : "What?" };
|
||||
|
||||
bool meaningless_var;
|
||||
|
||||
[N = 1 -> BUF_X1 b(.vss=supply.vss, .vdd = supply.vdd, .a = in[0], .y = out);
|
||||
[] N > 1 ->
|
||||
pint i, end, j;
|
||||
i = 0;
|
||||
end = N-1;
|
||||
|
|
@ -373,6 +389,11 @@ defproc ctree (bool? in[N]; bool! out; power supply)
|
|||
]
|
||||
|
||||
out = tmp[end];
|
||||
|
||||
|
||||
]
|
||||
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
|
@ -418,6 +439,32 @@ defproc sigbuf (bool? in; bool! out[N]; power supply)
|
|||
(i:1..N-1:out[i]=out[0];)
|
||||
}
|
||||
|
||||
//Sigbuf in which there is only 1 output. Made for outputs that cannot have multiple wires.
|
||||
export template<pint N>
|
||||
defproc sigbuf_1output (bool? in; bool! out; power supply)
|
||||
{
|
||||
|
||||
{ N >= 0 : "sigbuf: parameter error" };
|
||||
{ N <= 43 : "sigbuf: parameter error, N too big" };
|
||||
|
||||
/* -- just use in sized driver here -- */
|
||||
[ N <= 4 ->
|
||||
BUF_X1 buf1 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
[] N >= 5 & N <= 7 ->
|
||||
BUF_X2 buf2 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
[] N >= 8 & N <= 10 ->
|
||||
BUF_X3 buf3 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
[] N >= 11 & N <= 14 ->
|
||||
BUF_X4 buf4 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
[] N >= 15 & N <= 18 ->
|
||||
BUF_X6 buf6 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
[] N >= 19 & N <= 29 ->
|
||||
BUF_X8 buf8 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
[] N >= 30 & N <= 42 ->
|
||||
BUF_X12 buf12 (.a = in, .y = out, .vdd = supply.vdd, .vss = supply.vss);
|
||||
]
|
||||
}
|
||||
|
||||
|
||||
|
||||
}}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,351 @@
|
|||
t.de.dly.dly[2].y t.de.dly.dly[4].y t.de.addr_buf._in_v t.de.dly._a[2] t.in.d.d[1].f t.de.dly.mu2[3].b t.de.dly.dly[3].y t.de.dly.dly[7].y t.de.dly.dly[3].___y t.in.d.d[0].t t.dly_cfg[1] t.de.dly.dly[13].__y t.de.dly.dly[1]._y t.de.dly.dly[13]._y t.de.addr_buf._out_a_BX_t[0] t.de.dly.dly[7].a t.de.dly.mu2[3]._y t.de.dly.dly[3].a t.in.d.d[0].f t.de.dly.dly[5]._y t.de.dly.dly[7].__y t.de.addr_buf._out_a_B t.de.dly.dly[3].__y t.dly_cfg[2] t.de.dly.dly[2].__y t.de.dly.dly[8].___y t.de.addr_buf._out_a_BX_f[0] t.de.addr_buf.vc.ct.in[0] t.de.dly.dly[13].___y t.de.dly.dly[1].a t.in.d.d[1].t t.in.v t.de.dly.dly[5].__y t.in.d.d[2].t t.de.addr_buf.in_v_buf._y t.de.dly.dly[9].y t.dly_cfg[0] t.in.d.d[2].f t.de.dly.out t.de.dly.mu2[2]._y t.dly_cfg[3] t.de.dly.dly[10]._y t.de.dly.dly[9].__y t.de.dly.and2[3]._y t.de.dly._a[3] t.de.addr_buf.vc.OR2_tf[1]._y t.de.addr_buf.vc.ct.in[2] t.de.dly.dly[5].y t.de.dly.dly[11].___y t.de.dly.dly[4].__y t.de.dly.and2[1]._y t.de.dly.dly[6].___y t.de.dly.dly[10].y t.de.dly.dly[11]._y t.de.dly.dly[10].__y t.de.dly.dly[12].__y t.de.dly.dly[1].__y t.de.addr_buf.vc.ct.in[1] t.de.addr_buf.out_a_B_buf_f.buf1._y t.de.dly._a[1] t.de.dly.dly[14].__y t.de.dly.dly[6].y t.de.dly.dly[11].y t.de.dly.dly[7]._y t.de.addr_buf.vc.ct.C3Els[0]._y t.de.dly.mu2[1]._y t.de.dly.dly[9]._y t.de.dly.dly[5].___y t.de.dly.dly[14]._y t.de.dly.and2[2]._y t.de.dly.dly[8].y t.de.dly.dly[9].___y t.de.dly.mu2[0]._s t.de.dly.mu2[1]._s t.de.dly.dly[2]._y t.de.dly.dly[8].__y t.de.dly.dly[12].___y t.de.dly.dly[13].y t.de.dly.dly[10].___y t.de.dly.dly[1].y t.de.dly.dly[1].___y t.de.dly.dly[2].___y t.de.addr_buf.out_a_B_buf_t.buf1._y t.de.dly.dly[4]._y t.de.dly.dly[8]._y t.de.dly.dly[4].___y t.de.dly.dly[12].y t.de.dly.dly[6].__y t.de.dly.dly[7].___y t.de.addr_buf.vc.OR2_tf[2]._y t.de.dly.dly[3]._y t.de.dly.dly[14].___y t.de.dly.mu2[3]._s t.de.dly.dly[11].__y t.de.dly.dly[6]._y t.de.addr_buf.vc.OR2_tf[0]._y t.de.dly.mu2[2]._s t.de.dly.mu2[0]._y t.de.dly.dly[12]._y
|
||||
244317 t.in.d.d[0].f : 0
|
||||
244317 t.dly_cfg[3] : 1
|
||||
244317 t.dly_cfg[2] : 1
|
||||
244317 t.in.d.d[1].f : 0
|
||||
244317 Reset : 0
|
||||
244317 t.dly_cfg[1] : 1
|
||||
244317 t.in.d.d[2].t : 0
|
||||
244317 t.in.d.d[0].t : 0
|
||||
244317 t.dly_cfg[0] : 1
|
||||
244317 t.in.d.d[2].f : 0
|
||||
244317 t.in.d.d[1].t : 0
|
||||
244318 t._reset_B : 1 [by Reset:=0]
|
||||
244404 t.de.dly.mu2[3]._s : 0 [by t.dly_cfg[3]:=1]
|
||||
244495 t.de.addr_buf.vc.OR2_tf[1]._y : 1 [by t.in.d.d[1].t:=0]
|
||||
244611 t.de.dly.mu2[2]._s : 0 [by t.dly_cfg[2]:=1]
|
||||
244659 t.de.addr_buf.vc.ct.in[1] : 0 [by t.de.addr_buf.vc.OR2_tf[1]._y:=1]
|
||||
244907 t.de.addr_buf.vc.OR2_tf[2]._y : 1 [by t.in.d.d[2].f:=0]
|
||||
245121 t.de.addr_buf.reset_buf._y : 0 [by t._reset_B:=1]
|
||||
245143 t.de.addr_buf._reset_BX : 1 [by t.de.addr_buf.reset_buf._y:=0]
|
||||
245526 t.de.dly.mu2[0]._s : 0 [by t.dly_cfg[0]:=1]
|
||||
245990 t.de.addr_buf.reset_bufarray.buf1._y : 0 [by t.de.addr_buf._reset_BX:=1]
|
||||
246123 t.de.dly.mu2[1]._s : 0 [by t.dly_cfg[1]:=1]
|
||||
246123 t.de.addr_buf._reset_BXX[0] : 1 [by t.de.addr_buf.reset_bufarray.buf1._y:=0]
|
||||
246324 t.de.addr_buf.vc.OR2_tf[0]._y : 1 [by t.in.d.d[0].t:=0]
|
||||
247102 t.de.addr_buf.vc.ct.in[2] : 0 [by t.de.addr_buf.vc.OR2_tf[2]._y:=1]
|
||||
261986 t.de.addr_buf.vc.ct.in[0] : 0 [by t.de.addr_buf.vc.OR2_tf[0]._y:=1]
|
||||
262345 t.de.addr_buf.vc.ct.C3Els[0]._y : 1 [by t.de.addr_buf.vc.ct.in[0]:=0]
|
||||
275654 t.de.dly.mu2[0]._y : 1 [by t.de.dly.mu2[0]._s:=0]
|
||||
275875 t.de.dly._a[1] : 0 [by t.de.dly.mu2[0]._y:=1]
|
||||
275882 t.de.dly.and2[1]._y : 1 [by t.de.dly._a[1]:=0]
|
||||
275912 t.de.dly.dly[1].a : 0 [by t.de.dly.and2[1]._y:=1]
|
||||
276461 t.de.addr_buf._in_v : 0 [by t.de.addr_buf.vc.ct.C3Els[0]._y:=1]
|
||||
282625 t.de.dly.dly[1]._y : 1 [by t.de.dly.dly[1].a:=0]
|
||||
282716 t.de.dly.dly[1].__y : 0 [by t.de.dly.dly[1]._y:=1]
|
||||
284905 t.de.dly.dly[1].___y : 1 [by t.de.dly.dly[1].__y:=0]
|
||||
284912 t.de.dly.dly[1].y : 0 [by t.de.dly.dly[1].___y:=1]
|
||||
287699 t.de.dly.dly[2]._y : 1 [by t.de.dly.dly[1].y:=0]
|
||||
287805 t.de.dly.dly[2].__y : 0 [by t.de.dly.dly[2]._y:=1]
|
||||
287883 t.de.dly.dly[2].___y : 1 [by t.de.dly.dly[2].__y:=0]
|
||||
288158 t.de.dly.dly[2].y : 0 [by t.de.dly.dly[2].___y:=1]
|
||||
307154 t.de.dly.mu2[1]._y : 1 [by t.de.dly.dly[2].y:=0]
|
||||
307609 t.de.dly._a[2] : 0 [by t.de.dly.mu2[1]._y:=1]
|
||||
307621 t.de.dly.and2[2]._y : 1 [by t.de.dly._a[2]:=0]
|
||||
308025 t.de.dly.dly[3].a : 0 [by t.de.dly.and2[2]._y:=1]
|
||||
308037 t.de.dly.dly[3]._y : 1 [by t.de.dly.dly[3].a:=0]
|
||||
313953 t.de.dly.dly[3].__y : 0 [by t.de.dly.dly[3]._y:=1]
|
||||
318229 t.de.dly.dly[3].___y : 1 [by t.de.dly.dly[3].__y:=0]
|
||||
321128 t.de.dly.dly[3].y : 0 [by t.de.dly.dly[3].___y:=1]
|
||||
325423 t.de.dly.dly[4]._y : 1 [by t.de.dly.dly[3].y:=0]
|
||||
325425 t.de.dly.dly[4].__y : 0 [by t.de.dly.dly[4]._y:=1]
|
||||
329960 t.de.dly.dly[4].___y : 1 [by t.de.dly.dly[4].__y:=0]
|
||||
331209 t.de.dly.dly[4].y : 0 [by t.de.dly.dly[4].___y:=1]
|
||||
333922 t.de.addr_buf.in_v_buf._y : 1 [by t.de.addr_buf._in_v:=0]
|
||||
334088 t.in.v : 0 [by t.de.addr_buf.in_v_buf._y:=1]
|
||||
334708 t.de.dly.dly[5]._y : 1 [by t.de.dly.dly[4].y:=0]
|
||||
334783 t.de.dly.dly[5].__y : 0 [by t.de.dly.dly[5]._y:=1]
|
||||
335128 t.de.dly.dly[5].___y : 1 [by t.de.dly.dly[5].__y:=0]
|
||||
335266 t.de.dly.dly[5].y : 0 [by t.de.dly.dly[5].___y:=1]
|
||||
340529 t.de.dly.dly[6]._y : 1 [by t.de.dly.dly[5].y:=0]
|
||||
340531 t.de.dly.dly[6].__y : 0 [by t.de.dly.dly[6]._y:=1]
|
||||
384448 t.de.dly.dly[6].___y : 1 [by t.de.dly.dly[6].__y:=0]
|
||||
384449 t.de.dly.dly[6].y : 0 [by t.de.dly.dly[6].___y:=1]
|
||||
384997 t.de.dly.mu2[2]._y : 1 [by t.de.dly.dly[6].y:=0]
|
||||
385008 t.de.dly._a[3] : 0 [by t.de.dly.mu2[2]._y:=1]
|
||||
385378 t.de.dly.and2[3]._y : 1 [by t.de.dly._a[3]:=0]
|
||||
385445 t.de.dly.dly[7].a : 0 [by t.de.dly.and2[3]._y:=1]
|
||||
388086 t.de.dly.dly[7]._y : 1 [by t.de.dly.dly[7].a:=0]
|
||||
388102 t.de.dly.dly[7].__y : 0 [by t.de.dly.dly[7]._y:=1]
|
||||
392664 t.de.dly.dly[7].___y : 1 [by t.de.dly.dly[7].__y:=0]
|
||||
393192 t.de.dly.dly[7].y : 0 [by t.de.dly.dly[7].___y:=1]
|
||||
395627 t.de.dly.dly[8]._y : 1 [by t.de.dly.dly[7].y:=0]
|
||||
422507 t.de.dly.dly[8].__y : 0 [by t.de.dly.dly[8]._y:=1]
|
||||
446432 t.de.dly.dly[8].___y : 1 [by t.de.dly.dly[8].__y:=0]
|
||||
459473 t.de.dly.dly[8].y : 0 [by t.de.dly.dly[8].___y:=1]
|
||||
459475 t.de.dly.dly[9]._y : 1 [by t.de.dly.dly[8].y:=0]
|
||||
520433 t.de.dly.dly[9].__y : 0 [by t.de.dly.dly[9]._y:=1]
|
||||
520436 t.de.dly.dly[9].___y : 1 [by t.de.dly.dly[9].__y:=0]
|
||||
520465 t.de.dly.dly[9].y : 0 [by t.de.dly.dly[9].___y:=1]
|
||||
520782 t.de.dly.dly[10]._y : 1 [by t.de.dly.dly[9].y:=0]
|
||||
522383 t.de.dly.dly[10].__y : 0 [by t.de.dly.dly[10]._y:=1]
|
||||
522536 t.de.dly.dly[10].___y : 1 [by t.de.dly.dly[10].__y:=0]
|
||||
522580 t.de.dly.dly[10].y : 0 [by t.de.dly.dly[10].___y:=1]
|
||||
525341 t.de.dly.dly[11]._y : 1 [by t.de.dly.dly[10].y:=0]
|
||||
539024 t.de.dly.dly[11].__y : 0 [by t.de.dly.dly[11]._y:=1]
|
||||
539025 t.de.dly.dly[11].___y : 1 [by t.de.dly.dly[11].__y:=0]
|
||||
539242 t.de.dly.dly[11].y : 0 [by t.de.dly.dly[11].___y:=1]
|
||||
539264 t.de.dly.dly[12]._y : 1 [by t.de.dly.dly[11].y:=0]
|
||||
539265 t.de.dly.dly[12].__y : 0 [by t.de.dly.dly[12]._y:=1]
|
||||
540846 t.de.dly.dly[12].___y : 1 [by t.de.dly.dly[12].__y:=0]
|
||||
550191 t.de.dly.dly[12].y : 0 [by t.de.dly.dly[12].___y:=1]
|
||||
550350 t.de.dly.dly[13]._y : 1 [by t.de.dly.dly[12].y:=0]
|
||||
570026 t.de.dly.dly[13].__y : 0 [by t.de.dly.dly[13]._y:=1]
|
||||
571313 t.de.dly.dly[13].___y : 1 [by t.de.dly.dly[13].__y:=0]
|
||||
573545 t.de.dly.dly[13].y : 0 [by t.de.dly.dly[13].___y:=1]
|
||||
573690 t.de.dly.dly[14]._y : 1 [by t.de.dly.dly[13].y:=0]
|
||||
576522 t.de.dly.dly[14].__y : 0 [by t.de.dly.dly[14]._y:=1]
|
||||
582876 t.de.dly.dly[14].___y : 1 [by t.de.dly.dly[14].__y:=0]
|
||||
582877 t.de.dly.mu2[3].b : 0 [by t.de.dly.dly[14].___y:=1]
|
||||
622161 t.de.dly.mu2[3]._y : 1 [by t.de.dly.mu2[3].b:=0]
|
||||
622323 t.de.dly.out : 0 [by t.de.dly.mu2[3]._y:=1]
|
||||
629692 t.de.addr_buf._out_a_B : 1 [by t.de.dly.out:=0]
|
||||
629699 t.de.addr_buf.out_a_B_buf_f.buf1._y : 0 [by t.de.addr_buf._out_a_B:=1]
|
||||
629706 t.de.addr_buf.out_a_B_buf_t.buf1._y : 0 [by t.de.addr_buf._out_a_B:=1]
|
||||
629859 t.de.addr_buf._out_a_BX_t[0] : 1 [by t.de.addr_buf.out_a_B_buf_f.buf1._y:=0]
|
||||
651263 t.de.addr_buf._out_a_BX_f[0] : 1 [by t.de.addr_buf.out_a_B_buf_t.buf1._y:=0]
|
||||
[] set Reset 1
|
||||
651263 Reset : 1
|
||||
651264 t._reset_B : 0 [by Reset:=1]
|
||||
651265 t.de.addr_buf.reset_buf._y : 1 [by t._reset_B:=0]
|
||||
651266 t.de.addr_buf._reset_BX : 0 [by t.de.addr_buf.reset_buf._y:=1]
|
||||
653509 t.de.addr_buf.reset_bufarray.buf1._y : 1 [by t.de.addr_buf._reset_BX:=0]
|
||||
653696 t.de.addr_buf._reset_BXX[0] : 0 [by t.de.addr_buf.reset_bufarray.buf1._y:=1]
|
||||
[] set Reset 0
|
||||
653696 Reset : 0
|
||||
653697 t._reset_B : 1 [by Reset:=0]
|
||||
657879 t.de.addr_buf.reset_buf._y : 0 [by t._reset_B:=1]
|
||||
692661 t.de.addr_buf._reset_BX : 1 [by t.de.addr_buf.reset_buf._y:=0]
|
||||
692662 t.de.addr_buf.reset_bufarray.buf1._y : 0 [by t.de.addr_buf._reset_BX:=1]
|
||||
693515 t.de.addr_buf._reset_BXX[0] : 1 [by t.de.addr_buf.reset_bufarray.buf1._y:=0]
|
||||
[] Sending packet in
|
||||
693515 t.in.d.d[0].t : 1
|
||||
693515 t.in.d.d[2].t : 1
|
||||
693515 t.in.d.d[1].t : 1
|
||||
693516 t.de.addr_buf.vc.OR2_tf[2]._y : 0 [by t.in.d.d[2].t:=1]
|
||||
693519 t.de.addr_buf.vc.ct.in[2] : 1 [by t.de.addr_buf.vc.OR2_tf[2]._y:=0]
|
||||
693520 t.de.addr_buf.vc.OR2_tf[0]._y : 0 [by t.in.d.d[0].t:=1]
|
||||
693532 t.de.addr_buf.t_buf_func[2]._y : 0 [by t.in.d.d[2].t:=1]
|
||||
694406 t.de.addr_buf.t_buf_func[0]._y : 0 [by t.in.d.d[0].t:=1]
|
||||
694407 t.de.atree_x[1].in[0] : 1 [by t.de.addr_buf.t_buf_func[0]._y:=0]
|
||||
694449 t.de.atree_x[1].b._y : 0 [by t.de.atree_x[1].in[0]:=1]
|
||||
694461 t.de.addr_buf.vc.ct.in[0] : 1 [by t.de.addr_buf.vc.OR2_tf[0]._y:=0]
|
||||
696088 t.de.addr_buf.vc.OR2_tf[1]._y : 0 [by t.in.d.d[1].t:=1]
|
||||
696183 t.de.addr_buf.vc.ct.in[1] : 1 [by t.de.addr_buf.vc.OR2_tf[1]._y:=0]
|
||||
696518 t.de.addr_buf.vc.ct.C3Els[0]._y : 0 [by t.de.addr_buf.vc.ct.in[1]:=1]
|
||||
696526 t.de.addr_buf._in_v : 1 [by t.de.addr_buf.vc.ct.C3Els[0]._y:=0]
|
||||
696560 t.de.addr_buf.in_v_buf._y : 0 [by t.de.addr_buf._in_v:=1]
|
||||
697224 t.de.vtree_x.OR2_tf[0]._y : 0 [by t.de.atree_x[1].in[0]:=1]
|
||||
698142 t.de.vtree_x.ct.in[0] : 1 [by t.de.vtree_x.OR2_tf[0]._y:=0]
|
||||
698146 t.de.vtree_x.ct.b._y : 0 [by t.de.vtree_x.ct.in[0]:=1]
|
||||
701876 t.de.addr_buf.t_buf_func[1]._y : 0 [by t.in.d.d[1].t:=1]
|
||||
704274 t.de.atree_y[1].in[0] : 1 [by t.de.addr_buf.t_buf_func[1]._y:=0]
|
||||
707489 t.de.vtree_y.OR2_tf[0]._y : 0 [by t.de.atree_y[1].in[0]:=1]
|
||||
708182 t.ag.inx[1] : 1 [by t.de.atree_x[1].b._y:=0]
|
||||
710447 t.in.v : 1 [by t.de.addr_buf.in_v_buf._y:=0]
|
||||
744524 t.de.C2el.c1 : 1 [by t.de.vtree_x.ct.b._y:=0]
|
||||
752494 t.de.atree_y[2].in[1] : 1 [by t.de.addr_buf.t_buf_func[2]._y:=0]
|
||||
752497 t.de.vtree_y.OR2_tf[1]._y : 0 [by t.de.atree_y[2].in[1]:=1]
|
||||
752542 t.de.atree_y[3].and2s[0]._y : 0 [by t.de.atree_y[2].in[1]:=1]
|
||||
752675 t.de.vtree_y.ct.in[1] : 1 [by t.de.vtree_y.OR2_tf[1]._y:=0]
|
||||
754608 t.de.vtree_y.ct.in[0] : 1 [by t.de.vtree_y.OR2_tf[0]._y:=0]
|
||||
766507 t.de.vtree_y.ct.C2Els[0]._y : 0 [by t.de.vtree_y.ct.in[0]:=1]
|
||||
772458 t.de.C2el.c2 : 1 [by t.de.vtree_y.ct.C2Els[0]._y:=0]
|
||||
773519 t.ag.iny[3] : 1 [by t.de.atree_y[3].and2s[0]._y:=0]
|
||||
774346 t.ag.ands[7]._y : 0 [by t.ag.iny[3]:=1]
|
||||
774519 t.out[7] : 1 [by t.ag.ands[7]._y:=0]
|
||||
811943 t.de.C2el._y : 0 [by t.de.C2el.c2:=1]
|
||||
812127 t.de.C2el.y : 1 [by t.de.C2el._y:=0]
|
||||
812128 t.de.dly.and2[0]._y : 0 [by t.de.C2el.y:=1]
|
||||
812132 t.de.dly.dly[0].a : 1 [by t.de.dly.and2[0]._y:=0]
|
||||
812200 t.de.addr_buf.inack_ctl._y : 0 [by t.de.C2el.y:=1]
|
||||
812296 t.in.a : 1 [by t.de.addr_buf.inack_ctl._y:=0]
|
||||
812432 t.de.addr_buf._en : 0 [by t.in.a:=1]
|
||||
812433 t.de.addr_buf.en_buf_f.buf1._y : 1 [by t.de.addr_buf._en:=0]
|
||||
812674 t.de.addr_buf._en_X_f[0] : 0 [by t.de.addr_buf.en_buf_f.buf1._y:=1]
|
||||
831478 t.de.addr_buf.en_buf_t.buf1._y : 1 [by t.de.addr_buf._en:=0]
|
||||
835437 t.de.addr_buf._en_X_t[0] : 0 [by t.de.addr_buf.en_buf_t.buf1._y:=1]
|
||||
849420 t.de.dly.dly[0]._y : 0 [by t.de.dly.dly[0].a:=1]
|
||||
849432 t.de.dly.dly[0].__y : 1 [by t.de.dly.dly[0]._y:=0]
|
||||
853332 t.de.dly.dly[0].___y : 0 [by t.de.dly.dly[0].__y:=1]
|
||||
854361 t.de.dly.dly[0].y : 1 [by t.de.dly.dly[0].___y:=0]
|
||||
854362 t.de.dly.mu2[0]._y : 0 [by t.de.dly.dly[0].y:=1]
|
||||
854418 t.de.dly._a[1] : 1 [by t.de.dly.mu2[0]._y:=0]
|
||||
899424 t.de.dly.and2[1]._y : 0 [by t.de.dly._a[1]:=1]
|
||||
899425 t.de.dly.dly[1].a : 1 [by t.de.dly.and2[1]._y:=0]
|
||||
899462 t.de.dly.dly[1]._y : 0 [by t.de.dly.dly[1].a:=1]
|
||||
922837 t.de.dly.dly[1].__y : 1 [by t.de.dly.dly[1]._y:=0]
|
||||
922838 t.de.dly.dly[1].___y : 0 [by t.de.dly.dly[1].__y:=1]
|
||||
926402 t.de.dly.dly[1].y : 1 [by t.de.dly.dly[1].___y:=0]
|
||||
928094 t.de.dly.dly[2]._y : 0 [by t.de.dly.dly[1].y:=1]
|
||||
928107 t.de.dly.dly[2].__y : 1 [by t.de.dly.dly[2]._y:=0]
|
||||
945091 t.de.dly.dly[2].___y : 0 [by t.de.dly.dly[2].__y:=1]
|
||||
945448 t.de.dly.dly[2].y : 1 [by t.de.dly.dly[2].___y:=0]
|
||||
945473 t.de.dly.mu2[1]._y : 0 [by t.de.dly.dly[2].y:=1]
|
||||
945494 t.de.dly._a[2] : 1 [by t.de.dly.mu2[1]._y:=0]
|
||||
945495 t.de.dly.and2[2]._y : 0 [by t.de.dly._a[2]:=1]
|
||||
955143 t.de.dly.dly[3].a : 1 [by t.de.dly.and2[2]._y:=0]
|
||||
955144 t.de.dly.dly[3]._y : 0 [by t.de.dly.dly[3].a:=1]
|
||||
955145 t.de.dly.dly[3].__y : 1 [by t.de.dly.dly[3]._y:=0]
|
||||
955306 t.de.dly.dly[3].___y : 0 [by t.de.dly.dly[3].__y:=1]
|
||||
956343 t.de.dly.dly[3].y : 1 [by t.de.dly.dly[3].___y:=0]
|
||||
956348 t.de.dly.dly[4]._y : 0 [by t.de.dly.dly[3].y:=1]
|
||||
956929 t.de.dly.dly[4].__y : 1 [by t.de.dly.dly[4]._y:=0]
|
||||
957337 t.de.dly.dly[4].___y : 0 [by t.de.dly.dly[4].__y:=1]
|
||||
957348 t.de.dly.dly[4].y : 1 [by t.de.dly.dly[4].___y:=0]
|
||||
958395 t.de.dly.dly[5]._y : 0 [by t.de.dly.dly[4].y:=1]
|
||||
958409 t.de.dly.dly[5].__y : 1 [by t.de.dly.dly[5]._y:=0]
|
||||
958427 t.de.dly.dly[5].___y : 0 [by t.de.dly.dly[5].__y:=1]
|
||||
958431 t.de.dly.dly[5].y : 1 [by t.de.dly.dly[5].___y:=0]
|
||||
958535 t.de.dly.dly[6]._y : 0 [by t.de.dly.dly[5].y:=1]
|
||||
989979 t.de.dly.dly[6].__y : 1 [by t.de.dly.dly[6]._y:=0]
|
||||
991183 t.de.dly.dly[6].___y : 0 [by t.de.dly.dly[6].__y:=1]
|
||||
999638 t.de.dly.dly[6].y : 1 [by t.de.dly.dly[6].___y:=0]
|
||||
999866 t.de.dly.mu2[2]._y : 0 [by t.de.dly.dly[6].y:=1]
|
||||
1000709 t.de.dly._a[3] : 1 [by t.de.dly.mu2[2]._y:=0]
|
||||
1002168 t.de.dly.and2[3]._y : 0 [by t.de.dly._a[3]:=1]
|
||||
1002238 t.de.dly.dly[7].a : 1 [by t.de.dly.and2[3]._y:=0]
|
||||
1052660 t.de.dly.dly[7]._y : 0 [by t.de.dly.dly[7].a:=1]
|
||||
1052671 t.de.dly.dly[7].__y : 1 [by t.de.dly.dly[7]._y:=0]
|
||||
1052674 t.de.dly.dly[7].___y : 0 [by t.de.dly.dly[7].__y:=1]
|
||||
1052728 t.de.dly.dly[7].y : 1 [by t.de.dly.dly[7].___y:=0]
|
||||
1053876 t.de.dly.dly[8]._y : 0 [by t.de.dly.dly[7].y:=1]
|
||||
1055037 t.de.dly.dly[8].__y : 1 [by t.de.dly.dly[8]._y:=0]
|
||||
1063689 t.de.dly.dly[8].___y : 0 [by t.de.dly.dly[8].__y:=1]
|
||||
1063770 t.de.dly.dly[8].y : 1 [by t.de.dly.dly[8].___y:=0]
|
||||
1074847 t.de.dly.dly[9]._y : 0 [by t.de.dly.dly[8].y:=1]
|
||||
1092830 t.de.dly.dly[9].__y : 1 [by t.de.dly.dly[9]._y:=0]
|
||||
1092922 t.de.dly.dly[9].___y : 0 [by t.de.dly.dly[9].__y:=1]
|
||||
1101233 t.de.dly.dly[9].y : 1 [by t.de.dly.dly[9].___y:=0]
|
||||
1102977 t.de.dly.dly[10]._y : 0 [by t.de.dly.dly[9].y:=1]
|
||||
1103590 t.de.dly.dly[10].__y : 1 [by t.de.dly.dly[10]._y:=0]
|
||||
1117612 t.de.dly.dly[10].___y : 0 [by t.de.dly.dly[10].__y:=1]
|
||||
1117657 t.de.dly.dly[10].y : 1 [by t.de.dly.dly[10].___y:=0]
|
||||
1118654 t.de.dly.dly[11]._y : 0 [by t.de.dly.dly[10].y:=1]
|
||||
1120303 t.de.dly.dly[11].__y : 1 [by t.de.dly.dly[11]._y:=0]
|
||||
1120828 t.de.dly.dly[11].___y : 0 [by t.de.dly.dly[11].__y:=1]
|
||||
1121728 t.de.dly.dly[11].y : 1 [by t.de.dly.dly[11].___y:=0]
|
||||
1121780 t.de.dly.dly[12]._y : 0 [by t.de.dly.dly[11].y:=1]
|
||||
1121787 t.de.dly.dly[12].__y : 1 [by t.de.dly.dly[12]._y:=0]
|
||||
1137399 t.de.dly.dly[12].___y : 0 [by t.de.dly.dly[12].__y:=1]
|
||||
1143866 t.de.dly.dly[12].y : 1 [by t.de.dly.dly[12].___y:=0]
|
||||
1143868 t.de.dly.dly[13]._y : 0 [by t.de.dly.dly[12].y:=1]
|
||||
1144222 t.de.dly.dly[13].__y : 1 [by t.de.dly.dly[13]._y:=0]
|
||||
1144355 t.de.dly.dly[13].___y : 0 [by t.de.dly.dly[13].__y:=1]
|
||||
1144356 t.de.dly.dly[13].y : 1 [by t.de.dly.dly[13].___y:=0]
|
||||
1144360 t.de.dly.dly[14]._y : 0 [by t.de.dly.dly[13].y:=1]
|
||||
1144906 t.de.dly.dly[14].__y : 1 [by t.de.dly.dly[14]._y:=0]
|
||||
1190469 t.de.dly.dly[14].___y : 0 [by t.de.dly.dly[14].__y:=1]
|
||||
1190470 t.de.dly.mu2[3].b : 1 [by t.de.dly.dly[14].___y:=0]
|
||||
1202848 t.de.dly.mu2[3]._y : 0 [by t.de.dly.mu2[3].b:=1]
|
||||
1202927 t.de.dly.out : 1 [by t.de.dly.mu2[3]._y:=0]
|
||||
1205360 t.de.addr_buf._out_a_B : 0 [by t.de.dly.out:=1]
|
||||
1205448 t.de.addr_buf.out_a_B_buf_t.buf1._y : 1 [by t.de.addr_buf._out_a_B:=0]
|
||||
1213142 t.de.addr_buf.out_a_B_buf_f.buf1._y : 1 [by t.de.addr_buf._out_a_B:=0]
|
||||
1213201 t.de.addr_buf._out_a_BX_t[0] : 0 [by t.de.addr_buf.out_a_B_buf_f.buf1._y:=1]
|
||||
1213231 t.de.addr_buf.t_buf_func[0]._y : 1 [by t.de.addr_buf._out_a_BX_t[0]:=0]
|
||||
1214668 t.de.addr_buf.t_buf_func[1]._y : 1 [by t.de.addr_buf._out_a_BX_t[0]:=0]
|
||||
1215353 t.de.atree_y[1].in[0] : 0 [by t.de.addr_buf.t_buf_func[1]._y:=1]
|
||||
1215480 t.de.vtree_y.OR2_tf[0]._y : 1 [by t.de.atree_y[1].in[0]:=0]
|
||||
1215649 t.de.vtree_y.ct.in[0] : 0 [by t.de.vtree_y.OR2_tf[0]._y:=1]
|
||||
1232068 t.de.atree_y[3].and2s[0]._y : 1 [by t.de.atree_y[1].in[0]:=0]
|
||||
1232111 t.ag.iny[3] : 0 [by t.de.atree_y[3].and2s[0]._y:=1]
|
||||
1232123 t.ag.ands[7]._y : 1 [by t.ag.iny[3]:=0]
|
||||
1232615 t.de.atree_x[1].in[0] : 0 [by t.de.addr_buf.t_buf_func[0]._y:=1]
|
||||
1232618 t.de.vtree_x.OR2_tf[0]._y : 1 [by t.de.atree_x[1].in[0]:=0]
|
||||
1232656 t.de.vtree_x.ct.in[0] : 0 [by t.de.vtree_x.OR2_tf[0]._y:=1]
|
||||
1232657 t.de.vtree_x.ct.b._y : 1 [by t.de.vtree_x.ct.in[0]:=0]
|
||||
1232848 t.de.atree_x[1].b._y : 1 [by t.de.atree_x[1].in[0]:=0]
|
||||
1232940 t.ag.inx[1] : 0 [by t.de.atree_x[1].b._y:=1]
|
||||
1233402 t.out[7] : 0 [by t.ag.ands[7]._y:=1]
|
||||
1233775 t.de.addr_buf._out_a_BX_f[0] : 0 [by t.de.addr_buf.out_a_B_buf_t.buf1._y:=1]
|
||||
1245409 t.de.C2el.c1 : 0 [by t.de.vtree_x.ct.b._y:=1]
|
||||
1272705 t.de.addr_buf.t_buf_func[2]._y : 1 [by t.de.addr_buf._out_a_BX_t[0]:=0]
|
||||
1275432 t.de.atree_y[2].in[1] : 0 [by t.de.addr_buf.t_buf_func[2]._y:=1]
|
||||
1275434 t.de.vtree_y.OR2_tf[1]._y : 1 [by t.de.atree_y[2].in[1]:=0]
|
||||
1275435 t.de.vtree_y.ct.in[1] : 0 [by t.de.vtree_y.OR2_tf[1]._y:=1]
|
||||
1276936 t.de.vtree_y.ct.C2Els[0]._y : 1 [by t.de.vtree_y.ct.in[1]:=0]
|
||||
1276938 t.de.C2el.c2 : 0 [by t.de.vtree_y.ct.C2Els[0]._y:=1]
|
||||
1276956 t.de.C2el._y : 1 [by t.de.C2el.c2:=0]
|
||||
1277075 t.de.C2el.y : 0 [by t.de.C2el._y:=1]
|
||||
1282795 t.de.dly.and2[0]._y : 1 [by t.de.C2el.y:=0]
|
||||
1282803 t.de.dly.dly[0].a : 0 [by t.de.dly.and2[0]._y:=1]
|
||||
1282857 t.de.dly.dly[0]._y : 1 [by t.de.dly.dly[0].a:=0]
|
||||
1333395 t.de.dly.dly[0].__y : 0 [by t.de.dly.dly[0]._y:=1]
|
||||
1333400 t.de.dly.dly[0].___y : 1 [by t.de.dly.dly[0].__y:=0]
|
||||
1334467 t.de.dly.dly[0].y : 0 [by t.de.dly.dly[0].___y:=1]
|
||||
1334468 t.de.dly.mu2[0]._y : 1 [by t.de.dly.dly[0].y:=0]
|
||||
1334606 t.de.dly._a[1] : 0 [by t.de.dly.mu2[0]._y:=1]
|
||||
1334607 t.de.dly.and2[1]._y : 1 [by t.de.dly._a[1]:=0]
|
||||
1334671 t.de.dly.dly[1].a : 0 [by t.de.dly.and2[1]._y:=1]
|
||||
1334794 t.de.dly.dly[1]._y : 1 [by t.de.dly.dly[1].a:=0]
|
||||
1334796 t.de.dly.dly[1].__y : 0 [by t.de.dly.dly[1]._y:=1]
|
||||
1334833 t.de.dly.dly[1].___y : 1 [by t.de.dly.dly[1].__y:=0]
|
||||
1334976 t.de.dly.dly[1].y : 0 [by t.de.dly.dly[1].___y:=1]
|
||||
1335027 t.de.dly.dly[2]._y : 1 [by t.de.dly.dly[1].y:=0]
|
||||
1335469 t.de.dly.dly[2].__y : 0 [by t.de.dly.dly[2]._y:=1]
|
||||
1335480 t.de.dly.dly[2].___y : 1 [by t.de.dly.dly[2].__y:=0]
|
||||
1335481 t.de.dly.dly[2].y : 0 [by t.de.dly.dly[2].___y:=1]
|
||||
1335490 t.de.dly.mu2[1]._y : 1 [by t.de.dly.dly[2].y:=0]
|
||||
1335515 t.de.dly._a[2] : 0 [by t.de.dly.mu2[1]._y:=1]
|
||||
1345768 t.de.dly.and2[2]._y : 1 [by t.de.dly._a[2]:=0]
|
||||
1349289 t.de.dly.dly[3].a : 0 [by t.de.dly.and2[2]._y:=1]
|
||||
1349434 t.de.dly.dly[3]._y : 1 [by t.de.dly.dly[3].a:=0]
|
||||
1365602 t.de.dly.dly[3].__y : 0 [by t.de.dly.dly[3]._y:=1]
|
||||
1365832 t.de.dly.dly[3].___y : 1 [by t.de.dly.dly[3].__y:=0]
|
||||
1366523 t.de.dly.dly[3].y : 0 [by t.de.dly.dly[3].___y:=1]
|
||||
1366537 t.de.dly.dly[4]._y : 1 [by t.de.dly.dly[3].y:=0]
|
||||
1368080 t.de.dly.dly[4].__y : 0 [by t.de.dly.dly[4]._y:=1]
|
||||
1369691 t.de.dly.dly[4].___y : 1 [by t.de.dly.dly[4].__y:=0]
|
||||
1387203 t.de.dly.dly[4].y : 0 [by t.de.dly.dly[4].___y:=1]
|
||||
1387214 t.de.dly.dly[5]._y : 1 [by t.de.dly.dly[4].y:=0]
|
||||
1387215 t.de.dly.dly[5].__y : 0 [by t.de.dly.dly[5]._y:=1]
|
||||
1387216 t.de.dly.dly[5].___y : 1 [by t.de.dly.dly[5].__y:=0]
|
||||
1393717 t.de.dly.dly[5].y : 0 [by t.de.dly.dly[5].___y:=1]
|
||||
1394356 t.de.dly.dly[6]._y : 1 [by t.de.dly.dly[5].y:=0]
|
||||
1396149 t.de.dly.dly[6].__y : 0 [by t.de.dly.dly[6]._y:=1]
|
||||
1396281 t.de.dly.dly[6].___y : 1 [by t.de.dly.dly[6].__y:=0]
|
||||
1396282 t.de.dly.dly[6].y : 0 [by t.de.dly.dly[6].___y:=1]
|
||||
1396299 t.de.dly.mu2[2]._y : 1 [by t.de.dly.dly[6].y:=0]
|
||||
1396451 t.de.dly._a[3] : 0 [by t.de.dly.mu2[2]._y:=1]
|
||||
1399434 t.de.dly.and2[3]._y : 1 [by t.de.dly._a[3]:=0]
|
||||
1399437 t.de.dly.dly[7].a : 0 [by t.de.dly.and2[3]._y:=1]
|
||||
1399861 t.de.dly.dly[7]._y : 1 [by t.de.dly.dly[7].a:=0]
|
||||
1399867 t.de.dly.dly[7].__y : 0 [by t.de.dly.dly[7]._y:=1]
|
||||
1402455 t.de.dly.dly[7].___y : 1 [by t.de.dly.dly[7].__y:=0]
|
||||
1404916 t.de.dly.dly[7].y : 0 [by t.de.dly.dly[7].___y:=1]
|
||||
1405746 t.de.dly.dly[8]._y : 1 [by t.de.dly.dly[7].y:=0]
|
||||
1428678 t.de.dly.dly[8].__y : 0 [by t.de.dly.dly[8]._y:=1]
|
||||
1428680 t.de.dly.dly[8].___y : 1 [by t.de.dly.dly[8].__y:=0]
|
||||
1428874 t.de.dly.dly[8].y : 0 [by t.de.dly.dly[8].___y:=1]
|
||||
1429477 t.de.dly.dly[9]._y : 1 [by t.de.dly.dly[8].y:=0]
|
||||
1429615 t.de.dly.dly[9].__y : 0 [by t.de.dly.dly[9]._y:=1]
|
||||
1429632 t.de.dly.dly[9].___y : 1 [by t.de.dly.dly[9].__y:=0]
|
||||
1429649 t.de.dly.dly[9].y : 0 [by t.de.dly.dly[9].___y:=1]
|
||||
1430075 t.de.dly.dly[10]._y : 1 [by t.de.dly.dly[9].y:=0]
|
||||
1430076 t.de.dly.dly[10].__y : 0 [by t.de.dly.dly[10]._y:=1]
|
||||
1430077 t.de.dly.dly[10].___y : 1 [by t.de.dly.dly[10].__y:=0]
|
||||
1431103 t.de.dly.dly[10].y : 0 [by t.de.dly.dly[10].___y:=1]
|
||||
1431104 t.de.dly.dly[11]._y : 1 [by t.de.dly.dly[10].y:=0]
|
||||
1431123 t.de.dly.dly[11].__y : 0 [by t.de.dly.dly[11]._y:=1]
|
||||
1431291 t.de.dly.dly[11].___y : 1 [by t.de.dly.dly[11].__y:=0]
|
||||
1431830 t.de.dly.dly[11].y : 0 [by t.de.dly.dly[11].___y:=1]
|
||||
1431991 t.de.dly.dly[12]._y : 1 [by t.de.dly.dly[11].y:=0]
|
||||
1432164 t.de.dly.dly[12].__y : 0 [by t.de.dly.dly[12]._y:=1]
|
||||
1434711 t.de.dly.dly[12].___y : 1 [by t.de.dly.dly[12].__y:=0]
|
||||
1449772 t.de.dly.dly[12].y : 0 [by t.de.dly.dly[12].___y:=1]
|
||||
1449773 t.de.dly.dly[13]._y : 1 [by t.de.dly.dly[12].y:=0]
|
||||
1449774 t.de.dly.dly[13].__y : 0 [by t.de.dly.dly[13]._y:=1]
|
||||
1450164 t.de.dly.dly[13].___y : 1 [by t.de.dly.dly[13].__y:=0]
|
||||
1450371 t.de.dly.dly[13].y : 0 [by t.de.dly.dly[13].___y:=1]
|
||||
1451204 t.de.dly.dly[14]._y : 1 [by t.de.dly.dly[13].y:=0]
|
||||
1451232 t.de.dly.dly[14].__y : 0 [by t.de.dly.dly[14]._y:=1]
|
||||
1451239 t.de.dly.dly[14].___y : 1 [by t.de.dly.dly[14].__y:=0]
|
||||
1451653 t.de.dly.mu2[3].b : 0 [by t.de.dly.dly[14].___y:=1]
|
||||
1451657 t.de.dly.mu2[3]._y : 1 [by t.de.dly.mu2[3].b:=0]
|
||||
1453436 t.de.dly.out : 0 [by t.de.dly.mu2[3]._y:=1]
|
||||
1476310 t.de.addr_buf._out_a_B : 1 [by t.de.dly.out:=0]
|
||||
1476476 t.de.addr_buf.out_a_B_buf_t.buf1._y : 0 [by t.de.addr_buf._out_a_B:=1]
|
||||
1485121 t.de.addr_buf._out_a_BX_f[0] : 1 [by t.de.addr_buf.out_a_B_buf_t.buf1._y:=0]
|
||||
1516180 t.de.addr_buf.out_a_B_buf_f.buf1._y : 0 [by t.de.addr_buf._out_a_B:=1]
|
||||
1517113 t.de.addr_buf._out_a_BX_t[0] : 1 [by t.de.addr_buf.out_a_B_buf_f.buf1._y:=0]
|
||||
Binary file not shown.
|
|
@ -0,0 +1,948 @@
|
|||
= "GND" "GND"
|
||||
= "Vdd" "Vdd"
|
||||
= "Reset" "Reset"
|
||||
"Reset"->"t._reset_B"-
|
||||
~("Reset")->"t._reset_B"+
|
||||
= "t._reset_B" "t.de.reset_B"
|
||||
= "t.ag.iny[0]" "t.ag.ands[1].b"
|
||||
= "t.ag.iny[0]" "t.ag.ands[0].b"
|
||||
= "t.ag.iny[1]" "t.ag.ands[3].b"
|
||||
= "t.ag.iny[1]" "t.ag.ands[2].b"
|
||||
= "t.ag.iny[2]" "t.ag.ands[5].b"
|
||||
= "t.ag.iny[2]" "t.ag.ands[4].b"
|
||||
= "t.ag.iny[3]" "t.ag.ands[7].b"
|
||||
= "t.ag.iny[3]" "t.ag.ands[6].b"
|
||||
= "t.ag.inx[0]" "t.ag.ands[6].a"
|
||||
= "t.ag.inx[0]" "t.ag.ands[4].a"
|
||||
= "t.ag.inx[0]" "t.ag.ands[2].a"
|
||||
= "t.ag.inx[0]" "t.ag.ands[0].a"
|
||||
= "t.ag.inx[1]" "t.ag.ands[7].a"
|
||||
= "t.ag.inx[1]" "t.ag.ands[5].a"
|
||||
= "t.ag.inx[1]" "t.ag.ands[3].a"
|
||||
= "t.ag.inx[1]" "t.ag.ands[1].a"
|
||||
"t.ag.ands[0].a"&"t.ag.ands[0].b"->"t.ag.ands[0]._y"-
|
||||
~("t.ag.ands[0].a"&"t.ag.ands[0].b")->"t.ag.ands[0]._y"+
|
||||
"t.ag.ands[0]._y"->"t.ag.ands[0].y"-
|
||||
~("t.ag.ands[0]._y")->"t.ag.ands[0].y"+
|
||||
"t.ag.ands[1].a"&"t.ag.ands[1].b"->"t.ag.ands[1]._y"-
|
||||
~("t.ag.ands[1].a"&"t.ag.ands[1].b")->"t.ag.ands[1]._y"+
|
||||
"t.ag.ands[1]._y"->"t.ag.ands[1].y"-
|
||||
~("t.ag.ands[1]._y")->"t.ag.ands[1].y"+
|
||||
"t.ag.ands[2].a"&"t.ag.ands[2].b"->"t.ag.ands[2]._y"-
|
||||
~("t.ag.ands[2].a"&"t.ag.ands[2].b")->"t.ag.ands[2]._y"+
|
||||
"t.ag.ands[2]._y"->"t.ag.ands[2].y"-
|
||||
~("t.ag.ands[2]._y")->"t.ag.ands[2].y"+
|
||||
"t.ag.ands[3].a"&"t.ag.ands[3].b"->"t.ag.ands[3]._y"-
|
||||
~("t.ag.ands[3].a"&"t.ag.ands[3].b")->"t.ag.ands[3]._y"+
|
||||
"t.ag.ands[3]._y"->"t.ag.ands[3].y"-
|
||||
~("t.ag.ands[3]._y")->"t.ag.ands[3].y"+
|
||||
"t.ag.ands[4].a"&"t.ag.ands[4].b"->"t.ag.ands[4]._y"-
|
||||
~("t.ag.ands[4].a"&"t.ag.ands[4].b")->"t.ag.ands[4]._y"+
|
||||
"t.ag.ands[4]._y"->"t.ag.ands[4].y"-
|
||||
~("t.ag.ands[4]._y")->"t.ag.ands[4].y"+
|
||||
"t.ag.ands[5].a"&"t.ag.ands[5].b"->"t.ag.ands[5]._y"-
|
||||
~("t.ag.ands[5].a"&"t.ag.ands[5].b")->"t.ag.ands[5]._y"+
|
||||
"t.ag.ands[5]._y"->"t.ag.ands[5].y"-
|
||||
~("t.ag.ands[5]._y")->"t.ag.ands[5].y"+
|
||||
"t.ag.ands[6].a"&"t.ag.ands[6].b"->"t.ag.ands[6]._y"-
|
||||
~("t.ag.ands[6].a"&"t.ag.ands[6].b")->"t.ag.ands[6]._y"+
|
||||
"t.ag.ands[6]._y"->"t.ag.ands[6].y"-
|
||||
~("t.ag.ands[6]._y")->"t.ag.ands[6].y"+
|
||||
"t.ag.ands[7].a"&"t.ag.ands[7].b"->"t.ag.ands[7]._y"-
|
||||
~("t.ag.ands[7].a"&"t.ag.ands[7].b")->"t.ag.ands[7]._y"+
|
||||
"t.ag.ands[7]._y"->"t.ag.ands[7].y"-
|
||||
~("t.ag.ands[7]._y")->"t.ag.ands[7].y"+
|
||||
= "t.ag.supply.vdd" "t.ag.ands[7].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[6].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[5].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[4].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[3].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[2].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[1].vdd"
|
||||
= "t.ag.supply.vdd" "t.ag.ands[0].vdd"
|
||||
= "t.ag.supply.vss" "t.ag.ands[7].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[6].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[5].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[4].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[3].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[2].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[1].vss"
|
||||
= "t.ag.supply.vss" "t.ag.ands[0].vss"
|
||||
= "t.ag.out[0]" "t.ag.ands[0].y"
|
||||
= "t.ag.out[1]" "t.ag.ands[1].y"
|
||||
= "t.ag.out[2]" "t.ag.ands[2].y"
|
||||
= "t.ag.out[3]" "t.ag.ands[3].y"
|
||||
= "t.ag.out[4]" "t.ag.ands[4].y"
|
||||
= "t.ag.out[5]" "t.ag.ands[5].y"
|
||||
= "t.ag.out[6]" "t.ag.ands[6].y"
|
||||
= "t.ag.out[7]" "t.ag.ands[7].y"
|
||||
= "t.ag.inx[0]" "t.de.outx[0]"
|
||||
= "t.ag.inx[1]" "t.de.outx[1]"
|
||||
= "t.ag.iny[0]" "t.de.outy[0]"
|
||||
= "t.ag.iny[1]" "t.de.outy[1]"
|
||||
= "t.ag.iny[2]" "t.de.outy[2]"
|
||||
= "t.ag.iny[3]" "t.de.outy[3]"
|
||||
= "Vdd" "t.ag.supply.vdd"
|
||||
= "GND" "t.ag.supply.vss"
|
||||
"t.de.atree_x[0].b.a"->"t.de.atree_x[0].b._y"-
|
||||
~("t.de.atree_x[0].b.a")->"t.de.atree_x[0].b._y"+
|
||||
"t.de.atree_x[0].b._y"->"t.de.atree_x[0].b.y"-
|
||||
~("t.de.atree_x[0].b._y")->"t.de.atree_x[0].b.y"+
|
||||
= "t.de.atree_x[0].supply.vdd" "t.de.atree_x[0].b.vdd"
|
||||
= "t.de.atree_x[0].supply.vss" "t.de.atree_x[0].b.vss"
|
||||
= "t.de.atree_x[0].out" "t.de.atree_x[0].b.y"
|
||||
= "t.de.atree_x[0].in[0]" "t.de.atree_x[0].b.a"
|
||||
"t.de.atree_x[1].b.a"->"t.de.atree_x[1].b._y"-
|
||||
~("t.de.atree_x[1].b.a")->"t.de.atree_x[1].b._y"+
|
||||
"t.de.atree_x[1].b._y"->"t.de.atree_x[1].b.y"-
|
||||
~("t.de.atree_x[1].b._y")->"t.de.atree_x[1].b.y"+
|
||||
= "t.de.atree_x[1].supply.vdd" "t.de.atree_x[1].b.vdd"
|
||||
= "t.de.atree_x[1].supply.vss" "t.de.atree_x[1].b.vss"
|
||||
= "t.de.atree_x[1].out" "t.de.atree_x[1].b.y"
|
||||
= "t.de.atree_x[1].in[0]" "t.de.atree_x[1].b.a"
|
||||
= "t.de.atree_x[1].in[0]" "t.de.addr_buf.out.d.d[0].t"
|
||||
= "t.de.atree_x[1].in[0]" "t.de.addr_buf.out.d.d[0].d[1]"
|
||||
= "t.de.atree_x[1].in[0]" "t.de.vtree_x.in.d[0].t"
|
||||
= "t.de.atree_x[1].in[0]" "t.de.vtree_x.in.d[0].d[1]"
|
||||
= "t.de.atree_x[0].in[0]" "t.de.addr_buf.out.d.d[0].f"
|
||||
= "t.de.atree_x[0].in[0]" "t.de.addr_buf.out.d.d[0].d[0]"
|
||||
= "t.de.atree_x[0].in[0]" "t.de.vtree_x.in.d[0].f"
|
||||
= "t.de.atree_x[0].in[0]" "t.de.vtree_x.in.d[0].d[0]"
|
||||
= "t.de.dly_cfg[0]" "t.de.dly.s[0]"
|
||||
= "t.de.dly_cfg[1]" "t.de.dly.s[1]"
|
||||
= "t.de.dly_cfg[2]" "t.de.dly.s[2]"
|
||||
= "t.de.dly_cfg[3]" "t.de.dly.s[3]"
|
||||
= "t.de.supply.vss" "t.de.atree_y[3].supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.atree_y[3].supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.atree_y[2].supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.atree_y[2].supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.atree_y[1].supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.atree_y[1].supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.atree_y[0].supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.atree_y[0].supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.atree_x[1].supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.atree_x[1].supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.atree_x[0].supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.atree_x[0].supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.dly.supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.dly.supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.vtree_y.supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.vtree_y.supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.vtree_x.supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.vtree_x.supply.vdd"
|
||||
= "t.de.supply.vss" "t.de.addr_buf.supply.vss"
|
||||
= "t.de.supply.vdd" "t.de.addr_buf.supply.vdd"
|
||||
= "t.de.supply.vdd" "t.de.C2el.vdd"
|
||||
= "t.de.supply.vss" "t.de.C2el.vss"
|
||||
~"t.de.C2el.c1"&~"t.de.C2el.c2"->"t.de.C2el._y"+
|
||||
"t.de.C2el.c1"&"t.de.C2el.c2"->"t.de.C2el._y"-
|
||||
"t.de.C2el._y"->"t.de.C2el.y"-
|
||||
~("t.de.C2el._y")->"t.de.C2el.y"+
|
||||
= "t.de.C2el.c1" "t.de.vtree_x.out"
|
||||
= "t.de.C2el.c2" "t.de.vtree_y.out"
|
||||
"t.de.dly.and2[0].a"&"t.de.dly.and2[0].b"->"t.de.dly.and2[0]._y"-
|
||||
~("t.de.dly.and2[0].a"&"t.de.dly.and2[0].b")->"t.de.dly.and2[0]._y"+
|
||||
"t.de.dly.and2[0]._y"->"t.de.dly.and2[0].y"-
|
||||
~("t.de.dly.and2[0]._y")->"t.de.dly.and2[0].y"+
|
||||
"t.de.dly.and2[1].a"&"t.de.dly.and2[1].b"->"t.de.dly.and2[1]._y"-
|
||||
~("t.de.dly.and2[1].a"&"t.de.dly.and2[1].b")->"t.de.dly.and2[1]._y"+
|
||||
"t.de.dly.and2[1]._y"->"t.de.dly.and2[1].y"-
|
||||
~("t.de.dly.and2[1]._y")->"t.de.dly.and2[1].y"+
|
||||
"t.de.dly.and2[2].a"&"t.de.dly.and2[2].b"->"t.de.dly.and2[2]._y"-
|
||||
~("t.de.dly.and2[2].a"&"t.de.dly.and2[2].b")->"t.de.dly.and2[2]._y"+
|
||||
"t.de.dly.and2[2]._y"->"t.de.dly.and2[2].y"-
|
||||
~("t.de.dly.and2[2]._y")->"t.de.dly.and2[2].y"+
|
||||
"t.de.dly.and2[3].a"&"t.de.dly.and2[3].b"->"t.de.dly.and2[3]._y"-
|
||||
~("t.de.dly.and2[3].a"&"t.de.dly.and2[3].b")->"t.de.dly.and2[3]._y"+
|
||||
"t.de.dly.and2[3]._y"->"t.de.dly.and2[3].y"-
|
||||
~("t.de.dly.and2[3]._y")->"t.de.dly.and2[3].y"+
|
||||
= "t.de.dly.s[0]" "t.de.dly.mu2[0].s"
|
||||
= "t.de.dly.s[0]" "t.de.dly.and2[0].b"
|
||||
= "t.de.dly.s[1]" "t.de.dly.mu2[1].s"
|
||||
= "t.de.dly.s[1]" "t.de.dly.and2[1].b"
|
||||
= "t.de.dly.s[2]" "t.de.dly.mu2[2].s"
|
||||
= "t.de.dly.s[2]" "t.de.dly.and2[2].b"
|
||||
= "t.de.dly.s[3]" "t.de.dly.mu2[3].s"
|
||||
= "t.de.dly.s[3]" "t.de.dly.and2[3].b"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[14].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[13].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[12].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[11].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[10].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[9].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[8].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[7].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[6].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[5].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[4].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[3].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[2].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[1].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.dly[0].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.mu2[3].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.mu2[2].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.mu2[1].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.mu2[0].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.and2[3].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.and2[2].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.and2[1].vdd"
|
||||
= "t.de.dly.supply.vdd" "t.de.dly.and2[0].vdd"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[14].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[13].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[12].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[11].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[10].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[9].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[8].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[7].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[6].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[5].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[4].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[3].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[2].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[1].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.dly[0].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.mu2[3].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.mu2[2].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.mu2[1].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.mu2[0].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.and2[3].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.and2[2].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.and2[1].vss"
|
||||
= "t.de.dly.supply.vss" "t.de.dly.and2[0].vss"
|
||||
"t.de.dly.mu2[0].s"->"t.de.dly.mu2[0]._s"-
|
||||
~("t.de.dly.mu2[0].s")->"t.de.dly.mu2[0]._s"+
|
||||
~"t.de.dly.mu2[0].a"&~"t.de.dly.mu2[0].s"|~"t.de.dly.mu2[0].b"&~"t.de.dly.mu2[0]._s"->"t.de.dly.mu2[0]._y"+
|
||||
"t.de.dly.mu2[0].a"&"t.de.dly.mu2[0]._s"|"t.de.dly.mu2[0].b"&"t.de.dly.mu2[0].s"->"t.de.dly.mu2[0]._y"-
|
||||
"t.de.dly.mu2[0]._y"->"t.de.dly.mu2[0].y"-
|
||||
~("t.de.dly.mu2[0]._y")->"t.de.dly.mu2[0].y"+
|
||||
"t.de.dly.mu2[1].s"->"t.de.dly.mu2[1]._s"-
|
||||
~("t.de.dly.mu2[1].s")->"t.de.dly.mu2[1]._s"+
|
||||
~"t.de.dly.mu2[1].a"&~"t.de.dly.mu2[1].s"|~"t.de.dly.mu2[1].b"&~"t.de.dly.mu2[1]._s"->"t.de.dly.mu2[1]._y"+
|
||||
"t.de.dly.mu2[1].a"&"t.de.dly.mu2[1]._s"|"t.de.dly.mu2[1].b"&"t.de.dly.mu2[1].s"->"t.de.dly.mu2[1]._y"-
|
||||
"t.de.dly.mu2[1]._y"->"t.de.dly.mu2[1].y"-
|
||||
~("t.de.dly.mu2[1]._y")->"t.de.dly.mu2[1].y"+
|
||||
"t.de.dly.mu2[2].s"->"t.de.dly.mu2[2]._s"-
|
||||
~("t.de.dly.mu2[2].s")->"t.de.dly.mu2[2]._s"+
|
||||
~"t.de.dly.mu2[2].a"&~"t.de.dly.mu2[2].s"|~"t.de.dly.mu2[2].b"&~"t.de.dly.mu2[2]._s"->"t.de.dly.mu2[2]._y"+
|
||||
"t.de.dly.mu2[2].a"&"t.de.dly.mu2[2]._s"|"t.de.dly.mu2[2].b"&"t.de.dly.mu2[2].s"->"t.de.dly.mu2[2]._y"-
|
||||
"t.de.dly.mu2[2]._y"->"t.de.dly.mu2[2].y"-
|
||||
~("t.de.dly.mu2[2]._y")->"t.de.dly.mu2[2].y"+
|
||||
"t.de.dly.mu2[3].s"->"t.de.dly.mu2[3]._s"-
|
||||
~("t.de.dly.mu2[3].s")->"t.de.dly.mu2[3]._s"+
|
||||
~"t.de.dly.mu2[3].a"&~"t.de.dly.mu2[3].s"|~"t.de.dly.mu2[3].b"&~"t.de.dly.mu2[3]._s"->"t.de.dly.mu2[3]._y"+
|
||||
"t.de.dly.mu2[3].a"&"t.de.dly.mu2[3]._s"|"t.de.dly.mu2[3].b"&"t.de.dly.mu2[3].s"->"t.de.dly.mu2[3]._y"-
|
||||
"t.de.dly.mu2[3]._y"->"t.de.dly.mu2[3].y"-
|
||||
~("t.de.dly.mu2[3]._y")->"t.de.dly.mu2[3].y"+
|
||||
"t.de.dly.dly[0].a"->"t.de.dly.dly[0]._y"-
|
||||
~("t.de.dly.dly[0].a")->"t.de.dly.dly[0]._y"+
|
||||
"t.de.dly.dly[0]._y"->"t.de.dly.dly[0].__y"-
|
||||
~("t.de.dly.dly[0]._y")->"t.de.dly.dly[0].__y"+
|
||||
"t.de.dly.dly[0].__y"->"t.de.dly.dly[0].___y"-
|
||||
~("t.de.dly.dly[0].__y")->"t.de.dly.dly[0].___y"+
|
||||
"t.de.dly.dly[0].___y"->"t.de.dly.dly[0].y"-
|
||||
~("t.de.dly.dly[0].___y")->"t.de.dly.dly[0].y"+
|
||||
"t.de.dly.dly[1].a"->"t.de.dly.dly[1]._y"-
|
||||
~("t.de.dly.dly[1].a")->"t.de.dly.dly[1]._y"+
|
||||
"t.de.dly.dly[1]._y"->"t.de.dly.dly[1].__y"-
|
||||
~("t.de.dly.dly[1]._y")->"t.de.dly.dly[1].__y"+
|
||||
"t.de.dly.dly[1].__y"->"t.de.dly.dly[1].___y"-
|
||||
~("t.de.dly.dly[1].__y")->"t.de.dly.dly[1].___y"+
|
||||
"t.de.dly.dly[1].___y"->"t.de.dly.dly[1].y"-
|
||||
~("t.de.dly.dly[1].___y")->"t.de.dly.dly[1].y"+
|
||||
"t.de.dly.dly[2].a"->"t.de.dly.dly[2]._y"-
|
||||
~("t.de.dly.dly[2].a")->"t.de.dly.dly[2]._y"+
|
||||
"t.de.dly.dly[2]._y"->"t.de.dly.dly[2].__y"-
|
||||
~("t.de.dly.dly[2]._y")->"t.de.dly.dly[2].__y"+
|
||||
"t.de.dly.dly[2].__y"->"t.de.dly.dly[2].___y"-
|
||||
~("t.de.dly.dly[2].__y")->"t.de.dly.dly[2].___y"+
|
||||
"t.de.dly.dly[2].___y"->"t.de.dly.dly[2].y"-
|
||||
~("t.de.dly.dly[2].___y")->"t.de.dly.dly[2].y"+
|
||||
"t.de.dly.dly[3].a"->"t.de.dly.dly[3]._y"-
|
||||
~("t.de.dly.dly[3].a")->"t.de.dly.dly[3]._y"+
|
||||
"t.de.dly.dly[3]._y"->"t.de.dly.dly[3].__y"-
|
||||
~("t.de.dly.dly[3]._y")->"t.de.dly.dly[3].__y"+
|
||||
"t.de.dly.dly[3].__y"->"t.de.dly.dly[3].___y"-
|
||||
~("t.de.dly.dly[3].__y")->"t.de.dly.dly[3].___y"+
|
||||
"t.de.dly.dly[3].___y"->"t.de.dly.dly[3].y"-
|
||||
~("t.de.dly.dly[3].___y")->"t.de.dly.dly[3].y"+
|
||||
"t.de.dly.dly[4].a"->"t.de.dly.dly[4]._y"-
|
||||
~("t.de.dly.dly[4].a")->"t.de.dly.dly[4]._y"+
|
||||
"t.de.dly.dly[4]._y"->"t.de.dly.dly[4].__y"-
|
||||
~("t.de.dly.dly[4]._y")->"t.de.dly.dly[4].__y"+
|
||||
"t.de.dly.dly[4].__y"->"t.de.dly.dly[4].___y"-
|
||||
~("t.de.dly.dly[4].__y")->"t.de.dly.dly[4].___y"+
|
||||
"t.de.dly.dly[4].___y"->"t.de.dly.dly[4].y"-
|
||||
~("t.de.dly.dly[4].___y")->"t.de.dly.dly[4].y"+
|
||||
"t.de.dly.dly[5].a"->"t.de.dly.dly[5]._y"-
|
||||
~("t.de.dly.dly[5].a")->"t.de.dly.dly[5]._y"+
|
||||
"t.de.dly.dly[5]._y"->"t.de.dly.dly[5].__y"-
|
||||
~("t.de.dly.dly[5]._y")->"t.de.dly.dly[5].__y"+
|
||||
"t.de.dly.dly[5].__y"->"t.de.dly.dly[5].___y"-
|
||||
~("t.de.dly.dly[5].__y")->"t.de.dly.dly[5].___y"+
|
||||
"t.de.dly.dly[5].___y"->"t.de.dly.dly[5].y"-
|
||||
~("t.de.dly.dly[5].___y")->"t.de.dly.dly[5].y"+
|
||||
"t.de.dly.dly[6].a"->"t.de.dly.dly[6]._y"-
|
||||
~("t.de.dly.dly[6].a")->"t.de.dly.dly[6]._y"+
|
||||
"t.de.dly.dly[6]._y"->"t.de.dly.dly[6].__y"-
|
||||
~("t.de.dly.dly[6]._y")->"t.de.dly.dly[6].__y"+
|
||||
"t.de.dly.dly[6].__y"->"t.de.dly.dly[6].___y"-
|
||||
~("t.de.dly.dly[6].__y")->"t.de.dly.dly[6].___y"+
|
||||
"t.de.dly.dly[6].___y"->"t.de.dly.dly[6].y"-
|
||||
~("t.de.dly.dly[6].___y")->"t.de.dly.dly[6].y"+
|
||||
"t.de.dly.dly[7].a"->"t.de.dly.dly[7]._y"-
|
||||
~("t.de.dly.dly[7].a")->"t.de.dly.dly[7]._y"+
|
||||
"t.de.dly.dly[7]._y"->"t.de.dly.dly[7].__y"-
|
||||
~("t.de.dly.dly[7]._y")->"t.de.dly.dly[7].__y"+
|
||||
"t.de.dly.dly[7].__y"->"t.de.dly.dly[7].___y"-
|
||||
~("t.de.dly.dly[7].__y")->"t.de.dly.dly[7].___y"+
|
||||
"t.de.dly.dly[7].___y"->"t.de.dly.dly[7].y"-
|
||||
~("t.de.dly.dly[7].___y")->"t.de.dly.dly[7].y"+
|
||||
"t.de.dly.dly[8].a"->"t.de.dly.dly[8]._y"-
|
||||
~("t.de.dly.dly[8].a")->"t.de.dly.dly[8]._y"+
|
||||
"t.de.dly.dly[8]._y"->"t.de.dly.dly[8].__y"-
|
||||
~("t.de.dly.dly[8]._y")->"t.de.dly.dly[8].__y"+
|
||||
"t.de.dly.dly[8].__y"->"t.de.dly.dly[8].___y"-
|
||||
~("t.de.dly.dly[8].__y")->"t.de.dly.dly[8].___y"+
|
||||
"t.de.dly.dly[8].___y"->"t.de.dly.dly[8].y"-
|
||||
~("t.de.dly.dly[8].___y")->"t.de.dly.dly[8].y"+
|
||||
"t.de.dly.dly[9].a"->"t.de.dly.dly[9]._y"-
|
||||
~("t.de.dly.dly[9].a")->"t.de.dly.dly[9]._y"+
|
||||
"t.de.dly.dly[9]._y"->"t.de.dly.dly[9].__y"-
|
||||
~("t.de.dly.dly[9]._y")->"t.de.dly.dly[9].__y"+
|
||||
"t.de.dly.dly[9].__y"->"t.de.dly.dly[9].___y"-
|
||||
~("t.de.dly.dly[9].__y")->"t.de.dly.dly[9].___y"+
|
||||
"t.de.dly.dly[9].___y"->"t.de.dly.dly[9].y"-
|
||||
~("t.de.dly.dly[9].___y")->"t.de.dly.dly[9].y"+
|
||||
"t.de.dly.dly[10].a"->"t.de.dly.dly[10]._y"-
|
||||
~("t.de.dly.dly[10].a")->"t.de.dly.dly[10]._y"+
|
||||
"t.de.dly.dly[10]._y"->"t.de.dly.dly[10].__y"-
|
||||
~("t.de.dly.dly[10]._y")->"t.de.dly.dly[10].__y"+
|
||||
"t.de.dly.dly[10].__y"->"t.de.dly.dly[10].___y"-
|
||||
~("t.de.dly.dly[10].__y")->"t.de.dly.dly[10].___y"+
|
||||
"t.de.dly.dly[10].___y"->"t.de.dly.dly[10].y"-
|
||||
~("t.de.dly.dly[10].___y")->"t.de.dly.dly[10].y"+
|
||||
"t.de.dly.dly[11].a"->"t.de.dly.dly[11]._y"-
|
||||
~("t.de.dly.dly[11].a")->"t.de.dly.dly[11]._y"+
|
||||
"t.de.dly.dly[11]._y"->"t.de.dly.dly[11].__y"-
|
||||
~("t.de.dly.dly[11]._y")->"t.de.dly.dly[11].__y"+
|
||||
"t.de.dly.dly[11].__y"->"t.de.dly.dly[11].___y"-
|
||||
~("t.de.dly.dly[11].__y")->"t.de.dly.dly[11].___y"+
|
||||
"t.de.dly.dly[11].___y"->"t.de.dly.dly[11].y"-
|
||||
~("t.de.dly.dly[11].___y")->"t.de.dly.dly[11].y"+
|
||||
"t.de.dly.dly[12].a"->"t.de.dly.dly[12]._y"-
|
||||
~("t.de.dly.dly[12].a")->"t.de.dly.dly[12]._y"+
|
||||
"t.de.dly.dly[12]._y"->"t.de.dly.dly[12].__y"-
|
||||
~("t.de.dly.dly[12]._y")->"t.de.dly.dly[12].__y"+
|
||||
"t.de.dly.dly[12].__y"->"t.de.dly.dly[12].___y"-
|
||||
~("t.de.dly.dly[12].__y")->"t.de.dly.dly[12].___y"+
|
||||
"t.de.dly.dly[12].___y"->"t.de.dly.dly[12].y"-
|
||||
~("t.de.dly.dly[12].___y")->"t.de.dly.dly[12].y"+
|
||||
"t.de.dly.dly[13].a"->"t.de.dly.dly[13]._y"-
|
||||
~("t.de.dly.dly[13].a")->"t.de.dly.dly[13]._y"+
|
||||
"t.de.dly.dly[13]._y"->"t.de.dly.dly[13].__y"-
|
||||
~("t.de.dly.dly[13]._y")->"t.de.dly.dly[13].__y"+
|
||||
"t.de.dly.dly[13].__y"->"t.de.dly.dly[13].___y"-
|
||||
~("t.de.dly.dly[13].__y")->"t.de.dly.dly[13].___y"+
|
||||
"t.de.dly.dly[13].___y"->"t.de.dly.dly[13].y"-
|
||||
~("t.de.dly.dly[13].___y")->"t.de.dly.dly[13].y"+
|
||||
"t.de.dly.dly[14].a"->"t.de.dly.dly[14]._y"-
|
||||
~("t.de.dly.dly[14].a")->"t.de.dly.dly[14]._y"+
|
||||
"t.de.dly.dly[14]._y"->"t.de.dly.dly[14].__y"-
|
||||
~("t.de.dly.dly[14]._y")->"t.de.dly.dly[14].__y"+
|
||||
"t.de.dly.dly[14].__y"->"t.de.dly.dly[14].___y"-
|
||||
~("t.de.dly.dly[14].__y")->"t.de.dly.dly[14].___y"+
|
||||
"t.de.dly.dly[14].___y"->"t.de.dly.dly[14].y"-
|
||||
~("t.de.dly.dly[14].___y")->"t.de.dly.dly[14].y"+
|
||||
= "t.de.dly.dly[14].y" "t.de.dly.mu2[3].b"
|
||||
= "t.de.dly.dly[14].a" "t.de.dly.dly[13].y"
|
||||
= "t.de.dly.dly[13].a" "t.de.dly.dly[12].y"
|
||||
= "t.de.dly.dly[12].a" "t.de.dly.dly[11].y"
|
||||
= "t.de.dly.dly[11].a" "t.de.dly.dly[10].y"
|
||||
= "t.de.dly.dly[10].a" "t.de.dly.dly[9].y"
|
||||
= "t.de.dly.dly[9].a" "t.de.dly.dly[8].y"
|
||||
= "t.de.dly.dly[8].a" "t.de.dly.dly[7].y"
|
||||
= "t.de.dly.dly[7].a" "t.de.dly.and2[3].y"
|
||||
= "t.de.dly.dly[6].y" "t.de.dly.mu2[2].b"
|
||||
= "t.de.dly.dly[6].a" "t.de.dly.dly[5].y"
|
||||
= "t.de.dly.dly[5].a" "t.de.dly.dly[4].y"
|
||||
= "t.de.dly.dly[4].a" "t.de.dly.dly[3].y"
|
||||
= "t.de.dly.dly[3].a" "t.de.dly.and2[2].y"
|
||||
= "t.de.dly.dly[2].y" "t.de.dly.mu2[1].b"
|
||||
= "t.de.dly.dly[2].a" "t.de.dly.dly[1].y"
|
||||
= "t.de.dly.dly[1].a" "t.de.dly.and2[1].y"
|
||||
= "t.de.dly.dly[0].y" "t.de.dly.mu2[0].b"
|
||||
= "t.de.dly.dly[0].a" "t.de.dly.and2[0].y"
|
||||
= "t.de.dly._a[1]" "t.de.dly.mu2[1].a"
|
||||
= "t.de.dly._a[1]" "t.de.dly.and2[1].a"
|
||||
= "t.de.dly._a[1]" "t.de.dly.mu2[0].y"
|
||||
= "t.de.dly._a[2]" "t.de.dly.mu2[2].a"
|
||||
= "t.de.dly._a[2]" "t.de.dly.and2[2].a"
|
||||
= "t.de.dly._a[2]" "t.de.dly.mu2[1].y"
|
||||
= "t.de.dly._a[3]" "t.de.dly.mu2[3].a"
|
||||
= "t.de.dly._a[3]" "t.de.dly.and2[3].a"
|
||||
= "t.de.dly._a[3]" "t.de.dly.mu2[2].y"
|
||||
= "t.de.dly.out" "t.de.dly.mu2[3].y"
|
||||
= "t.de.dly.out" "t.de.dly._a[4]"
|
||||
= "t.de.dly.in" "t.de.dly.mu2[0].a"
|
||||
= "t.de.dly.in" "t.de.dly.and2[0].a"
|
||||
= "t.de.dly.in" "t.de.dly._a[0]"
|
||||
= "t.de.dly.out" "t.de.addr_buf.out.a"
|
||||
= "t.de.dly.in" "t.de.addr_buf.out.v"
|
||||
= "t.de.dly.in" "t.de.C2el.y"
|
||||
= "t.de.atree_y[0].supply.vdd" "t.de.atree_y[0].and2s[0].vdd"
|
||||
= "t.de.atree_y[0].supply.vss" "t.de.atree_y[0].and2s[0].vss"
|
||||
"t.de.atree_y[0].and2s[0].a"&"t.de.atree_y[0].and2s[0].b"->"t.de.atree_y[0].and2s[0]._y"-
|
||||
~("t.de.atree_y[0].and2s[0].a"&"t.de.atree_y[0].and2s[0].b")->"t.de.atree_y[0].and2s[0]._y"+
|
||||
"t.de.atree_y[0].and2s[0]._y"->"t.de.atree_y[0].and2s[0].y"-
|
||||
~("t.de.atree_y[0].and2s[0]._y")->"t.de.atree_y[0].and2s[0].y"+
|
||||
= "t.de.atree_y[0].in[0]" "t.de.atree_y[0].and2s[0].a"
|
||||
= "t.de.atree_y[0].in[0]" "t.de.atree_y[0].tmp[0]"
|
||||
= "t.de.atree_y[0].in[1]" "t.de.atree_y[0].and2s[0].b"
|
||||
= "t.de.atree_y[0].in[1]" "t.de.atree_y[0].tmp[1]"
|
||||
= "t.de.atree_y[0].out" "t.de.atree_y[0].and2s[0].y"
|
||||
= "t.de.atree_y[0].out" "t.de.atree_y[0].tmp[2]"
|
||||
= "t.de.atree_y[1].supply.vdd" "t.de.atree_y[1].and2s[0].vdd"
|
||||
= "t.de.atree_y[1].supply.vss" "t.de.atree_y[1].and2s[0].vss"
|
||||
"t.de.atree_y[1].and2s[0].a"&"t.de.atree_y[1].and2s[0].b"->"t.de.atree_y[1].and2s[0]._y"-
|
||||
~("t.de.atree_y[1].and2s[0].a"&"t.de.atree_y[1].and2s[0].b")->"t.de.atree_y[1].and2s[0]._y"+
|
||||
"t.de.atree_y[1].and2s[0]._y"->"t.de.atree_y[1].and2s[0].y"-
|
||||
~("t.de.atree_y[1].and2s[0]._y")->"t.de.atree_y[1].and2s[0].y"+
|
||||
= "t.de.atree_y[1].in[0]" "t.de.atree_y[1].and2s[0].a"
|
||||
= "t.de.atree_y[1].in[0]" "t.de.atree_y[1].tmp[0]"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.atree_y[1].and2s[0].b"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.atree_y[1].tmp[1]"
|
||||
= "t.de.atree_y[1].out" "t.de.atree_y[1].and2s[0].y"
|
||||
= "t.de.atree_y[1].out" "t.de.atree_y[1].tmp[2]"
|
||||
= "t.de.atree_y[2].supply.vdd" "t.de.atree_y[2].and2s[0].vdd"
|
||||
= "t.de.atree_y[2].supply.vss" "t.de.atree_y[2].and2s[0].vss"
|
||||
"t.de.atree_y[2].and2s[0].a"&"t.de.atree_y[2].and2s[0].b"->"t.de.atree_y[2].and2s[0]._y"-
|
||||
~("t.de.atree_y[2].and2s[0].a"&"t.de.atree_y[2].and2s[0].b")->"t.de.atree_y[2].and2s[0]._y"+
|
||||
"t.de.atree_y[2].and2s[0]._y"->"t.de.atree_y[2].and2s[0].y"-
|
||||
~("t.de.atree_y[2].and2s[0]._y")->"t.de.atree_y[2].and2s[0].y"+
|
||||
= "t.de.atree_y[2].in[0]" "t.de.atree_y[2].and2s[0].a"
|
||||
= "t.de.atree_y[2].in[0]" "t.de.atree_y[2].tmp[0]"
|
||||
= "t.de.atree_y[2].in[1]" "t.de.atree_y[2].and2s[0].b"
|
||||
= "t.de.atree_y[2].in[1]" "t.de.atree_y[2].tmp[1]"
|
||||
= "t.de.atree_y[2].out" "t.de.atree_y[2].and2s[0].y"
|
||||
= "t.de.atree_y[2].out" "t.de.atree_y[2].tmp[2]"
|
||||
= "t.de.atree_y[3].supply.vdd" "t.de.atree_y[3].and2s[0].vdd"
|
||||
= "t.de.atree_y[3].supply.vss" "t.de.atree_y[3].and2s[0].vss"
|
||||
"t.de.atree_y[3].and2s[0].a"&"t.de.atree_y[3].and2s[0].b"->"t.de.atree_y[3].and2s[0]._y"-
|
||||
~("t.de.atree_y[3].and2s[0].a"&"t.de.atree_y[3].and2s[0].b")->"t.de.atree_y[3].and2s[0]._y"+
|
||||
"t.de.atree_y[3].and2s[0]._y"->"t.de.atree_y[3].and2s[0].y"-
|
||||
~("t.de.atree_y[3].and2s[0]._y")->"t.de.atree_y[3].and2s[0].y"+
|
||||
= "t.de.atree_y[3].in[0]" "t.de.atree_y[3].and2s[0].a"
|
||||
= "t.de.atree_y[3].in[0]" "t.de.atree_y[3].tmp[0]"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.atree_y[3].and2s[0].b"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.atree_y[3].tmp[1]"
|
||||
= "t.de.atree_y[3].out" "t.de.atree_y[3].and2s[0].y"
|
||||
= "t.de.atree_y[3].out" "t.de.atree_y[3].tmp[2]"
|
||||
= "t.de.atree_y[3].in[0]" "t.de.addr_buf.out.d.d[1].t"
|
||||
= "t.de.atree_y[3].in[0]" "t.de.addr_buf.out.d.d[1].d[1]"
|
||||
= "t.de.atree_y[3].in[0]" "t.de.vtree_y.in.d[0].t"
|
||||
= "t.de.atree_y[3].in[0]" "t.de.vtree_y.in.d[0].d[1]"
|
||||
= "t.de.atree_y[3].in[0]" "t.de.atree_y[1].in[0]"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.addr_buf.out.d.d[2].t"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.addr_buf.out.d.d[2].d[1]"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.vtree_y.in.d[1].t"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.vtree_y.in.d[1].d[1]"
|
||||
= "t.de.atree_y[3].in[1]" "t.de.atree_y[2].in[1]"
|
||||
= "t.de.atree_y[2].in[0]" "t.de.addr_buf.out.d.d[1].f"
|
||||
= "t.de.atree_y[2].in[0]" "t.de.addr_buf.out.d.d[1].d[0]"
|
||||
= "t.de.atree_y[2].in[0]" "t.de.vtree_y.in.d[0].f"
|
||||
= "t.de.atree_y[2].in[0]" "t.de.vtree_y.in.d[0].d[0]"
|
||||
= "t.de.atree_y[2].in[0]" "t.de.atree_y[0].in[0]"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.addr_buf.out.d.d[2].f"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.addr_buf.out.d.d[2].d[0]"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.vtree_y.in.d[1].f"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.vtree_y.in.d[1].d[0]"
|
||||
= "t.de.atree_y[1].in[1]" "t.de.atree_y[0].in[1]"
|
||||
= "t.de.in.d.d[0].d[0]" "t.de.in.d.d[0].f"
|
||||
= "t.de.in.d.d[0].d[1]" "t.de.in.d.d[0].t"
|
||||
= "t.de.in.d.d[1].d[0]" "t.de.in.d.d[1].f"
|
||||
= "t.de.in.d.d[1].d[1]" "t.de.in.d.d[1].t"
|
||||
= "t.de.in.d.d[2].d[0]" "t.de.in.d.d[2].f"
|
||||
= "t.de.in.d.d[2].d[1]" "t.de.in.d.d[2].t"
|
||||
= "t.de.in.d.d[2].d[0]" "t.de.in.d.d[2].f"
|
||||
= "t.de.in.d.d[2].d[1]" "t.de.in.d.d[2].t"
|
||||
= "t.de.in.d.d[1].d[0]" "t.de.in.d.d[1].f"
|
||||
= "t.de.in.d.d[1].d[1]" "t.de.in.d.d[1].t"
|
||||
= "t.de.in.d.d[0].d[0]" "t.de.in.d.d[0].f"
|
||||
= "t.de.in.d.d[0].d[1]" "t.de.in.d.d[0].t"
|
||||
= "t.de.in.d.d[2].d[0]" "t.de.in.d.d[2].f"
|
||||
= "t.de.in.d.d[2].d[1]" "t.de.in.d.d[2].t"
|
||||
= "t.de.in.d.d[1].d[0]" "t.de.in.d.d[1].f"
|
||||
= "t.de.in.d.d[1].d[1]" "t.de.in.d.d[1].t"
|
||||
= "t.de.in.d.d[0].d[0]" "t.de.in.d.d[0].f"
|
||||
= "t.de.in.d.d[0].d[1]" "t.de.in.d.d[0].t"
|
||||
= "t.de.in.v" "t.de.addr_buf.in.v"
|
||||
= "t.de.in.a" "t.de.addr_buf.in.a"
|
||||
= "t.de.in.d.d[0].f" "t.de.addr_buf.in.d.d[0].f"
|
||||
= "t.de.in.d.d[0].t" "t.de.addr_buf.in.d.d[0].t"
|
||||
= "t.de.in.d.d[0].d[0]" "t.de.addr_buf.in.d.d[0].d[0]"
|
||||
= "t.de.in.d.d[0].d[1]" "t.de.addr_buf.in.d.d[0].d[1]"
|
||||
= "t.de.in.d.d[1].f" "t.de.addr_buf.in.d.d[1].f"
|
||||
= "t.de.in.d.d[1].t" "t.de.addr_buf.in.d.d[1].t"
|
||||
= "t.de.in.d.d[1].d[0]" "t.de.addr_buf.in.d.d[1].d[0]"
|
||||
= "t.de.in.d.d[1].d[1]" "t.de.addr_buf.in.d.d[1].d[1]"
|
||||
= "t.de.in.d.d[2].f" "t.de.addr_buf.in.d.d[2].f"
|
||||
= "t.de.in.d.d[2].t" "t.de.addr_buf.in.d.d[2].t"
|
||||
= "t.de.in.d.d[2].d[0]" "t.de.addr_buf.in.d.d[2].d[0]"
|
||||
= "t.de.in.d.d[2].d[1]" "t.de.addr_buf.in.d.d[2].d[1]"
|
||||
= "t.de.in.d.d[2].d[0]" "t.de.in.d.d[2].f"
|
||||
= "t.de.in.d.d[2].d[1]" "t.de.in.d.d[2].t"
|
||||
= "t.de.in.d.d[1].d[0]" "t.de.in.d.d[1].f"
|
||||
= "t.de.in.d.d[1].d[1]" "t.de.in.d.d[1].t"
|
||||
= "t.de.in.d.d[0].d[0]" "t.de.in.d.d[0].f"
|
||||
= "t.de.in.d.d[0].d[1]" "t.de.in.d.d[0].t"
|
||||
~"t.de.vtree_y.ct.C2Els[0].c1"&~"t.de.vtree_y.ct.C2Els[0].c2"->"t.de.vtree_y.ct.C2Els[0]._y"+
|
||||
"t.de.vtree_y.ct.C2Els[0].c1"&"t.de.vtree_y.ct.C2Els[0].c2"->"t.de.vtree_y.ct.C2Els[0]._y"-
|
||||
"t.de.vtree_y.ct.C2Els[0]._y"->"t.de.vtree_y.ct.C2Els[0].y"-
|
||||
~("t.de.vtree_y.ct.C2Els[0]._y")->"t.de.vtree_y.ct.C2Els[0].y"+
|
||||
= "t.de.vtree_y.ct.supply.vdd" "t.de.vtree_y.ct.C2Els[0].vdd"
|
||||
= "t.de.vtree_y.ct.supply.vss" "t.de.vtree_y.ct.C2Els[0].vss"
|
||||
= "t.de.vtree_y.ct.in[0]" "t.de.vtree_y.ct.C2Els[0].c1"
|
||||
= "t.de.vtree_y.ct.in[0]" "t.de.vtree_y.ct.tmp[0]"
|
||||
= "t.de.vtree_y.ct.in[1]" "t.de.vtree_y.ct.C2Els[0].c2"
|
||||
= "t.de.vtree_y.ct.in[1]" "t.de.vtree_y.ct.tmp[1]"
|
||||
= "t.de.vtree_y.ct.out" "t.de.vtree_y.ct.C2Els[0].y"
|
||||
= "t.de.vtree_y.ct.out" "t.de.vtree_y.ct.tmp[2]"
|
||||
= "t.de.vtree_y.ct.in[0]" "t.de.vtree_y.OR2_tf[0].y"
|
||||
= "t.de.vtree_y.ct.in[1]" "t.de.vtree_y.OR2_tf[1].y"
|
||||
"t.de.vtree_y.OR2_tf[0].a"|"t.de.vtree_y.OR2_tf[0].b"->"t.de.vtree_y.OR2_tf[0]._y"-
|
||||
~("t.de.vtree_y.OR2_tf[0].a"|"t.de.vtree_y.OR2_tf[0].b")->"t.de.vtree_y.OR2_tf[0]._y"+
|
||||
"t.de.vtree_y.OR2_tf[0]._y"->"t.de.vtree_y.OR2_tf[0].y"-
|
||||
~("t.de.vtree_y.OR2_tf[0]._y")->"t.de.vtree_y.OR2_tf[0].y"+
|
||||
"t.de.vtree_y.OR2_tf[1].a"|"t.de.vtree_y.OR2_tf[1].b"->"t.de.vtree_y.OR2_tf[1]._y"-
|
||||
~("t.de.vtree_y.OR2_tf[1].a"|"t.de.vtree_y.OR2_tf[1].b")->"t.de.vtree_y.OR2_tf[1]._y"+
|
||||
"t.de.vtree_y.OR2_tf[1]._y"->"t.de.vtree_y.OR2_tf[1].y"-
|
||||
~("t.de.vtree_y.OR2_tf[1]._y")->"t.de.vtree_y.OR2_tf[1].y"+
|
||||
= "t.de.vtree_y.supply.vss" "t.de.vtree_y.ct.supply.vss"
|
||||
= "t.de.vtree_y.supply.vdd" "t.de.vtree_y.ct.supply.vdd"
|
||||
= "t.de.vtree_y.supply.vdd" "t.de.vtree_y.OR2_tf[1].vdd"
|
||||
= "t.de.vtree_y.supply.vdd" "t.de.vtree_y.OR2_tf[0].vdd"
|
||||
= "t.de.vtree_y.supply.vss" "t.de.vtree_y.OR2_tf[1].vss"
|
||||
= "t.de.vtree_y.supply.vss" "t.de.vtree_y.OR2_tf[0].vss"
|
||||
= "t.de.vtree_y.out" "t.de.vtree_y.ct.out"
|
||||
= "t.de.vtree_y.in.d[0].d[0]" "t.de.vtree_y.in.d[0].f"
|
||||
= "t.de.vtree_y.in.d[0].d[1]" "t.de.vtree_y.in.d[0].t"
|
||||
= "t.de.vtree_y.in.d[1].d[0]" "t.de.vtree_y.in.d[1].f"
|
||||
= "t.de.vtree_y.in.d[1].d[1]" "t.de.vtree_y.in.d[1].t"
|
||||
= "t.de.vtree_y.in.d[1].d[0]" "t.de.vtree_y.in.d[1].f"
|
||||
= "t.de.vtree_y.in.d[1].d[1]" "t.de.vtree_y.in.d[1].t"
|
||||
= "t.de.vtree_y.in.d[0].d[0]" "t.de.vtree_y.in.d[0].f"
|
||||
= "t.de.vtree_y.in.d[0].d[1]" "t.de.vtree_y.in.d[0].t"
|
||||
= "t.de.vtree_y.in.d[1].d[0]" "t.de.vtree_y.OR2_tf[1].b"
|
||||
= "t.de.vtree_y.in.d[1].d[0]" "t.de.vtree_y.in.d[1].f"
|
||||
= "t.de.vtree_y.in.d[1].d[1]" "t.de.vtree_y.OR2_tf[1].a"
|
||||
= "t.de.vtree_y.in.d[1].d[1]" "t.de.vtree_y.in.d[1].t"
|
||||
= "t.de.vtree_y.in.d[0].d[0]" "t.de.vtree_y.OR2_tf[0].b"
|
||||
= "t.de.vtree_y.in.d[0].d[0]" "t.de.vtree_y.in.d[0].f"
|
||||
= "t.de.vtree_y.in.d[0].d[1]" "t.de.vtree_y.OR2_tf[0].a"
|
||||
= "t.de.vtree_y.in.d[0].d[1]" "t.de.vtree_y.in.d[0].t"
|
||||
= "t.de.outy[0]" "t.de.atree_y[0].out"
|
||||
= "t.de.outy[1]" "t.de.atree_y[1].out"
|
||||
= "t.de.outy[2]" "t.de.atree_y[2].out"
|
||||
= "t.de.outy[3]" "t.de.atree_y[3].out"
|
||||
= "t.de.outx[0]" "t.de.atree_x[0].out"
|
||||
= "t.de.outx[1]" "t.de.atree_x[1].out"
|
||||
= "t.de.reset_B" "t.de.addr_buf.reset_B"
|
||||
"t.de.addr_buf.out_a_B_buf_t.buf1.a"->"t.de.addr_buf.out_a_B_buf_t.buf1._y"-
|
||||
~("t.de.addr_buf.out_a_B_buf_t.buf1.a")->"t.de.addr_buf.out_a_B_buf_t.buf1._y"+
|
||||
"t.de.addr_buf.out_a_B_buf_t.buf1._y"->"t.de.addr_buf.out_a_B_buf_t.buf1.y"-
|
||||
~("t.de.addr_buf.out_a_B_buf_t.buf1._y")->"t.de.addr_buf.out_a_B_buf_t.buf1.y"+
|
||||
= "t.de.addr_buf.out_a_B_buf_t.supply.vdd" "t.de.addr_buf.out_a_B_buf_t.buf1.vdd"
|
||||
= "t.de.addr_buf.out_a_B_buf_t.supply.vss" "t.de.addr_buf.out_a_B_buf_t.buf1.vss"
|
||||
= "t.de.addr_buf.out_a_B_buf_t.out[0]" "t.de.addr_buf.out_a_B_buf_t.out[2]"
|
||||
= "t.de.addr_buf.out_a_B_buf_t.out[0]" "t.de.addr_buf.out_a_B_buf_t.out[1]"
|
||||
= "t.de.addr_buf.out_a_B_buf_t.out[0]" "t.de.addr_buf.out_a_B_buf_t.buf1.y"
|
||||
= "t.de.addr_buf.out_a_B_buf_t.in" "t.de.addr_buf.out_a_B_buf_t.buf1.a"
|
||||
= "t.de.addr_buf._en_X_f[0]" "t.de.addr_buf.en_buf_f.out[0]"
|
||||
= "t.de.addr_buf._en_X_f[1]" "t.de.addr_buf.en_buf_f.out[1]"
|
||||
= "t.de.addr_buf._en_X_f[2]" "t.de.addr_buf.en_buf_f.out[2]"
|
||||
= "t.de.addr_buf._en_X_f[0]" "t.de.addr_buf.f_buf_func[2].c1"
|
||||
= "t.de.addr_buf._en_X_f[0]" "t.de.addr_buf.f_buf_func[1].c1"
|
||||
= "t.de.addr_buf._en_X_f[0]" "t.de.addr_buf.f_buf_func[0].c1"
|
||||
= "t.de.addr_buf._en_X_f[0]" "t.de.addr_buf._en_X_f[2]"
|
||||
= "t.de.addr_buf._en_X_f[0]" "t.de.addr_buf._en_X_f[1]"
|
||||
~"t.de.addr_buf.inack_ctl.c1"&~"t.de.addr_buf.inack_ctl.c2"&~"t.de.addr_buf.inack_ctl.c3"|~"t.de.addr_buf.inack_ctl.pr_B"->"t.de.addr_buf.inack_ctl._y"+
|
||||
"t.de.addr_buf.inack_ctl.c1"&"t.de.addr_buf.inack_ctl.c2"&"t.de.addr_buf.inack_ctl.c3"&"t.de.addr_buf.inack_ctl.sr_B"->"t.de.addr_buf.inack_ctl._y"-
|
||||
"t.de.addr_buf.inack_ctl._y"->"t.de.addr_buf.inack_ctl.y"-
|
||||
~("t.de.addr_buf.inack_ctl._y")->"t.de.addr_buf.inack_ctl.y"+
|
||||
"t.de.addr_buf.reset_bufarray.buf1.a"->"t.de.addr_buf.reset_bufarray.buf1._y"-
|
||||
~("t.de.addr_buf.reset_bufarray.buf1.a")->"t.de.addr_buf.reset_bufarray.buf1._y"+
|
||||
"t.de.addr_buf.reset_bufarray.buf1._y"->"t.de.addr_buf.reset_bufarray.buf1.y"-
|
||||
~("t.de.addr_buf.reset_bufarray.buf1._y")->"t.de.addr_buf.reset_bufarray.buf1.y"+
|
||||
= "t.de.addr_buf.reset_bufarray.supply.vdd" "t.de.addr_buf.reset_bufarray.buf1.vdd"
|
||||
= "t.de.addr_buf.reset_bufarray.supply.vss" "t.de.addr_buf.reset_bufarray.buf1.vss"
|
||||
= "t.de.addr_buf.reset_bufarray.out[0]" "t.de.addr_buf.reset_bufarray.out[2]"
|
||||
= "t.de.addr_buf.reset_bufarray.out[0]" "t.de.addr_buf.reset_bufarray.out[1]"
|
||||
= "t.de.addr_buf.reset_bufarray.out[0]" "t.de.addr_buf.reset_bufarray.buf1.y"
|
||||
= "t.de.addr_buf.reset_bufarray.in" "t.de.addr_buf.reset_bufarray.buf1.a"
|
||||
"t.de.addr_buf.in_v_buf.a"->"t.de.addr_buf.in_v_buf._y"-
|
||||
~("t.de.addr_buf.in_v_buf.a")->"t.de.addr_buf.in_v_buf._y"+
|
||||
"t.de.addr_buf.in_v_buf._y"->"t.de.addr_buf.in_v_buf.y"-
|
||||
~("t.de.addr_buf.in_v_buf._y")->"t.de.addr_buf.in_v_buf.y"+
|
||||
"t.de.addr_buf.out_a_inv.a"->"t.de.addr_buf.out_a_inv.y"-
|
||||
~("t.de.addr_buf.out_a_inv.a")->"t.de.addr_buf.out_a_inv.y"+
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.en_buf_f.supply.vss"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.en_buf_f.supply.vdd"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.en_buf_t.supply.vss"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.en_buf_t.supply.vdd"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.vc.supply.vss"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.vc.supply.vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.t_buf_func[2].vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.f_buf_func[2].vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.t_buf_func[1].vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.f_buf_func[1].vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.t_buf_func[0].vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.f_buf_func[0].vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.in_v_buf.vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.reset_buf.vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.en_ctl.vdd"
|
||||
= "t.de.addr_buf.supply.vdd" "t.de.addr_buf.inack_ctl.vdd"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.t_buf_func[2].vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.f_buf_func[2].vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.t_buf_func[1].vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.f_buf_func[1].vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.t_buf_func[0].vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.f_buf_func[0].vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.in_v_buf.vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.reset_buf.vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.en_ctl.vss"
|
||||
= "t.de.addr_buf.supply.vss" "t.de.addr_buf.inack_ctl.vss"
|
||||
~"t.de.addr_buf.vc.ct.C3Els[0].c1"&~"t.de.addr_buf.vc.ct.C3Els[0].c2"&~"t.de.addr_buf.vc.ct.C3Els[0].c3"->"t.de.addr_buf.vc.ct.C3Els[0]._y"+
|
||||
"t.de.addr_buf.vc.ct.C3Els[0].c1"&"t.de.addr_buf.vc.ct.C3Els[0].c2"&"t.de.addr_buf.vc.ct.C3Els[0].c3"->"t.de.addr_buf.vc.ct.C3Els[0]._y"-
|
||||
"t.de.addr_buf.vc.ct.C3Els[0]._y"->"t.de.addr_buf.vc.ct.C3Els[0].y"-
|
||||
~("t.de.addr_buf.vc.ct.C3Els[0]._y")->"t.de.addr_buf.vc.ct.C3Els[0].y"+
|
||||
= "t.de.addr_buf.vc.ct.supply.vdd" "t.de.addr_buf.vc.ct.C3Els[0].vdd"
|
||||
= "t.de.addr_buf.vc.ct.supply.vss" "t.de.addr_buf.vc.ct.C3Els[0].vss"
|
||||
= "t.de.addr_buf.vc.ct.in[0]" "t.de.addr_buf.vc.ct.C3Els[0].c1"
|
||||
= "t.de.addr_buf.vc.ct.in[0]" "t.de.addr_buf.vc.ct.tmp[0]"
|
||||
= "t.de.addr_buf.vc.ct.in[1]" "t.de.addr_buf.vc.ct.C3Els[0].c2"
|
||||
= "t.de.addr_buf.vc.ct.in[1]" "t.de.addr_buf.vc.ct.tmp[1]"
|
||||
= "t.de.addr_buf.vc.ct.in[2]" "t.de.addr_buf.vc.ct.C3Els[0].c3"
|
||||
= "t.de.addr_buf.vc.ct.in[2]" "t.de.addr_buf.vc.ct.tmp[2]"
|
||||
= "t.de.addr_buf.vc.ct.out" "t.de.addr_buf.vc.ct.C3Els[0].y"
|
||||
= "t.de.addr_buf.vc.ct.out" "t.de.addr_buf.vc.ct.tmp[3]"
|
||||
= "t.de.addr_buf.vc.ct.in[0]" "t.de.addr_buf.vc.OR2_tf[0].y"
|
||||
= "t.de.addr_buf.vc.ct.in[1]" "t.de.addr_buf.vc.OR2_tf[1].y"
|
||||
= "t.de.addr_buf.vc.ct.in[2]" "t.de.addr_buf.vc.OR2_tf[2].y"
|
||||
"t.de.addr_buf.vc.OR2_tf[0].a"|"t.de.addr_buf.vc.OR2_tf[0].b"->"t.de.addr_buf.vc.OR2_tf[0]._y"-
|
||||
~("t.de.addr_buf.vc.OR2_tf[0].a"|"t.de.addr_buf.vc.OR2_tf[0].b")->"t.de.addr_buf.vc.OR2_tf[0]._y"+
|
||||
"t.de.addr_buf.vc.OR2_tf[0]._y"->"t.de.addr_buf.vc.OR2_tf[0].y"-
|
||||
~("t.de.addr_buf.vc.OR2_tf[0]._y")->"t.de.addr_buf.vc.OR2_tf[0].y"+
|
||||
"t.de.addr_buf.vc.OR2_tf[1].a"|"t.de.addr_buf.vc.OR2_tf[1].b"->"t.de.addr_buf.vc.OR2_tf[1]._y"-
|
||||
~("t.de.addr_buf.vc.OR2_tf[1].a"|"t.de.addr_buf.vc.OR2_tf[1].b")->"t.de.addr_buf.vc.OR2_tf[1]._y"+
|
||||
"t.de.addr_buf.vc.OR2_tf[1]._y"->"t.de.addr_buf.vc.OR2_tf[1].y"-
|
||||
~("t.de.addr_buf.vc.OR2_tf[1]._y")->"t.de.addr_buf.vc.OR2_tf[1].y"+
|
||||
"t.de.addr_buf.vc.OR2_tf[2].a"|"t.de.addr_buf.vc.OR2_tf[2].b"->"t.de.addr_buf.vc.OR2_tf[2]._y"-
|
||||
~("t.de.addr_buf.vc.OR2_tf[2].a"|"t.de.addr_buf.vc.OR2_tf[2].b")->"t.de.addr_buf.vc.OR2_tf[2]._y"+
|
||||
"t.de.addr_buf.vc.OR2_tf[2]._y"->"t.de.addr_buf.vc.OR2_tf[2].y"-
|
||||
~("t.de.addr_buf.vc.OR2_tf[2]._y")->"t.de.addr_buf.vc.OR2_tf[2].y"+
|
||||
= "t.de.addr_buf.vc.supply.vss" "t.de.addr_buf.vc.ct.supply.vss"
|
||||
= "t.de.addr_buf.vc.supply.vdd" "t.de.addr_buf.vc.ct.supply.vdd"
|
||||
= "t.de.addr_buf.vc.supply.vdd" "t.de.addr_buf.vc.OR2_tf[2].vdd"
|
||||
= "t.de.addr_buf.vc.supply.vdd" "t.de.addr_buf.vc.OR2_tf[1].vdd"
|
||||
= "t.de.addr_buf.vc.supply.vdd" "t.de.addr_buf.vc.OR2_tf[0].vdd"
|
||||
= "t.de.addr_buf.vc.supply.vss" "t.de.addr_buf.vc.OR2_tf[2].vss"
|
||||
= "t.de.addr_buf.vc.supply.vss" "t.de.addr_buf.vc.OR2_tf[1].vss"
|
||||
= "t.de.addr_buf.vc.supply.vss" "t.de.addr_buf.vc.OR2_tf[0].vss"
|
||||
= "t.de.addr_buf.vc.out" "t.de.addr_buf.vc.ct.out"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[0]" "t.de.addr_buf.vc.in.d[0].f"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[1]" "t.de.addr_buf.vc.in.d[0].t"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[0]" "t.de.addr_buf.vc.in.d[1].f"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[1]" "t.de.addr_buf.vc.in.d[1].t"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[0]" "t.de.addr_buf.vc.in.d[2].f"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[1]" "t.de.addr_buf.vc.in.d[2].t"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[0]" "t.de.addr_buf.vc.in.d[2].f"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[1]" "t.de.addr_buf.vc.in.d[2].t"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[0]" "t.de.addr_buf.vc.in.d[1].f"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[1]" "t.de.addr_buf.vc.in.d[1].t"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[0]" "t.de.addr_buf.vc.in.d[0].f"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[1]" "t.de.addr_buf.vc.in.d[0].t"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[0]" "t.de.addr_buf.vc.OR2_tf[2].b"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[0]" "t.de.addr_buf.vc.in.d[2].f"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[1]" "t.de.addr_buf.vc.OR2_tf[2].a"
|
||||
= "t.de.addr_buf.vc.in.d[2].d[1]" "t.de.addr_buf.vc.in.d[2].t"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[0]" "t.de.addr_buf.vc.OR2_tf[1].b"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[0]" "t.de.addr_buf.vc.in.d[1].f"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[1]" "t.de.addr_buf.vc.OR2_tf[1].a"
|
||||
= "t.de.addr_buf.vc.in.d[1].d[1]" "t.de.addr_buf.vc.in.d[1].t"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[0]" "t.de.addr_buf.vc.OR2_tf[0].b"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[0]" "t.de.addr_buf.vc.in.d[0].f"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[1]" "t.de.addr_buf.vc.OR2_tf[0].a"
|
||||
= "t.de.addr_buf.vc.in.d[0].d[1]" "t.de.addr_buf.vc.in.d[0].t"
|
||||
= "t.de.addr_buf._out_a_BX_f[0]" "t.de.addr_buf.out_a_B_buf_t.out[0]"
|
||||
= "t.de.addr_buf._out_a_BX_f[1]" "t.de.addr_buf.out_a_B_buf_t.out[1]"
|
||||
= "t.de.addr_buf._out_a_BX_f[2]" "t.de.addr_buf.out_a_B_buf_t.out[2]"
|
||||
= "t.de.addr_buf._out_a_BX_f[0]" "t.de.addr_buf.f_buf_func[2].c2"
|
||||
= "t.de.addr_buf._out_a_BX_f[0]" "t.de.addr_buf.f_buf_func[1].c2"
|
||||
= "t.de.addr_buf._out_a_BX_f[0]" "t.de.addr_buf.f_buf_func[0].c2"
|
||||
= "t.de.addr_buf._out_a_BX_f[0]" "t.de.addr_buf._out_a_BX_f[2]"
|
||||
= "t.de.addr_buf._out_a_BX_f[0]" "t.de.addr_buf._out_a_BX_f[1]"
|
||||
"t.de.addr_buf.out_a_B_buf_f.buf1.a"->"t.de.addr_buf.out_a_B_buf_f.buf1._y"-
|
||||
~("t.de.addr_buf.out_a_B_buf_f.buf1.a")->"t.de.addr_buf.out_a_B_buf_f.buf1._y"+
|
||||
"t.de.addr_buf.out_a_B_buf_f.buf1._y"->"t.de.addr_buf.out_a_B_buf_f.buf1.y"-
|
||||
~("t.de.addr_buf.out_a_B_buf_f.buf1._y")->"t.de.addr_buf.out_a_B_buf_f.buf1.y"+
|
||||
= "t.de.addr_buf.out_a_B_buf_f.supply.vdd" "t.de.addr_buf.out_a_B_buf_f.buf1.vdd"
|
||||
= "t.de.addr_buf.out_a_B_buf_f.supply.vss" "t.de.addr_buf.out_a_B_buf_f.buf1.vss"
|
||||
= "t.de.addr_buf.out_a_B_buf_f.out[0]" "t.de.addr_buf.out_a_B_buf_f.out[2]"
|
||||
= "t.de.addr_buf.out_a_B_buf_f.out[0]" "t.de.addr_buf.out_a_B_buf_f.out[1]"
|
||||
= "t.de.addr_buf.out_a_B_buf_f.out[0]" "t.de.addr_buf.out_a_B_buf_f.buf1.y"
|
||||
= "t.de.addr_buf.out_a_B_buf_f.in" "t.de.addr_buf.out_a_B_buf_f.buf1.a"
|
||||
= "t.de.addr_buf._en" "t.de.addr_buf.en_buf_f.in"
|
||||
= "t.de.addr_buf._en" "t.de.addr_buf.en_buf_t.in"
|
||||
= "t.de.addr_buf._en" "t.de.addr_buf.en_ctl.y"
|
||||
= "t.de.addr_buf._en" "t.de.addr_buf.inack_ctl.c1"
|
||||
~"t.de.addr_buf.en_ctl.p1"&~"t.de.addr_buf.en_ctl.c1"->"t.de.addr_buf.en_ctl.y"+
|
||||
"t.de.addr_buf.en_ctl.c1"->"t.de.addr_buf.en_ctl.y"-
|
||||
= "t.de.addr_buf.out.d.d[0].d[0]" "t.de.addr_buf.out.d.d[0].f"
|
||||
= "t.de.addr_buf.out.d.d[0].d[1]" "t.de.addr_buf.out.d.d[0].t"
|
||||
= "t.de.addr_buf.out.d.d[1].d[0]" "t.de.addr_buf.out.d.d[1].f"
|
||||
= "t.de.addr_buf.out.d.d[1].d[1]" "t.de.addr_buf.out.d.d[1].t"
|
||||
= "t.de.addr_buf.out.d.d[2].d[0]" "t.de.addr_buf.out.d.d[2].f"
|
||||
= "t.de.addr_buf.out.d.d[2].d[1]" "t.de.addr_buf.out.d.d[2].t"
|
||||
= "t.de.addr_buf.out.d.d[2].d[0]" "t.de.addr_buf.out.d.d[2].f"
|
||||
= "t.de.addr_buf.out.d.d[2].d[1]" "t.de.addr_buf.out.d.d[2].t"
|
||||
= "t.de.addr_buf.out.d.d[1].d[0]" "t.de.addr_buf.out.d.d[1].f"
|
||||
= "t.de.addr_buf.out.d.d[1].d[1]" "t.de.addr_buf.out.d.d[1].t"
|
||||
= "t.de.addr_buf.out.d.d[0].d[0]" "t.de.addr_buf.out.d.d[0].f"
|
||||
= "t.de.addr_buf.out.d.d[0].d[1]" "t.de.addr_buf.out.d.d[0].t"
|
||||
= "t.de.addr_buf.out.d.d[2].d[0]" "t.de.addr_buf.out.d.d[2].f"
|
||||
= "t.de.addr_buf.out.d.d[2].d[1]" "t.de.addr_buf.out.d.d[2].t"
|
||||
= "t.de.addr_buf.out.d.d[1].d[0]" "t.de.addr_buf.out.d.d[1].f"
|
||||
= "t.de.addr_buf.out.d.d[1].d[1]" "t.de.addr_buf.out.d.d[1].t"
|
||||
= "t.de.addr_buf.out.d.d[0].d[0]" "t.de.addr_buf.out.d.d[0].f"
|
||||
= "t.de.addr_buf.out.d.d[0].d[1]" "t.de.addr_buf.out.d.d[0].t"
|
||||
= "t.de.addr_buf.out.a" "t.de.addr_buf.out_a_inv.a"
|
||||
= "t.de.addr_buf.out.v" "t.de.addr_buf.en_ctl.p1"
|
||||
= "t.de.addr_buf.out.v" "t.de.addr_buf.inack_ctl.c3"
|
||||
= "t.de.addr_buf.out.d.d[2].d[0]" "t.de.addr_buf.f_buf_func[2].y"
|
||||
= "t.de.addr_buf.out.d.d[2].d[0]" "t.de.addr_buf.out.d.d[2].f"
|
||||
= "t.de.addr_buf.out.d.d[2].d[1]" "t.de.addr_buf.t_buf_func[2].y"
|
||||
= "t.de.addr_buf.out.d.d[2].d[1]" "t.de.addr_buf.out.d.d[2].t"
|
||||
= "t.de.addr_buf.out.d.d[1].d[0]" "t.de.addr_buf.f_buf_func[1].y"
|
||||
= "t.de.addr_buf.out.d.d[1].d[0]" "t.de.addr_buf.out.d.d[1].f"
|
||||
= "t.de.addr_buf.out.d.d[1].d[1]" "t.de.addr_buf.t_buf_func[1].y"
|
||||
= "t.de.addr_buf.out.d.d[1].d[1]" "t.de.addr_buf.out.d.d[1].t"
|
||||
= "t.de.addr_buf.out.d.d[0].d[0]" "t.de.addr_buf.f_buf_func[0].y"
|
||||
= "t.de.addr_buf.out.d.d[0].d[0]" "t.de.addr_buf.out.d.d[0].f"
|
||||
= "t.de.addr_buf.out.d.d[0].d[1]" "t.de.addr_buf.t_buf_func[0].y"
|
||||
= "t.de.addr_buf.out.d.d[0].d[1]" "t.de.addr_buf.out.d.d[0].t"
|
||||
= "t.de.addr_buf.in.d.d[0].d[0]" "t.de.addr_buf.in.d.d[0].f"
|
||||
= "t.de.addr_buf.in.d.d[0].d[1]" "t.de.addr_buf.in.d.d[0].t"
|
||||
= "t.de.addr_buf.in.d.d[1].d[0]" "t.de.addr_buf.in.d.d[1].f"
|
||||
= "t.de.addr_buf.in.d.d[1].d[1]" "t.de.addr_buf.in.d.d[1].t"
|
||||
= "t.de.addr_buf.in.d.d[2].d[0]" "t.de.addr_buf.in.d.d[2].f"
|
||||
= "t.de.addr_buf.in.d.d[2].d[1]" "t.de.addr_buf.in.d.d[2].t"
|
||||
= "t.de.addr_buf.in.d.d[2].d[0]" "t.de.addr_buf.in.d.d[2].f"
|
||||
= "t.de.addr_buf.in.d.d[2].d[1]" "t.de.addr_buf.in.d.d[2].t"
|
||||
= "t.de.addr_buf.in.d.d[1].d[0]" "t.de.addr_buf.in.d.d[1].f"
|
||||
= "t.de.addr_buf.in.d.d[1].d[1]" "t.de.addr_buf.in.d.d[1].t"
|
||||
= "t.de.addr_buf.in.d.d[0].d[0]" "t.de.addr_buf.in.d.d[0].f"
|
||||
= "t.de.addr_buf.in.d.d[0].d[1]" "t.de.addr_buf.in.d.d[0].t"
|
||||
= "t.de.addr_buf.in.d.d[2].d[0]" "t.de.addr_buf.in.d.d[2].f"
|
||||
= "t.de.addr_buf.in.d.d[2].d[1]" "t.de.addr_buf.in.d.d[2].t"
|
||||
= "t.de.addr_buf.in.d.d[1].d[0]" "t.de.addr_buf.in.d.d[1].f"
|
||||
= "t.de.addr_buf.in.d.d[1].d[1]" "t.de.addr_buf.in.d.d[1].t"
|
||||
= "t.de.addr_buf.in.d.d[0].d[0]" "t.de.addr_buf.in.d.d[0].f"
|
||||
= "t.de.addr_buf.in.d.d[0].d[1]" "t.de.addr_buf.in.d.d[0].t"
|
||||
= "t.de.addr_buf.in.d.d[0].f" "t.de.addr_buf.vc.in.d[0].f"
|
||||
= "t.de.addr_buf.in.d.d[0].t" "t.de.addr_buf.vc.in.d[0].t"
|
||||
= "t.de.addr_buf.in.d.d[0].d[0]" "t.de.addr_buf.vc.in.d[0].d[0]"
|
||||
= "t.de.addr_buf.in.d.d[0].d[1]" "t.de.addr_buf.vc.in.d[0].d[1]"
|
||||
= "t.de.addr_buf.in.d.d[1].f" "t.de.addr_buf.vc.in.d[1].f"
|
||||
= "t.de.addr_buf.in.d.d[1].t" "t.de.addr_buf.vc.in.d[1].t"
|
||||
= "t.de.addr_buf.in.d.d[1].d[0]" "t.de.addr_buf.vc.in.d[1].d[0]"
|
||||
= "t.de.addr_buf.in.d.d[1].d[1]" "t.de.addr_buf.vc.in.d[1].d[1]"
|
||||
= "t.de.addr_buf.in.d.d[2].f" "t.de.addr_buf.vc.in.d[2].f"
|
||||
= "t.de.addr_buf.in.d.d[2].t" "t.de.addr_buf.vc.in.d[2].t"
|
||||
= "t.de.addr_buf.in.d.d[2].d[0]" "t.de.addr_buf.vc.in.d[2].d[0]"
|
||||
= "t.de.addr_buf.in.d.d[2].d[1]" "t.de.addr_buf.vc.in.d[2].d[1]"
|
||||
= "t.de.addr_buf.in.a" "t.de.addr_buf.en_ctl.c1"
|
||||
= "t.de.addr_buf.in.a" "t.de.addr_buf.inack_ctl.y"
|
||||
= "t.de.addr_buf.in.v" "t.de.addr_buf.in_v_buf.y"
|
||||
= "t.de.addr_buf.in.v" "t.de.addr_buf.inack_ctl.c2"
|
||||
= "t.de.addr_buf.in.d.d[2].d[0]" "t.de.addr_buf.f_buf_func[2].n1"
|
||||
= "t.de.addr_buf.in.d.d[2].d[0]" "t.de.addr_buf.in.d.d[2].f"
|
||||
= "t.de.addr_buf.in.d.d[2].d[1]" "t.de.addr_buf.t_buf_func[2].n1"
|
||||
= "t.de.addr_buf.in.d.d[2].d[1]" "t.de.addr_buf.in.d.d[2].t"
|
||||
= "t.de.addr_buf.in.d.d[1].d[0]" "t.de.addr_buf.f_buf_func[1].n1"
|
||||
= "t.de.addr_buf.in.d.d[1].d[0]" "t.de.addr_buf.in.d.d[1].f"
|
||||
= "t.de.addr_buf.in.d.d[1].d[1]" "t.de.addr_buf.t_buf_func[1].n1"
|
||||
= "t.de.addr_buf.in.d.d[1].d[1]" "t.de.addr_buf.in.d.d[1].t"
|
||||
= "t.de.addr_buf.in.d.d[0].d[0]" "t.de.addr_buf.f_buf_func[0].n1"
|
||||
= "t.de.addr_buf.in.d.d[0].d[0]" "t.de.addr_buf.in.d.d[0].f"
|
||||
= "t.de.addr_buf.in.d.d[0].d[1]" "t.de.addr_buf.t_buf_func[0].n1"
|
||||
= "t.de.addr_buf.in.d.d[0].d[1]" "t.de.addr_buf.in.d.d[0].t"
|
||||
"t.de.addr_buf.reset_buf.a"->"t.de.addr_buf.reset_buf._y"-
|
||||
~("t.de.addr_buf.reset_buf.a")->"t.de.addr_buf.reset_buf._y"+
|
||||
"t.de.addr_buf.reset_buf._y"->"t.de.addr_buf.reset_buf.y"-
|
||||
~("t.de.addr_buf.reset_buf._y")->"t.de.addr_buf.reset_buf.y"+
|
||||
= "t.de.addr_buf._in_v" "t.de.addr_buf.in_v_buf.a"
|
||||
= "t.de.addr_buf._in_v" "t.de.addr_buf.vc.out"
|
||||
= "t.de.addr_buf._reset_BX" "t.de.addr_buf.reset_bufarray.in"
|
||||
= "t.de.addr_buf._reset_BX" "t.de.addr_buf.reset_buf.y"
|
||||
= "t.de.addr_buf._reset_BX" "t.de.addr_buf.inack_ctl.sr_B"
|
||||
= "t.de.addr_buf._reset_BX" "t.de.addr_buf.inack_ctl.pr_B"
|
||||
= "t.de.addr_buf.reset_B" "t.de.addr_buf.reset_buf.a"
|
||||
= "t.de.addr_buf._out_a_BX_t[0]" "t.de.addr_buf.out_a_B_buf_f.out[0]"
|
||||
= "t.de.addr_buf._out_a_BX_t[1]" "t.de.addr_buf.out_a_B_buf_f.out[1]"
|
||||
= "t.de.addr_buf._out_a_BX_t[2]" "t.de.addr_buf.out_a_B_buf_f.out[2]"
|
||||
= "t.de.addr_buf._out_a_BX_t[0]" "t.de.addr_buf.t_buf_func[2].c2"
|
||||
= "t.de.addr_buf._out_a_BX_t[0]" "t.de.addr_buf.t_buf_func[1].c2"
|
||||
= "t.de.addr_buf._out_a_BX_t[0]" "t.de.addr_buf.t_buf_func[0].c2"
|
||||
= "t.de.addr_buf._out_a_BX_t[0]" "t.de.addr_buf._out_a_BX_t[2]"
|
||||
= "t.de.addr_buf._out_a_BX_t[0]" "t.de.addr_buf._out_a_BX_t[1]"
|
||||
"t.de.addr_buf.en_buf_f.buf1.a"->"t.de.addr_buf.en_buf_f.buf1._y"-
|
||||
~("t.de.addr_buf.en_buf_f.buf1.a")->"t.de.addr_buf.en_buf_f.buf1._y"+
|
||||
"t.de.addr_buf.en_buf_f.buf1._y"->"t.de.addr_buf.en_buf_f.buf1.y"-
|
||||
~("t.de.addr_buf.en_buf_f.buf1._y")->"t.de.addr_buf.en_buf_f.buf1.y"+
|
||||
= "t.de.addr_buf.en_buf_f.supply.vdd" "t.de.addr_buf.en_buf_f.buf1.vdd"
|
||||
= "t.de.addr_buf.en_buf_f.supply.vss" "t.de.addr_buf.en_buf_f.buf1.vss"
|
||||
= "t.de.addr_buf.en_buf_f.out[0]" "t.de.addr_buf.en_buf_f.out[2]"
|
||||
= "t.de.addr_buf.en_buf_f.out[0]" "t.de.addr_buf.en_buf_f.out[1]"
|
||||
= "t.de.addr_buf.en_buf_f.out[0]" "t.de.addr_buf.en_buf_f.buf1.y"
|
||||
= "t.de.addr_buf.en_buf_f.in" "t.de.addr_buf.en_buf_f.buf1.a"
|
||||
"t.de.addr_buf.en_buf_t.buf1.a"->"t.de.addr_buf.en_buf_t.buf1._y"-
|
||||
~("t.de.addr_buf.en_buf_t.buf1.a")->"t.de.addr_buf.en_buf_t.buf1._y"+
|
||||
"t.de.addr_buf.en_buf_t.buf1._y"->"t.de.addr_buf.en_buf_t.buf1.y"-
|
||||
~("t.de.addr_buf.en_buf_t.buf1._y")->"t.de.addr_buf.en_buf_t.buf1.y"+
|
||||
= "t.de.addr_buf.en_buf_t.supply.vdd" "t.de.addr_buf.en_buf_t.buf1.vdd"
|
||||
= "t.de.addr_buf.en_buf_t.supply.vss" "t.de.addr_buf.en_buf_t.buf1.vss"
|
||||
= "t.de.addr_buf.en_buf_t.out[0]" "t.de.addr_buf.en_buf_t.out[2]"
|
||||
= "t.de.addr_buf.en_buf_t.out[0]" "t.de.addr_buf.en_buf_t.out[1]"
|
||||
= "t.de.addr_buf.en_buf_t.out[0]" "t.de.addr_buf.en_buf_t.buf1.y"
|
||||
= "t.de.addr_buf.en_buf_t.in" "t.de.addr_buf.en_buf_t.buf1.a"
|
||||
= "t.de.addr_buf._out_a_B" "t.de.addr_buf.out_a_B_buf_t.in"
|
||||
= "t.de.addr_buf._out_a_B" "t.de.addr_buf.out_a_B_buf_f.in"
|
||||
= "t.de.addr_buf._out_a_B" "t.de.addr_buf.out_a_inv.y"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.reset_bufarray.out[0]"
|
||||
= "t.de.addr_buf._reset_BXX[1]" "t.de.addr_buf.reset_bufarray.out[1]"
|
||||
= "t.de.addr_buf._reset_BXX[2]" "t.de.addr_buf.reset_bufarray.out[2]"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.f_buf_func[2].sr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.f_buf_func[2].pr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.t_buf_func[2].sr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.t_buf_func[2].pr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.f_buf_func[1].sr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.f_buf_func[1].pr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.t_buf_func[1].sr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.t_buf_func[1].pr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.f_buf_func[0].sr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.f_buf_func[0].pr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.t_buf_func[0].sr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf.t_buf_func[0].pr_B"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf._reset_BXX[2]"
|
||||
= "t.de.addr_buf._reset_BXX[0]" "t.de.addr_buf._reset_BXX[1]"
|
||||
~"t.de.addr_buf.t_buf_func[0].c1"&~"t.de.addr_buf.t_buf_func[0].c2"|~"t.de.addr_buf.t_buf_func[0].pr_B"->"t.de.addr_buf.t_buf_func[0]._y"+
|
||||
"t.de.addr_buf.t_buf_func[0].c1"&"t.de.addr_buf.t_buf_func[0].c2"&"t.de.addr_buf.t_buf_func[0].n1"&"t.de.addr_buf.t_buf_func[0].sr_B"->"t.de.addr_buf.t_buf_func[0]._y"-
|
||||
"t.de.addr_buf.t_buf_func[0]._y"->"t.de.addr_buf.t_buf_func[0].y"-
|
||||
~("t.de.addr_buf.t_buf_func[0]._y")->"t.de.addr_buf.t_buf_func[0].y"+
|
||||
~"t.de.addr_buf.t_buf_func[1].c1"&~"t.de.addr_buf.t_buf_func[1].c2"|~"t.de.addr_buf.t_buf_func[1].pr_B"->"t.de.addr_buf.t_buf_func[1]._y"+
|
||||
"t.de.addr_buf.t_buf_func[1].c1"&"t.de.addr_buf.t_buf_func[1].c2"&"t.de.addr_buf.t_buf_func[1].n1"&"t.de.addr_buf.t_buf_func[1].sr_B"->"t.de.addr_buf.t_buf_func[1]._y"-
|
||||
"t.de.addr_buf.t_buf_func[1]._y"->"t.de.addr_buf.t_buf_func[1].y"-
|
||||
~("t.de.addr_buf.t_buf_func[1]._y")->"t.de.addr_buf.t_buf_func[1].y"+
|
||||
~"t.de.addr_buf.t_buf_func[2].c1"&~"t.de.addr_buf.t_buf_func[2].c2"|~"t.de.addr_buf.t_buf_func[2].pr_B"->"t.de.addr_buf.t_buf_func[2]._y"+
|
||||
"t.de.addr_buf.t_buf_func[2].c1"&"t.de.addr_buf.t_buf_func[2].c2"&"t.de.addr_buf.t_buf_func[2].n1"&"t.de.addr_buf.t_buf_func[2].sr_B"->"t.de.addr_buf.t_buf_func[2]._y"-
|
||||
"t.de.addr_buf.t_buf_func[2]._y"->"t.de.addr_buf.t_buf_func[2].y"-
|
||||
~("t.de.addr_buf.t_buf_func[2]._y")->"t.de.addr_buf.t_buf_func[2].y"+
|
||||
~"t.de.addr_buf.f_buf_func[0].c1"&~"t.de.addr_buf.f_buf_func[0].c2"|~"t.de.addr_buf.f_buf_func[0].pr_B"->"t.de.addr_buf.f_buf_func[0]._y"+
|
||||
"t.de.addr_buf.f_buf_func[0].c1"&"t.de.addr_buf.f_buf_func[0].c2"&"t.de.addr_buf.f_buf_func[0].n1"&"t.de.addr_buf.f_buf_func[0].sr_B"->"t.de.addr_buf.f_buf_func[0]._y"-
|
||||
"t.de.addr_buf.f_buf_func[0]._y"->"t.de.addr_buf.f_buf_func[0].y"-
|
||||
~("t.de.addr_buf.f_buf_func[0]._y")->"t.de.addr_buf.f_buf_func[0].y"+
|
||||
~"t.de.addr_buf.f_buf_func[1].c1"&~"t.de.addr_buf.f_buf_func[1].c2"|~"t.de.addr_buf.f_buf_func[1].pr_B"->"t.de.addr_buf.f_buf_func[1]._y"+
|
||||
"t.de.addr_buf.f_buf_func[1].c1"&"t.de.addr_buf.f_buf_func[1].c2"&"t.de.addr_buf.f_buf_func[1].n1"&"t.de.addr_buf.f_buf_func[1].sr_B"->"t.de.addr_buf.f_buf_func[1]._y"-
|
||||
"t.de.addr_buf.f_buf_func[1]._y"->"t.de.addr_buf.f_buf_func[1].y"-
|
||||
~("t.de.addr_buf.f_buf_func[1]._y")->"t.de.addr_buf.f_buf_func[1].y"+
|
||||
~"t.de.addr_buf.f_buf_func[2].c1"&~"t.de.addr_buf.f_buf_func[2].c2"|~"t.de.addr_buf.f_buf_func[2].pr_B"->"t.de.addr_buf.f_buf_func[2]._y"+
|
||||
"t.de.addr_buf.f_buf_func[2].c1"&"t.de.addr_buf.f_buf_func[2].c2"&"t.de.addr_buf.f_buf_func[2].n1"&"t.de.addr_buf.f_buf_func[2].sr_B"->"t.de.addr_buf.f_buf_func[2]._y"-
|
||||
"t.de.addr_buf.f_buf_func[2]._y"->"t.de.addr_buf.f_buf_func[2].y"-
|
||||
~("t.de.addr_buf.f_buf_func[2]._y")->"t.de.addr_buf.f_buf_func[2].y"+
|
||||
= "t.de.addr_buf._en_X_t[0]" "t.de.addr_buf.en_buf_t.out[0]"
|
||||
= "t.de.addr_buf._en_X_t[1]" "t.de.addr_buf.en_buf_t.out[1]"
|
||||
= "t.de.addr_buf._en_X_t[2]" "t.de.addr_buf.en_buf_t.out[2]"
|
||||
= "t.de.addr_buf._en_X_t[0]" "t.de.addr_buf.t_buf_func[2].c1"
|
||||
= "t.de.addr_buf._en_X_t[0]" "t.de.addr_buf.t_buf_func[1].c1"
|
||||
= "t.de.addr_buf._en_X_t[0]" "t.de.addr_buf.t_buf_func[0].c1"
|
||||
= "t.de.addr_buf._en_X_t[0]" "t.de.addr_buf._en_X_t[2]"
|
||||
= "t.de.addr_buf._en_X_t[0]" "t.de.addr_buf._en_X_t[1]"
|
||||
"t.de.vtree_x.ct.b.a"->"t.de.vtree_x.ct.b._y"-
|
||||
~("t.de.vtree_x.ct.b.a")->"t.de.vtree_x.ct.b._y"+
|
||||
"t.de.vtree_x.ct.b._y"->"t.de.vtree_x.ct.b.y"-
|
||||
~("t.de.vtree_x.ct.b._y")->"t.de.vtree_x.ct.b.y"+
|
||||
= "t.de.vtree_x.ct.supply.vdd" "t.de.vtree_x.ct.b.vdd"
|
||||
= "t.de.vtree_x.ct.supply.vss" "t.de.vtree_x.ct.b.vss"
|
||||
= "t.de.vtree_x.ct.out" "t.de.vtree_x.ct.b.y"
|
||||
= "t.de.vtree_x.ct.in[0]" "t.de.vtree_x.ct.b.a"
|
||||
= "t.de.vtree_x.ct.in[0]" "t.de.vtree_x.OR2_tf[0].y"
|
||||
"t.de.vtree_x.OR2_tf[0].a"|"t.de.vtree_x.OR2_tf[0].b"->"t.de.vtree_x.OR2_tf[0]._y"-
|
||||
~("t.de.vtree_x.OR2_tf[0].a"|"t.de.vtree_x.OR2_tf[0].b")->"t.de.vtree_x.OR2_tf[0]._y"+
|
||||
"t.de.vtree_x.OR2_tf[0]._y"->"t.de.vtree_x.OR2_tf[0].y"-
|
||||
~("t.de.vtree_x.OR2_tf[0]._y")->"t.de.vtree_x.OR2_tf[0].y"+
|
||||
= "t.de.vtree_x.supply.vss" "t.de.vtree_x.ct.supply.vss"
|
||||
= "t.de.vtree_x.supply.vdd" "t.de.vtree_x.ct.supply.vdd"
|
||||
= "t.de.vtree_x.supply.vdd" "t.de.vtree_x.OR2_tf[0].vdd"
|
||||
= "t.de.vtree_x.supply.vss" "t.de.vtree_x.OR2_tf[0].vss"
|
||||
= "t.de.vtree_x.out" "t.de.vtree_x.ct.out"
|
||||
= "t.de.vtree_x.in.d[0].d[0]" "t.de.vtree_x.in.d[0].f"
|
||||
= "t.de.vtree_x.in.d[0].d[1]" "t.de.vtree_x.in.d[0].t"
|
||||
= "t.de.vtree_x.in.d[0].d[0]" "t.de.vtree_x.in.d[0].f"
|
||||
= "t.de.vtree_x.in.d[0].d[1]" "t.de.vtree_x.in.d[0].t"
|
||||
= "t.de.vtree_x.in.d[0].d[0]" "t.de.vtree_x.OR2_tf[0].b"
|
||||
= "t.de.vtree_x.in.d[0].d[0]" "t.de.vtree_x.in.d[0].f"
|
||||
= "t.de.vtree_x.in.d[0].d[1]" "t.de.vtree_x.OR2_tf[0].a"
|
||||
= "t.de.vtree_x.in.d[0].d[1]" "t.de.vtree_x.in.d[0].t"
|
||||
= "Vdd" "t.de.supply.vdd"
|
||||
= "GND" "t.de.supply.vss"
|
||||
= "t.dly_cfg[0]" "t.de.dly_cfg[0]"
|
||||
= "t.dly_cfg[1]" "t.de.dly_cfg[1]"
|
||||
= "t.dly_cfg[2]" "t.de.dly_cfg[2]"
|
||||
= "t.dly_cfg[3]" "t.de.dly_cfg[3]"
|
||||
= "t.out[0]" "t.ag.out[0]"
|
||||
= "t.out[1]" "t.ag.out[1]"
|
||||
= "t.out[2]" "t.ag.out[2]"
|
||||
= "t.out[3]" "t.ag.out[3]"
|
||||
= "t.out[4]" "t.ag.out[4]"
|
||||
= "t.out[5]" "t.ag.out[5]"
|
||||
= "t.out[6]" "t.ag.out[6]"
|
||||
= "t.out[7]" "t.ag.out[7]"
|
||||
= "t.in.d.d[0].d[0]" "t.in.d.d[0].f"
|
||||
= "t.in.d.d[0].d[1]" "t.in.d.d[0].t"
|
||||
= "t.in.d.d[1].d[0]" "t.in.d.d[1].f"
|
||||
= "t.in.d.d[1].d[1]" "t.in.d.d[1].t"
|
||||
= "t.in.d.d[2].d[0]" "t.in.d.d[2].f"
|
||||
= "t.in.d.d[2].d[1]" "t.in.d.d[2].t"
|
||||
= "t.in.d.d[2].d[0]" "t.in.d.d[2].f"
|
||||
= "t.in.d.d[2].d[1]" "t.in.d.d[2].t"
|
||||
= "t.in.d.d[1].d[0]" "t.in.d.d[1].f"
|
||||
= "t.in.d.d[1].d[1]" "t.in.d.d[1].t"
|
||||
= "t.in.d.d[0].d[0]" "t.in.d.d[0].f"
|
||||
= "t.in.d.d[0].d[1]" "t.in.d.d[0].t"
|
||||
= "t.in.d.d[2].d[0]" "t.in.d.d[2].f"
|
||||
= "t.in.d.d[2].d[1]" "t.in.d.d[2].t"
|
||||
= "t.in.d.d[1].d[0]" "t.in.d.d[1].f"
|
||||
= "t.in.d.d[1].d[1]" "t.in.d.d[1].t"
|
||||
= "t.in.d.d[0].d[0]" "t.in.d.d[0].f"
|
||||
= "t.in.d.d[0].d[1]" "t.in.d.d[0].t"
|
||||
= "t.in.v" "t.de.in.v"
|
||||
= "t.in.a" "t.de.in.a"
|
||||
= "t.in.d.d[0].f" "t.de.in.d.d[0].f"
|
||||
= "t.in.d.d[0].t" "t.de.in.d.d[0].t"
|
||||
= "t.in.d.d[0].d[0]" "t.de.in.d.d[0].d[0]"
|
||||
= "t.in.d.d[0].d[1]" "t.de.in.d.d[0].d[1]"
|
||||
= "t.in.d.d[1].f" "t.de.in.d.d[1].f"
|
||||
= "t.in.d.d[1].t" "t.de.in.d.d[1].t"
|
||||
= "t.in.d.d[1].d[0]" "t.de.in.d.d[1].d[0]"
|
||||
= "t.in.d.d[1].d[1]" "t.de.in.d.d[1].d[1]"
|
||||
= "t.in.d.d[2].f" "t.de.in.d.d[2].f"
|
||||
= "t.in.d.d[2].t" "t.de.in.d.d[2].t"
|
||||
= "t.in.d.d[2].d[0]" "t.de.in.d.d[2].d[0]"
|
||||
= "t.in.d.d[2].d[1]" "t.de.in.d.d[2].d[1]"
|
||||
= "t.in.d.d[2].d[0]" "t.in.d.d[2].f"
|
||||
= "t.in.d.d[2].d[1]" "t.in.d.d[2].t"
|
||||
= "t.in.d.d[1].d[0]" "t.in.d.d[1].f"
|
||||
= "t.in.d.d[1].d[1]" "t.in.d.d[1].t"
|
||||
= "t.in.d.d[0].d[0]" "t.in.d.d[0].f"
|
||||
= "t.in.d.d[0].d[1]" "t.in.d.d[0].t"
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
/*************************************************************************
|
||||
*
|
||||
* This file is part of ACT dataflow neuro library.
|
||||
* It's the testing facility for cell_lib_std.act
|
||||
*
|
||||
* Copyright (c) 2022 University of Groningen - Ole Richter
|
||||
* Copyright (c) 2022 University of Groningen - Hugh Greatorex
|
||||
* Copyright (c) 2022 University of Groningen - Michele Mastella
|
||||
* Copyright (c) 2022 University of Groningen - Madison Cotteret
|
||||
*
|
||||
* This source describes Open Hardware and is licensed under the CERN-OHL-W v2 or later
|
||||
*
|
||||
* You may redistribute and modify this documentation and make products
|
||||
* using it under the terms of the CERN-OHL-W v2 (https:/cern.ch/cern-ohl).
|
||||
* This documentation is distributed WITHOUT ANY EXPRESS OR IMPLIED
|
||||
* WARRANTY, INCLUDING OF MERCHANTABILITY, SATISFACTORY QUALITY
|
||||
* AND FITNESS FOR A PARTICULAR PURPOSE. Please see the CERN-OHL-W v2
|
||||
* for applicable conditions.
|
||||
*
|
||||
* Source location: https://git.web.rug.nl/bics/actlib_dataflow_neuro
|
||||
*
|
||||
* As per CERN-OHL-W v2 section 4.1, should You produce hardware based on
|
||||
* these sources, You must maintain the Source Location visible in its
|
||||
* documentation.
|
||||
*
|
||||
**************************************************************************
|
||||
*/
|
||||
|
||||
import "../../dataflow_neuro/coders.act";
|
||||
import globals;
|
||||
|
||||
open tmpl::dataflow_neuro;
|
||||
|
||||
defproc decoder_2d_dly_and_2_4(avMx1of2<1+2> in; bool? out[2*4], dly_cfg[4])
|
||||
|
||||
{
|
||||
bool _reset_B;
|
||||
prs {
|
||||
Reset => _reset_B-
|
||||
}
|
||||
decoder_2d_dly<1,2,2,4,4> de(.in = in, .dly_cfg = dly_cfg);
|
||||
de.supply.vdd = Vdd;
|
||||
de.supply.vss = GND;
|
||||
de.reset_B = _reset_B;
|
||||
|
||||
and_grid<2,4> ag(.inx = de.outx, .iny = de.outy, .out = out);
|
||||
ag.supply.vdd = Vdd;
|
||||
ag.supply.vss = GND;
|
||||
|
||||
}
|
||||
|
||||
decoder_2d_dly_and_2_4 t;
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
watchall
|
||||
|
||||
set-qdi-channel-neutral "t.in" 3
|
||||
set Reset 0
|
||||
|
||||
# Set delay config lines
|
||||
set t.dly_cfg[0] 1
|
||||
set t.dly_cfg[1] 1
|
||||
set t.dly_cfg[2] 1
|
||||
set t.dly_cfg[3] 1
|
||||
cycle
|
||||
|
||||
system "echo '[] set Reset 1'"
|
||||
set Reset 1
|
||||
cycle
|
||||
|
||||
system "echo '[] set Reset 0'"
|
||||
set Reset 0
|
||||
mode run
|
||||
cycle
|
||||
|
||||
system "echo '[] Sending packet in'"
|
||||
set-qdi-channel-valid "t.in" 3 7
|
||||
cycle
|
||||
assert t.in.a 1
|
||||
assert t.in.v 1
|
||||
|
||||
|
||||
# system "echo '[]' Setting ack from DLY high"
|
||||
# set b.b.addr_buf.out.a 1
|
||||
# cycle
|
||||
|
||||
# assert b.outx[0] 0
|
||||
# assert b.outx[1] 0
|
||||
# assert b.outx[2] 0
|
||||
# assert b.outx[3] 0
|
||||
# assert b.outx[4] 0
|
||||
# assert b.outx[5] 0
|
||||
# assert b.outx[6] 0
|
||||
# assert b.outx[7] 0
|
||||
|
||||
# assert b.outy[0] 0
|
||||
# assert b.outy[1] 0
|
||||
# assert b.outy[2] 0
|
||||
# assert b.outy[3] 0
|
||||
# assert b.outy[4] 0
|
||||
# assert b.outy[5] 0
|
||||
# assert b.outy[6] 0
|
||||
# assert b.outy[7] 0
|
||||
# assert b.outy[8] 0
|
||||
# assert b.outy[9] 0
|
||||
# assert b.outy[10] 0
|
||||
# assert b.outy[11] 0
|
||||
# assert b.outy[12] 0
|
||||
# assert b.outy[13] 0
|
||||
# assert b.outy[14] 0
|
||||
# assert b.outy[15] 0
|
||||
Loading…
Reference in New Issue