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added sadc encoder with inputs low active for dynapse sadcs

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alexmadison
2022-06-29 13:18:42 +02:00
parent ba7ae68651
commit 836e19a72d
6 changed files with 8831 additions and 1 deletions
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27
dataflow_neuro/coders.act
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@ -1078,7 +1078,32 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; bool! out_req_x[Nx], out_req_y[
fifo<Nc, N_BUFFERS> _fifo(.in = _enc.out, .reset_B = _reset_BX, .supply = supply);
qdi2bd<Nc, N_BD_DLY_CFG> _qdi2bd(.in = _fifo.out, .out = out, .dly_cfg = dly_cfg,
.reset_B = _reset_BX, .supply = supply);
}
}
/**
* Same as encoder1d_bd above but with inverters on in.a/r bc sadc neuron handshake
* signals are backwards lol.
*/
export template<pint Nc, N, N_BUFFERS, N_BD_DLY_CFG>
defproc encoder1d_bd_sadc(a1of1 in[N]; bd<Nc> out; bool? dly_cfg[N_BD_DLY_CFG], reset_B; power supply) {
encoder1d_bd<Nc, N, N_BUFFERS, N_BD_DLY_CFG> c(.out = out, .dly_cfg = dly_cfg,
.reset_B = reset_B, .supply = supply);
INV_X1 req_invs[N];
INV_X1 ack_invs[N];
(i:N:
req_invs[i](.a = in[i].r, .y = c.in[i].r, .vdd = supply.vdd, .vss = supply.vss);
ack_invs[i](.a = c.in[i].a, .y = in[i].a, .vdd = supply.vdd, .vss = supply.vss);
)
}
/**