altered neuron handshake design to use pullups without timing delays
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@ -715,7 +715,7 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
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bool _x_a_B2; // sorry
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bool _en;
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A_1C3P2P2N_R_X1 x_ack(); // NEEDS BUFFERING TO X4
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A_1C3P2P2N_R_X1 x_ack();
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//branch1
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x_ack.p4 = _in_x_v;
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x_ack.p5 = _x_v_B;
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@ -803,13 +803,26 @@ defproc decoder_2d_hybrid (avMx1of2<NxC+NyC> in; a1of1 out[Nx*Ny]; bool? dly_cfg
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A_2C1P1N_RB_X1 A_req(.p1 = _x_a_B, .c1 = _en, .c2 = _y_a_B, .n1 = in.r, .y = _req,
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.pr_B = _reset_BX, .sr_B = _reset_BX, .vdd = supply.vdd, .vss = supply.vss);
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// // y_req pull up
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// NAND2_X1 nand_y(.a = _y_a_B, .b = _req, .vdd = supply.vdd, .vss = supply.vss);
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// A_1P_U_X4 pu_y(.a = nand_y.y, .y = outy.r, .vdd = supply.vdd, .vss = supply.vss);
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// // x_req pull up
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// NAND3_X1 nand_x(.a = _x_a_B, .b = _req, .c = outy.a, .vdd = supply.vdd, .vss = supply.vss);
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// A_1P_U_X4 pu_x(.a = nand_x.y, .y = outx.r, .vdd = supply.vdd, .vss = supply.vss);
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// Better version with fewer timing assumptions
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// Core change is that the out acks stop the pullups without any delay.
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// y_req pull up
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NAND2_X1 nand_y(.a = _y_a_B, .b = _req, .vdd = supply.vdd, .vss = supply.vss);
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A_1P_U_X4 pu_y(.a = nand_y.y, .y = outy.r, .vdd = supply.vdd, .vss = supply.vss);
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bool _reqB;
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INV_X1 req_inv(.a = _req, .y = _reqB, .vdd= supply.vdd, .vss = supply.vss);
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A_2P_U_X4 pu_y(.a = _reqB, .b = outy.a, .y = outy.r, .vdd = supply.vdd, .vss = supply.vss);
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// x_req pull up
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NAND3_X1 nand_x(.a = _x_a_B, .b = _req, .c = outy.a, .vdd = supply.vdd, .vss = supply.vss);
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A_1P_U_X4 pu_x(.a = nand_x.y, .y = outx.r, .vdd = supply.vdd, .vss = supply.vss);
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A_3P_U_X4 pu_x(.a = outx.a, .b = _reqB, .c = _y_a_B, .y = outx.r,
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.vdd = supply.vdd, .vss = supply.vss);
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}
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